Sam Walsh
/
Candle_Simulator
First commit
Fork of PwmOut_HelloWorld by
main.cpp@3:55e383869d46, 2017-05-16 (annotated)
- Committer:
- EmbeddedSam
- Date:
- Tue May 16 14:21:57 2017 +0000
- Revision:
- 3:55e383869d46
- Parent:
- 1:5160ea45399b
first commit ;
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
mbed_official | 0:50d2b9c62765 | 1 | #include "mbed.h" |
EmbeddedSam | 3:55e383869d46 | 2 | #include <stdio.h> |
EmbeddedSam | 3:55e383869d46 | 3 | #include <stdlib.h> |
EmbeddedSam | 3:55e383869d46 | 4 | #include <time.h> |
mbedAustin | 1:5160ea45399b | 5 | |
EmbeddedSam | 3:55e383869d46 | 6 | PwmOut output(D2); |
EmbeddedSam | 3:55e383869d46 | 7 | Serial pc(USBTX, USBRX); |
EmbeddedSam | 3:55e383869d46 | 8 | |
EmbeddedSam | 3:55e383869d46 | 9 | float random_number; |
EmbeddedSam | 3:55e383869d46 | 10 | |
EmbeddedSam | 3:55e383869d46 | 11 | void Configure_System_Clocks(void); |
mbedAustin | 1:5160ea45399b | 12 | |
mbed_official | 0:50d2b9c62765 | 13 | int main() { |
EmbeddedSam | 3:55e383869d46 | 14 | |
EmbeddedSam | 3:55e383869d46 | 15 | Configure_System_Clocks(); |
EmbeddedSam | 3:55e383869d46 | 16 | output.period_us(100); // 100 kHz Period PWM Output |
EmbeddedSam | 3:55e383869d46 | 17 | output.write(0.50); // 50% Duty Cycle |
EmbeddedSam | 3:55e383869d46 | 18 | |
EmbeddedSam | 3:55e383869d46 | 19 | srand(time(NULL)); // Seed the rand function to intialise it |
EmbeddedSam | 3:55e383869d46 | 20 | |
EmbeddedSam | 3:55e383869d46 | 21 | while(1){ |
EmbeddedSam | 3:55e383869d46 | 22 | //random_number = (float)rand()/(float)RAND_MAX; // Generate random number between 0 and 1 |
EmbeddedSam | 3:55e383869d46 | 23 | random_number = 0.3; |
EmbeddedSam | 3:55e383869d46 | 24 | if(random_number <= 0.5f) |
EmbeddedSam | 3:55e383869d46 | 25 | { |
EmbeddedSam | 3:55e383869d46 | 26 | output.write(0.5); |
EmbeddedSam | 3:55e383869d46 | 27 | } |
EmbeddedSam | 3:55e383869d46 | 28 | else |
EmbeddedSam | 3:55e383869d46 | 29 | { |
EmbeddedSam | 3:55e383869d46 | 30 | output.write(0); |
EmbeddedSam | 3:55e383869d46 | 31 | } |
EmbeddedSam | 3:55e383869d46 | 32 | } |
EmbeddedSam | 3:55e383869d46 | 33 | } |
EmbeddedSam | 3:55e383869d46 | 34 | |
EmbeddedSam | 3:55e383869d46 | 35 | void Configure_System_Clocks(void){ |
EmbeddedSam | 3:55e383869d46 | 36 | PWR->CR |= PWR_CR_VOS_1; //Voltage scale 2 |
EmbeddedSam | 3:55e383869d46 | 37 | |
EmbeddedSam | 3:55e383869d46 | 38 | RCC->APB1ENR |= RCC_APB1ENR_PWREN; //APB1 Clock power enable |
EmbeddedSam | 3:55e383869d46 | 39 | |
EmbeddedSam | 3:55e383869d46 | 40 | RCC->CR |= RCC_CR_HSEON; |
EmbeddedSam | 3:55e383869d46 | 41 | while((RCC->CR & RCC_CR_HSERDY) == 0){}; //Wait for HSE Ready |
EmbeddedSam | 3:55e383869d46 | 42 | |
EmbeddedSam | 3:55e383869d46 | 43 | //RCC->CFGR |= RCC_CFGR_MCO1PRE_0; |
EmbeddedSam | 3:55e383869d46 | 44 | RCC->CFGR |= RCC_CFGR_MCO1; //MCO1 OUTPUT = 0=,1=0x02 |
EmbeddedSam | 3:55e383869d46 | 45 | |
EmbeddedSam | 3:55e383869d46 | 46 | FLASH->ACR |= FLASH_ACR_PRFTEN; //Enable Prefetch Buffer |
EmbeddedSam | 3:55e383869d46 | 47 | FLASH->ACR |= FLASH_ACR_ICEN; //Instruction Cache Enable |
EmbeddedSam | 3:55e383869d46 | 48 | FLASH->ACR |= FLASH_ACR_DCEN; //Data Cache Enable |
EmbeddedSam | 3:55e383869d46 | 49 | FLASH->ACR |= FLASH_ACR_LATENCY_2WS; //Flash 2 Wait State |
EmbeddedSam | 3:55e383869d46 | 50 | |
EmbeddedSam | 3:55e383869d46 | 51 | RCC->CFGR |= RCC_CFGR_HPRE_DIV1; //AHB1PRESCALER = HCLK = SYSCLK 1=0x00 |
EmbeddedSam | 3:55e383869d46 | 52 | RCC->CFGR |= RCC_CFGR_PPRE1_DIV2; //APB1PRESCALER = HCLK/2 2=0x04 |
EmbeddedSam | 3:55e383869d46 | 53 | RCC->CFGR |= RCC_CFGR_PPRE2_DIV1; //APB2PRESCALER = HCLK/1 |
EmbeddedSam | 3:55e383869d46 | 54 | |
EmbeddedSam | 3:55e383869d46 | 55 | RCC->CR &= ~RCC_CR_PLLON; |
EmbeddedSam | 3:55e383869d46 | 56 | |
EmbeddedSam | 3:55e383869d46 | 57 | RCC->PLLCFGR = (4ul | // PLL_M = 4 |
EmbeddedSam | 3:55e383869d46 | 58 | (84ul << 6) | // PLL_N = 84 |
EmbeddedSam | 3:55e383869d46 | 59 | (0ul << 16) | // PLL_P = 2 |
EmbeddedSam | 3:55e383869d46 | 60 | (RCC_PLLCFGR_PLLSRC_HSE) | // PLL_SRC = HSE |
EmbeddedSam | 3:55e383869d46 | 61 | (7ul << 24)); // PLL_Q = 7 |
EmbeddedSam | 3:55e383869d46 | 62 | |
EmbeddedSam | 3:55e383869d46 | 63 | RCC->CR |= RCC_CR_PLLON; // Enable PLL |
EmbeddedSam | 3:55e383869d46 | 64 | while((RCC->CR & RCC_CR_PLLRDY) == 0) __NOP(); // Wait till PLL is ready |
EmbeddedSam | 3:55e383869d46 | 65 | |
EmbeddedSam | 3:55e383869d46 | 66 | RCC->CFGR &= ~RCC_CFGR_SW; // Select PLL as system clock source |
EmbeddedSam | 3:55e383869d46 | 67 | RCC->CFGR |= RCC_CFGR_SW_PLL; |
EmbeddedSam | 3:55e383869d46 | 68 | while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_PLL); // Wait till PLL is system clock src |
EmbeddedSam | 3:55e383869d46 | 69 | //System clock should be setup for 84MHz, lets output this to MCO1 |
EmbeddedSam | 3:55e383869d46 | 70 | |
EmbeddedSam | 3:55e383869d46 | 71 | |
EmbeddedSam | 3:55e383869d46 | 72 | //Setup PA8 MCO1 as GPIO Output |
EmbeddedSam | 3:55e383869d46 | 73 | RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN; //Enable GPIOA Clock |
EmbeddedSam | 3:55e383869d46 | 74 | GPIOA->MODER |= GPIO_MODER_MODER8_1; //GPIO_MODER_MODER8_1 = 2 = Alternate Function Pin |
EmbeddedSam | 3:55e383869d46 | 75 | GPIOA->OTYPER |= (0ul<<8); //Push Pull Output |
EmbeddedSam | 3:55e383869d46 | 76 | GPIOA->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR8; //High Speed Output |
EmbeddedSam | 3:55e383869d46 | 77 | GPIOA->PUPDR |= (0ul << 2*8); //No Pullup Pulldown |
EmbeddedSam | 3:55e383869d46 | 78 | GPIOA->AFR[1] |= (0ul << 0); //AFRH register holds P8-P15 AF Config, 0x00 = AF0 for PORT8 Which from Datasheet Table 9 = MCO1 |
mbed_official | 0:50d2b9c62765 | 79 | } |