Duy tran / easy-connect-customized

my customized lib

mcr20a-rf-driver/source/MCR20Reg.h@0:8094b249013c, 2017-11-26 (annotated)

Committer:
DuyLionTran
Date:
Sun Nov 26 15:08:14 2017 +0000
Revision:
0:8094b249013c
Initial commit

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DuyLionTran 0:8094b249013c 1 /*!
DuyLionTran 0:8094b249013c 2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
DuyLionTran 0:8094b249013c 3 * All rights reserved.
DuyLionTran 0:8094b249013c 4 *
DuyLionTran 0:8094b249013c 5 * \file MCR20reg.h
DuyLionTran 0:8094b249013c 6 * MCR20 Registers
DuyLionTran 0:8094b249013c 7 *
DuyLionTran 0:8094b249013c 8 * Redistribution and use in source and binary forms, with or without modification,
DuyLionTran 0:8094b249013c 9 * are permitted provided that the following conditions are met:
DuyLionTran 0:8094b249013c 10 *
DuyLionTran 0:8094b249013c 11 * o Redistributions of source code must retain the above copyright notice, this list
DuyLionTran 0:8094b249013c 12 * of conditions and the following disclaimer.
DuyLionTran 0:8094b249013c 13 *
DuyLionTran 0:8094b249013c 14 * o Redistributions in binary form must reproduce the above copyright notice, this
DuyLionTran 0:8094b249013c 15 * list of conditions and the following disclaimer in the documentation and/or
DuyLionTran 0:8094b249013c 16 * other materials provided with the distribution.
DuyLionTran 0:8094b249013c 17 *
DuyLionTran 0:8094b249013c 18 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
DuyLionTran 0:8094b249013c 19 * contributors may be used to endorse or promote products derived from this
DuyLionTran 0:8094b249013c 20 * software without specific prior written permission.
DuyLionTran 0:8094b249013c 21 *
DuyLionTran 0:8094b249013c 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
DuyLionTran 0:8094b249013c 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
DuyLionTran 0:8094b249013c 24 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DuyLionTran 0:8094b249013c 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
DuyLionTran 0:8094b249013c 26 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
DuyLionTran 0:8094b249013c 27 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
DuyLionTran 0:8094b249013c 28 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
DuyLionTran 0:8094b249013c 29 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
DuyLionTran 0:8094b249013c 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
DuyLionTran 0:8094b249013c 31 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
DuyLionTran 0:8094b249013c 32 */
DuyLionTran 0:8094b249013c 33
DuyLionTran 0:8094b249013c 34 #ifndef __MCR20_REG_H__
DuyLionTran 0:8094b249013c 35 #define __MCR20_REG_H__
DuyLionTran 0:8094b249013c 36 /*****************************************************************************
DuyLionTran 0:8094b249013c 37 * INCLUDED HEADERS *
DuyLionTran 0:8094b249013c 38 *---------------------------------------------------------------------------*
DuyLionTran 0:8094b249013c 39 * Add to this section all the headers that this module needs to include. *
DuyLionTran 0:8094b249013c 40 * Note that it is not a good practice to include header files into header *
DuyLionTran 0:8094b249013c 41 * files, so use this section only if there is no other better solution. *
DuyLionTran 0:8094b249013c 42 *---------------------------------------------------------------------------*
DuyLionTran 0:8094b249013c 43 *****************************************************************************/
DuyLionTran 0:8094b249013c 44
DuyLionTran 0:8094b249013c 45 /****************************************************************************/
DuyLionTran 0:8094b249013c 46 /* Transceiver SPI Registers */
DuyLionTran 0:8094b249013c 47 /****************************************************************************/
DuyLionTran 0:8094b249013c 48
DuyLionTran 0:8094b249013c 49 #define TransceiverSPI_IARIndexReg (0x3E)
DuyLionTran 0:8094b249013c 50
DuyLionTran 0:8094b249013c 51 #define TransceiverSPI_ReadSelect (1<<7)
DuyLionTran 0:8094b249013c 52 #define TransceiverSPI_WriteSelect (0<<7)
DuyLionTran 0:8094b249013c 53 #define TransceiverSPI_RegisterAccessSelect (0<<6)
DuyLionTran 0:8094b249013c 54 #define TransceiverSPI_PacketBuffAccessSelect (1<<6)
DuyLionTran 0:8094b249013c 55 #define TransceiverSPI_PacketBuffBurstModeSelect (0<<5)
DuyLionTran 0:8094b249013c 56 #define TransceiverSPI_PacketBuffByteModeSelect (1<<5)
DuyLionTran 0:8094b249013c 57
DuyLionTran 0:8094b249013c 58 #define TransceiverSPI_DirectRegisterAddressMask (0x3F)
DuyLionTran 0:8094b249013c 59
DuyLionTran 0:8094b249013c 60 #define IRQSTS1 0x00
DuyLionTran 0:8094b249013c 61 #define IRQSTS2 0x01
DuyLionTran 0:8094b249013c 62 #define IRQSTS3 0x02
DuyLionTran 0:8094b249013c 63 #define PHY_CTRL1 0x03
DuyLionTran 0:8094b249013c 64 #define PHY_CTRL2 0x04
DuyLionTran 0:8094b249013c 65 #define PHY_CTRL3 0x05
DuyLionTran 0:8094b249013c 66 #define RX_FRM_LEN 0x06
DuyLionTran 0:8094b249013c 67 #define PHY_CTRL4 0x07
DuyLionTran 0:8094b249013c 68 #define SRC_CTRL 0x08
DuyLionTran 0:8094b249013c 69 #define SRC_ADDRS_SUM_LSB 0x09
DuyLionTran 0:8094b249013c 70 #define SRC_ADDRS_SUM_MSB 0x0A
DuyLionTran 0:8094b249013c 71 #define CCA1_ED_FNL 0x0B
DuyLionTran 0:8094b249013c 72 #define EVENT_TMR_LSB 0x0C
DuyLionTran 0:8094b249013c 73 #define EVENT_TMR_MSB 0x0D
DuyLionTran 0:8094b249013c 74 #define EVENT_TMR_USB 0x0E
DuyLionTran 0:8094b249013c 75 #define TIMESTAMP_LSB 0x0F
DuyLionTran 0:8094b249013c 76 #define TIMESTAMP_MSB 0x10
DuyLionTran 0:8094b249013c 77 #define TIMESTAMP_USB 0x11
DuyLionTran 0:8094b249013c 78 #define T3CMP_LSB 0x12
DuyLionTran 0:8094b249013c 79 #define T3CMP_MSB 0x13
DuyLionTran 0:8094b249013c 80 #define T3CMP_USB 0x14
DuyLionTran 0:8094b249013c 81 #define T2PRIMECMP_LSB 0x15
DuyLionTran 0:8094b249013c 82 #define T2PRIMECMP_MSB 0x16
DuyLionTran 0:8094b249013c 83 #define T1CMP_LSB 0x17
DuyLionTran 0:8094b249013c 84 #define T1CMP_MSB 0x18
DuyLionTran 0:8094b249013c 85 #define T1CMP_USB 0x19
DuyLionTran 0:8094b249013c 86 #define T2CMP_LSB 0x1A
DuyLionTran 0:8094b249013c 87 #define T2CMP_MSB 0x1B
DuyLionTran 0:8094b249013c 88 #define T2CMP_USB 0x1C
DuyLionTran 0:8094b249013c 89 #define T4CMP_LSB 0x1D
DuyLionTran 0:8094b249013c 90 #define T4CMP_MSB 0x1E
DuyLionTran 0:8094b249013c 91 #define T4CMP_USB 0x1F
DuyLionTran 0:8094b249013c 92 #define PLL_INT0 0x20
DuyLionTran 0:8094b249013c 93 #define PLL_FRAC0_LSB 0x21
DuyLionTran 0:8094b249013c 94 #define PLL_FRAC0_MSB 0x22
DuyLionTran 0:8094b249013c 95 #define PA_PWR 0x23
DuyLionTran 0:8094b249013c 96 #define SEQ_STATE 0x24
DuyLionTran 0:8094b249013c 97 #define LQI_VALUE 0x25
DuyLionTran 0:8094b249013c 98 #define RSSI_CCA_CONT 0x26
DuyLionTran 0:8094b249013c 99 //-------------- 0x27
DuyLionTran 0:8094b249013c 100 #define ASM_CTRL1 0x28
DuyLionTran 0:8094b249013c 101 #define ASM_CTRL2 0x29
DuyLionTran 0:8094b249013c 102 #define ASM_DATA_0 0x2A
DuyLionTran 0:8094b249013c 103 #define ASM_DATA_1 0x2B
DuyLionTran 0:8094b249013c 104 #define ASM_DATA_2 0x2C
DuyLionTran 0:8094b249013c 105 #define ASM_DATA_3 0x2D
DuyLionTran 0:8094b249013c 106 #define ASM_DATA_4 0x2E
DuyLionTran 0:8094b249013c 107 #define ASM_DATA_5 0x2F
DuyLionTran 0:8094b249013c 108 #define ASM_DATA_6 0x30
DuyLionTran 0:8094b249013c 109 #define ASM_DATA_7 0x31
DuyLionTran 0:8094b249013c 110 #define ASM_DATA_8 0x32
DuyLionTran 0:8094b249013c 111 #define ASM_DATA_9 0x33
DuyLionTran 0:8094b249013c 112 #define ASM_DATA_A 0x34
DuyLionTran 0:8094b249013c 113 #define ASM_DATA_B 0x35
DuyLionTran 0:8094b249013c 114 #define ASM_DATA_C 0x36
DuyLionTran 0:8094b249013c 115 #define ASM_DATA_D 0x37
DuyLionTran 0:8094b249013c 116 #define ASM_DATA_E 0x38
DuyLionTran 0:8094b249013c 117 #define ASM_DATA_F 0x39
DuyLionTran 0:8094b249013c 118 //------------------- 0x3A
DuyLionTran 0:8094b249013c 119 #define OVERWRITE_VER 0x3B
DuyLionTran 0:8094b249013c 120 #define CLK_OUT_CTRL 0x3C
DuyLionTran 0:8094b249013c 121 #define PWR_MODES 0x3D
DuyLionTran 0:8094b249013c 122 #define IAR_INDEX 0x3E
DuyLionTran 0:8094b249013c 123 #define IAR_DATA 0x3F
DuyLionTran 0:8094b249013c 124
DuyLionTran 0:8094b249013c 125
DuyLionTran 0:8094b249013c 126 #define PART_ID 0x00
DuyLionTran 0:8094b249013c 127 #define XTAL_TRIM 0x01
DuyLionTran 0:8094b249013c 128 #define PMC_LP_TRIM 0x02
DuyLionTran 0:8094b249013c 129 #define MACPANID0_LSB 0x03
DuyLionTran 0:8094b249013c 130 #define MACPANID0_MSB 0x04
DuyLionTran 0:8094b249013c 131 #define MACSHORTADDRS0_LSB 0x05
DuyLionTran 0:8094b249013c 132 #define MACSHORTADDRS0_MSB 0x06
DuyLionTran 0:8094b249013c 133 #define MACLONGADDRS0_0 0x07
DuyLionTran 0:8094b249013c 134 #define MACLONGADDRS0_8 0x08
DuyLionTran 0:8094b249013c 135 #define MACLONGADDRS0_16 0x09
DuyLionTran 0:8094b249013c 136 #define MACLONGADDRS0_24 0x0A
DuyLionTran 0:8094b249013c 137 #define MACLONGADDRS0_32 0x0B
DuyLionTran 0:8094b249013c 138 #define MACLONGADDRS0_40 0x0C
DuyLionTran 0:8094b249013c 139 #define MACLONGADDRS0_48 0x0D
DuyLionTran 0:8094b249013c 140 #define MACLONGADDRS0_56 0x0E
DuyLionTran 0:8094b249013c 141 #define RX_FRAME_FILTER 0x0F
DuyLionTran 0:8094b249013c 142 #define PLL_INT1 0x10
DuyLionTran 0:8094b249013c 143 #define PLL_FRAC1_LSB 0x11
DuyLionTran 0:8094b249013c 144 #define PLL_FRAC1_MSB 0x12
DuyLionTran 0:8094b249013c 145 #define MACPANID1_LSB 0x13
DuyLionTran 0:8094b249013c 146 #define MACPANID1_MSB 0x14
DuyLionTran 0:8094b249013c 147 #define MACSHORTADDRS1_LSB 0x15
DuyLionTran 0:8094b249013c 148 #define MACSHORTADDRS1_MSB 0x16
DuyLionTran 0:8094b249013c 149 #define MACLONGADDRS1_0 0x17
DuyLionTran 0:8094b249013c 150 #define MACLONGADDRS1_8 0x18
DuyLionTran 0:8094b249013c 151 #define MACLONGADDRS1_16 0x19
DuyLionTran 0:8094b249013c 152 #define MACLONGADDRS1_24 0x1A
DuyLionTran 0:8094b249013c 153 #define MACLONGADDRS1_32 0x1B
DuyLionTran 0:8094b249013c 154 #define MACLONGADDRS1_40 0x1C
DuyLionTran 0:8094b249013c 155 #define MACLONGADDRS1_48 0x1D
DuyLionTran 0:8094b249013c 156 #define MACLONGADDRS1_56 0x1E
DuyLionTran 0:8094b249013c 157 #define DUAL_PAN_CTRL 0x1F
DuyLionTran 0:8094b249013c 158 #define DUAL_PAN_DWELL 0x20
DuyLionTran 0:8094b249013c 159 #define DUAL_PAN_STS 0x21
DuyLionTran 0:8094b249013c 160 #define CCA1_THRESH 0x22
DuyLionTran 0:8094b249013c 161 #define CCA1_ED_OFFSET_COMP 0x23
DuyLionTran 0:8094b249013c 162 #define LQI_OFFSET_COMP 0x24
DuyLionTran 0:8094b249013c 163 #define CCA_CTRL 0x25
DuyLionTran 0:8094b249013c 164 #define CCA2_CORR_PEAKS 0x26
DuyLionTran 0:8094b249013c 165 #define CCA2_CORR_THRESH 0x27
DuyLionTran 0:8094b249013c 166 #define TMR_PRESCALE 0x28
DuyLionTran 0:8094b249013c 167 //---------------- 0x29
DuyLionTran 0:8094b249013c 168 #define GPIO_DATA 0x2A
DuyLionTran 0:8094b249013c 169 #define GPIO_DIR 0x2B
DuyLionTran 0:8094b249013c 170 #define GPIO_PUL_EN 0x2C
DuyLionTran 0:8094b249013c 171 #define GPIO_PUL_SEL 0x2D
DuyLionTran 0:8094b249013c 172 #define GPIO_DS 0x2E
DuyLionTran 0:8094b249013c 173 //-------------- 0x2F
DuyLionTran 0:8094b249013c 174 #define ANT_PAD_CTRL 0x30
DuyLionTran 0:8094b249013c 175 #define MISC_PAD_CTRL 0x31
DuyLionTran 0:8094b249013c 176 #define BSM_CTRL 0x32
DuyLionTran 0:8094b249013c 177 //--------------- 0x33
DuyLionTran 0:8094b249013c 178 #define _RNG 0x34
DuyLionTran 0:8094b249013c 179 #define RX_BYTE_COUNT 0x35
DuyLionTran 0:8094b249013c 180 #define RX_WTR_MARK 0x36
DuyLionTran 0:8094b249013c 181 #define SOFT_RESET 0x37
DuyLionTran 0:8094b249013c 182 #define TXDELAY 0x38
DuyLionTran 0:8094b249013c 183 #define ACKDELAY 0x39
DuyLionTran 0:8094b249013c 184 #define SEQ_MGR_CTRL 0x3A
DuyLionTran 0:8094b249013c 185 #define SEQ_MGR_STS 0x3B
DuyLionTran 0:8094b249013c 186 #define SEQ_T_STS 0x3C
DuyLionTran 0:8094b249013c 187 #define ABORT_STS 0x3D
DuyLionTran 0:8094b249013c 188 #define CCCA_BUSY_CNT 0x3E
DuyLionTran 0:8094b249013c 189 #define SRC_ADDR_CHECKSUM1 0x3F
DuyLionTran 0:8094b249013c 190 #define SRC_ADDR_CHECKSUM2 0x40
DuyLionTran 0:8094b249013c 191 #define SRC_TBL_VALID1 0x41
DuyLionTran 0:8094b249013c 192 #define SRC_TBL_VALID2 0x42
DuyLionTran 0:8094b249013c 193 #define FILTERFAIL_CODE1 0x43
DuyLionTran 0:8094b249013c 194 #define FILTERFAIL_CODE2 0x44
DuyLionTran 0:8094b249013c 195 #define SLOT_PRELOAD 0x45
DuyLionTran 0:8094b249013c 196 //---------------- 0x46
DuyLionTran 0:8094b249013c 197 #define CORR_VT 0x47
DuyLionTran 0:8094b249013c 198 #define SYNC_CTRL 0x48
DuyLionTran 0:8094b249013c 199 #define PN_LSB_0 0x49
DuyLionTran 0:8094b249013c 200 #define PN_LSB_1 0x4A
DuyLionTran 0:8094b249013c 201 #define PN_MSB_0 0x4B
DuyLionTran 0:8094b249013c 202 #define PN_MSB_1 0x4C
DuyLionTran 0:8094b249013c 203 #define CORR_NVAL 0x4D
DuyLionTran 0:8094b249013c 204 #define TX_MODE_CTRL 0x4E
DuyLionTran 0:8094b249013c 205 #define SNF_THR 0x4F
DuyLionTran 0:8094b249013c 206 #define FAD_THR 0x50
DuyLionTran 0:8094b249013c 207 #define ANT_AGC_CTRL 0x51
DuyLionTran 0:8094b249013c 208 #define AGC_THR1 0x52
DuyLionTran 0:8094b249013c 209 #define AGC_THR2 0x53
DuyLionTran 0:8094b249013c 210 #define AGC_HYS 0x54
DuyLionTran 0:8094b249013c 211 #define AFC 0x55
DuyLionTran 0:8094b249013c 212 //--------------- 0x56
DuyLionTran 0:8094b249013c 213 //--------------- 0x57
DuyLionTran 0:8094b249013c 214 #define PHY_STS 0x58
DuyLionTran 0:8094b249013c 215 #define RX_MAX_CORR 0x59
DuyLionTran 0:8094b249013c 216 #define RX_MAX_PREAMBLE 0x5A
DuyLionTran 0:8094b249013c 217 #define RSSI 0x5B
DuyLionTran 0:8094b249013c 218 //--------------- 0x5C
DuyLionTran 0:8094b249013c 219 //--------------- 0x5D
DuyLionTran 0:8094b249013c 220 #define PLL_DIG_CTRL 0x5E
DuyLionTran 0:8094b249013c 221 #define VCO_CAL 0x5F
DuyLionTran 0:8094b249013c 222 #define VCO_BEST_DIFF 0x60
DuyLionTran 0:8094b249013c 223 #define VCO_BIAS 0x61
DuyLionTran 0:8094b249013c 224 #define KMOD_CTRL 0x62
DuyLionTran 0:8094b249013c 225 #define KMOD_CAL 0x63
DuyLionTran 0:8094b249013c 226 #define PA_CAL 0x64
DuyLionTran 0:8094b249013c 227 #define PA_PWRCAL 0x65
DuyLionTran 0:8094b249013c 228 #define ATT_RSSI1 0x66
DuyLionTran 0:8094b249013c 229 #define ATT_RSSI2 0x67
DuyLionTran 0:8094b249013c 230 #define RSSI_OFFSET 0x68
DuyLionTran 0:8094b249013c 231 #define RSSI_SLOPE 0x69
DuyLionTran 0:8094b249013c 232 #define RSSI_CAL1 0x6A
DuyLionTran 0:8094b249013c 233 #define RSSI_CAL2 0x6B
DuyLionTran 0:8094b249013c 234 //--------------- 0x6C
DuyLionTran 0:8094b249013c 235 //--------------- 0x6D
DuyLionTran 0:8094b249013c 236 #define XTAL_CTRL 0x6E
DuyLionTran 0:8094b249013c 237 #define XTAL_COMP_MIN 0x6F
DuyLionTran 0:8094b249013c 238 #define XTAL_COMP_MAX 0x70
DuyLionTran 0:8094b249013c 239 #define XTAL_GM 0x71
DuyLionTran 0:8094b249013c 240 //--------------- 0x72
DuyLionTran 0:8094b249013c 241 //--------------- 0x73
DuyLionTran 0:8094b249013c 242 #define LNA_TUNE 0x74
DuyLionTran 0:8094b249013c 243 #define LNA_AGCGAIN 0x75
DuyLionTran 0:8094b249013c 244 //--------------- 0x76
DuyLionTran 0:8094b249013c 245 //--------------- 0x77
DuyLionTran 0:8094b249013c 246 #define CHF_PMA_GAIN 0x78
DuyLionTran 0:8094b249013c 247 #define CHF_IBUF 0x79
DuyLionTran 0:8094b249013c 248 #define CHF_QBUF 0x7A
DuyLionTran 0:8094b249013c 249 #define CHF_IRIN 0x7B
DuyLionTran 0:8094b249013c 250 #define CHF_QRIN 0x7C
DuyLionTran 0:8094b249013c 251 #define CHF_IL 0x7D
DuyLionTran 0:8094b249013c 252 #define CHF_QL 0x7E
DuyLionTran 0:8094b249013c 253 #define CHF_CC1 0x7F
DuyLionTran 0:8094b249013c 254 #define CHF_CCL 0x80
DuyLionTran 0:8094b249013c 255 #define CHF_CC2 0x81
DuyLionTran 0:8094b249013c 256 #define CHF_IROUT 0x82
DuyLionTran 0:8094b249013c 257 #define CHF_QROUT 0x83
DuyLionTran 0:8094b249013c 258 //--------------- 0x84
DuyLionTran 0:8094b249013c 259 //--------------- 0x85
DuyLionTran 0:8094b249013c 260 #define RSSI_CTRL 0x86
DuyLionTran 0:8094b249013c 261 //--------------- 0x87
DuyLionTran 0:8094b249013c 262 //--------------- 0x88
DuyLionTran 0:8094b249013c 263 #define PA_BIAS 0x89
DuyLionTran 0:8094b249013c 264 #define PA_TUNING 0x8A
DuyLionTran 0:8094b249013c 265 //--------------- 0x8B
DuyLionTran 0:8094b249013c 266 //--------------- 0x8C
DuyLionTran 0:8094b249013c 267 #define PMC_HP_TRIM 0x8D
DuyLionTran 0:8094b249013c 268 #define VREGA_TRIM 0x8E
DuyLionTran 0:8094b249013c 269 //--------------- 0x8F
DuyLionTran 0:8094b249013c 270 //--------------- 0x90
DuyLionTran 0:8094b249013c 271 #define VCO_CTRL1 0x91
DuyLionTran 0:8094b249013c 272 #define VCO_CTRL2 0x92
DuyLionTran 0:8094b249013c 273 //--------------- 0x93
DuyLionTran 0:8094b249013c 274 //--------------- 0x94
DuyLionTran 0:8094b249013c 275 #define ANA_SPARE_OUT1 0x95
DuyLionTran 0:8094b249013c 276 #define ANA_SPARE_OUT2 0x96
DuyLionTran 0:8094b249013c 277 #define ANA_SPARE_IN 0x97
DuyLionTran 0:8094b249013c 278 #define MISCELLANEOUS 0x98
DuyLionTran 0:8094b249013c 279 //--------------- 0x99
DuyLionTran 0:8094b249013c 280 #define SEQ_MGR_OVRD0 0x9A
DuyLionTran 0:8094b249013c 281 #define SEQ_MGR_OVRD1 0x9B
DuyLionTran 0:8094b249013c 282 #define SEQ_MGR_OVRD2 0x9C
DuyLionTran 0:8094b249013c 283 #define SEQ_MGR_OVRD3 0x9D
DuyLionTran 0:8094b249013c 284 #define SEQ_MGR_OVRD4 0x9E
DuyLionTran 0:8094b249013c 285 #define SEQ_MGR_OVRD5 0x9F
DuyLionTran 0:8094b249013c 286 #define SEQ_MGR_OVRD6 0xA0
DuyLionTran 0:8094b249013c 287 #define SEQ_MGR_OVRD7 0xA1
DuyLionTran 0:8094b249013c 288 //--------------- 0xA2
DuyLionTran 0:8094b249013c 289 #define TESTMODE_CTRL 0xA3
DuyLionTran 0:8094b249013c 290 #define DTM_CTRL1 0xA4
DuyLionTran 0:8094b249013c 291 #define DTM_CTRL2 0xA5
DuyLionTran 0:8094b249013c 292 #define ATM_CTRL1 0xA6
DuyLionTran 0:8094b249013c 293 #define ATM_CTRL2 0xA7
DuyLionTran 0:8094b249013c 294 #define ATM_CTRL3 0xA8
DuyLionTran 0:8094b249013c 295 //--------------- 0xA9
DuyLionTran 0:8094b249013c 296 #define LIM_FE_TEST_CTRL 0xAA
DuyLionTran 0:8094b249013c 297 #define CHF_TEST_CTRL 0xAB
DuyLionTran 0:8094b249013c 298 #define VCO_TEST_CTRL 0xAC
DuyLionTran 0:8094b249013c 299 #define PLL_TEST_CTRL 0xAD
DuyLionTran 0:8094b249013c 300 #define PA_TEST_CTRL 0xAE
DuyLionTran 0:8094b249013c 301 #define PMC_TEST_CTRL 0xAF
DuyLionTran 0:8094b249013c 302 #define SCAN_DTM_PROTECT_1 0xFE
DuyLionTran 0:8094b249013c 303 #define SCAN_DTM_PROTECT_0 0xFF
DuyLionTran 0:8094b249013c 304
DuyLionTran 0:8094b249013c 305 // IRQSTS1 bits
DuyLionTran 0:8094b249013c 306 #define cIRQSTS1_RX_FRM_PEND (1<<7)
DuyLionTran 0:8094b249013c 307 #define cIRQSTS1_PLL_UNLOCK_IRQ (1<<6)
DuyLionTran 0:8094b249013c 308 #define cIRQSTS1_FILTERFAIL_IRQ (1<<5)
DuyLionTran 0:8094b249013c 309 #define cIRQSTS1_RXWTRMRKIRQ (1<<4)
DuyLionTran 0:8094b249013c 310 #define cIRQSTS1_CCAIRQ (1<<3)
DuyLionTran 0:8094b249013c 311 #define cIRQSTS1_RXIRQ (1<<2)
DuyLionTran 0:8094b249013c 312 #define cIRQSTS1_TXIRQ (1<<1)
DuyLionTran 0:8094b249013c 313 #define cIRQSTS1_SEQIRQ (1<<0)
DuyLionTran 0:8094b249013c 314
DuyLionTran 0:8094b249013c 315 typedef union regIRQSTS1_tag{
DuyLionTran 0:8094b249013c 316 uint8_t byte;
DuyLionTran 0:8094b249013c 317 struct{
DuyLionTran 0:8094b249013c 318 uint8_t SEQIRQ:1;
DuyLionTran 0:8094b249013c 319 uint8_t TXIRQ:1;
DuyLionTran 0:8094b249013c 320 uint8_t RXIRQ:1;
DuyLionTran 0:8094b249013c 321 uint8_t CCAIRQ:1;
DuyLionTran 0:8094b249013c 322 uint8_t RXWTRMRKIRQ:1;
DuyLionTran 0:8094b249013c 323 uint8_t FILTERFAIL_IRQ:1;
DuyLionTran 0:8094b249013c 324 uint8_t PLL_UNLOCK_IRQ:1;
DuyLionTran 0:8094b249013c 325 uint8_t RX_FRM_PEND:1;
DuyLionTran 0:8094b249013c 326 }bit;
DuyLionTran 0:8094b249013c 327 } regIRQSTS1_t;
DuyLionTran 0:8094b249013c 328
DuyLionTran 0:8094b249013c 329 // IRQSTS2 bits
DuyLionTran 0:8094b249013c 330 #define cIRQSTS2_CRCVALID (1<<7)
DuyLionTran 0:8094b249013c 331 #define cIRQSTS2_CCA (1<<6)
DuyLionTran 0:8094b249013c 332 #define cIRQSTS2_SRCADDR (1<<5)
DuyLionTran 0:8094b249013c 333 #define cIRQSTS2_PI (1<<4)
DuyLionTran 0:8094b249013c 334 #define cIRQSTS2_TMRSTATUS (1<<3)
DuyLionTran 0:8094b249013c 335 #define cIRQSTS2_ASM_IRQ (1<<2)
DuyLionTran 0:8094b249013c 336 #define cIRQSTS2_PB_ERR_IRQ (1<<1)
DuyLionTran 0:8094b249013c 337 #define cIRQSTS2_WAKE_IRQ (1<<0)
DuyLionTran 0:8094b249013c 338
DuyLionTran 0:8094b249013c 339 typedef union regIRQSTS2_tag{
DuyLionTran 0:8094b249013c 340 uint8_t byte;
DuyLionTran 0:8094b249013c 341 struct{
DuyLionTran 0:8094b249013c 342 uint8_t WAKE_IRQ:1;
DuyLionTran 0:8094b249013c 343 uint8_t PB_ERR_IRQ:1;
DuyLionTran 0:8094b249013c 344 uint8_t ASM_IRQ:1;
DuyLionTran 0:8094b249013c 345 uint8_t TMRSTATUS:1;
DuyLionTran 0:8094b249013c 346 uint8_t PI:1;
DuyLionTran 0:8094b249013c 347 uint8_t SRCADDR:1;
DuyLionTran 0:8094b249013c 348 uint8_t CCA:1;
DuyLionTran 0:8094b249013c 349 uint8_t CRCVALID:1;
DuyLionTran 0:8094b249013c 350 }bit;
DuyLionTran 0:8094b249013c 351 } regIRQSTS2_t;
DuyLionTran 0:8094b249013c 352
DuyLionTran 0:8094b249013c 353 // IRQSTS3 bits
DuyLionTran 0:8094b249013c 354 #define cIRQSTS3_TMR4MSK (1<<7)
DuyLionTran 0:8094b249013c 355 #define cIRQSTS3_TMR3MSK (1<<6)
DuyLionTran 0:8094b249013c 356 #define cIRQSTS3_TMR2MSK (1<<5)
DuyLionTran 0:8094b249013c 357 #define cIRQSTS3_TMR1MSK (1<<4)
DuyLionTran 0:8094b249013c 358 #define cIRQSTS3_TMR4IRQ (1<<3)
DuyLionTran 0:8094b249013c 359 #define cIRQSTS3_TMR3IRQ (1<<2)
DuyLionTran 0:8094b249013c 360 #define cIRQSTS3_TMR2IRQ (1<<1)
DuyLionTran 0:8094b249013c 361 #define cIRQSTS3_TMR1IRQ (1<<0)
DuyLionTran 0:8094b249013c 362
DuyLionTran 0:8094b249013c 363 typedef union regIRQSTS3_tag{
DuyLionTran 0:8094b249013c 364 uint8_t byte;
DuyLionTran 0:8094b249013c 365 struct{
DuyLionTran 0:8094b249013c 366 uint8_t TMR1IRQ:1;
DuyLionTran 0:8094b249013c 367 uint8_t TMR2IRQ:1;
DuyLionTran 0:8094b249013c 368 uint8_t TMR3IRQ:1;
DuyLionTran 0:8094b249013c 369 uint8_t TMR4IRQ:1;
DuyLionTran 0:8094b249013c 370 uint8_t TMR1MSK:1;
DuyLionTran 0:8094b249013c 371 uint8_t TMR2MSK:1;
DuyLionTran 0:8094b249013c 372 uint8_t TMR3MSK:1;
DuyLionTran 0:8094b249013c 373 uint8_t TMR4MSK:1;
DuyLionTran 0:8094b249013c 374 }bit;
DuyLionTran 0:8094b249013c 375 } regIRQSTS3_t;
DuyLionTran 0:8094b249013c 376
DuyLionTran 0:8094b249013c 377 // PHY_CTRL1 bits
DuyLionTran 0:8094b249013c 378 #define cPHY_CTRL1_TMRTRIGEN (1<<7)
DuyLionTran 0:8094b249013c 379 #define cPHY_CTRL1_SLOTTED (1<<6)
DuyLionTran 0:8094b249013c 380 #define cPHY_CTRL1_CCABFRTX (1<<5)
DuyLionTran 0:8094b249013c 381 #define cPHY_CTRL1_RXACKRQD (1<<4)
DuyLionTran 0:8094b249013c 382 #define cPHY_CTRL1_AUTOACK (1<<3)
DuyLionTran 0:8094b249013c 383 #define cPHY_CTRL1_XCVSEQ (7<<0)
DuyLionTran 0:8094b249013c 384
DuyLionTran 0:8094b249013c 385 typedef union regPHY_CTRL1_tag{
DuyLionTran 0:8094b249013c 386 uint8_t byte;
DuyLionTran 0:8094b249013c 387 struct{
DuyLionTran 0:8094b249013c 388 uint8_t XCVSEQ:3;
DuyLionTran 0:8094b249013c 389 uint8_t AUTOACK:1;
DuyLionTran 0:8094b249013c 390 uint8_t RXACKRQD:1;
DuyLionTran 0:8094b249013c 391 uint8_t CCABFRTX:1;
DuyLionTran 0:8094b249013c 392 uint8_t SLOTTED:1;
DuyLionTran 0:8094b249013c 393 uint8_t TMRTRIGEN:1;
DuyLionTran 0:8094b249013c 394 }bit;
DuyLionTran 0:8094b249013c 395 } regPHY_CTRL1_t;
DuyLionTran 0:8094b249013c 396
DuyLionTran 0:8094b249013c 397 // PHY_CTRL2 bits
DuyLionTran 0:8094b249013c 398 #define cPHY_CTRL2_CRC_MSK (1<<7)
DuyLionTran 0:8094b249013c 399 #define cPHY_CTRL2_PLL_UNLOCK_MSK (1<<6)
DuyLionTran 0:8094b249013c 400 #define cPHY_CTRL2_FILTERFAIL_MSK (1<<5)
DuyLionTran 0:8094b249013c 401 #define cPHY_CTRL2_RX_WMRK_MSK (1<<4)
DuyLionTran 0:8094b249013c 402 #define cPHY_CTRL2_CCAMSK (1<<3)
DuyLionTran 0:8094b249013c 403 #define cPHY_CTRL2_RXMSK (1<<2)
DuyLionTran 0:8094b249013c 404 #define cPHY_CTRL2_TXMSK (1<<1)
DuyLionTran 0:8094b249013c 405 #define cPHY_CTRL2_SEQMSK (1<<0)
DuyLionTran 0:8094b249013c 406
DuyLionTran 0:8094b249013c 407 typedef union regPHY_CTRL2_tag{
DuyLionTran 0:8094b249013c 408 uint8_t byte;
DuyLionTran 0:8094b249013c 409 struct{
DuyLionTran 0:8094b249013c 410 uint8_t SEQMSK:1;
DuyLionTran 0:8094b249013c 411 uint8_t TXMSK:1;
DuyLionTran 0:8094b249013c 412 uint8_t RXMSK:1;
DuyLionTran 0:8094b249013c 413 uint8_t CCAMSK:1;
DuyLionTran 0:8094b249013c 414 uint8_t RX_WMRK_MSK:1;
DuyLionTran 0:8094b249013c 415 uint8_t FILTERFAIL_MSK:1;
DuyLionTran 0:8094b249013c 416 uint8_t PLL_UNLOCK_MSK:1;
DuyLionTran 0:8094b249013c 417 uint8_t CRC_MSK:1;
DuyLionTran 0:8094b249013c 418 }bit;
DuyLionTran 0:8094b249013c 419 } regPHY_CTRL2_t;
DuyLionTran 0:8094b249013c 420
DuyLionTran 0:8094b249013c 421 // PHY_CTRL3 bits
DuyLionTran 0:8094b249013c 422 #define cPHY_CTRL3_TMR4CMP_EN (1<<7)
DuyLionTran 0:8094b249013c 423 #define cPHY_CTRL3_TMR3CMP_EN (1<<6)
DuyLionTran 0:8094b249013c 424 #define cPHY_CTRL3_TMR2CMP_EN (1<<5)
DuyLionTran 0:8094b249013c 425 #define cPHY_CTRL3_TMR1CMP_EN (1<<4)
DuyLionTran 0:8094b249013c 426 #define cPHY_CTRL3_ASM_MSK (1<<2)
DuyLionTran 0:8094b249013c 427 #define cPHY_CTRL3_PB_ERR_MSK (1<<1)
DuyLionTran 0:8094b249013c 428 #define cPHY_CTRL3_WAKE_MSK (1<<0)
DuyLionTran 0:8094b249013c 429
DuyLionTran 0:8094b249013c 430 typedef union regPHY_CTRL3_tag{
DuyLionTran 0:8094b249013c 431 uint8_t byte;
DuyLionTran 0:8094b249013c 432 struct{
DuyLionTran 0:8094b249013c 433 uint8_t WAKE_MSK:1;
DuyLionTran 0:8094b249013c 434 uint8_t PB_ERR_MSK:1;
DuyLionTran 0:8094b249013c 435 uint8_t ASM_MSK:1;
DuyLionTran 0:8094b249013c 436 uint8_t RESERVED:1;
DuyLionTran 0:8094b249013c 437 uint8_t TMR1CMP_EN:1;
DuyLionTran 0:8094b249013c 438 uint8_t TMR2CMP_EN:1;
DuyLionTran 0:8094b249013c 439 uint8_t TMR3CMP_EN:1;
DuyLionTran 0:8094b249013c 440 uint8_t TMR4CMP_EN:1;
DuyLionTran 0:8094b249013c 441 }bit;
DuyLionTran 0:8094b249013c 442 } regPHY_CTRL3_t;
DuyLionTran 0:8094b249013c 443
DuyLionTran 0:8094b249013c 444 // RX_FRM_LEN bits
DuyLionTran 0:8094b249013c 445 #define cRX_FRAME_LENGTH (0x7F)
DuyLionTran 0:8094b249013c 446
DuyLionTran 0:8094b249013c 447 // PHY_CTRL4 bits
DuyLionTran 0:8094b249013c 448 #define cPHY_CTRL4_TRCV_MSK (1<<7)
DuyLionTran 0:8094b249013c 449 #define cPHY_CTRL4_TC3TMOUT (1<<6)
DuyLionTran 0:8094b249013c 450 #define cPHY_CTRL4_PANCORDNTR0 (1<<5)
DuyLionTran 0:8094b249013c 451 #define cPHY_CTRL4_CCATYPE (3<<0)
DuyLionTran 0:8094b249013c 452 #define cPHY_CTRL4_CCATYPE_Shift_c (3)
DuyLionTran 0:8094b249013c 453 #define cPHY_CTRL4_TMRLOAD (1<<2)
DuyLionTran 0:8094b249013c 454 #define cPHY_CTRL4_PROMISCUOUS (1<<1)
DuyLionTran 0:8094b249013c 455 #define cPHY_CTRL4_TC2PRIME_EN (1<<0)
DuyLionTran 0:8094b249013c 456
DuyLionTran 0:8094b249013c 457 typedef union regPHY_CTRL4_tag{
DuyLionTran 0:8094b249013c 458 uint8_t byte;
DuyLionTran 0:8094b249013c 459 struct{
DuyLionTran 0:8094b249013c 460 uint8_t TC2PRIME_EN:1;
DuyLionTran 0:8094b249013c 461 uint8_t PROMISCUOUS:1;
DuyLionTran 0:8094b249013c 462 uint8_t TMRLOAD:1;
DuyLionTran 0:8094b249013c 463 uint8_t CCATYPE:2;
DuyLionTran 0:8094b249013c 464 uint8_t PANCORDNTR0:1;
DuyLionTran 0:8094b249013c 465 uint8_t TC3TMOUT:1;
DuyLionTran 0:8094b249013c 466 uint8_t TRCV_MSK:1;
DuyLionTran 0:8094b249013c 467 }bit;
DuyLionTran 0:8094b249013c 468 } regPHY_CTRL4_t;
DuyLionTran 0:8094b249013c 469
DuyLionTran 0:8094b249013c 470 // SRC_CTRL bits
DuyLionTran 0:8094b249013c 471 #define cSRC_CTRL_INDEX (0x0F)
DuyLionTran 0:8094b249013c 472 #define cSRC_CTRL_INDEX_Shift_c (4)
DuyLionTran 0:8094b249013c 473 #define cSRC_CTRL_ACK_FRM_PND (1<<3)
DuyLionTran 0:8094b249013c 474 #define cSRC_CTRL_SRCADDR_EN (1<<2)
DuyLionTran 0:8094b249013c 475 #define cSRC_CTRL_INDEX_EN (1<<1)
DuyLionTran 0:8094b249013c 476 #define cSRC_CTRL_INDEX_DISABLE (1<<0)
DuyLionTran 0:8094b249013c 477
DuyLionTran 0:8094b249013c 478 typedef union regSRC_CTRL_tag{
DuyLionTran 0:8094b249013c 479 uint8_t byte;
DuyLionTran 0:8094b249013c 480 struct{
DuyLionTran 0:8094b249013c 481 uint8_t INDEX_DISABLE:1;
DuyLionTran 0:8094b249013c 482 uint8_t INDEX_EN:1;
DuyLionTran 0:8094b249013c 483 uint8_t SRCADDR_EN:1;
DuyLionTran 0:8094b249013c 484 uint8_t ACK_FRM_PND:1;
DuyLionTran 0:8094b249013c 485 uint8_t INDEX:4;
DuyLionTran 0:8094b249013c 486 }bit;
DuyLionTran 0:8094b249013c 487 } regSRC_CTRL_t;
DuyLionTran 0:8094b249013c 488
DuyLionTran 0:8094b249013c 489 // ASM_CTRL1 bits
DuyLionTran 0:8094b249013c 490 #define cASM_CTRL1_CLEAR (1<<7)
DuyLionTran 0:8094b249013c 491 #define cASM_CTRL1_START (1<<6)
DuyLionTran 0:8094b249013c 492 #define cASM_CTRL1_SELFTST (1<<5)
DuyLionTran 0:8094b249013c 493 #define cASM_CTRL1_CTR (1<<4)
DuyLionTran 0:8094b249013c 494 #define cASM_CTRL1_CBC (1<<3)
DuyLionTran 0:8094b249013c 495 #define cASM_CTRL1_AES (1<<2)
DuyLionTran 0:8094b249013c 496 #define cASM_CTRL1_LOAD_MAC (1<<1)
DuyLionTran 0:8094b249013c 497
DuyLionTran 0:8094b249013c 498 // ASM_CTRL2 bits
DuyLionTran 0:8094b249013c 499 #define cASM_CTRL2_DATA_REG_TYPE_SEL (7)
DuyLionTran 0:8094b249013c 500 #define cASM_CTRL2_DATA_REG_TYPE_SEL_Shift_c (5)
DuyLionTran 0:8094b249013c 501 #define cASM_CTRL2_TSTPAS (1<<1)
DuyLionTran 0:8094b249013c 502
DuyLionTran 0:8094b249013c 503 // CLK_OUT_CTRL bits
DuyLionTran 0:8094b249013c 504 #define cCLK_OUT_CTRL_EXTEND (1<<7)
DuyLionTran 0:8094b249013c 505 #define cCLK_OUT_CTRL_HIZ (1<<6)
DuyLionTran 0:8094b249013c 506 #define cCLK_OUT_CTRL_SR (1<<5)
DuyLionTran 0:8094b249013c 507 #define cCLK_OUT_CTRL_DS (1<<4)
DuyLionTran 0:8094b249013c 508 #define cCLK_OUT_CTRL_EN (1<<3)
DuyLionTran 0:8094b249013c 509 #define cCLK_OUT_CTRL_DIV (7)
DuyLionTran 0:8094b249013c 510
DuyLionTran 0:8094b249013c 511 // PWR_MODES bits
DuyLionTran 0:8094b249013c 512 #define cPWR_MODES_XTAL_READY (1<<5)
DuyLionTran 0:8094b249013c 513 #define cPWR_MODES_XTALEN (1<<4)
DuyLionTran 0:8094b249013c 514 #define cPWR_MODES_ASM_CLK_EN (1<<3)
DuyLionTran 0:8094b249013c 515 #define cPWR_MODES_AUTODOZE (1<<1)
DuyLionTran 0:8094b249013c 516 #define cPWR_MODES_PMC_MODE (1<<0)
DuyLionTran 0:8094b249013c 517
DuyLionTran 0:8094b249013c 518 // RX_FRAME_FILTER bits
DuyLionTran 0:8094b249013c 519 #define cRX_FRAME_FLT_FRM_VER (0xC0)
DuyLionTran 0:8094b249013c 520 #define cRX_FRAME_FLT_FRM_VER_Shift_c (6)
DuyLionTran 0:8094b249013c 521 #define cRX_FRAME_FLT_ACTIVE_PROMISCUOUS (1<<5)
DuyLionTran 0:8094b249013c 522 #define cRX_FRAME_FLT_NS_FT (1<<4)
DuyLionTran 0:8094b249013c 523 #define cRX_FRAME_FLT_CMD_FT (1<<3)
DuyLionTran 0:8094b249013c 524 #define cRX_FRAME_FLT_ACK_FT (1<<2)
DuyLionTran 0:8094b249013c 525 #define cRX_FRAME_FLT_DATA_FT (1<<1)
DuyLionTran 0:8094b249013c 526 #define cRX_FRAME_FLT_BEACON_FT (1<<0)
DuyLionTran 0:8094b249013c 527
DuyLionTran 0:8094b249013c 528 typedef union regRX_FRAME_FILTER_tag{
DuyLionTran 0:8094b249013c 529 uint8_t byte;
DuyLionTran 0:8094b249013c 530 struct{
DuyLionTran 0:8094b249013c 531 uint8_t FRAME_FLT_BEACON_FT:1;
DuyLionTran 0:8094b249013c 532 uint8_t FRAME_FLT_DATA_FT:1;
DuyLionTran 0:8094b249013c 533 uint8_t FRAME_FLT_ACK_FT:1;
DuyLionTran 0:8094b249013c 534 uint8_t FRAME_FLT_CMD_FT:1;
DuyLionTran 0:8094b249013c 535 uint8_t FRAME_FLT_NS_FT:1;
DuyLionTran 0:8094b249013c 536 uint8_t FRAME_FLT_ACTIVE_PROMISCUOUS:1;
DuyLionTran 0:8094b249013c 537 uint8_t FRAME_FLT_FRM_VER:2;
DuyLionTran 0:8094b249013c 538 }bit;
DuyLionTran 0:8094b249013c 539 } regRX_FRAME_FILTER_t;
DuyLionTran 0:8094b249013c 540
DuyLionTran 0:8094b249013c 541 // DUAL_PAN_CTRL bits
DuyLionTran 0:8094b249013c 542 #define cDUAL_PAN_CTRL_DUAL_PAN_SAM_LVL_MSK (0xF0)
DuyLionTran 0:8094b249013c 543 #define cDUAL_PAN_CTRL_DUAL_PAN_SAM_LVL_Shift_c (4)
DuyLionTran 0:8094b249013c 544 #define cDUAL_PAN_CTRL_CURRENT_NETWORK (1<<3)
DuyLionTran 0:8094b249013c 545 #define cDUAL_PAN_CTRL_PANCORDNTR1 (1<<2)
DuyLionTran 0:8094b249013c 546 #define cDUAL_PAN_CTRL_DUAL_PAN_AUTO (1<<1)
DuyLionTran 0:8094b249013c 547 #define cDUAL_PAN_CTRL_ACTIVE_NETWORK (1<<0)
DuyLionTran 0:8094b249013c 548
DuyLionTran 0:8094b249013c 549 // DUAL_PAN_STS bits
DuyLionTran 0:8094b249013c 550 #define cDUAL_PAN_STS_RECD_ON_PAN1 (1<<7)
DuyLionTran 0:8094b249013c 551 #define cDUAL_PAN_STS_RECD_ON_PAN0 (1<<6)
DuyLionTran 0:8094b249013c 552 #define cDUAL_PAN_STS_DUAL_PAN_REMAIN (0x3F)
DuyLionTran 0:8094b249013c 553
DuyLionTran 0:8094b249013c 554 // CCA_CTRL bits
DuyLionTran 0:8094b249013c 555 #define cCCA_CTRL_AGC_FRZ_EN (1<<6)
DuyLionTran 0:8094b249013c 556 #define cCCA_CTRL_CONT_RSSI_EN (1<<5)
DuyLionTran 0:8094b249013c 557 #define cCCA_CTRL_LQI_RSSI_NOT_CORR (1<<4)
DuyLionTran 0:8094b249013c 558 #define cCCA_CTRL_CCA3_AND_NOT_OR (1<<3)
DuyLionTran 0:8094b249013c 559 #define cCCA_CTRL_POWER_COMP_EN_LQI (1<<2)
DuyLionTran 0:8094b249013c 560 #define cCCA_CTRL_POWER_COMP_EN_ED (1<<1)
DuyLionTran 0:8094b249013c 561 #define cCCA_CTRL_POWER_COMP_EN_CCA1 (1<<0)
DuyLionTran 0:8094b249013c 562
DuyLionTran 0:8094b249013c 563 // GPIO_DATA bits
DuyLionTran 0:8094b249013c 564 #define cGPIO_DATA_7 (1<<7)
DuyLionTran 0:8094b249013c 565 #define cGPIO_DATA_6 (1<<6)
DuyLionTran 0:8094b249013c 566 #define cGPIO_DATA_5 (1<<5)
DuyLionTran 0:8094b249013c 567 #define cGPIO_DATA_4 (1<<4)
DuyLionTran 0:8094b249013c 568 #define cGPIO_DATA_3 (1<<3)
DuyLionTran 0:8094b249013c 569 #define cGPIO_DATA_2 (1<<2)
DuyLionTran 0:8094b249013c 570 #define cGPIO_DATA_1 (1<<1)
DuyLionTran 0:8094b249013c 571 #define cGPIO_DATA_0 (1<<0)
DuyLionTran 0:8094b249013c 572
DuyLionTran 0:8094b249013c 573 // GPIO_DIR bits
DuyLionTran 0:8094b249013c 574 #define cGPIO_DIR_7 (1<<7)
DuyLionTran 0:8094b249013c 575 #define cGPIO_DIR_6 (1<<6)
DuyLionTran 0:8094b249013c 576 #define cGPIO_DIR_5 (1<<5)
DuyLionTran 0:8094b249013c 577 #define cGPIO_DIR_4 (1<<4)
DuyLionTran 0:8094b249013c 578 #define cGPIO_DIR_3 (1<<3)
DuyLionTran 0:8094b249013c 579 #define cGPIO_DIR_2 (1<<2)
DuyLionTran 0:8094b249013c 580 #define cGPIO_DIR_1 (1<<1)
DuyLionTran 0:8094b249013c 581 #define cGPIO_DIR_0 (1<<0)
DuyLionTran 0:8094b249013c 582
DuyLionTran 0:8094b249013c 583 // GPIO_PUL_EN bits
DuyLionTran 0:8094b249013c 584 #define cGPIO_PUL_EN_7 (1<<7)
DuyLionTran 0:8094b249013c 585 #define cGPIO_PUL_EN_6 (1<<6)
DuyLionTran 0:8094b249013c 586 #define cGPIO_PUL_EN_5 (1<<5)
DuyLionTran 0:8094b249013c 587 #define cGPIO_PUL_EN_4 (1<<4)
DuyLionTran 0:8094b249013c 588 #define cGPIO_PUL_EN_3 (1<<3)
DuyLionTran 0:8094b249013c 589 #define cGPIO_PUL_EN_2 (1<<2)
DuyLionTran 0:8094b249013c 590 #define cGPIO_PUL_EN_1 (1<<1)
DuyLionTran 0:8094b249013c 591 #define cGPIO_PUL_EN_0 (1<<0)
DuyLionTran 0:8094b249013c 592
DuyLionTran 0:8094b249013c 593 // GPIO_PUL_SEL bits
DuyLionTran 0:8094b249013c 594 #define cGPIO_PUL_SEL_7 (1<<7)
DuyLionTran 0:8094b249013c 595 #define cGPIO_PUL_SEL_6 (1<<6)
DuyLionTran 0:8094b249013c 596 #define cGPIO_PUL_SEL_5 (1<<5)
DuyLionTran 0:8094b249013c 597 #define cGPIO_PUL_SEL_4 (1<<4)
DuyLionTran 0:8094b249013c 598 #define cGPIO_PUL_SEL_3 (1<<3)
DuyLionTran 0:8094b249013c 599 #define cGPIO_PUL_SEL_2 (1<<2)
DuyLionTran 0:8094b249013c 600 #define cGPIO_PUL_SEL_1 (1<<1)
DuyLionTran 0:8094b249013c 601 #define cGPIO_PUL_SEL_0 (1<<0)
DuyLionTran 0:8094b249013c 602
DuyLionTran 0:8094b249013c 603 // GPIO_DS bits
DuyLionTran 0:8094b249013c 604 #define cGPIO_DS_7 (1<<7)
DuyLionTran 0:8094b249013c 605 #define cGPIO_DS_6 (1<<6)
DuyLionTran 0:8094b249013c 606 #define cGPIO_DS_5 (1<<5)
DuyLionTran 0:8094b249013c 607 #define cGPIO_DS_4 (1<<4)
DuyLionTran 0:8094b249013c 608 #define cGPIO_DS_3 (1<<3)
DuyLionTran 0:8094b249013c 609 #define cGPIO_DS_2 (1<<2)
DuyLionTran 0:8094b249013c 610 #define cGPIO_DS_1 (1<<1)
DuyLionTran 0:8094b249013c 611 #define cGPIO_DS_0 (1<<0)
DuyLionTran 0:8094b249013c 612
DuyLionTran 0:8094b249013c 613 // SPI_CTRL bits
DuyLionTran 0:8094b249013c 614 //#define cSPI_CTRL_MISO_HIZ_EN (1<<1)
DuyLionTran 0:8094b249013c 615 //#define cSPI_CTRL_PB_PROTECT (1<<0)
DuyLionTran 0:8094b249013c 616
DuyLionTran 0:8094b249013c 617 // ANT_PAD_CTRL bits
DuyLionTran 0:8094b249013c 618 #define cANT_PAD_CTRL_ANTX_POL (0x0F)
DuyLionTran 0:8094b249013c 619 #define cANT_PAD_CTRL_ANTX_POL_Shift_c (4)
DuyLionTran 0:8094b249013c 620 #define cANT_PAD_CTRL_ANTX_CTRLMODE (1<<3)
DuyLionTran 0:8094b249013c 621 #define cANT_PAD_CTRL_ANTX_HZ (1<<2)
DuyLionTran 0:8094b249013c 622 #define cANT_PAD_CTRL_ANTX_EN (3)
DuyLionTran 0:8094b249013c 623
DuyLionTran 0:8094b249013c 624 // MISC_PAD_CTRL bits
DuyLionTran 0:8094b249013c 625 #define cMISC_PAD_CTRL_MISO_HIZ_EN (1<<3)
DuyLionTran 0:8094b249013c 626 #define cMISC_PAD_CTRL_IRQ_B_OD (1<<2)
DuyLionTran 0:8094b249013c 627 #define cMISC_PAD_CTRL_NON_GPIO_DS (1<<1)
DuyLionTran 0:8094b249013c 628 #define cMISC_PAD_CTRL_ANTX_CURR (1<<0)
DuyLionTran 0:8094b249013c 629
DuyLionTran 0:8094b249013c 630 // ANT_AGC_CTRL bits
DuyLionTran 0:8094b249013c 631 #define cANT_AGC_CTRL_FAD_EN_Shift_c (0)
DuyLionTran 0:8094b249013c 632 #define cANT_AGC_CTRL_FAD_EN_Mask_c (1<<cANT_AGC_CTRL_FAD_EN_Shift_c)
DuyLionTran 0:8094b249013c 633 #define cANT_AGC_CTRL_ANTX_Shift_c (1)
DuyLionTran 0:8094b249013c 634 #define cANT_AGC_CTRL_ANTX_Mask_c (1<<cANT_AGC_CTRL_ANTX_Shift_c)
DuyLionTran 0:8094b249013c 635
DuyLionTran 0:8094b249013c 636 // BSM_CTRL bits
DuyLionTran 0:8094b249013c 637 #define cBSM_CTRL_BSM_EN (1<<0)
DuyLionTran 0:8094b249013c 638
DuyLionTran 0:8094b249013c 639 // SOFT_RESET bits
DuyLionTran 0:8094b249013c 640 #define cSOFT_RESET_SOG_RST (1<<7)
DuyLionTran 0:8094b249013c 641 #define cSOFT_RESET_REGS_RST (1<<4)
DuyLionTran 0:8094b249013c 642 #define cSOFT_RESET_PLL_RST (1<<3)
DuyLionTran 0:8094b249013c 643 #define cSOFT_RESET_TX_RST (1<<2)
DuyLionTran 0:8094b249013c 644 #define cSOFT_RESET_RX_RST (1<<1)
DuyLionTran 0:8094b249013c 645 #define cSOFT_RESET_SEQ_MGR_RST (1<<0)
DuyLionTran 0:8094b249013c 646
DuyLionTran 0:8094b249013c 647 // SEQ_MGR_CTRL bits
DuyLionTran 0:8094b249013c 648 #define cSEQ_MGR_CTRL_SEQ_STATE_CTRL (3)
DuyLionTran 0:8094b249013c 649 #define cSEQ_MGR_CTRL_SEQ_STATE_CTRL_Shift_c (6)
DuyLionTran 0:8094b249013c 650 #define cSEQ_MGR_CTRL_NO_RX_RECYCLE (1<<5)
DuyLionTran 0:8094b249013c 651 #define cSEQ_MGR_CTRL_LATCH_PREAMBLE (1<<4)
DuyLionTran 0:8094b249013c 652 #define cSEQ_MGR_CTRL_EVENT_TMR_DO_NOT_LATCH (1<<3)
DuyLionTran 0:8094b249013c 653 #define cSEQ_MGR_CTRL_CLR_NEW_SEQ_INHIBIT (1<<2)
DuyLionTran 0:8094b249013c 654 #define cSEQ_MGR_CTRL_PSM_LOCK_DIS (1<<1)
DuyLionTran 0:8094b249013c 655 #define cSEQ_MGR_CTRL_PLL_ABORT_OVRD (1<<0)
DuyLionTran 0:8094b249013c 656
DuyLionTran 0:8094b249013c 657 // SEQ_MGR_STS bits
DuyLionTran 0:8094b249013c 658 #define cSEQ_MGR_STS_TMR2_SEQ_TRIG_ARMED (1<<7)
DuyLionTran 0:8094b249013c 659 #define cSEQ_MGR_STS_RX_MODE (1<<6)
DuyLionTran 0:8094b249013c 660 #define cSEQ_MGR_STS_RX_TIMEOUT_PENDING (1<<5)
DuyLionTran 0:8094b249013c 661 #define cSEQ_MGR_STS_NEW_SEQ_INHIBIT (1<<4)
DuyLionTran 0:8094b249013c 662 #define cSEQ_MGR_STS_SEQ_IDLE (1<<3)
DuyLionTran 0:8094b249013c 663 #define cSEQ_MGR_STS_XCVSEQ_ACTUAL (7)
DuyLionTran 0:8094b249013c 664
DuyLionTran 0:8094b249013c 665 // ABORT_STS bits
DuyLionTran 0:8094b249013c 666 #define cABORT_STS_PLL_ABORTED (1<<2)
DuyLionTran 0:8094b249013c 667 #define cABORT_STS_TC3_ABORTED (1<<1)
DuyLionTran 0:8094b249013c 668 #define cABORT_STS_SW_ABORTED (1<<0)
DuyLionTran 0:8094b249013c 669
DuyLionTran 0:8094b249013c 670 // FILTERFAIL_CODE2 bits
DuyLionTran 0:8094b249013c 671 #define cFILTERFAIL_CODE2_PAN_SEL (1<<7)
DuyLionTran 0:8094b249013c 672 #define cFILTERFAIL_CODE2_9_8 (3)
DuyLionTran 0:8094b249013c 673
DuyLionTran 0:8094b249013c 674 // PHY_STS bits
DuyLionTran 0:8094b249013c 675 #define cPHY_STS_PLL_UNLOCK (1<<7)
DuyLionTran 0:8094b249013c 676 #define cPHY_STS_PLL_LOCK_ERR (1<<6)
DuyLionTran 0:8094b249013c 677 #define cPHY_STS_PLL_LOCK (1<<5)
DuyLionTran 0:8094b249013c 678 #define cPHY_STS_CRCVALID (1<<3)
DuyLionTran 0:8094b249013c 679 #define cPHY_STS_FILTERFAIL_FLAG_SEL (1<<2)
DuyLionTran 0:8094b249013c 680 #define cPHY_STS_SFD_DET (1<<1)
DuyLionTran 0:8094b249013c 681 #define cPHY_STS_PREAMBLE_DET (1<<0)
DuyLionTran 0:8094b249013c 682
DuyLionTran 0:8094b249013c 683 // TESTMODE_CTRL bits
DuyLionTran 0:8094b249013c 684 #define cTEST_MODE_CTRL_HOT_ANT (1<<4)
DuyLionTran 0:8094b249013c 685 #define cTEST_MODE_CTRL_IDEAL_RSSI_EN (1<<3)
DuyLionTran 0:8094b249013c 686 #define cTEST_MODE_CTRL_IDEAL_PFC_EN (1<<2)
DuyLionTran 0:8094b249013c 687 #define cTEST_MODE_CTRL_CONTINUOUS_EN (1<<1)
DuyLionTran 0:8094b249013c 688 #define cTEST_MODE_CTRL_FPGA_EN (1<<0)
DuyLionTran 0:8094b249013c 689
DuyLionTran 0:8094b249013c 690 // DTM_CTRL1 bits
DuyLionTran 0:8094b249013c 691 #define cDTM_CTRL1_ATM_LOCKED (1<<7)
DuyLionTran 0:8094b249013c 692 #define cDTM_CTRL1_DTM_EN (1<<6)
DuyLionTran 0:8094b249013c 693 #define cDTM_CTRL1_PAGE5 (1<<5)
DuyLionTran 0:8094b249013c 694 #define cDTM_CTRL1_PAGE4 (1<<4)
DuyLionTran 0:8094b249013c 695 #define cDTM_CTRL1_PAGE3 (1<<3)
DuyLionTran 0:8094b249013c 696 #define cDTM_CTRL1_PAGE2 (1<<2)
DuyLionTran 0:8094b249013c 697 #define cDTM_CTRL1_PAGE1 (1<<1)
DuyLionTran 0:8094b249013c 698 #define cDTM_CTRL1_PAGE0 (1<<0)
DuyLionTran 0:8094b249013c 699
DuyLionTran 0:8094b249013c 700 // TX_MODE_CTRL
DuyLionTran 0:8094b249013c 701 #define cTX_MODE_CTRL_TX_INV (1<<4)
DuyLionTran 0:8094b249013c 702 #define cTX_MODE_CTRL_BT_EN (1<<3)
DuyLionTran 0:8094b249013c 703 #define cTX_MODE_CTRL_DTS2 (1<<2)
DuyLionTran 0:8094b249013c 704 #define cTX_MODE_CTRL_DTS1 (1<<1)
DuyLionTran 0:8094b249013c 705 #define cTX_MODE_CTRL_DTS0 (1<<0)
DuyLionTran 0:8094b249013c 706
DuyLionTran 0:8094b249013c 707 #define cTX_MODE_CTRL_DTS_MASK (7)
DuyLionTran 0:8094b249013c 708
DuyLionTran 0:8094b249013c 709 // CLK_OUT_CTRL bits
DuyLionTran 0:8094b249013c 710 #define cCLK_OUT_EXTEND (1<<7)
DuyLionTran 0:8094b249013c 711 #define cCLK_OUT_HIZ (1<<6)
DuyLionTran 0:8094b249013c 712 #define cCLK_OUT_SR (1<<5)
DuyLionTran 0:8094b249013c 713 #define cCLK_OUT_DS (1<<4)
DuyLionTran 0:8094b249013c 714 #define cCLK_OUT_EN (1<<3)
DuyLionTran 0:8094b249013c 715 #define cCLK_OUT_DIV_Mask (7<<0)
DuyLionTran 0:8094b249013c 716
DuyLionTran 0:8094b249013c 717 #define gCLK_OUT_FREQ_32_MHz (0)
DuyLionTran 0:8094b249013c 718 #define gCLK_OUT_FREQ_16_MHz (1)
DuyLionTran 0:8094b249013c 719 #define gCLK_OUT_FREQ_8_MHz (2)
DuyLionTran 0:8094b249013c 720 #define gCLK_OUT_FREQ_4_MHz (3)
DuyLionTran 0:8094b249013c 721 #define gCLK_OUT_FREQ_1_MHz (4)
DuyLionTran 0:8094b249013c 722 #define gCLK_OUT_FREQ_250_KHz (5)
DuyLionTran 0:8094b249013c 723 #define gCLK_OUT_FREQ_62_5_KHz (6)
DuyLionTran 0:8094b249013c 724 #define gCLK_OUT_FREQ_32_78_KHz (7)
DuyLionTran 0:8094b249013c 725 #define gCLK_OUT_FREQ_DISABLE (8)
DuyLionTran 0:8094b249013c 726
DuyLionTran 0:8094b249013c 727
DuyLionTran 0:8094b249013c 728
DuyLionTran 0:8094b249013c 729
DuyLionTran 0:8094b249013c 730 #endif /* __MCR20_REG_H__ */