my customized lib
atmel-rf-driver/source/AT86RFReg.h@0:8094b249013c, 2017-11-26 (annotated)
- Committer:
- DuyLionTran
- Date:
- Sun Nov 26 15:08:14 2017 +0000
- Revision:
- 0:8094b249013c
Initial commit
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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DuyLionTran | 0:8094b249013c | 1 | /* |
DuyLionTran | 0:8094b249013c | 2 | * Copyright (c) 2014-2015 ARM Limited. All rights reserved. |
DuyLionTran | 0:8094b249013c | 3 | * SPDX-License-Identifier: Apache-2.0 |
DuyLionTran | 0:8094b249013c | 4 | * Licensed under the Apache License, Version 2.0 (the License); you may |
DuyLionTran | 0:8094b249013c | 5 | * not use this file except in compliance with the License. |
DuyLionTran | 0:8094b249013c | 6 | * You may obtain a copy of the License at |
DuyLionTran | 0:8094b249013c | 7 | * |
DuyLionTran | 0:8094b249013c | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
DuyLionTran | 0:8094b249013c | 9 | * |
DuyLionTran | 0:8094b249013c | 10 | * Unless required by applicable law or agreed to in writing, software |
DuyLionTran | 0:8094b249013c | 11 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT |
DuyLionTran | 0:8094b249013c | 12 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
DuyLionTran | 0:8094b249013c | 13 | * See the License for the specific language governing permissions and |
DuyLionTran | 0:8094b249013c | 14 | * limitations under the License. |
DuyLionTran | 0:8094b249013c | 15 | */ |
DuyLionTran | 0:8094b249013c | 16 | |
DuyLionTran | 0:8094b249013c | 17 | #ifndef AT86RFREG_H_ |
DuyLionTran | 0:8094b249013c | 18 | #define AT86RFREG_H_ |
DuyLionTran | 0:8094b249013c | 19 | #ifdef __cplusplus |
DuyLionTran | 0:8094b249013c | 20 | extern "C" { |
DuyLionTran | 0:8094b249013c | 21 | #endif |
DuyLionTran | 0:8094b249013c | 22 | |
DuyLionTran | 0:8094b249013c | 23 | /*AT86RF212 PHY Modes*/ |
DuyLionTran | 0:8094b249013c | 24 | #define BPSK_20 0x00 |
DuyLionTran | 0:8094b249013c | 25 | #define BPSK_40 0x04 |
DuyLionTran | 0:8094b249013c | 26 | #define BPSK_40_ALT 0x14 |
DuyLionTran | 0:8094b249013c | 27 | #define OQPSK_SIN_RC_100 0x08 |
DuyLionTran | 0:8094b249013c | 28 | #define OQPSK_SIN_RC_200 0x09 |
DuyLionTran | 0:8094b249013c | 29 | #define OQPSK_RC_100 0x18 |
DuyLionTran | 0:8094b249013c | 30 | #define OQPSK_RC_200 0x19 |
DuyLionTran | 0:8094b249013c | 31 | #define OQPSK_SIN_250 0x0c |
DuyLionTran | 0:8094b249013c | 32 | #define OQPSK_SIN_500 0x0d |
DuyLionTran | 0:8094b249013c | 33 | #define OQPSK_SIN_500_ALT 0x0f |
DuyLionTran | 0:8094b249013c | 34 | #define OQPSK_RC_250 0x1c |
DuyLionTran | 0:8094b249013c | 35 | #define OQPSK_RC_500 0x1d |
DuyLionTran | 0:8094b249013c | 36 | #define OQPSK_RC_500_ALT 0x1f |
DuyLionTran | 0:8094b249013c | 37 | #define OQPSK_SIN_RC_400_SCR_ON 0x2A |
DuyLionTran | 0:8094b249013c | 38 | #define OQPSK_SIN_RC_400_SCR_OFF 0x0A |
DuyLionTran | 0:8094b249013c | 39 | #define OQPSK_RC_400_SCR_ON 0x3A |
DuyLionTran | 0:8094b249013c | 40 | #define OQPSK_RC_400_SCR_OFF 0x1A |
DuyLionTran | 0:8094b249013c | 41 | #define OQPSK_SIN_1000_SCR_ON 0x2E |
DuyLionTran | 0:8094b249013c | 42 | #define OQPSK_SIN_1000_SCR_OFF 0x0E |
DuyLionTran | 0:8094b249013c | 43 | #define OQPSK_RC_1000_SCR_ON 0x3E |
DuyLionTran | 0:8094b249013c | 44 | #define OQPSK_RC_1000_SCR_OFF 0x1E |
DuyLionTran | 0:8094b249013c | 45 | |
DuyLionTran | 0:8094b249013c | 46 | /*Supported transceivers*/ |
DuyLionTran | 0:8094b249013c | 47 | #define PART_AT86RF231 0x03 |
DuyLionTran | 0:8094b249013c | 48 | #define PART_AT86RF212 0x07 |
DuyLionTran | 0:8094b249013c | 49 | #define PART_AT86RF233 0x0B |
DuyLionTran | 0:8094b249013c | 50 | #define VERSION_AT86RF212 0x01 |
DuyLionTran | 0:8094b249013c | 51 | #define VERSION_AT86RF212B 0x03 |
DuyLionTran | 0:8094b249013c | 52 | |
DuyLionTran | 0:8094b249013c | 53 | /*RF Configuration Registers*/ |
DuyLionTran | 0:8094b249013c | 54 | #define TRX_STATUS 0x01 |
DuyLionTran | 0:8094b249013c | 55 | #define TRX_STATE 0x02 |
DuyLionTran | 0:8094b249013c | 56 | #define TRX_CTRL_0 0x03 |
DuyLionTran | 0:8094b249013c | 57 | #define TRX_CTRL_1 0x04 |
DuyLionTran | 0:8094b249013c | 58 | #define PHY_TX_PWR 0x05 |
DuyLionTran | 0:8094b249013c | 59 | #define PHY_RSSI 0x06 |
DuyLionTran | 0:8094b249013c | 60 | #define PHY_ED_LEVEL 0x07 |
DuyLionTran | 0:8094b249013c | 61 | #define PHY_CC_CCA 0x08 |
DuyLionTran | 0:8094b249013c | 62 | #define RX_CTRL 0x0A |
DuyLionTran | 0:8094b249013c | 63 | #define SFD_VALUE 0x0B |
DuyLionTran | 0:8094b249013c | 64 | #define TRX_CTRL_2 0x0C |
DuyLionTran | 0:8094b249013c | 65 | #define ANT_DIV 0x0D |
DuyLionTran | 0:8094b249013c | 66 | #define IRQ_MASK 0x0E |
DuyLionTran | 0:8094b249013c | 67 | #define IRQ_STATUS 0x0F |
DuyLionTran | 0:8094b249013c | 68 | #define VREG_CTRL 0x10 |
DuyLionTran | 0:8094b249013c | 69 | #define BATMON 0x11 |
DuyLionTran | 0:8094b249013c | 70 | #define XOSC_CTRL 0x12 |
DuyLionTran | 0:8094b249013c | 71 | #define CC_CTRL_0 0x13 |
DuyLionTran | 0:8094b249013c | 72 | #define CC_CTRL_1 0x14 |
DuyLionTran | 0:8094b249013c | 73 | #define RX_SYN 0x15 |
DuyLionTran | 0:8094b249013c | 74 | #define TRX_RPC 0x16 |
DuyLionTran | 0:8094b249013c | 75 | #define RF_CTRL_0 0x16 |
DuyLionTran | 0:8094b249013c | 76 | #define XAH_CTRL_1 0x17 |
DuyLionTran | 0:8094b249013c | 77 | #define FTN_CTRL 0x18 |
DuyLionTran | 0:8094b249013c | 78 | #define PLL_CF 0x1A |
DuyLionTran | 0:8094b249013c | 79 | #define PLL_DCU 0x1B |
DuyLionTran | 0:8094b249013c | 80 | #define PART_NUM 0x1C |
DuyLionTran | 0:8094b249013c | 81 | #define VERSION_NUM 0x1D |
DuyLionTran | 0:8094b249013c | 82 | #define MAN_ID_0 0x1E |
DuyLionTran | 0:8094b249013c | 83 | #define MAN_ID_1 0x1F |
DuyLionTran | 0:8094b249013c | 84 | #define SHORT_ADDR_0 0x20 |
DuyLionTran | 0:8094b249013c | 85 | #define SHORT_ADDR_1 0x21 |
DuyLionTran | 0:8094b249013c | 86 | #define PAN_ID_0 0x22 |
DuyLionTran | 0:8094b249013c | 87 | #define PAN_ID_1 0x23 |
DuyLionTran | 0:8094b249013c | 88 | #define IEEE_ADDR_0 0x24 |
DuyLionTran | 0:8094b249013c | 89 | #define IEEE_ADDR_1 0x25 |
DuyLionTran | 0:8094b249013c | 90 | #define IEEE_ADDR_2 0x26 |
DuyLionTran | 0:8094b249013c | 91 | #define IEEE_ADDR_3 0x27 |
DuyLionTran | 0:8094b249013c | 92 | #define IEEE_ADDR_4 0x28 |
DuyLionTran | 0:8094b249013c | 93 | #define IEEE_ADDR_5 0x29 |
DuyLionTran | 0:8094b249013c | 94 | #define IEEE_ADDR_6 0x2A |
DuyLionTran | 0:8094b249013c | 95 | #define IEEE_ADDR_7 0x2B |
DuyLionTran | 0:8094b249013c | 96 | #define XAH_CTRL_0 0x2C |
DuyLionTran | 0:8094b249013c | 97 | #define CSMA_SEED_0 0x2D |
DuyLionTran | 0:8094b249013c | 98 | #define CSMA_SEED_1 0x2E |
DuyLionTran | 0:8094b249013c | 99 | #define CSMA_BE 0x2F |
DuyLionTran | 0:8094b249013c | 100 | |
DuyLionTran | 0:8094b249013c | 101 | /* CSMA_SEED_1*/ |
DuyLionTran | 0:8094b249013c | 102 | #define AACK_FVN_MODE1 7 |
DuyLionTran | 0:8094b249013c | 103 | #define AACK_FVN_MODE0 6 |
DuyLionTran | 0:8094b249013c | 104 | #define AACK_SET_PD 5 |
DuyLionTran | 0:8094b249013c | 105 | #define AACK_DIS_ACK 4 |
DuyLionTran | 0:8094b249013c | 106 | #define AACK_I_AM_COORD 3 |
DuyLionTran | 0:8094b249013c | 107 | #define CSMA_SEED_12 2 |
DuyLionTran | 0:8094b249013c | 108 | #define CSMA_SEED_11 1 |
DuyLionTran | 0:8094b249013c | 109 | #define CSMA_SEED_10 0 |
DuyLionTran | 0:8094b249013c | 110 | |
DuyLionTran | 0:8094b249013c | 111 | /*TRX_STATUS bits*/ |
DuyLionTran | 0:8094b249013c | 112 | #define CCA_STATUS 0x40 |
DuyLionTran | 0:8094b249013c | 113 | #define CCA_DONE 0x80 |
DuyLionTran | 0:8094b249013c | 114 | |
DuyLionTran | 0:8094b249013c | 115 | /*PHY_CC_CCA bits*/ |
DuyLionTran | 0:8094b249013c | 116 | #define CCA_REQUEST 0x80 |
DuyLionTran | 0:8094b249013c | 117 | #define CCA_MODE_1 0x20 |
DuyLionTran | 0:8094b249013c | 118 | #define CCA_MODE_3 0x60 |
DuyLionTran | 0:8094b249013c | 119 | |
DuyLionTran | 0:8094b249013c | 120 | /*IRQ_MASK bits*/ |
DuyLionTran | 0:8094b249013c | 121 | #define RX_START 0x04 |
DuyLionTran | 0:8094b249013c | 122 | #define TRX_END 0x08 |
DuyLionTran | 0:8094b249013c | 123 | #define CCA_ED_DONE 0x10 |
DuyLionTran | 0:8094b249013c | 124 | #define AMI 0x20 |
DuyLionTran | 0:8094b249013c | 125 | #define TRX_UR 0x40 |
DuyLionTran | 0:8094b249013c | 126 | |
DuyLionTran | 0:8094b249013c | 127 | /*ANT_DIV bits*/ |
DuyLionTran | 0:8094b249013c | 128 | #define ANT_DIV_EN 0x08 |
DuyLionTran | 0:8094b249013c | 129 | #define ANT_EXT_SW_EN 0x04 |
DuyLionTran | 0:8094b249013c | 130 | #define ANT_CTRL_DEFAULT 0x03 |
DuyLionTran | 0:8094b249013c | 131 | |
DuyLionTran | 0:8094b249013c | 132 | /*TRX_CTRL_1 bits*/ |
DuyLionTran | 0:8094b249013c | 133 | #define PA_EXT_EN 0x80 |
DuyLionTran | 0:8094b249013c | 134 | |
DuyLionTran | 0:8094b249013c | 135 | /*FTN_CTRL bits*/ |
DuyLionTran | 0:8094b249013c | 136 | #define FTN_START 0x80 |
DuyLionTran | 0:8094b249013c | 137 | |
DuyLionTran | 0:8094b249013c | 138 | /*PHY_RSSI bits*/ |
DuyLionTran | 0:8094b249013c | 139 | #define CRC_VALID 0x80 |
DuyLionTran | 0:8094b249013c | 140 | |
DuyLionTran | 0:8094b249013c | 141 | /*XAH_CTRL_1 bits*/ |
DuyLionTran | 0:8094b249013c | 142 | #define AACK_PROM_MODE 0x02 |
DuyLionTran | 0:8094b249013c | 143 | |
DuyLionTran | 0:8094b249013c | 144 | |
DuyLionTran | 0:8094b249013c | 145 | #ifdef __cplusplus |
DuyLionTran | 0:8094b249013c | 146 | } |
DuyLionTran | 0:8094b249013c | 147 | #endif |
DuyLionTran | 0:8094b249013c | 148 | |
DuyLionTran | 0:8094b249013c | 149 | #endif /* AT86RFREG_H_ */ |