Revision 133:6b577b9a0a7d, committed 2016-05-31

Comitter:

Dot

Date:

Tue May 31 22:46:42 2016 +0000

Parent:

132:830c525a60d5

Commit message:

Forked for F031K6 for UART & I2C

Changed in this revision

diff -r 830c525a60d5 -r 6b577b9a0a7d targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/system_stm32f0xx.c
--- a/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/system_stm32f0xx.c	Tue May 17 14:45:12 2016 +0100
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/system_stm32f0xx.c	Tue May 31 22:46:42 2016 +0000
@@ -135,7 +135,7 @@
                call the 2 first functions listed above, since SystemCoreClock variable is 
                updated automatically.
   */
-uint32_t SystemCoreClock = 48000000;
+uint32_t SystemCoreClock = 8000000;
 
 const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
 
@@ -350,15 +350,15 @@
 void SetSysClock(void)
 {
   /* 1- Try to start with HSE and external clock */
-#if USE_PLL_HSE_EXTC != 0
-  if (SetSysClock_PLL_HSE(1) == 0)
-#endif
-  {
-    /* 2- If fail try to start with HSE and external xtal */
-    #if USE_PLL_HSE_XTAL != 0
-    if (SetSysClock_PLL_HSE(0) == 0)
-    #endif
-    {
+//#if USE_PLL_HSE_EXTC != 0
+//  if (SetSysClock_PLL_HSE(1) == 0)
+//#endif
+//  {
+//    /* 2- If fail try to start with HSE and external xtal */
+//    #if USE_PLL_HSE_XTAL != 0
+//    if (SetSysClock_PLL_HSE(0) == 0)
+//    #endif
+//    {
       /* 3- If fail start with HSI clock */
       if (SetSysClock_PLL_HSI() == 0)
       {
@@ -366,8 +366,8 @@
         {
           // [TODO] Put something here to tell the user that a problem occured...
         }
-      }
-    }
+//      }
+//    }
   }
   
   // Output clock on MCO pin(PA8) for debugging purpose
@@ -439,7 +439,7 @@
   RCC_OscInitStruct.HSI14CalibrationValue   = RCC_HSI14CALIBRATION_DEFAULT;
   RCC_OscInitStruct.HSI48State              = RCC_HSI_ON;
   RCC_OscInitStruct.LSIState                = RCC_LSI_OFF;
-  RCC_OscInitStruct.PLL.PLLState            = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLState            = RCC_PLL_OFF;
   RCC_OscInitStruct.PLL.PLLSource           = RCC_PLLSOURCE_HSI; // HSI div 2
   RCC_OscInitStruct.PLL.PREDIV              = RCC_PREDIV_DIV1;
   RCC_OscInitStruct.PLL.PLLMUL              = RCC_PLL_MUL12;
@@ -449,7 +449,7 @@
  
   // Select PLL as system clock source and configure the HCLK and PCLK1 clocks dividers
   RCC_ClkInitStruct.ClockType      = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1);
-  RCC_ClkInitStruct.SYSCLKSource   = RCC_SYSCLKSOURCE_PLLCLK; // 48 MHz
+  RCC_ClkInitStruct.SYSCLKSource   = RCC_SYSCLKSOURCE_HSI; // 48 MHz
   RCC_ClkInitStruct.AHBCLKDivider  = RCC_SYSCLK_DIV1;         // 48 MHz
   RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;           // 48 MHz
   if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) {

diff -r 830c525a60d5 -r 6b577b9a0a7d targets/hal/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/PeripheralPins.c
--- a/targets/hal/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/PeripheralPins.c	Tue May 17 14:45:12 2016 +0100
+++ b/targets/hal/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/PeripheralPins.c	Tue May 31 22:46:42 2016 +0000
@@ -109,6 +109,7 @@
 };
 
 const PinMap PinMap_UART_RX[] = {
+    {PA_3, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART1)},
     {PA_10, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART1)},
     {PA_15, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART1)}, // STDIO RX
     {PB_7,  UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_USART1)},