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targets/TARGET_TOSHIBA/TARGET_TMPM066/PeripheralNames.h@174:ed647f63e28d, 2017-12-19 (annotated)
- Committer:
- Dollyparton
- Date:
- Tue Dec 19 12:50:13 2017 +0000
- Revision:
- 174:ed647f63e28d
- Parent:
- 172:7d866c31b3c5
Added RAW socket.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
AnnaBridge | 172:7d866c31b3c5 | 1 | /* mbed Microcontroller Library |
AnnaBridge | 172:7d866c31b3c5 | 2 | * (C)Copyright TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION 2017 All rights reserved |
AnnaBridge | 172:7d866c31b3c5 | 3 | * |
AnnaBridge | 172:7d866c31b3c5 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
AnnaBridge | 172:7d866c31b3c5 | 5 | * you may not use this file except in compliance with the License. |
AnnaBridge | 172:7d866c31b3c5 | 6 | * You may obtain a copy of the License at |
AnnaBridge | 172:7d866c31b3c5 | 7 | * |
AnnaBridge | 172:7d866c31b3c5 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
AnnaBridge | 172:7d866c31b3c5 | 9 | * |
AnnaBridge | 172:7d866c31b3c5 | 10 | * Unless required by applicable law or agreed to in writing, software |
AnnaBridge | 172:7d866c31b3c5 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
AnnaBridge | 172:7d866c31b3c5 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
AnnaBridge | 172:7d866c31b3c5 | 13 | * See the License for the specific language governing permissions and |
AnnaBridge | 172:7d866c31b3c5 | 14 | * limitations under the License. |
AnnaBridge | 172:7d866c31b3c5 | 15 | */ |
AnnaBridge | 172:7d866c31b3c5 | 16 | #ifndef MBED_PERIPHERALNAMES_H |
AnnaBridge | 172:7d866c31b3c5 | 17 | #define MBED_PERIPHERALNAMES_H |
AnnaBridge | 172:7d866c31b3c5 | 18 | |
AnnaBridge | 172:7d866c31b3c5 | 19 | #include "PinNames.h" |
AnnaBridge | 172:7d866c31b3c5 | 20 | |
AnnaBridge | 172:7d866c31b3c5 | 21 | #ifdef __cplusplus |
AnnaBridge | 172:7d866c31b3c5 | 22 | extern "C" { |
AnnaBridge | 172:7d866c31b3c5 | 23 | #endif |
AnnaBridge | 172:7d866c31b3c5 | 24 | |
AnnaBridge | 172:7d866c31b3c5 | 25 | typedef enum { |
AnnaBridge | 172:7d866c31b3c5 | 26 | SERIAL_0 = 0, |
AnnaBridge | 172:7d866c31b3c5 | 27 | SERIAL_1, |
AnnaBridge | 172:7d866c31b3c5 | 28 | INVALID_SERIAL = (int)NC |
AnnaBridge | 172:7d866c31b3c5 | 29 | } UARTName; |
AnnaBridge | 172:7d866c31b3c5 | 30 | |
AnnaBridge | 172:7d866c31b3c5 | 31 | typedef enum { |
AnnaBridge | 172:7d866c31b3c5 | 32 | ADC_A0 = 0, |
AnnaBridge | 172:7d866c31b3c5 | 33 | ADC_A1, |
AnnaBridge | 172:7d866c31b3c5 | 34 | ADC_A2, |
AnnaBridge | 172:7d866c31b3c5 | 35 | ADC_A3, |
AnnaBridge | 172:7d866c31b3c5 | 36 | ADC_A4, |
AnnaBridge | 172:7d866c31b3c5 | 37 | ADC_A5, |
AnnaBridge | 172:7d866c31b3c5 | 38 | ADC_A6, |
AnnaBridge | 172:7d866c31b3c5 | 39 | ADC_A7, |
AnnaBridge | 172:7d866c31b3c5 | 40 | INVALID_ADC = (int)NC |
AnnaBridge | 172:7d866c31b3c5 | 41 | } ADCName; |
AnnaBridge | 172:7d866c31b3c5 | 42 | |
AnnaBridge | 172:7d866c31b3c5 | 43 | typedef enum { |
AnnaBridge | 172:7d866c31b3c5 | 44 | I2C_0 = 0, |
AnnaBridge | 172:7d866c31b3c5 | 45 | I2C_1, |
AnnaBridge | 172:7d866c31b3c5 | 46 | INVALID_I2C = (int)NC |
AnnaBridge | 172:7d866c31b3c5 | 47 | } I2CName; |
AnnaBridge | 172:7d866c31b3c5 | 48 | |
AnnaBridge | 172:7d866c31b3c5 | 49 | typedef enum { |
AnnaBridge | 172:7d866c31b3c5 | 50 | PWM_0 = 0, |
AnnaBridge | 172:7d866c31b3c5 | 51 | PWM_1, |
AnnaBridge | 172:7d866c31b3c5 | 52 | PWM_2, |
AnnaBridge | 172:7d866c31b3c5 | 53 | PWM_3, |
AnnaBridge | 172:7d866c31b3c5 | 54 | PWM_4, |
AnnaBridge | 172:7d866c31b3c5 | 55 | PWM_5, |
AnnaBridge | 172:7d866c31b3c5 | 56 | PWM_6, |
AnnaBridge | 172:7d866c31b3c5 | 57 | INVALID_PWM = (int)NC |
AnnaBridge | 172:7d866c31b3c5 | 58 | } PWMName; |
AnnaBridge | 172:7d866c31b3c5 | 59 | |
AnnaBridge | 172:7d866c31b3c5 | 60 | typedef enum { |
AnnaBridge | 172:7d866c31b3c5 | 61 | GPIO_IRQ_0 = 0, |
AnnaBridge | 172:7d866c31b3c5 | 62 | GPIO_IRQ_1, |
AnnaBridge | 172:7d866c31b3c5 | 63 | GPIO_IRQ_2, |
AnnaBridge | 172:7d866c31b3c5 | 64 | GPIO_IRQ_3, |
AnnaBridge | 172:7d866c31b3c5 | 65 | GPIO_IRQ_4, |
AnnaBridge | 172:7d866c31b3c5 | 66 | GPIO_IRQ_5, |
AnnaBridge | 172:7d866c31b3c5 | 67 | INVALID_GPIO_IRQ = (int)NC |
AnnaBridge | 172:7d866c31b3c5 | 68 | } GPIO_IRQName; |
AnnaBridge | 172:7d866c31b3c5 | 69 | |
AnnaBridge | 172:7d866c31b3c5 | 70 | #define STDIO_UART_TX USBTX |
AnnaBridge | 172:7d866c31b3c5 | 71 | #define STDIO_UART_RX USBRX |
AnnaBridge | 172:7d866c31b3c5 | 72 | #define STDIO_UART SERIAL_0 |
AnnaBridge | 172:7d866c31b3c5 | 73 | |
AnnaBridge | 172:7d866c31b3c5 | 74 | #define MBED_UART0 PC2, PC3 |
AnnaBridge | 172:7d866c31b3c5 | 75 | #define MBED_UART1 PE2, PE1 |
AnnaBridge | 172:7d866c31b3c5 | 76 | #define MBED_UARTUSB USBTX, USBRX |
AnnaBridge | 172:7d866c31b3c5 | 77 | |
AnnaBridge | 172:7d866c31b3c5 | 78 | #define MBED_I2C0 PC1, PC0 |
AnnaBridge | 172:7d866c31b3c5 | 79 | #define MBED_I2C1 PG1, PG0 |
AnnaBridge | 172:7d866c31b3c5 | 80 | |
AnnaBridge | 172:7d866c31b3c5 | 81 | #define MBED_ANALOGIN0 A0 |
AnnaBridge | 172:7d866c31b3c5 | 82 | #define MBED_ANALOGIN1 A1 |
AnnaBridge | 172:7d866c31b3c5 | 83 | #define MBED_ANALOGIN2 A2 |
AnnaBridge | 172:7d866c31b3c5 | 84 | #define MBED_ANALOGIN3 A3 |
AnnaBridge | 172:7d866c31b3c5 | 85 | #define MBED_ANALOGIN4 A4 |
AnnaBridge | 172:7d866c31b3c5 | 86 | #define MBED_ANALOGIN5 A5 |
AnnaBridge | 172:7d866c31b3c5 | 87 | |
AnnaBridge | 172:7d866c31b3c5 | 88 | #define MBED_PWMOUT0 PD1 |
AnnaBridge | 172:7d866c31b3c5 | 89 | #define MBED_PWMOUT1 PD2 |
AnnaBridge | 172:7d866c31b3c5 | 90 | #define MBED_PWMOUT2 PD3 |
AnnaBridge | 172:7d866c31b3c5 | 91 | #define MBED_PWMOUT3 PF4 |
AnnaBridge | 172:7d866c31b3c5 | 92 | #define MBED_PWMOUT4 PF5 |
AnnaBridge | 172:7d866c31b3c5 | 93 | #define MBED_PWMOUT5 PJ0 |
AnnaBridge | 172:7d866c31b3c5 | 94 | #define MBED_PWMOUT6 PJ1 |
AnnaBridge | 172:7d866c31b3c5 | 95 | |
AnnaBridge | 172:7d866c31b3c5 | 96 | #ifdef __cplusplus |
AnnaBridge | 172:7d866c31b3c5 | 97 | } |
AnnaBridge | 172:7d866c31b3c5 | 98 | #endif |
AnnaBridge | 172:7d866c31b3c5 | 99 | |
AnnaBridge | 172:7d866c31b3c5 | 100 | #endif |