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targets/TARGET_STM/sleep.c@174:ed647f63e28d, 2017-12-19 (annotated)

Committer:
Dollyparton
Date:
Tue Dec 19 12:50:13 2017 +0000
Revision:
174:ed647f63e28d
Parent:
172:7d866c31b3c5 
Added RAW socket.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 154:37f96f9d4de2 1 /* mbed Microcontroller Library
<> 154:37f96f9d4de2 2 *******************************************************************************
<> 154:37f96f9d4de2 3 * Copyright (c) 2016, STMicroelectronics
<> 154:37f96f9d4de2 4 * All rights reserved.
<> 154:37f96f9d4de2 5 *
<> 154:37f96f9d4de2 6 * Redistribution and use in source and binary forms, with or without
<> 154:37f96f9d4de2 7 * modification, are permitted provided that the following conditions are met:
<> 154:37f96f9d4de2 8 *
<> 154:37f96f9d4de2 9 * 1. Redistributions of source code must retain the above copyright notice,
<> 154:37f96f9d4de2 10 * this list of conditions and the following disclaimer.
<> 154:37f96f9d4de2 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 154:37f96f9d4de2 12 * this list of conditions and the following disclaimer in the documentation
<> 154:37f96f9d4de2 13 * and/or other materials provided with the distribution.
<> 154:37f96f9d4de2 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 154:37f96f9d4de2 15 * may be used to endorse or promote products derived from this software
<> 154:37f96f9d4de2 16 * without specific prior written permission.
<> 154:37f96f9d4de2 17 *
<> 154:37f96f9d4de2 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 154:37f96f9d4de2 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 154:37f96f9d4de2 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 154:37f96f9d4de2 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 154:37f96f9d4de2 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 154:37f96f9d4de2 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 154:37f96f9d4de2 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 154:37f96f9d4de2 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 154:37f96f9d4de2 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 154:37f96f9d4de2 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 154:37f96f9d4de2 28 *******************************************************************************
<> 154:37f96f9d4de2 29 */
<> 154:37f96f9d4de2 30 #if DEVICE_SLEEP
<> 154:37f96f9d4de2 31
<> 154:37f96f9d4de2 32 #include "cmsis.h"
<> 160:d5399cc887bb 33 #include "us_ticker_api.h"
<> 160:d5399cc887bb 34 #include "sleep_api.h"
<> 160:d5399cc887bb 35 #include "rtc_api_hal.h"
<> 160:d5399cc887bb 36 #include "hal_tick.h"
AnnaBridge 172:7d866c31b3c5 37 #include "mbed_critical.h"
<> 154:37f96f9d4de2 38
<> 160:d5399cc887bb 39 extern void HAL_SuspendTick(void);
<> 160:d5399cc887bb 40 extern void HAL_ResumeTick(void);
<> 160:d5399cc887bb 41
<> 160:d5399cc887bb 42 void hal_sleep(void)
<> 154:37f96f9d4de2 43 {
AnnaBridge 172:7d866c31b3c5 44 // Disable IRQs
AnnaBridge 172:7d866c31b3c5 45 core_util_critical_section_enter();
AnnaBridge 172:7d866c31b3c5 46
<> 160:d5399cc887bb 47 // Stop HAL tick to avoid to exit sleep in 1ms
<> 154:37f96f9d4de2 48 HAL_SuspendTick();
<> 154:37f96f9d4de2 49 // Request to enter SLEEP mode
<> 154:37f96f9d4de2 50 HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_SLEEPENTRY_WFI);
<> 160:d5399cc887bb 51 // Restart HAL tick
<> 154:37f96f9d4de2 52 HAL_ResumeTick();
AnnaBridge 172:7d866c31b3c5 53
AnnaBridge 172:7d866c31b3c5 54 // Enable IRQs
AnnaBridge 172:7d866c31b3c5 55 core_util_critical_section_exit();
<> 154:37f96f9d4de2 56 }
<> 154:37f96f9d4de2 57
<> 160:d5399cc887bb 58 void hal_deepsleep(void)
<> 154:37f96f9d4de2 59 {
AnnaBridge 172:7d866c31b3c5 60 // Disable IRQs
AnnaBridge 172:7d866c31b3c5 61 core_util_critical_section_enter();
AnnaBridge 172:7d866c31b3c5 62
<> 160:d5399cc887bb 63 // Stop HAL tick
<> 154:37f96f9d4de2 64 HAL_SuspendTick();
<> 160:d5399cc887bb 65 uint32_t EnterTimeUS = us_ticker_read();
<> 154:37f96f9d4de2 66
<> 154:37f96f9d4de2 67 // Request to enter STOP mode with regulator in low power mode
<> 154:37f96f9d4de2 68 #if TARGET_STM32L4
<> 160:d5399cc887bb 69 int pwrClockEnabled = __HAL_RCC_PWR_IS_CLK_ENABLED();
<> 160:d5399cc887bb 70 int lowPowerModeEnabled = PWR->CR1 & PWR_CR1_LPR;
<> 160:d5399cc887bb 71
<> 160:d5399cc887bb 72 if (!pwrClockEnabled) {
<> 160:d5399cc887bb 73 __HAL_RCC_PWR_CLK_ENABLE();
<> 160:d5399cc887bb 74 }
<> 160:d5399cc887bb 75 if (lowPowerModeEnabled) {
<> 156:95d6b41a828b 76 HAL_PWREx_DisableLowPowerRunMode();
<> 160:d5399cc887bb 77 }
<> 160:d5399cc887bb 78
<> 160:d5399cc887bb 79 HAL_PWREx_EnterSTOP2Mode(PWR_STOPENTRY_WFI);
<> 160:d5399cc887bb 80
<> 160:d5399cc887bb 81 if (lowPowerModeEnabled) {
<> 156:95d6b41a828b 82 HAL_PWREx_EnableLowPowerRunMode();
<> 160:d5399cc887bb 83 }
<> 160:d5399cc887bb 84 if (!pwrClockEnabled) {
<> 156:95d6b41a828b 85 __HAL_RCC_PWR_CLK_DISABLE();
<> 156:95d6b41a828b 86 }
<> 154:37f96f9d4de2 87 #else /* TARGET_STM32L4 */
<> 154:37f96f9d4de2 88 HAL_PWR_EnterSTOPMode(PWR_LOWPOWERREGULATOR_ON, PWR_STOPENTRY_WFI);
<> 154:37f96f9d4de2 89 #endif /* TARGET_STM32L4 */
<> 154:37f96f9d4de2 90
<> 160:d5399cc887bb 91 // Restart HAL tick
<> 154:37f96f9d4de2 92 HAL_ResumeTick();
<> 154:37f96f9d4de2 93
AnnaBridge 172:7d866c31b3c5 94 // Enable IRQs
AnnaBridge 172:7d866c31b3c5 95 core_util_critical_section_exit();
AnnaBridge 172:7d866c31b3c5 96
<> 154:37f96f9d4de2 97 // After wake-up from STOP reconfigure the PLL
<> 154:37f96f9d4de2 98 SetSysClock();
<> 154:37f96f9d4de2 99
<> 160:d5399cc887bb 100 TIM_HandleTypeDef TimMasterHandle;
<> 160:d5399cc887bb 101 TimMasterHandle.Instance = TIM_MST;
<> 160:d5399cc887bb 102 __HAL_TIM_SET_COUNTER(&TimMasterHandle, EnterTimeUS);
<> 160:d5399cc887bb 103
<> 154:37f96f9d4de2 104 #if DEVICE_LOWPOWERTIMER
<> 154:37f96f9d4de2 105 rtc_synchronize();
<> 154:37f96f9d4de2 106 #endif
<> 154:37f96f9d4de2 107 }
<> 154:37f96f9d4de2 108
<> 154:37f96f9d4de2 109 #endif