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targets/TARGET_STM/TARGET_STM32F2/spi_api.c@174:ed647f63e28d, 2017-12-19 (annotated)

Committer:
Dollyparton
Date:
Tue Dec 19 12:50:13 2017 +0000
Revision:
174:ed647f63e28d
Parent:
149:156823d33999 
Added RAW socket.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 149:156823d33999 1 /* mbed Microcontroller Library
<> 149:156823d33999 2 *******************************************************************************
<> 149:156823d33999 3 * Copyright (c) 2016, STMicroelectronics
<> 149:156823d33999 4 * All rights reserved.
<> 149:156823d33999 5 *
<> 149:156823d33999 6 * Redistribution and use in source and binary forms, with or without
<> 149:156823d33999 7 * modification, are permitted provided that the following conditions are met:
<> 149:156823d33999 8 *
<> 149:156823d33999 9 * 1. Redistributions of source code must retain the above copyright notice,
<> 149:156823d33999 10 * this list of conditions and the following disclaimer.
<> 149:156823d33999 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 149:156823d33999 12 * this list of conditions and the following disclaimer in the documentation
<> 149:156823d33999 13 * and/or other materials provided with the distribution.
<> 149:156823d33999 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 149:156823d33999 15 * may be used to endorse or promote products derived from this software
<> 149:156823d33999 16 * without specific prior written permission.
<> 149:156823d33999 17 *
<> 149:156823d33999 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 149:156823d33999 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 149:156823d33999 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 149:156823d33999 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 149:156823d33999 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 149:156823d33999 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 149:156823d33999 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 149:156823d33999 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 149:156823d33999 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 149:156823d33999 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 149:156823d33999 28 *******************************************************************************
<> 149:156823d33999 29 */
<> 149:156823d33999 30 #include "mbed_assert.h"
<> 149:156823d33999 31 #include "mbed_error.h"
<> 149:156823d33999 32 #include "spi_api.h"
<> 149:156823d33999 33
<> 149:156823d33999 34 #if DEVICE_SPI
<> 149:156823d33999 35
<> 149:156823d33999 36 #include "cmsis.h"
<> 149:156823d33999 37 #include "pinmap.h"
<> 149:156823d33999 38 #include "PeripheralPins.h"
<> 149:156823d33999 39 #include "mbed_error.h"
<> 149:156823d33999 40
<> 149:156823d33999 41 #if DEVICE_SPI_ASYNCH
<> 149:156823d33999 42 #define SPI_S(obj) (( struct spi_s *)(&(obj->spi)))
<> 149:156823d33999 43 #else
<> 149:156823d33999 44 #define SPI_S(obj) (( struct spi_s *)(obj))
<> 149:156823d33999 45 #endif
<> 149:156823d33999 46
<> 149:156823d33999 47 /*
<> 149:156823d33999 48 * Only the frequency is managed in the family specific part
<> 149:156823d33999 49 * the rest of SPI management is common to all STM32 families
<> 149:156823d33999 50 */
<> 149:156823d33999 51 int spi_get_clock_freq(spi_t *obj) {
<> 149:156823d33999 52 struct spi_s *spiobj = SPI_S(obj);
<> 149:156823d33999 53 int spi_hz = 0;
<> 149:156823d33999 54
<> 149:156823d33999 55 /* Get source clock depending on SPI instance */
<> 149:156823d33999 56 switch ((int)spiobj->spi) {
<> 149:156823d33999 57 case SPI_1:
<> 149:156823d33999 58 #if defined SPI4_BASE
<> 149:156823d33999 59 case SPI_4:
<> 149:156823d33999 60 #endif
<> 149:156823d33999 61 #if defined SPI5_BASE
<> 149:156823d33999 62 case SPI_5:
<> 149:156823d33999 63 #endif
<> 149:156823d33999 64 #if defined SPI6_BASE
<> 149:156823d33999 65 case SPI_6:
<> 149:156823d33999 66 #endif
<> 149:156823d33999 67 /* SPI_1, SPI_4, SPI_5 and SPI_6. Source CLK is PCKL2 */
<> 149:156823d33999 68 spi_hz = HAL_RCC_GetPCLK2Freq();
<> 149:156823d33999 69 break;
<> 149:156823d33999 70 case SPI_2:
<> 149:156823d33999 71 #if defined SPI3_BASE
<> 149:156823d33999 72 case SPI_3:
<> 149:156823d33999 73 #endif
<> 149:156823d33999 74 /* SPI_2 and SPI_3. Source CLK is PCKL1 */
<> 149:156823d33999 75 spi_hz = HAL_RCC_GetPCLK1Freq();
<> 149:156823d33999 76 break;
<> 149:156823d33999 77 default:
<> 149:156823d33999 78 error("SPI instance not set");
<> 149:156823d33999 79 break;
<> 149:156823d33999 80 }
<> 149:156823d33999 81 return spi_hz;
<> 149:156823d33999 82 }
<> 149:156823d33999 83
<> 149:156823d33999 84 #endif