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drivers/SPI.cpp@174:ed647f63e28d, 2017-12-19 (annotated)
- Committer:
- Dollyparton
- Date:
- Tue Dec 19 12:50:13 2017 +0000
- Revision:
- 174:ed647f63e28d
- Parent:
- 170:19eb464bc2be
Added RAW socket.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 149:156823d33999 | 1 | /* mbed Microcontroller Library |
<> | 149:156823d33999 | 2 | * Copyright (c) 2006-2013 ARM Limited |
<> | 149:156823d33999 | 3 | * |
<> | 149:156823d33999 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
<> | 149:156823d33999 | 5 | * you may not use this file except in compliance with the License. |
<> | 149:156823d33999 | 6 | * You may obtain a copy of the License at |
<> | 149:156823d33999 | 7 | * |
<> | 149:156823d33999 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
<> | 149:156823d33999 | 9 | * |
<> | 149:156823d33999 | 10 | * Unless required by applicable law or agreed to in writing, software |
<> | 149:156823d33999 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
<> | 149:156823d33999 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
<> | 149:156823d33999 | 13 | * See the License for the specific language governing permissions and |
<> | 149:156823d33999 | 14 | * limitations under the License. |
<> | 149:156823d33999 | 15 | */ |
<> | 149:156823d33999 | 16 | #include "drivers/SPI.h" |
<> | 160:d5399cc887bb | 17 | #include "platform/mbed_critical.h" |
<> | 149:156823d33999 | 18 | |
<> | 149:156823d33999 | 19 | #if DEVICE_SPI |
<> | 149:156823d33999 | 20 | |
<> | 149:156823d33999 | 21 | namespace mbed { |
<> | 149:156823d33999 | 22 | |
<> | 149:156823d33999 | 23 | #if DEVICE_SPI_ASYNCH && TRANSACTION_QUEUE_SIZE_SPI |
<> | 149:156823d33999 | 24 | CircularBuffer<Transaction<SPI>, TRANSACTION_QUEUE_SIZE_SPI> SPI::_transaction_buffer; |
<> | 149:156823d33999 | 25 | #endif |
<> | 149:156823d33999 | 26 | |
<> | 149:156823d33999 | 27 | SPI::SPI(PinName mosi, PinName miso, PinName sclk, PinName ssel) : |
<> | 149:156823d33999 | 28 | _spi(), |
<> | 149:156823d33999 | 29 | #if DEVICE_SPI_ASYNCH |
<> | 149:156823d33999 | 30 | _irq(this), |
<> | 149:156823d33999 | 31 | _usage(DMA_USAGE_NEVER), |
<> | 149:156823d33999 | 32 | #endif |
<> | 149:156823d33999 | 33 | _bits(8), |
<> | 149:156823d33999 | 34 | _mode(0), |
Kojto | 170:19eb464bc2be | 35 | _hz(1000000), |
Kojto | 170:19eb464bc2be | 36 | _write_fill(SPI_FILL_CHAR) { |
<> | 149:156823d33999 | 37 | // No lock needed in the constructor |
<> | 149:156823d33999 | 38 | |
<> | 149:156823d33999 | 39 | spi_init(&_spi, mosi, miso, sclk, ssel); |
Kojto | 169:e3b6fe271b81 | 40 | _acquire(); |
<> | 149:156823d33999 | 41 | } |
<> | 149:156823d33999 | 42 | |
<> | 149:156823d33999 | 43 | void SPI::format(int bits, int mode) { |
<> | 149:156823d33999 | 44 | lock(); |
<> | 149:156823d33999 | 45 | _bits = bits; |
<> | 149:156823d33999 | 46 | _mode = mode; |
Kojto | 169:e3b6fe271b81 | 47 | // If changing format while you are the owner than just |
Kojto | 169:e3b6fe271b81 | 48 | // update format, but if owner is changed than even frequency should be |
Kojto | 169:e3b6fe271b81 | 49 | // updated which is done by acquire. |
Kojto | 169:e3b6fe271b81 | 50 | if (_owner == this) { |
Kojto | 169:e3b6fe271b81 | 51 | spi_format(&_spi, _bits, _mode, 0); |
Kojto | 169:e3b6fe271b81 | 52 | } else { |
Kojto | 169:e3b6fe271b81 | 53 | _acquire(); |
Kojto | 169:e3b6fe271b81 | 54 | } |
<> | 149:156823d33999 | 55 | unlock(); |
<> | 149:156823d33999 | 56 | } |
<> | 149:156823d33999 | 57 | |
<> | 149:156823d33999 | 58 | void SPI::frequency(int hz) { |
<> | 149:156823d33999 | 59 | lock(); |
<> | 149:156823d33999 | 60 | _hz = hz; |
Kojto | 169:e3b6fe271b81 | 61 | // If changing format while you are the owner than just |
Kojto | 169:e3b6fe271b81 | 62 | // update frequency, but if owner is changed than even frequency should be |
Kojto | 169:e3b6fe271b81 | 63 | // updated which is done by acquire. |
Kojto | 169:e3b6fe271b81 | 64 | if (_owner == this) { |
Kojto | 169:e3b6fe271b81 | 65 | spi_frequency(&_spi, _hz); |
Kojto | 169:e3b6fe271b81 | 66 | } else { |
Kojto | 169:e3b6fe271b81 | 67 | _acquire(); |
Kojto | 169:e3b6fe271b81 | 68 | } |
<> | 149:156823d33999 | 69 | unlock(); |
<> | 149:156823d33999 | 70 | } |
<> | 149:156823d33999 | 71 | |
<> | 149:156823d33999 | 72 | SPI* SPI::_owner = NULL; |
<> | 149:156823d33999 | 73 | SingletonPtr<PlatformMutex> SPI::_mutex; |
<> | 149:156823d33999 | 74 | |
<> | 149:156823d33999 | 75 | // ignore the fact there are multiple physical spis, and always update if it wasnt us last |
<> | 149:156823d33999 | 76 | void SPI::aquire() { |
<> | 149:156823d33999 | 77 | lock(); |
<> | 149:156823d33999 | 78 | if (_owner != this) { |
<> | 149:156823d33999 | 79 | spi_format(&_spi, _bits, _mode, 0); |
<> | 149:156823d33999 | 80 | spi_frequency(&_spi, _hz); |
<> | 149:156823d33999 | 81 | _owner = this; |
<> | 149:156823d33999 | 82 | } |
<> | 149:156823d33999 | 83 | unlock(); |
<> | 149:156823d33999 | 84 | } |
<> | 149:156823d33999 | 85 | |
Kojto | 169:e3b6fe271b81 | 86 | // Note: Private function with no locking |
Kojto | 169:e3b6fe271b81 | 87 | void SPI::_acquire() { |
Kojto | 169:e3b6fe271b81 | 88 | if (_owner != this) { |
Kojto | 169:e3b6fe271b81 | 89 | spi_format(&_spi, _bits, _mode, 0); |
Kojto | 169:e3b6fe271b81 | 90 | spi_frequency(&_spi, _hz); |
Kojto | 169:e3b6fe271b81 | 91 | _owner = this; |
Kojto | 169:e3b6fe271b81 | 92 | } |
Kojto | 169:e3b6fe271b81 | 93 | } |
Kojto | 169:e3b6fe271b81 | 94 | |
<> | 149:156823d33999 | 95 | int SPI::write(int value) { |
<> | 149:156823d33999 | 96 | lock(); |
Kojto | 169:e3b6fe271b81 | 97 | _acquire(); |
<> | 149:156823d33999 | 98 | int ret = spi_master_write(&_spi, value); |
<> | 149:156823d33999 | 99 | unlock(); |
<> | 149:156823d33999 | 100 | return ret; |
<> | 149:156823d33999 | 101 | } |
<> | 149:156823d33999 | 102 | |
AnnaBridge | 167:e84263d55307 | 103 | int SPI::write(const char *tx_buffer, int tx_length, char *rx_buffer, int rx_length) { |
AnnaBridge | 167:e84263d55307 | 104 | lock(); |
Kojto | 169:e3b6fe271b81 | 105 | _acquire(); |
Kojto | 170:19eb464bc2be | 106 | int ret = spi_master_block_write(&_spi, tx_buffer, tx_length, rx_buffer, rx_length, _write_fill); |
AnnaBridge | 167:e84263d55307 | 107 | unlock(); |
AnnaBridge | 167:e84263d55307 | 108 | return ret; |
AnnaBridge | 167:e84263d55307 | 109 | } |
AnnaBridge | 167:e84263d55307 | 110 | |
<> | 149:156823d33999 | 111 | void SPI::lock() { |
<> | 149:156823d33999 | 112 | _mutex->lock(); |
<> | 149:156823d33999 | 113 | } |
<> | 149:156823d33999 | 114 | |
<> | 149:156823d33999 | 115 | void SPI::unlock() { |
<> | 149:156823d33999 | 116 | _mutex->unlock(); |
<> | 149:156823d33999 | 117 | } |
<> | 149:156823d33999 | 118 | |
Kojto | 170:19eb464bc2be | 119 | void SPI::set_default_write_value(char data) { |
Kojto | 170:19eb464bc2be | 120 | lock(); |
Kojto | 170:19eb464bc2be | 121 | _write_fill = data; |
Kojto | 170:19eb464bc2be | 122 | unlock(); |
Kojto | 170:19eb464bc2be | 123 | } |
Kojto | 170:19eb464bc2be | 124 | |
<> | 149:156823d33999 | 125 | #if DEVICE_SPI_ASYNCH |
<> | 149:156823d33999 | 126 | |
<> | 149:156823d33999 | 127 | int SPI::transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event) |
<> | 149:156823d33999 | 128 | { |
<> | 149:156823d33999 | 129 | if (spi_active(&_spi)) { |
<> | 149:156823d33999 | 130 | return queue_transfer(tx_buffer, tx_length, rx_buffer, rx_length, bit_width, callback, event); |
<> | 149:156823d33999 | 131 | } |
<> | 149:156823d33999 | 132 | start_transfer(tx_buffer, tx_length, rx_buffer, rx_length, bit_width, callback, event); |
<> | 149:156823d33999 | 133 | return 0; |
<> | 149:156823d33999 | 134 | } |
<> | 149:156823d33999 | 135 | |
<> | 149:156823d33999 | 136 | void SPI::abort_transfer() |
<> | 149:156823d33999 | 137 | { |
<> | 149:156823d33999 | 138 | spi_abort_asynch(&_spi); |
<> | 149:156823d33999 | 139 | #if TRANSACTION_QUEUE_SIZE_SPI |
<> | 149:156823d33999 | 140 | dequeue_transaction(); |
<> | 149:156823d33999 | 141 | #endif |
<> | 149:156823d33999 | 142 | } |
<> | 149:156823d33999 | 143 | |
<> | 149:156823d33999 | 144 | |
<> | 149:156823d33999 | 145 | void SPI::clear_transfer_buffer() |
<> | 149:156823d33999 | 146 | { |
<> | 149:156823d33999 | 147 | #if TRANSACTION_QUEUE_SIZE_SPI |
<> | 149:156823d33999 | 148 | _transaction_buffer.reset(); |
<> | 149:156823d33999 | 149 | #endif |
<> | 149:156823d33999 | 150 | } |
<> | 149:156823d33999 | 151 | |
<> | 149:156823d33999 | 152 | void SPI::abort_all_transfers() |
<> | 149:156823d33999 | 153 | { |
<> | 149:156823d33999 | 154 | clear_transfer_buffer(); |
<> | 149:156823d33999 | 155 | abort_transfer(); |
<> | 149:156823d33999 | 156 | } |
<> | 149:156823d33999 | 157 | |
<> | 149:156823d33999 | 158 | int SPI::set_dma_usage(DMAUsage usage) |
<> | 149:156823d33999 | 159 | { |
<> | 149:156823d33999 | 160 | if (spi_active(&_spi)) { |
<> | 149:156823d33999 | 161 | return -1; |
<> | 149:156823d33999 | 162 | } |
<> | 149:156823d33999 | 163 | _usage = usage; |
<> | 149:156823d33999 | 164 | return 0; |
<> | 149:156823d33999 | 165 | } |
<> | 149:156823d33999 | 166 | |
<> | 149:156823d33999 | 167 | int SPI::queue_transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event) |
<> | 149:156823d33999 | 168 | { |
<> | 149:156823d33999 | 169 | #if TRANSACTION_QUEUE_SIZE_SPI |
<> | 149:156823d33999 | 170 | transaction_t t; |
<> | 149:156823d33999 | 171 | |
<> | 149:156823d33999 | 172 | t.tx_buffer = const_cast<void *>(tx_buffer); |
<> | 149:156823d33999 | 173 | t.tx_length = tx_length; |
<> | 149:156823d33999 | 174 | t.rx_buffer = rx_buffer; |
<> | 149:156823d33999 | 175 | t.rx_length = rx_length; |
<> | 149:156823d33999 | 176 | t.event = event; |
<> | 149:156823d33999 | 177 | t.callback = callback; |
<> | 149:156823d33999 | 178 | t.width = bit_width; |
<> | 149:156823d33999 | 179 | Transaction<SPI> transaction(this, t); |
<> | 149:156823d33999 | 180 | if (_transaction_buffer.full()) { |
<> | 149:156823d33999 | 181 | return -1; // the buffer is full |
<> | 149:156823d33999 | 182 | } else { |
<> | 149:156823d33999 | 183 | core_util_critical_section_enter(); |
<> | 149:156823d33999 | 184 | _transaction_buffer.push(transaction); |
<> | 149:156823d33999 | 185 | if (!spi_active(&_spi)) { |
<> | 149:156823d33999 | 186 | dequeue_transaction(); |
<> | 149:156823d33999 | 187 | } |
<> | 149:156823d33999 | 188 | core_util_critical_section_exit(); |
<> | 149:156823d33999 | 189 | return 0; |
<> | 149:156823d33999 | 190 | } |
<> | 149:156823d33999 | 191 | #else |
<> | 149:156823d33999 | 192 | return -1; |
<> | 149:156823d33999 | 193 | #endif |
<> | 149:156823d33999 | 194 | } |
<> | 149:156823d33999 | 195 | |
<> | 149:156823d33999 | 196 | void SPI::start_transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event) |
<> | 149:156823d33999 | 197 | { |
Kojto | 169:e3b6fe271b81 | 198 | _acquire(); |
<> | 149:156823d33999 | 199 | _callback = callback; |
<> | 149:156823d33999 | 200 | _irq.callback(&SPI::irq_handler_asynch); |
<> | 149:156823d33999 | 201 | spi_master_transfer(&_spi, tx_buffer, tx_length, rx_buffer, rx_length, bit_width, _irq.entry(), event , _usage); |
<> | 149:156823d33999 | 202 | } |
<> | 149:156823d33999 | 203 | |
<> | 149:156823d33999 | 204 | #if TRANSACTION_QUEUE_SIZE_SPI |
<> | 149:156823d33999 | 205 | |
<> | 149:156823d33999 | 206 | void SPI::start_transaction(transaction_t *data) |
<> | 149:156823d33999 | 207 | { |
<> | 149:156823d33999 | 208 | start_transfer(data->tx_buffer, data->tx_length, data->rx_buffer, data->rx_length, data->width, data->callback, data->event); |
<> | 149:156823d33999 | 209 | } |
<> | 149:156823d33999 | 210 | |
<> | 149:156823d33999 | 211 | void SPI::dequeue_transaction() |
<> | 149:156823d33999 | 212 | { |
<> | 149:156823d33999 | 213 | Transaction<SPI> t; |
<> | 149:156823d33999 | 214 | if (_transaction_buffer.pop(t)) { |
<> | 149:156823d33999 | 215 | SPI* obj = t.get_object(); |
<> | 149:156823d33999 | 216 | transaction_t* data = t.get_transaction(); |
<> | 149:156823d33999 | 217 | obj->start_transaction(data); |
<> | 149:156823d33999 | 218 | } |
<> | 149:156823d33999 | 219 | } |
<> | 149:156823d33999 | 220 | |
<> | 149:156823d33999 | 221 | #endif |
<> | 149:156823d33999 | 222 | |
<> | 149:156823d33999 | 223 | void SPI::irq_handler_asynch(void) |
<> | 149:156823d33999 | 224 | { |
<> | 149:156823d33999 | 225 | int event = spi_irq_handler_asynch(&_spi); |
<> | 149:156823d33999 | 226 | if (_callback && (event & SPI_EVENT_ALL)) { |
<> | 149:156823d33999 | 227 | _callback.call(event & SPI_EVENT_ALL); |
<> | 149:156823d33999 | 228 | } |
<> | 149:156823d33999 | 229 | #if TRANSACTION_QUEUE_SIZE_SPI |
<> | 149:156823d33999 | 230 | if (event & (SPI_EVENT_ALL | SPI_EVENT_INTERNAL_TRANSFER_COMPLETE)) { |
<> | 149:156823d33999 | 231 | // SPI peripheral is free (event happend), dequeue transaction |
<> | 149:156823d33999 | 232 | dequeue_transaction(); |
<> | 149:156823d33999 | 233 | } |
<> | 149:156823d33999 | 234 | #endif |
<> | 149:156823d33999 | 235 | } |
<> | 149:156823d33999 | 236 | |
<> | 149:156823d33999 | 237 | #endif |
<> | 149:156823d33999 | 238 | |
<> | 149:156823d33999 | 239 | } // namespace mbed |
<> | 149:156823d33999 | 240 | |
<> | 149:156823d33999 | 241 | #endif |