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targets/TARGET_STM/TARGET_STM32F1/pin_device.h@173:e131a1973e81, 2017-09-15 (annotated)

Committer:
AnnaBridge
Date:
Fri Sep 15 14:59:18 2017 +0100
Revision:
173:e131a1973e81
Parent:
160:d5399cc887bb 
This updates the lib to the mbed lib v 151

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 160:d5399cc887bb 1 /* mbed Microcontroller Library
<> 160:d5399cc887bb 2 *******************************************************************************
<> 160:d5399cc887bb 3 * Copyright (c) 2016, STMicroelectronics
<> 160:d5399cc887bb 4 * All rights reserved.
<> 160:d5399cc887bb 5 *
<> 160:d5399cc887bb 6 * Redistribution and use in source and binary forms, with or without
<> 160:d5399cc887bb 7 * modification, are permitted provided that the following conditions are met:
<> 160:d5399cc887bb 8 *
<> 160:d5399cc887bb 9 * 1. Redistributions of source code must retain the above copyright notice,
<> 160:d5399cc887bb 10 * this list of conditions and the following disclaimer.
<> 160:d5399cc887bb 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 160:d5399cc887bb 12 * this list of conditions and the following disclaimer in the documentation
<> 160:d5399cc887bb 13 * and/or other materials provided with the distribution.
<> 160:d5399cc887bb 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 160:d5399cc887bb 15 * may be used to endorse or promote products derived from this software
<> 160:d5399cc887bb 16 * without specific prior written permission.
<> 160:d5399cc887bb 17 *
<> 160:d5399cc887bb 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 160:d5399cc887bb 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 160:d5399cc887bb 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 160:d5399cc887bb 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 160:d5399cc887bb 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 160:d5399cc887bb 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 160:d5399cc887bb 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 160:d5399cc887bb 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 160:d5399cc887bb 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 160:d5399cc887bb 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 160:d5399cc887bb 28 *******************************************************************************
<> 160:d5399cc887bb 29 */
<> 160:d5399cc887bb 30 #ifndef MBED_PIN_DEVICE_H
<> 160:d5399cc887bb 31 #define MBED_PIN_DEVICE_H
<> 160:d5399cc887bb 32
<> 160:d5399cc887bb 33 #include "cmsis.h"
<> 160:d5399cc887bb 34 #include "stm32f1xx_ll_gpio.h"
<> 160:d5399cc887bb 35
<> 160:d5399cc887bb 36 extern const uint32_t ll_pin_defines[16];
<> 160:d5399cc887bb 37
<> 160:d5399cc887bb 38 static inline void stm_pin_DisconnectDebug(PinName pin)
<> 160:d5399cc887bb 39 {
AnnaBridge 173:e131a1973e81 40 // Enable AFIO clock
AnnaBridge 173:e131a1973e81 41 __HAL_RCC_AFIO_CLK_ENABLE();
AnnaBridge 173:e131a1973e81 42
<> 160:d5399cc887bb 43 // Disconnect JTAG-DP + SW-DP signals.
<> 160:d5399cc887bb 44 // Warning: Need to reconnect under reset
<> 160:d5399cc887bb 45 if ((pin == PA_13) || (pin == PA_14)) {
<> 160:d5399cc887bb 46 __HAL_AFIO_REMAP_SWJ_DISABLE(); // JTAG-DP Disabled and SW-DP Disabled
<> 160:d5399cc887bb 47 }
<> 160:d5399cc887bb 48 if ((pin == PA_15) || (pin == PB_3) || (pin == PB_4)) {
<> 160:d5399cc887bb 49 __HAL_AFIO_REMAP_SWJ_NOJTAG(); // JTAG-DP Disabled and SW-DP enabled
<> 160:d5399cc887bb 50 }
<> 160:d5399cc887bb 51 }
<> 160:d5399cc887bb 52
<> 160:d5399cc887bb 53 /* The AF selection of F1 family is specific compared to others */
<> 160:d5399cc887bb 54 static inline void stm_pin_SetAFPin(GPIO_TypeDef *gpio, PinName pin, uint32_t afnum)
<> 160:d5399cc887bb 55 {
<> 160:d5399cc887bb 56 // Enable AFIO clock
<> 160:d5399cc887bb 57 __HAL_RCC_AFIO_CLK_ENABLE();
<> 160:d5399cc887bb 58
<> 160:d5399cc887bb 59 if (afnum > 0) {
<> 160:d5399cc887bb 60 switch (afnum) {
<> 160:d5399cc887bb 61 case 1: // Remap SPI1
<> 160:d5399cc887bb 62 __HAL_AFIO_REMAP_SPI1_ENABLE();
<> 160:d5399cc887bb 63 break;
<> 160:d5399cc887bb 64 case 2: // Remap I2C1
<> 160:d5399cc887bb 65 __HAL_AFIO_REMAP_I2C1_ENABLE();
<> 160:d5399cc887bb 66 break;
<> 160:d5399cc887bb 67 case 3: // Remap USART1
<> 160:d5399cc887bb 68 __HAL_AFIO_REMAP_USART1_ENABLE();
<> 160:d5399cc887bb 69 break;
<> 160:d5399cc887bb 70 case 4: // Remap USART2
<> 160:d5399cc887bb 71 __HAL_AFIO_REMAP_USART2_ENABLE();
<> 160:d5399cc887bb 72 break;
<> 160:d5399cc887bb 73 case 5: // Partial Remap USART3
<> 160:d5399cc887bb 74 __HAL_AFIO_REMAP_USART3_PARTIAL();
<> 160:d5399cc887bb 75 break;
<> 160:d5399cc887bb 76 case 6: // Partial Remap TIM1
<> 160:d5399cc887bb 77 __HAL_AFIO_REMAP_TIM1_PARTIAL();
<> 160:d5399cc887bb 78 break;
<> 160:d5399cc887bb 79 case 7: // Partial Remap TIM3
<> 160:d5399cc887bb 80 __HAL_AFIO_REMAP_TIM3_PARTIAL();
<> 160:d5399cc887bb 81 break;
<> 160:d5399cc887bb 82 case 8: // Full Remap TIM2
<> 160:d5399cc887bb 83 __HAL_AFIO_REMAP_TIM2_ENABLE();
<> 160:d5399cc887bb 84 break;
<> 160:d5399cc887bb 85 case 9: // Full Remap TIM3
<> 160:d5399cc887bb 86 __HAL_AFIO_REMAP_TIM3_ENABLE();
<> 160:d5399cc887bb 87 break;
<> 160:d5399cc887bb 88 #if defined(AFIO_MAPR_CAN_REMAP_REMAP1)
<> 160:d5399cc887bb 89 case 10: // CAN_RX mapped to PB8, CAN_TX mapped to PB9
<> 160:d5399cc887bb 90 __HAL_AFIO_REMAP_CAN1_2();
<> 160:d5399cc887bb 91 break;
<> 160:d5399cc887bb 92 #endif
<> 160:d5399cc887bb 93 default:
<> 160:d5399cc887bb 94 break;
<> 160:d5399cc887bb 95 }
<> 160:d5399cc887bb 96 }
<> 160:d5399cc887bb 97 }
<> 160:d5399cc887bb 98
<> 160:d5399cc887bb 99 static inline void stm_pin_PullConfig(GPIO_TypeDef *gpio, uint32_t ll_pin, uint32_t pull_config)
<> 160:d5399cc887bb 100 {
<> 160:d5399cc887bb 101 uint32_t function = LL_GPIO_GetPinMode(gpio, ll_pin);
<> 160:d5399cc887bb 102
<> 160:d5399cc887bb 103 switch (pull_config) {
<> 160:d5399cc887bb 104 case GPIO_PULLUP:
<> 160:d5399cc887bb 105 if (function == LL_GPIO_MODE_FLOATING)
<> 160:d5399cc887bb 106 LL_GPIO_SetPinMode(gpio, ll_pin, LL_GPIO_MODE_INPUT);
<> 160:d5399cc887bb 107 LL_GPIO_SetPinPull(gpio, ll_pin, LL_GPIO_PULL_UP);
<> 160:d5399cc887bb 108 break;
<> 160:d5399cc887bb 109 case GPIO_PULLDOWN:
<> 160:d5399cc887bb 110 if (function == LL_GPIO_MODE_FLOATING)
<> 160:d5399cc887bb 111 LL_GPIO_SetPinMode(gpio, ll_pin, LL_GPIO_MODE_INPUT);
<> 160:d5399cc887bb 112 LL_GPIO_SetPinPull(gpio, ll_pin, LL_GPIO_PULL_DOWN);
<> 160:d5399cc887bb 113 break;
<> 160:d5399cc887bb 114 default:
<> 160:d5399cc887bb 115 /* Input+NoPull = Floating for F1 family */
<> 160:d5399cc887bb 116 if (function == LL_GPIO_MODE_INPUT)
<> 160:d5399cc887bb 117 LL_GPIO_SetPinMode(gpio, ll_pin, LL_GPIO_MODE_FLOATING);
<> 160:d5399cc887bb 118 break;
<> 160:d5399cc887bb 119 }
<> 160:d5399cc887bb 120 }
<> 160:d5399cc887bb 121
<> 160:d5399cc887bb 122 #endif