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targets/TARGET_TOSHIBA/TARGET_TMPM066/us_ticker.c@172:7d866c31b3c5, 2017-08-31 (annotated)
- Committer:
- AnnaBridge
- Date:
- Thu Aug 31 17:27:04 2017 +0100
- Revision:
- 172:7d866c31b3c5
This updates the lib to the mbed lib v 150
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
AnnaBridge | 172:7d866c31b3c5 | 1 | /* mbed Microcontroller Library |
AnnaBridge | 172:7d866c31b3c5 | 2 | * (C)Copyright TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION 2017 All rights reserved |
AnnaBridge | 172:7d866c31b3c5 | 3 | * |
AnnaBridge | 172:7d866c31b3c5 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
AnnaBridge | 172:7d866c31b3c5 | 5 | * you may not use this file except in compliance with the License. |
AnnaBridge | 172:7d866c31b3c5 | 6 | * You may obtain a copy of the License at |
AnnaBridge | 172:7d866c31b3c5 | 7 | * |
AnnaBridge | 172:7d866c31b3c5 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
AnnaBridge | 172:7d866c31b3c5 | 9 | * |
AnnaBridge | 172:7d866c31b3c5 | 10 | * Unless required by applicable law or agreed to in writing, software |
AnnaBridge | 172:7d866c31b3c5 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
AnnaBridge | 172:7d866c31b3c5 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
AnnaBridge | 172:7d866c31b3c5 | 13 | * See the License for the specific language governing permissions and |
AnnaBridge | 172:7d866c31b3c5 | 14 | * limitations under the License. |
AnnaBridge | 172:7d866c31b3c5 | 15 | */ |
AnnaBridge | 172:7d866c31b3c5 | 16 | #include "us_ticker_api.h" |
AnnaBridge | 172:7d866c31b3c5 | 17 | #include "mbed_critical.h" |
AnnaBridge | 172:7d866c31b3c5 | 18 | |
AnnaBridge | 172:7d866c31b3c5 | 19 | #define TMR16A_100US 0x960 // fsys = fc = 24MHz, Ttmra = 1/24us, 100us*24us = 2400 = 0x960 |
AnnaBridge | 172:7d866c31b3c5 | 20 | #define TMR16A_SYSCK ((uint32_t)0x00000001) |
AnnaBridge | 172:7d866c31b3c5 | 21 | #define TMR16A_RUN ((uint32_t)0x00000001) |
AnnaBridge | 172:7d866c31b3c5 | 22 | #define TMR16A_STOP ((uint32_t)0x00000000) |
AnnaBridge | 172:7d866c31b3c5 | 23 | #define OVERFLOW_32BIT (0xFFFFFFFF / 0x64) |
AnnaBridge | 172:7d866c31b3c5 | 24 | |
AnnaBridge | 172:7d866c31b3c5 | 25 | static uint8_t us_ticker_inited = 0; // Is ticker initialized yet? |
AnnaBridge | 172:7d866c31b3c5 | 26 | static volatile uint32_t ticker_int_counter = 0; // Amount of overflows until user interrupt |
AnnaBridge | 172:7d866c31b3c5 | 27 | static volatile uint32_t us_ticker = 0; // timer counter |
AnnaBridge | 172:7d866c31b3c5 | 28 | |
AnnaBridge | 172:7d866c31b3c5 | 29 | void INT16A0_IRQHandler(void) |
AnnaBridge | 172:7d866c31b3c5 | 30 | { |
AnnaBridge | 172:7d866c31b3c5 | 31 | us_ticker++; |
AnnaBridge | 172:7d866c31b3c5 | 32 | |
AnnaBridge | 172:7d866c31b3c5 | 33 | if (us_ticker > OVERFLOW_32BIT) { |
AnnaBridge | 172:7d866c31b3c5 | 34 | us_ticker = 0; |
AnnaBridge | 172:7d866c31b3c5 | 35 | } |
AnnaBridge | 172:7d866c31b3c5 | 36 | } |
AnnaBridge | 172:7d866c31b3c5 | 37 | |
AnnaBridge | 172:7d866c31b3c5 | 38 | void INT16A1_IRQHandler(void) |
AnnaBridge | 172:7d866c31b3c5 | 39 | { |
AnnaBridge | 172:7d866c31b3c5 | 40 | us_ticker_irq_handler(); |
AnnaBridge | 172:7d866c31b3c5 | 41 | } |
AnnaBridge | 172:7d866c31b3c5 | 42 | |
AnnaBridge | 172:7d866c31b3c5 | 43 | // initialize us_ticker |
AnnaBridge | 172:7d866c31b3c5 | 44 | void us_ticker_init(void) |
AnnaBridge | 172:7d866c31b3c5 | 45 | { |
AnnaBridge | 172:7d866c31b3c5 | 46 | // Enable clock supply to TA0 |
AnnaBridge | 172:7d866c31b3c5 | 47 | CG_SetFcPeriphA(CG_FC_PERIPH_TMR16A, ENABLE); |
AnnaBridge | 172:7d866c31b3c5 | 48 | if (us_ticker_inited) { |
AnnaBridge | 172:7d866c31b3c5 | 49 | return; |
AnnaBridge | 172:7d866c31b3c5 | 50 | } |
AnnaBridge | 172:7d866c31b3c5 | 51 | us_ticker_inited = 1; |
AnnaBridge | 172:7d866c31b3c5 | 52 | |
AnnaBridge | 172:7d866c31b3c5 | 53 | // Stops and clear count operation |
AnnaBridge | 172:7d866c31b3c5 | 54 | TSB_T16A0->RUN = TMR16A_STOP; |
AnnaBridge | 172:7d866c31b3c5 | 55 | TSB_T16A0->CR = TMR16A_SYSCK; |
AnnaBridge | 172:7d866c31b3c5 | 56 | // Permits INTTA0 interrupt |
AnnaBridge | 172:7d866c31b3c5 | 57 | NVIC_EnableIRQ(INT16A0_IRQn); |
AnnaBridge | 172:7d866c31b3c5 | 58 | // Match counter set to max value |
AnnaBridge | 172:7d866c31b3c5 | 59 | TSB_T16A0->RG = TMR16A_100US; |
AnnaBridge | 172:7d866c31b3c5 | 60 | TSB_T16A0->RUN = TMR16A_RUN; |
AnnaBridge | 172:7d866c31b3c5 | 61 | } |
AnnaBridge | 172:7d866c31b3c5 | 62 | |
AnnaBridge | 172:7d866c31b3c5 | 63 | uint32_t us_ticker_read(void) |
AnnaBridge | 172:7d866c31b3c5 | 64 | { |
AnnaBridge | 172:7d866c31b3c5 | 65 | uint32_t ret_val = 0; |
AnnaBridge | 172:7d866c31b3c5 | 66 | |
AnnaBridge | 172:7d866c31b3c5 | 67 | if (!us_ticker_inited) { |
AnnaBridge | 172:7d866c31b3c5 | 68 | us_ticker_init(); |
AnnaBridge | 172:7d866c31b3c5 | 69 | } |
AnnaBridge | 172:7d866c31b3c5 | 70 | |
AnnaBridge | 172:7d866c31b3c5 | 71 | uint32_t tickerbefore = 0; |
AnnaBridge | 172:7d866c31b3c5 | 72 | do { |
AnnaBridge | 172:7d866c31b3c5 | 73 | tickerbefore = us_ticker; |
AnnaBridge | 172:7d866c31b3c5 | 74 | ret_val = (us_ticker * 100); |
AnnaBridge | 172:7d866c31b3c5 | 75 | } while (tickerbefore != us_ticker); |
AnnaBridge | 172:7d866c31b3c5 | 76 | |
AnnaBridge | 172:7d866c31b3c5 | 77 | return ret_val; |
AnnaBridge | 172:7d866c31b3c5 | 78 | } |
AnnaBridge | 172:7d866c31b3c5 | 79 | |
AnnaBridge | 172:7d866c31b3c5 | 80 | void us_ticker_set_interrupt(timestamp_t timestamp) |
AnnaBridge | 172:7d866c31b3c5 | 81 | { |
AnnaBridge | 172:7d866c31b3c5 | 82 | uint32_t delta = 0; |
AnnaBridge | 172:7d866c31b3c5 | 83 | |
AnnaBridge | 172:7d866c31b3c5 | 84 | // Stops and clear count operation |
AnnaBridge | 172:7d866c31b3c5 | 85 | TSB_T16A1->RUN = TMR16A_STOP; |
AnnaBridge | 172:7d866c31b3c5 | 86 | TSB_T16A1->CR = TMR16A_SYSCK; |
AnnaBridge | 172:7d866c31b3c5 | 87 | // Set the compare register |
AnnaBridge | 172:7d866c31b3c5 | 88 | delta = (timestamp - us_ticker_read()); |
AnnaBridge | 172:7d866c31b3c5 | 89 | TSB_T16A1->RG = delta; |
AnnaBridge | 172:7d866c31b3c5 | 90 | // Set Interrupt |
AnnaBridge | 172:7d866c31b3c5 | 91 | NVIC_EnableIRQ(INT16A1_IRQn); |
AnnaBridge | 172:7d866c31b3c5 | 92 | // Start TMR_TA1 timer |
AnnaBridge | 172:7d866c31b3c5 | 93 | TSB_T16A1->RUN = TMR16A_RUN; |
AnnaBridge | 172:7d866c31b3c5 | 94 | } |
AnnaBridge | 172:7d866c31b3c5 | 95 | |
AnnaBridge | 172:7d866c31b3c5 | 96 | void us_ticker_fire_interrupt(void) |
AnnaBridge | 172:7d866c31b3c5 | 97 | { |
AnnaBridge | 172:7d866c31b3c5 | 98 | NVIC_SetPendingIRQ(INT16A1_IRQn); |
AnnaBridge | 172:7d866c31b3c5 | 99 | } |
AnnaBridge | 172:7d866c31b3c5 | 100 | |
AnnaBridge | 172:7d866c31b3c5 | 101 | void us_ticker_disable_interrupt(void) |
AnnaBridge | 172:7d866c31b3c5 | 102 | { |
AnnaBridge | 172:7d866c31b3c5 | 103 | NVIC_DisableIRQ(INT16A1_IRQn); |
AnnaBridge | 172:7d866c31b3c5 | 104 | } |
AnnaBridge | 172:7d866c31b3c5 | 105 | |
AnnaBridge | 172:7d866c31b3c5 | 106 | void us_ticker_clear_interrupt(void) |
AnnaBridge | 172:7d866c31b3c5 | 107 | { |
AnnaBridge | 172:7d866c31b3c5 | 108 | //no flags to clear |
AnnaBridge | 172:7d866c31b3c5 | 109 | } |