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platform/mbed_critical.c@170:19eb464bc2be, 2017-08-03 (annotated)

Committer:
Kojto
Date:
Thu Aug 03 13:13:39 2017 +0100
Revision:
170:19eb464bc2be
Parent:
167:e84263d55307
Child:
172:7d866c31b3c5
This updates the lib to the mbed lib v 148

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 149:156823d33999 1 /*
<> 149:156823d33999 2 * Copyright (c) 2015-2016, ARM Limited, All Rights Reserved
<> 149:156823d33999 3 * SPDX-License-Identifier: Apache-2.0
<> 149:156823d33999 4 *
<> 149:156823d33999 5 * Licensed under the Apache License, Version 2.0 (the "License"); you may
<> 149:156823d33999 6 * not use this file except in compliance with the License.
<> 149:156823d33999 7 * You may obtain a copy of the License at
<> 149:156823d33999 8 *
<> 149:156823d33999 9 * http://www.apache.org/licenses/LICENSE-2.0
<> 149:156823d33999 10 *
<> 149:156823d33999 11 * Unless required by applicable law or agreed to in writing, software
<> 149:156823d33999 12 * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
<> 149:156823d33999 13 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
<> 149:156823d33999 14 * See the License for the specific language governing permissions and
<> 149:156823d33999 15 * limitations under the License.
<> 149:156823d33999 16 */
<> 149:156823d33999 17
<> 153:fa9ff456f731 18 /* Declare __STDC_LIMIT_MACROS so stdint.h defines UINT32_MAX when using C++ */
<> 153:fa9ff456f731 19 #define __STDC_LIMIT_MACROS
<> 160:d5399cc887bb 20 #include "platform/mbed_critical.h"
<> 149:156823d33999 21
<> 149:156823d33999 22 #include "cmsis.h"
<> 149:156823d33999 23 #include "platform/mbed_assert.h"
<> 160:d5399cc887bb 24 #include "platform/mbed_toolchain.h"
<> 149:156823d33999 25
Kojto 170:19eb464bc2be 26 #if !defined (__CORTEX_M0) && !defined (__CORTEX_M0PLUS)
Kojto 170:19eb464bc2be 27 #define EXCLUSIVE_ACCESS 1
Kojto 170:19eb464bc2be 28 #else
Kojto 170:19eb464bc2be 29 #define EXCLUSIVE_ACCESS 0
Kojto 170:19eb464bc2be 30 #endif
<> 149:156823d33999 31
<> 149:156823d33999 32 static volatile uint32_t interrupt_enable_counter = 0;
<> 149:156823d33999 33 static volatile bool critical_interrupts_disabled = false;
<> 149:156823d33999 34
<> 149:156823d33999 35 bool core_util_are_interrupts_enabled(void)
<> 149:156823d33999 36 {
<> 149:156823d33999 37 #if defined(__CORTEX_A9)
<> 149:156823d33999 38 return ((__get_CPSR() & 0x80) == 0);
<> 149:156823d33999 39 #else
<> 149:156823d33999 40 return ((__get_PRIMASK() & 0x1) == 0);
<> 149:156823d33999 41 #endif
<> 149:156823d33999 42 }
<> 149:156823d33999 43
AnnaBridge 167:e84263d55307 44 bool core_util_is_isr_active(void)
AnnaBridge 167:e84263d55307 45 {
AnnaBridge 167:e84263d55307 46 #if defined(__CORTEX_A9)
AnnaBridge 167:e84263d55307 47 switch(__get_CPSR() & 0x1FU) {
AnnaBridge 167:e84263d55307 48 case MODE_USR:
AnnaBridge 167:e84263d55307 49 case MODE_SYS:
AnnaBridge 167:e84263d55307 50 return false;
AnnaBridge 167:e84263d55307 51 case MODE_SVC:
AnnaBridge 167:e84263d55307 52 default:
AnnaBridge 167:e84263d55307 53 return true;
AnnaBridge 167:e84263d55307 54 }
AnnaBridge 167:e84263d55307 55 #else
AnnaBridge 167:e84263d55307 56 return (__get_IPSR() != 0U);
AnnaBridge 167:e84263d55307 57 #endif
AnnaBridge 167:e84263d55307 58 }
AnnaBridge 167:e84263d55307 59
<> 149:156823d33999 60 MBED_WEAK void core_util_critical_section_enter(void)
<> 149:156823d33999 61 {
<> 149:156823d33999 62 bool interrupts_disabled = !core_util_are_interrupts_enabled();
<> 149:156823d33999 63 __disable_irq();
<> 149:156823d33999 64
<> 149:156823d33999 65 /* Save the interrupt disabled state as it was prior to any nested critical section lock use */
<> 149:156823d33999 66 if (!interrupt_enable_counter) {
<> 149:156823d33999 67 critical_interrupts_disabled = interrupts_disabled;
<> 149:156823d33999 68 }
<> 149:156823d33999 69
<> 149:156823d33999 70 /* If the interrupt_enable_counter overflows or we are in a nested critical section and interrupts
<> 149:156823d33999 71 are enabled, then something has gone badly wrong thus assert an error.
<> 149:156823d33999 72 */
<> 149:156823d33999 73 MBED_ASSERT(interrupt_enable_counter < UINT32_MAX);
<> 149:156823d33999 74 // FIXME
<> 149:156823d33999 75 #ifndef FEATURE_UVISOR
<> 149:156823d33999 76 if (interrupt_enable_counter > 0) {
<> 149:156823d33999 77 MBED_ASSERT(interrupts_disabled);
<> 149:156823d33999 78 }
<> 149:156823d33999 79 #else
<> 149:156823d33999 80 #warning "core_util_critical_section_enter needs fixing to work from unprivileged code"
<> 149:156823d33999 81 #endif /* FEATURE_UVISOR */
<> 149:156823d33999 82 interrupt_enable_counter++;
<> 149:156823d33999 83 }
<> 149:156823d33999 84
<> 149:156823d33999 85 MBED_WEAK void core_util_critical_section_exit(void)
<> 149:156823d33999 86 {
<> 149:156823d33999 87 /* If critical_section_enter has not previously been called, do nothing */
<> 149:156823d33999 88 if (interrupt_enable_counter) {
<> 149:156823d33999 89
<> 149:156823d33999 90 // FIXME
<> 149:156823d33999 91 #ifndef FEATURE_UVISOR
<> 149:156823d33999 92 bool interrupts_disabled = !core_util_are_interrupts_enabled(); /* get the current interrupt disabled state */
<> 149:156823d33999 93
<> 149:156823d33999 94 MBED_ASSERT(interrupts_disabled); /* Interrupts must be disabled on invoking an exit from a critical section */
<> 149:156823d33999 95 #else
<> 149:156823d33999 96 #warning "core_util_critical_section_exit needs fixing to work from unprivileged code"
<> 149:156823d33999 97 #endif /* FEATURE_UVISOR */
<> 149:156823d33999 98
<> 149:156823d33999 99 interrupt_enable_counter--;
<> 149:156823d33999 100
<> 149:156823d33999 101 /* Only re-enable interrupts if we are exiting the last of the nested critical sections and
<> 149:156823d33999 102 interrupts were enabled on entry to the first critical section.
<> 149:156823d33999 103 */
<> 149:156823d33999 104 if (!interrupt_enable_counter && !critical_interrupts_disabled) {
<> 149:156823d33999 105 __enable_irq();
<> 149:156823d33999 106 }
<> 149:156823d33999 107 }
<> 149:156823d33999 108 }
<> 149:156823d33999 109
<> 149:156823d33999 110 #if EXCLUSIVE_ACCESS
<> 149:156823d33999 111
<> 149:156823d33999 112 /* Supress __ldrex and __strex deprecated warnings - "#3731-D: intrinsic is deprecated" */
<> 149:156823d33999 113 #if defined (__CC_ARM)
<> 149:156823d33999 114 #pragma diag_suppress 3731
<> 149:156823d33999 115 #endif
<> 149:156823d33999 116
<> 149:156823d33999 117 bool core_util_atomic_cas_u8(uint8_t *ptr, uint8_t *expectedCurrentValue, uint8_t desiredValue)
<> 149:156823d33999 118 {
<> 149:156823d33999 119 uint8_t currentValue = __LDREXB((volatile uint8_t*)ptr);
<> 149:156823d33999 120 if (currentValue != *expectedCurrentValue) {
<> 149:156823d33999 121 *expectedCurrentValue = currentValue;
<> 149:156823d33999 122 __CLREX();
<> 149:156823d33999 123 return false;
<> 149:156823d33999 124 }
<> 149:156823d33999 125
<> 149:156823d33999 126 return !__STREXB(desiredValue, (volatile uint8_t*)ptr);
<> 149:156823d33999 127 }
<> 149:156823d33999 128
<> 149:156823d33999 129 bool core_util_atomic_cas_u16(uint16_t *ptr, uint16_t *expectedCurrentValue, uint16_t desiredValue)
<> 149:156823d33999 130 {
<> 149:156823d33999 131 uint16_t currentValue = __LDREXH((volatile uint16_t*)ptr);
<> 149:156823d33999 132 if (currentValue != *expectedCurrentValue) {
<> 149:156823d33999 133 *expectedCurrentValue = currentValue;
<> 149:156823d33999 134 __CLREX();
<> 149:156823d33999 135 return false;
<> 149:156823d33999 136 }
<> 149:156823d33999 137
<> 149:156823d33999 138 return !__STREXH(desiredValue, (volatile uint16_t*)ptr);
<> 149:156823d33999 139 }
<> 149:156823d33999 140
<> 149:156823d33999 141
<> 149:156823d33999 142 bool core_util_atomic_cas_u32(uint32_t *ptr, uint32_t *expectedCurrentValue, uint32_t desiredValue)
<> 149:156823d33999 143 {
<> 149:156823d33999 144 uint32_t currentValue = __LDREXW((volatile uint32_t*)ptr);
<> 149:156823d33999 145 if (currentValue != *expectedCurrentValue) {
<> 149:156823d33999 146 *expectedCurrentValue = currentValue;
<> 149:156823d33999 147 __CLREX();
<> 149:156823d33999 148 return false;
<> 149:156823d33999 149 }
<> 149:156823d33999 150
<> 149:156823d33999 151 return !__STREXW(desiredValue, (volatile uint32_t*)ptr);
<> 149:156823d33999 152 }
<> 149:156823d33999 153
<> 149:156823d33999 154 uint8_t core_util_atomic_incr_u8(uint8_t *valuePtr, uint8_t delta)
<> 149:156823d33999 155 {
<> 149:156823d33999 156 uint8_t newValue;
<> 149:156823d33999 157 do {
<> 149:156823d33999 158 newValue = __LDREXB((volatile uint8_t*)valuePtr) + delta;
<> 149:156823d33999 159 } while (__STREXB(newValue, (volatile uint8_t*)valuePtr));
<> 149:156823d33999 160 return newValue;
<> 149:156823d33999 161 }
<> 149:156823d33999 162
<> 149:156823d33999 163 uint16_t core_util_atomic_incr_u16(uint16_t *valuePtr, uint16_t delta)
<> 149:156823d33999 164 {
<> 149:156823d33999 165 uint16_t newValue;
<> 149:156823d33999 166 do {
<> 149:156823d33999 167 newValue = __LDREXH((volatile uint16_t*)valuePtr) + delta;
<> 149:156823d33999 168 } while (__STREXH(newValue, (volatile uint16_t*)valuePtr));
<> 149:156823d33999 169 return newValue;
<> 149:156823d33999 170 }
<> 149:156823d33999 171
<> 149:156823d33999 172 uint32_t core_util_atomic_incr_u32(uint32_t *valuePtr, uint32_t delta)
<> 149:156823d33999 173 {
<> 149:156823d33999 174 uint32_t newValue;
<> 149:156823d33999 175 do {
<> 149:156823d33999 176 newValue = __LDREXW((volatile uint32_t*)valuePtr) + delta;
<> 149:156823d33999 177 } while (__STREXW(newValue, (volatile uint32_t*)valuePtr));
<> 149:156823d33999 178 return newValue;
<> 149:156823d33999 179 }
<> 149:156823d33999 180
<> 149:156823d33999 181
<> 149:156823d33999 182 uint8_t core_util_atomic_decr_u8(uint8_t *valuePtr, uint8_t delta)
<> 149:156823d33999 183 {
<> 149:156823d33999 184 uint8_t newValue;
<> 149:156823d33999 185 do {
<> 149:156823d33999 186 newValue = __LDREXB((volatile uint8_t*)valuePtr) - delta;
<> 149:156823d33999 187 } while (__STREXB(newValue, (volatile uint8_t*)valuePtr));
<> 149:156823d33999 188 return newValue;
<> 149:156823d33999 189 }
<> 149:156823d33999 190
<> 149:156823d33999 191 uint16_t core_util_atomic_decr_u16(uint16_t *valuePtr, uint16_t delta)
<> 149:156823d33999 192 {
<> 149:156823d33999 193 uint16_t newValue;
<> 149:156823d33999 194 do {
<> 149:156823d33999 195 newValue = __LDREXH((volatile uint16_t*)valuePtr) - delta;
<> 149:156823d33999 196 } while (__STREXH(newValue, (volatile uint16_t*)valuePtr));
<> 149:156823d33999 197 return newValue;
<> 149:156823d33999 198 }
<> 149:156823d33999 199
<> 149:156823d33999 200 uint32_t core_util_atomic_decr_u32(uint32_t *valuePtr, uint32_t delta)
<> 149:156823d33999 201 {
<> 149:156823d33999 202 uint32_t newValue;
<> 149:156823d33999 203 do {
<> 149:156823d33999 204 newValue = __LDREXW((volatile uint32_t*)valuePtr) - delta;
<> 149:156823d33999 205 } while (__STREXW(newValue, (volatile uint32_t*)valuePtr));
<> 149:156823d33999 206 return newValue;
<> 149:156823d33999 207 }
<> 149:156823d33999 208
<> 149:156823d33999 209 #else
<> 149:156823d33999 210
<> 149:156823d33999 211 bool core_util_atomic_cas_u8(uint8_t *ptr, uint8_t *expectedCurrentValue, uint8_t desiredValue)
<> 149:156823d33999 212 {
<> 149:156823d33999 213 bool success;
<> 149:156823d33999 214 uint8_t currentValue;
<> 149:156823d33999 215 core_util_critical_section_enter();
<> 149:156823d33999 216 currentValue = *ptr;
<> 149:156823d33999 217 if (currentValue == *expectedCurrentValue) {
<> 149:156823d33999 218 *ptr = desiredValue;
<> 149:156823d33999 219 success = true;
<> 149:156823d33999 220 } else {
<> 149:156823d33999 221 *expectedCurrentValue = currentValue;
<> 149:156823d33999 222 success = false;
<> 149:156823d33999 223 }
<> 149:156823d33999 224 core_util_critical_section_exit();
<> 149:156823d33999 225 return success;
<> 149:156823d33999 226 }
<> 149:156823d33999 227
<> 149:156823d33999 228 bool core_util_atomic_cas_u16(uint16_t *ptr, uint16_t *expectedCurrentValue, uint16_t desiredValue)
<> 149:156823d33999 229 {
<> 149:156823d33999 230 bool success;
<> 149:156823d33999 231 uint16_t currentValue;
<> 149:156823d33999 232 core_util_critical_section_enter();
<> 149:156823d33999 233 currentValue = *ptr;
<> 149:156823d33999 234 if (currentValue == *expectedCurrentValue) {
<> 149:156823d33999 235 *ptr = desiredValue;
<> 149:156823d33999 236 success = true;
<> 149:156823d33999 237 } else {
<> 149:156823d33999 238 *expectedCurrentValue = currentValue;
<> 149:156823d33999 239 success = false;
<> 149:156823d33999 240 }
<> 149:156823d33999 241 core_util_critical_section_exit();
<> 149:156823d33999 242 return success;
<> 149:156823d33999 243 }
<> 149:156823d33999 244
<> 149:156823d33999 245
<> 149:156823d33999 246 bool core_util_atomic_cas_u32(uint32_t *ptr, uint32_t *expectedCurrentValue, uint32_t desiredValue)
<> 149:156823d33999 247 {
<> 149:156823d33999 248 bool success;
<> 149:156823d33999 249 uint32_t currentValue;
<> 149:156823d33999 250 core_util_critical_section_enter();
<> 149:156823d33999 251 currentValue = *ptr;
<> 149:156823d33999 252 if (currentValue == *expectedCurrentValue) {
<> 149:156823d33999 253 *ptr = desiredValue;
<> 149:156823d33999 254 success = true;
<> 149:156823d33999 255 } else {
<> 149:156823d33999 256 *expectedCurrentValue = currentValue;
<> 149:156823d33999 257 success = false;
<> 149:156823d33999 258 }
<> 149:156823d33999 259 core_util_critical_section_exit();
<> 149:156823d33999 260 return success;
<> 149:156823d33999 261 }
<> 149:156823d33999 262
<> 149:156823d33999 263
<> 149:156823d33999 264 uint8_t core_util_atomic_incr_u8(uint8_t *valuePtr, uint8_t delta)
<> 149:156823d33999 265 {
<> 149:156823d33999 266 uint8_t newValue;
<> 149:156823d33999 267 core_util_critical_section_enter();
<> 149:156823d33999 268 newValue = *valuePtr + delta;
<> 149:156823d33999 269 *valuePtr = newValue;
<> 149:156823d33999 270 core_util_critical_section_exit();
<> 149:156823d33999 271 return newValue;
<> 149:156823d33999 272 }
<> 149:156823d33999 273
<> 149:156823d33999 274 uint16_t core_util_atomic_incr_u16(uint16_t *valuePtr, uint16_t delta)
<> 149:156823d33999 275 {
<> 149:156823d33999 276 uint16_t newValue;
<> 149:156823d33999 277 core_util_critical_section_enter();
<> 149:156823d33999 278 newValue = *valuePtr + delta;
<> 149:156823d33999 279 *valuePtr = newValue;
<> 149:156823d33999 280 core_util_critical_section_exit();
<> 149:156823d33999 281 return newValue;
<> 149:156823d33999 282 }
<> 149:156823d33999 283
<> 149:156823d33999 284 uint32_t core_util_atomic_incr_u32(uint32_t *valuePtr, uint32_t delta)
<> 149:156823d33999 285 {
<> 149:156823d33999 286 uint32_t newValue;
<> 149:156823d33999 287 core_util_critical_section_enter();
<> 149:156823d33999 288 newValue = *valuePtr + delta;
<> 149:156823d33999 289 *valuePtr = newValue;
<> 149:156823d33999 290 core_util_critical_section_exit();
<> 149:156823d33999 291 return newValue;
<> 149:156823d33999 292 }
<> 149:156823d33999 293
<> 149:156823d33999 294
<> 149:156823d33999 295 uint8_t core_util_atomic_decr_u8(uint8_t *valuePtr, uint8_t delta)
<> 149:156823d33999 296 {
<> 149:156823d33999 297 uint8_t newValue;
<> 149:156823d33999 298 core_util_critical_section_enter();
<> 149:156823d33999 299 newValue = *valuePtr - delta;
<> 149:156823d33999 300 *valuePtr = newValue;
<> 149:156823d33999 301 core_util_critical_section_exit();
<> 149:156823d33999 302 return newValue;
<> 149:156823d33999 303 }
<> 149:156823d33999 304
<> 149:156823d33999 305 uint16_t core_util_atomic_decr_u16(uint16_t *valuePtr, uint16_t delta)
<> 149:156823d33999 306 {
<> 149:156823d33999 307 uint16_t newValue;
<> 149:156823d33999 308 core_util_critical_section_enter();
<> 149:156823d33999 309 newValue = *valuePtr - delta;
<> 149:156823d33999 310 *valuePtr = newValue;
<> 149:156823d33999 311 core_util_critical_section_exit();
<> 149:156823d33999 312 return newValue;
<> 149:156823d33999 313 }
<> 149:156823d33999 314
<> 149:156823d33999 315 uint32_t core_util_atomic_decr_u32(uint32_t *valuePtr, uint32_t delta)
<> 149:156823d33999 316 {
<> 149:156823d33999 317 uint32_t newValue;
<> 149:156823d33999 318 core_util_critical_section_enter();
<> 149:156823d33999 319 newValue = *valuePtr - delta;
<> 149:156823d33999 320 *valuePtr = newValue;
<> 149:156823d33999 321 core_util_critical_section_exit();
<> 149:156823d33999 322 return newValue;
<> 149:156823d33999 323 }
<> 149:156823d33999 324
<> 149:156823d33999 325 #endif
<> 149:156823d33999 326
<> 149:156823d33999 327
<> 149:156823d33999 328 bool core_util_atomic_cas_ptr(void **ptr, void **expectedCurrentValue, void *desiredValue) {
<> 149:156823d33999 329 return core_util_atomic_cas_u32(
<> 149:156823d33999 330 (uint32_t *)ptr,
<> 149:156823d33999 331 (uint32_t *)expectedCurrentValue,
<> 149:156823d33999 332 (uint32_t)desiredValue);
<> 149:156823d33999 333 }
<> 149:156823d33999 334
<> 149:156823d33999 335 void *core_util_atomic_incr_ptr(void **valuePtr, ptrdiff_t delta) {
<> 149:156823d33999 336 return (void *)core_util_atomic_incr_u32((uint32_t *)valuePtr, (uint32_t)delta);
<> 149:156823d33999 337 }
<> 149:156823d33999 338
<> 149:156823d33999 339 void *core_util_atomic_decr_ptr(void **valuePtr, ptrdiff_t delta) {
<> 149:156823d33999 340 return (void *)core_util_atomic_decr_u32((uint32_t *)valuePtr, (uint32_t)delta);
<> 149:156823d33999 341 }
<> 149:156823d33999 342