Matthew Sessions / SLCD

kl43z compatible

Dependents:   Lab2_kl43z

LCDconfig.h@1:61a420af8109, 2017-10-24 (annotated)

Committer:
dogcatfee
Date:
Tue Oct 24 18:43:06 2017 -0700
Revision:
1:61a420af8109
Parent:
0:ca792cac7591 
Add clear

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Dogcatfee 0:ca792cac7591 1 #include "FRDM-s401.h" // 4x7 segdisplay
Dogcatfee 0:ca792cac7591 2
Dogcatfee 0:ca792cac7591 3
Dogcatfee 0:ca792cac7591 4 #if 1 // VREF to VLL1
Dogcatfee 0:ca792cac7591 5 /* Following configuration is used for LCD default initialization */
Dogcatfee 0:ca792cac7591 6 #define _LCDRVEN (1) //
Dogcatfee 0:ca792cac7591 7 #define _LCDRVTRIM (8) // CPSEL = 1 0 -- 8000 pf 1 -- 6000 pf 2 -- 4000 pf 3 -- 2000 pf
Dogcatfee 0:ca792cac7591 8 #define _LCDCPSEL (1) // charge pump select 0 or 1
Dogcatfee 0:ca792cac7591 9 #define _LCDLOADADJUST (3) // CPSEL = 1 0 -- 8000 pf 1 -- 6000 pf 2 -- 4000 pf 3 -- 2000 pf
Dogcatfee 0:ca792cac7591 10 #define _LCDALTDIV (0) // CPSEL = 1 0 -- 8000 pf 1 -- 6000 pf 2 -- 4000 pf 3 -- 2000 pf
Dogcatfee 0:ca792cac7591 11 #define _LCDALRCLKSOURCE (0) // 0 -- External clock 1 -- Alternate clock
Dogcatfee 0:ca792cac7591 12
Dogcatfee 0:ca792cac7591 13 #define _LCDCLKPSL (0) // Clock divider to generate the LCD Waveforms
Dogcatfee 0:ca792cac7591 14 #define _LCDSUPPLY (1)
Dogcatfee 0:ca792cac7591 15 #define _LCDHREF (0) // 0 or 1
Dogcatfee 0:ca792cac7591 16 #define _LCDCLKSOURCE (1) // 0 -- External clock 1 -- Alternate clock
Dogcatfee 0:ca792cac7591 17 #define _LCDLCK (1) //Any number between 0 and 7
Dogcatfee 0:ca792cac7591 18 #define _LCDBLINKRATE (3) //Any number between 0 and 7
Dogcatfee 0:ca792cac7591 19
Dogcatfee 0:ca792cac7591 20
Dogcatfee 0:ca792cac7591 21 #else //VLL3 to VDD internally
Dogcatfee 0:ca792cac7591 22 /* Following configuration is used for LCD default initialization */
Dogcatfee 0:ca792cac7591 23 #define _LCDCLKSOURCE (1) // 0 -- External clock 1 -- Alternate clock
Dogcatfee 0:ca792cac7591 24 #define _LCDALRCLKSOURCE (0) // 0 -- External clock 1 -- Alternate clock
Dogcatfee 0:ca792cac7591 25 #define _LCDCLKPSL (0) // Clock divider to generate the LCD Waveforms
Dogcatfee 0:ca792cac7591 26 #define _LCDSUPPLY (0)
Dogcatfee 0:ca792cac7591 27 #define _LCDLOADADJUST (3) // CPSEL = 1 0 -- 8000 pf 1 -- 6000 pf 2 -- 4000 pf 3 -- 2000 pf
Dogcatfee 0:ca792cac7591 28 #define _LCDALTDIV (0) // CPSEL = 1 0 -- 8000 pf 1 -- 6000 pf 2 -- 4000 pf 3 -- 2000 pf
Dogcatfee 0:ca792cac7591 29 #define _LCDRVTRIM (0) // CPSEL = 1 0 -- 8000 pf 1 -- 6000 pf 2 -- 4000 pf 3 -- 2000 pf
Dogcatfee 0:ca792cac7591 30 #define _LCDHREF (0) // 0 or 1
Dogcatfee 0:ca792cac7591 31 #define _LCDCPSEL (1) // 0 or 1
Dogcatfee 0:ca792cac7591 32 #define _LCDRVEN (0) //
Dogcatfee 0:ca792cac7591 33 #define _LCDBLINKRATE (3) // Any number between 0 and 7
Dogcatfee 0:ca792cac7591 34 #define _LCDLCK (0) // Any number between 0 and 7
Dogcatfee 0:ca792cac7591 35
Dogcatfee 0:ca792cac7591 36 #endif
Dogcatfee 0:ca792cac7591 37
Dogcatfee 0:ca792cac7591 38
Dogcatfee 0:ca792cac7591 39
Dogcatfee 0:ca792cac7591 40
Dogcatfee 0:ca792cac7591 41 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~ LCD Control Register 0 ~|~|~|~|~|~|~|~|~|~|~|~|~*/
Dogcatfee 0:ca792cac7591 42 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/
Dogcatfee 0:ca792cac7591 43 #define _LCDINTENABLE (1)
Dogcatfee 0:ca792cac7591 44
Dogcatfee 0:ca792cac7591 45 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~ LCD Control Register 1 ~|~|~|~|~|~|~|~|~|~|~|~|~|*/
Dogcatfee 0:ca792cac7591 46 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/
Dogcatfee 0:ca792cac7591 47 #define _LCDFRAMEINTERRUPT (0) //0 Disable Frame Frequency Interrupt
Dogcatfee 0:ca792cac7591 48 //1 Enable an LCD interrupt that coincides with the LCD frame frequency
Dogcatfee 0:ca792cac7591 49 #define _LCDFULLCPLDIRIVE (0) // 0 GPIO shared with the LCD. Inputs levels and internal pullup reference to VDD
Dogcatfee 0:ca792cac7591 50 // 1 If VSUPPLY=11and RVEN=0. Inputs levels and internal pullup reference to VLL3
Dogcatfee 0:ca792cac7591 51 #define _LCDWAITMODE (0) // 0 Allows the LCD driver and charge pump to continue running during wait mode
Dogcatfee 0:ca792cac7591 52 // 1 Disable the LCD when the MCU goes into wait mode
Dogcatfee 0:ca792cac7591 53 #define _LCDSTOPMODE (0) // 0 Allows the LCD driver and charge pump to continue running during stop2 or stop3
Dogcatfee 0:ca792cac7591 54 // 1 Disable the LCD when and charge pump when the MCU goes into stop2 or stop3
Dogcatfee 0:ca792cac7591 55
Dogcatfee 0:ca792cac7591 56 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~ LCD Voltage Supply Register ~|~|~|~|~|~|~|~|~|~|~|~*/
Dogcatfee 0:ca792cac7591 57 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/
Dogcatfee 0:ca792cac7591 58 #define _LCDHIGHREF (0) //0 Divide input VIREG=1.0v
Dogcatfee 0:ca792cac7591 59 //1 Do not divide the input VIREG=1.67v
Dogcatfee 0:ca792cac7591 60 #define _LCDBBYPASS (0) //Determines whether the internal LCD op amp buffer is bypassed
Dogcatfee 0:ca792cac7591 61 //0 Buffered mode
Dogcatfee 0:ca792cac7591 62 //1 Unbuffered mode
Dogcatfee 0:ca792cac7591 63
Dogcatfee 0:ca792cac7591 64 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~ LCD Regulated Voltage Control |~|~|~|~|~|~|~|~|~|~*/
Dogcatfee 0:ca792cac7591 65 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/
Dogcatfee 0:ca792cac7591 66 #define _LCDCONTRAST (1) //Contrast by software 0 -- Disable 1-- Enable
Dogcatfee 0:ca792cac7591 67 #define _LVLCONTRAST (0) //Any number between 0 and 15, if the number is bigger the glass gets darker
Dogcatfee 0:ca792cac7591 68
Dogcatfee 0:ca792cac7591 69 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~ LCD Blink Control Register ~|~|~|~|~|~|~|~|~|~|~|~*/
Dogcatfee 0:ca792cac7591 70 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/
Dogcatfee 0:ca792cac7591 71 #define _LCDBLINKCONTROL (1) //0 Disable blink mode
Dogcatfee 0:ca792cac7591 72 //1 Enable blink mode
Dogcatfee 0:ca792cac7591 73 #define _LCDALTMODE (0) //0 Normal display
Dogcatfee 0:ca792cac7591 74 //1 Alternate display for 4 backplanes or less the LCD backplane sequencer changes to otuput an alternate display
Dogcatfee 0:ca792cac7591 75 #define _LCDBLANKDISP (0) //0 Do not blank display
Dogcatfee 0:ca792cac7591 76 //1 Blank display if you put it in 0 the text before blank is manteined
Dogcatfee 0:ca792cac7591 77 #define _LCDBLINKMODE (0) //0 Display blank during the blink period
Dogcatfee 0:ca792cac7591 78 //1 Display alternate displat during blink period (Ignored if duty is 5 or greater)
Dogcatfee 0:ca792cac7591 79
Dogcatfee 0:ca792cac7591 80
Dogcatfee 0:ca792cac7591 81 //Calculated values
Dogcatfee 0:ca792cac7591 82 #define _LCDUSEDPINS (_LCDFRONTPLANES + _LCDBACKPLANES)
Dogcatfee 0:ca792cac7591 83 #define _LCDDUTY (_LCDBACKPLANES-1) //Any number between 0 and 7
Dogcatfee 0:ca792cac7591 84 #define LCD_WF_BASE LCD->WF8B[0]
Dogcatfee 0:ca792cac7591 85
Dogcatfee 0:ca792cac7591 86 // General definitions used by the LCD library
Dogcatfee 0:ca792cac7591 87 //#define LCD_WF(x) *((uint8 *)&LCD_WF_BASE + x)
Dogcatfee 0:ca792cac7591 88
Dogcatfee 0:ca792cac7591 89 /*LCD Fault Detections Consts*/
Dogcatfee 0:ca792cac7591 90 #define FP_TYPE 0x00 // pin is a Front Plane
Dogcatfee 0:ca792cac7591 91 #define BP_TYPE 0x80 // pin is Back Plane
Dogcatfee 0:ca792cac7591 92
Dogcatfee 0:ca792cac7591 93 // Fault Detect Preescaler Options
Dogcatfee 0:ca792cac7591 94 #define FDPRS_1 0
Dogcatfee 0:ca792cac7591 95 #define FDPRS_2 1
Dogcatfee 0:ca792cac7591 96 #define FDPRS_4 2
Dogcatfee 0:ca792cac7591 97 #define FDPRS_8 3
Dogcatfee 0:ca792cac7591 98 #define FDPRS_16 4
Dogcatfee 0:ca792cac7591 99 #define FDPRS_32 5
Dogcatfee 0:ca792cac7591 100 #define FDPRS_64 6
Dogcatfee 0:ca792cac7591 101 #define FDPRS_128 7
Dogcatfee 0:ca792cac7591 102
Dogcatfee 0:ca792cac7591 103 // Fault Detect Sample Window Width Values
Dogcatfee 0:ca792cac7591 104 #define FDSWW_4 0
Dogcatfee 0:ca792cac7591 105 #define FDSWW_8 1
Dogcatfee 0:ca792cac7591 106 #define FDSWW_16 2
Dogcatfee 0:ca792cac7591 107 #define FDSWW_32 3
Dogcatfee 0:ca792cac7591 108 #define FDSWW_64 4
Dogcatfee 0:ca792cac7591 109 #define FDSWW_128 5
Dogcatfee 0:ca792cac7591 110 #define FDSWW_256 6
Dogcatfee 0:ca792cac7591 111 #define FDSWW_512 7
Dogcatfee 0:ca792cac7591 112
Dogcatfee 0:ca792cac7591 113 /*
Dogcatfee 0:ca792cac7591 114 Mask Bit definitions used f
Dogcatfee 0:ca792cac7591 115 */
Dogcatfee 0:ca792cac7591 116 #define mBIT0 1
Dogcatfee 0:ca792cac7591 117 #define mBIT1 2
Dogcatfee 0:ca792cac7591 118 #define mBIT2 4
Dogcatfee 0:ca792cac7591 119 #define mBIT3 8
Dogcatfee 0:ca792cac7591 120 #define mBIT4 16
Dogcatfee 0:ca792cac7591 121 #define mBIT5 32
Dogcatfee 0:ca792cac7591 122 #define mBIT6 64
Dogcatfee 0:ca792cac7591 123 #define mBIT7 128
Dogcatfee 0:ca792cac7591 124 #define mBIT8 256
Dogcatfee 0:ca792cac7591 125 #define mBIT9 512
Dogcatfee 0:ca792cac7591 126 #define mBIT10 1024
Dogcatfee 0:ca792cac7591 127 #define mBIT11 2048
Dogcatfee 0:ca792cac7591 128 #define mBIT12 4096
Dogcatfee 0:ca792cac7591 129 #define mBIT13 8192
Dogcatfee 0:ca792cac7591 130 #define mBIT14 16384
Dogcatfee 0:ca792cac7591 131 #define mBIT15 32768
Dogcatfee 0:ca792cac7591 132 #define mBIT16 65536
Dogcatfee 0:ca792cac7591 133 #define mBIT17 131072
Dogcatfee 0:ca792cac7591 134 #define mBIT18 262144
Dogcatfee 0:ca792cac7591 135 #define mBIT19 524288
Dogcatfee 0:ca792cac7591 136 #define mBIT20 1048576
Dogcatfee 0:ca792cac7591 137 #define mBIT21 2097152
Dogcatfee 0:ca792cac7591 138 #define mBIT22 4194304
Dogcatfee 0:ca792cac7591 139 #define mBIT23 8388608
Dogcatfee 0:ca792cac7591 140 #define mBIT24 16777216
Dogcatfee 0:ca792cac7591 141 #define mBIT25 33554432
Dogcatfee 0:ca792cac7591 142 #define mBIT26 67108864
Dogcatfee 0:ca792cac7591 143 #define mBIT27 134217728
Dogcatfee 0:ca792cac7591 144 #define mBIT28 268435456
Dogcatfee 0:ca792cac7591 145 #define mBIT29 536870912
Dogcatfee 0:ca792cac7591 146 #define mBIT30 1073741824
Dogcatfee 0:ca792cac7591 147 #define mBIT31 2147483648
Dogcatfee 0:ca792cac7591 148
Dogcatfee 0:ca792cac7591 149 #define mBIT32 1
Dogcatfee 0:ca792cac7591 150 #define mBIT33 2
Dogcatfee 0:ca792cac7591 151 #define mBIT34 4
Dogcatfee 0:ca792cac7591 152 #define mBIT35 8
Dogcatfee 0:ca792cac7591 153 #define mBIT36 16
Dogcatfee 0:ca792cac7591 154 #define mBIT37 32
Dogcatfee 0:ca792cac7591 155 #define mBIT38 64
Dogcatfee 0:ca792cac7591 156 #define mBIT39 128
Dogcatfee 0:ca792cac7591 157 #define mBIT40 256
Dogcatfee 0:ca792cac7591 158 #define mBIT41 512
Dogcatfee 0:ca792cac7591 159 #define mBIT42 1024
Dogcatfee 0:ca792cac7591 160 #define mBIT43 2048
Dogcatfee 0:ca792cac7591 161 #define mBIT44 4096
Dogcatfee 0:ca792cac7591 162 #define mBIT45 8192
Dogcatfee 0:ca792cac7591 163 #define mBIT46 16384
Dogcatfee 0:ca792cac7591 164 #define mBIT47 32768
Dogcatfee 0:ca792cac7591 165 #define mBIT48 65536
Dogcatfee 0:ca792cac7591 166 #define mBIT49 131072
Dogcatfee 0:ca792cac7591 167 #define mBIT50 262144
Dogcatfee 0:ca792cac7591 168 #define mBIT51 524288
Dogcatfee 0:ca792cac7591 169 #define mBIT52 1048576
Dogcatfee 0:ca792cac7591 170 #define mBIT53 2097152
Dogcatfee 0:ca792cac7591 171 #define mBIT54 4194304
Dogcatfee 0:ca792cac7591 172 #define mBIT55 8388608
Dogcatfee 0:ca792cac7591 173 #define mBIT56 16777216
Dogcatfee 0:ca792cac7591 174 #define mBIT57 33554432
Dogcatfee 0:ca792cac7591 175 #define mBIT58 67108864
Dogcatfee 0:ca792cac7591 176 #define mBIT59 134217728
Dogcatfee 0:ca792cac7591 177 #define mBIT60 268435456
Dogcatfee 0:ca792cac7591 178 #define mBIT61 536870912
Dogcatfee 0:ca792cac7591 179 #define mBIT62 1073741824
Dogcatfee 0:ca792cac7591 180 #define mBIT63 2147483648
Dogcatfee 0:ca792cac7591 181
Dogcatfee 0:ca792cac7591 182
Dogcatfee 0:ca792cac7591 183