Diff: targets/TARGET_STM/TARGET_STM32L0/i2c_device.h

Revision:

153:fa9ff456f731

Child:

156:95d6b41a828b

diff -r 9a67f0b066fc -r fa9ff456f731 targets/TARGET_STM/TARGET_STM32L0/i2c_device.h
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/targets/TARGET_STM/TARGET_STM32L0/i2c_device.h	Tue Dec 20 17:27:56 2016 +0000
@@ -0,0 +1,90 @@
+/* mbed Microcontroller Library
+ *******************************************************************************
+ * Copyright (c) 2015, STMicroelectronics
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *******************************************************************************
+ */
+#ifndef MBED_I2C_DEVICE_H
+#define MBED_I2C_DEVICE_H
+
+#include "cmsis.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef DEVICE_I2C
+
+#define I2C_IP_VERSION_V2
+
+#if defined I2C1_BASE
+#define I2C1_EV_IRQn I2C1_IRQn
+#define I2C1_ER_IRQn I2C1_IRQn
+#endif
+#if defined I2C2_BASE
+#define I2C2_EV_IRQn I2C2_IRQn
+#define I2C2_ER_IRQn I2C2_IRQn
+#endif
+#if defined I2C3_BASE
+#define I2C3_EV_IRQn I2C3_IRQn
+#define I2C3_ER_IRQn I2C3_IRQn
+#endif
+
+#define I2C_IT_ALL (I2C_IT_ERRI|I2C_IT_TCI|I2C_IT_STOPI|I2C_IT_NACKI|I2C_IT_ADDRI|I2C_IT_RXI|I2C_IT_TXI)
+
+/*  Family specifc settings for clock source */
+#define I2CAPI_I2C1_CLKSRC RCC_I2C1CLKSOURCE_SYSCLK
+#define I2CAPI_I2C3_CLKSRC RCC_I2C3CLKSOURCE_SYSCLK
+#define I2CAPI_I2C4_CLKSRC RCC_I2C4CLKSOURCE_SYSCLK
+
+/*  Provide the suitable timing depending on requested frequencie */
+inline uint32_t get_i2c_timing(int hz)
+{
+    uint32_t tim = 0;
+
+    switch (hz) {
+        case 100000:
+            tim = 0x20602938; // Standard mode with Rise Time = 400ns and Fall Time = 100ns
+                break;
+        case 400000:
+             tim = 0x00B0122A; // Fast mode with Rise Time = 250ns and Fall Time = 100ns
+            break;
+        case 1000000:
+            tim = 0x0030040E; // Fast mode Plus with Rise Time = 60ns and Fall Time = 100ns
+            break;
+        default:
+            break;
+    }
+    return tim;
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // DEVICE_I2C
+
+#endif