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targets/TARGET_NUVOTON/TARGET_NANO100/us_ticker.c@182:57724642e740, 2018-02-16 (annotated)

Committer:
AnnaBridge
Date:
Fri Feb 16 16:09:33 2018 +0000
Revision:
182:57724642e740
Parent:
175:b96e65c34a4d 
mbed-dev library. Release version 159.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 175:b96e65c34a4d 1 /* mbed Microcontroller Library
AnnaBridge 175:b96e65c34a4d 2 * Copyright (c) 2015-2017 Nuvoton
AnnaBridge 175:b96e65c34a4d 3 *
AnnaBridge 175:b96e65c34a4d 4 * Licensed under the Apache License, Version 2.0 (the "License");
AnnaBridge 175:b96e65c34a4d 5 * you may not use this file except in compliance with the License.
AnnaBridge 175:b96e65c34a4d 6 * You may obtain a copy of the License at
AnnaBridge 175:b96e65c34a4d 7 *
AnnaBridge 175:b96e65c34a4d 8 * http://www.apache.org/licenses/LICENSE-2.0
AnnaBridge 175:b96e65c34a4d 9 *
AnnaBridge 175:b96e65c34a4d 10 * Unless required by applicable law or agreed to in writing, software
AnnaBridge 175:b96e65c34a4d 11 * distributed under the License is distributed on an "AS IS" BASIS,
AnnaBridge 175:b96e65c34a4d 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
AnnaBridge 175:b96e65c34a4d 13 * See the License for the specific language governing permissions and
AnnaBridge 175:b96e65c34a4d 14 * limitations under the License.
AnnaBridge 175:b96e65c34a4d 15 */
AnnaBridge 175:b96e65c34a4d 16
AnnaBridge 175:b96e65c34a4d 17 #include "us_ticker_api.h"
AnnaBridge 175:b96e65c34a4d 18 #include "sleep_api.h"
AnnaBridge 175:b96e65c34a4d 19 #include "mbed_assert.h"
AnnaBridge 175:b96e65c34a4d 20 #include "nu_modutil.h"
AnnaBridge 175:b96e65c34a4d 21 #include "nu_miscutil.h"
AnnaBridge 175:b96e65c34a4d 22 #include "mbed_critical.h"
AnnaBridge 175:b96e65c34a4d 23
AnnaBridge 175:b96e65c34a4d 24 // us_ticker tick = us = timestamp
AnnaBridge 175:b96e65c34a4d 25 #define US_PER_TICK 1
AnnaBridge 175:b96e65c34a4d 26 #define US_PER_SEC (1000 * 1000)
AnnaBridge 175:b96e65c34a4d 27
AnnaBridge 175:b96e65c34a4d 28 #define TMR0HIRES_CLK_PER_SEC (1000 * 1000)
AnnaBridge 175:b96e65c34a4d 29 #define TMR1HIRES_CLK_PER_SEC (1000 * 1000)
AnnaBridge 175:b96e65c34a4d 30
AnnaBridge 175:b96e65c34a4d 31 #define US_PER_TMR0HIRES_CLK (US_PER_SEC / TMR0HIRES_CLK_PER_SEC)
AnnaBridge 175:b96e65c34a4d 32 #define US_PER_TMR1HIRES_CLK (US_PER_SEC / TMR1HIRES_CLK_PER_SEC)
AnnaBridge 175:b96e65c34a4d 33
AnnaBridge 175:b96e65c34a4d 34 #define US_PER_TMR0HIRES_INT (1000 * 1000 * 10)
AnnaBridge 175:b96e65c34a4d 35 #define TMR0HIRES_CLK_PER_TMR0HIRES_INT ((uint32_t) ((uint64_t) US_PER_TMR0HIRES_INT * TMR0HIRES_CLK_PER_SEC / US_PER_SEC))
AnnaBridge 175:b96e65c34a4d 36
AnnaBridge 175:b96e65c34a4d 37
AnnaBridge 175:b96e65c34a4d 38 void TMR0_IRQHandler(void);
AnnaBridge 175:b96e65c34a4d 39 void TMR1_IRQHandler(void);
AnnaBridge 175:b96e65c34a4d 40 static void us_ticker_arm_cd(void);
AnnaBridge 175:b96e65c34a4d 41
AnnaBridge 175:b96e65c34a4d 42 static int us_ticker_inited = 0;
AnnaBridge 175:b96e65c34a4d 43 static volatile uint32_t counter_major = 0;
AnnaBridge 175:b96e65c34a4d 44 static volatile uint32_t cd_major_minor_us = 0;
AnnaBridge 175:b96e65c34a4d 45 static volatile uint32_t cd_minor_us = 0;
AnnaBridge 175:b96e65c34a4d 46
AnnaBridge 175:b96e65c34a4d 47 // NOTE: Choose clock source of timer:
AnnaBridge 175:b96e65c34a4d 48 // 1. HIRC: Be the most accurate but might cause unknown HardFault.
AnnaBridge 175:b96e65c34a4d 49 // 2. HXT: Less accurate and cannot pass mbed-drivers test.
AnnaBridge 175:b96e65c34a4d 50 // NOTE: TIMER_0 for normal counter, TIMER_1 for countdown.
AnnaBridge 175:b96e65c34a4d 51 static const struct nu_modinit_s timer0hires_modinit = {TIMER_0, TMR0_MODULE, CLK_CLKSEL1_TMR0_S_HXT, 0, TMR0_RST, TMR0_IRQn, (void *) TMR0_IRQHandler};
AnnaBridge 175:b96e65c34a4d 52 static const struct nu_modinit_s timer1hires_modinit = {TIMER_1, TMR1_MODULE, CLK_CLKSEL1_TMR1_S_HXT, 0, TMR1_RST, TMR1_IRQn, (void *) TMR1_IRQHandler};
AnnaBridge 175:b96e65c34a4d 53
AnnaBridge 175:b96e65c34a4d 54 #define TMR_CMP_MIN 2
AnnaBridge 175:b96e65c34a4d 55 #define TMR_CMP_MAX 0xFFFFFFu
AnnaBridge 175:b96e65c34a4d 56
AnnaBridge 175:b96e65c34a4d 57 void us_ticker_init(void)
AnnaBridge 175:b96e65c34a4d 58 {
AnnaBridge 175:b96e65c34a4d 59 if (us_ticker_inited) {
AnnaBridge 175:b96e65c34a4d 60 return;
AnnaBridge 175:b96e65c34a4d 61 }
AnnaBridge 175:b96e65c34a4d 62
AnnaBridge 175:b96e65c34a4d 63 counter_major = 0;
AnnaBridge 175:b96e65c34a4d 64 cd_major_minor_us = 0;
AnnaBridge 175:b96e65c34a4d 65 cd_minor_us = 0;
AnnaBridge 175:b96e65c34a4d 66 us_ticker_inited = 1;
AnnaBridge 175:b96e65c34a4d 67
AnnaBridge 175:b96e65c34a4d 68 // Reset IP
AnnaBridge 175:b96e65c34a4d 69 SYS_ResetModule(timer0hires_modinit.rsetidx);
AnnaBridge 175:b96e65c34a4d 70 SYS_ResetModule(timer1hires_modinit.rsetidx);
AnnaBridge 175:b96e65c34a4d 71
AnnaBridge 175:b96e65c34a4d 72 // Select IP clock source
AnnaBridge 175:b96e65c34a4d 73 CLK_SetModuleClock(timer0hires_modinit.clkidx, timer0hires_modinit.clksrc, timer0hires_modinit.clkdiv);
AnnaBridge 175:b96e65c34a4d 74 CLK_SetModuleClock(timer1hires_modinit.clkidx, timer1hires_modinit.clksrc, timer1hires_modinit.clkdiv);
AnnaBridge 175:b96e65c34a4d 75 // Enable IP clock
AnnaBridge 175:b96e65c34a4d 76 CLK_EnableModuleClock(timer0hires_modinit.clkidx);
AnnaBridge 175:b96e65c34a4d 77 CLK_EnableModuleClock(timer1hires_modinit.clkidx);
AnnaBridge 175:b96e65c34a4d 78
AnnaBridge 175:b96e65c34a4d 79 // Timer for normal counter
AnnaBridge 175:b96e65c34a4d 80 uint32_t clk_timer0 = TIMER_GetModuleClock((TIMER_T *) NU_MODBASE(timer0hires_modinit.modname));
AnnaBridge 175:b96e65c34a4d 81 uint32_t prescale_timer0 = clk_timer0 / TMR0HIRES_CLK_PER_SEC - 1;
AnnaBridge 175:b96e65c34a4d 82 MBED_ASSERT((prescale_timer0 != (uint32_t) -1) && prescale_timer0 <= 127);
AnnaBridge 175:b96e65c34a4d 83 MBED_ASSERT((clk_timer0 % TMR0HIRES_CLK_PER_SEC) == 0);
AnnaBridge 175:b96e65c34a4d 84 uint32_t cmp_timer0 = TMR0HIRES_CLK_PER_TMR0HIRES_INT;
AnnaBridge 175:b96e65c34a4d 85 MBED_ASSERT(cmp_timer0 >= TMR_CMP_MIN && cmp_timer0 <= TMR_CMP_MAX);
AnnaBridge 175:b96e65c34a4d 86 ((TIMER_T *) NU_MODBASE(timer0hires_modinit.modname))->CTL = TIMER_PERIODIC_MODE;
AnnaBridge 175:b96e65c34a4d 87 ((TIMER_T *) NU_MODBASE(timer0hires_modinit.modname))->PRECNT = prescale_timer0;
AnnaBridge 175:b96e65c34a4d 88 ((TIMER_T *) NU_MODBASE(timer0hires_modinit.modname))->CMPR = cmp_timer0;
AnnaBridge 175:b96e65c34a4d 89
AnnaBridge 175:b96e65c34a4d 90 NVIC_SetVector(timer0hires_modinit.irq_n, (uint32_t) timer0hires_modinit.var);
AnnaBridge 175:b96e65c34a4d 91 NVIC_SetVector(timer1hires_modinit.irq_n, (uint32_t) timer1hires_modinit.var);
AnnaBridge 175:b96e65c34a4d 92
AnnaBridge 175:b96e65c34a4d 93 NVIC_EnableIRQ(timer0hires_modinit.irq_n);
AnnaBridge 175:b96e65c34a4d 94 NVIC_EnableIRQ(timer1hires_modinit.irq_n);
AnnaBridge 175:b96e65c34a4d 95
AnnaBridge 175:b96e65c34a4d 96 TIMER_EnableInt((TIMER_T *) NU_MODBASE(timer0hires_modinit.modname));
AnnaBridge 175:b96e65c34a4d 97 TIMER_Start((TIMER_T *) NU_MODBASE(timer0hires_modinit.modname));
AnnaBridge 175:b96e65c34a4d 98 }
AnnaBridge 175:b96e65c34a4d 99
AnnaBridge 175:b96e65c34a4d 100 uint32_t us_ticker_read()
AnnaBridge 175:b96e65c34a4d 101 {
AnnaBridge 175:b96e65c34a4d 102 if (! us_ticker_inited) {
AnnaBridge 175:b96e65c34a4d 103 us_ticker_init();
AnnaBridge 175:b96e65c34a4d 104 }
AnnaBridge 175:b96e65c34a4d 105
AnnaBridge 175:b96e65c34a4d 106 TIMER_T * timer0_base = (TIMER_T *) NU_MODBASE(timer0hires_modinit.modname);
AnnaBridge 175:b96e65c34a4d 107
AnnaBridge 175:b96e65c34a4d 108 do {
AnnaBridge 175:b96e65c34a4d 109 uint32_t major_minor_us;
AnnaBridge 175:b96e65c34a4d 110 uint32_t minor_us;
AnnaBridge 175:b96e65c34a4d 111
AnnaBridge 175:b96e65c34a4d 112 // NOTE: As TIMER_DR = TIMER_CMPR and counter_major has increased by one, TIMER_DR doesn't change to 0 for one tick time.
AnnaBridge 175:b96e65c34a4d 113 // NOTE: As TIMER_DR = TIMER_CMPR or TIMER_DR = 0, counter_major (ISR) may not sync with TIMER_DR. So skip and fetch stable one at the cost of 1 clock delay on this read.
AnnaBridge 175:b96e65c34a4d 114 do {
AnnaBridge 175:b96e65c34a4d 115 core_util_critical_section_enter();
AnnaBridge 175:b96e65c34a4d 116
AnnaBridge 175:b96e65c34a4d 117 // NOTE: Order of reading minor_us/carry here is significant.
AnnaBridge 175:b96e65c34a4d 118 minor_us = TIMER_GetCounter(timer0_base) * US_PER_TMR0HIRES_CLK;
AnnaBridge 175:b96e65c34a4d 119 uint32_t carry = (timer0_base->ISR & TIMER_ISR_TMR_IS_Msk) ? 1 : 0;
AnnaBridge 175:b96e65c34a4d 120 // When TIMER_DR approaches TIMER_CMPR and will wrap soon, we may get carry but TIMER_DR not wrapped. Hanlde carefully carry == 1 && TIMER_DR is near TIMER_CMPR.
AnnaBridge 175:b96e65c34a4d 121 if (carry && minor_us > (US_PER_TMR0HIRES_INT / 2)) {
AnnaBridge 175:b96e65c34a4d 122 major_minor_us = (counter_major + 1) * US_PER_TMR0HIRES_INT;
AnnaBridge 175:b96e65c34a4d 123 }
AnnaBridge 175:b96e65c34a4d 124 else {
AnnaBridge 175:b96e65c34a4d 125 major_minor_us = (counter_major + carry) * US_PER_TMR0HIRES_INT + minor_us;
AnnaBridge 175:b96e65c34a4d 126 }
AnnaBridge 175:b96e65c34a4d 127
AnnaBridge 175:b96e65c34a4d 128 core_util_critical_section_exit();
AnnaBridge 175:b96e65c34a4d 129 }
AnnaBridge 175:b96e65c34a4d 130 while (minor_us == 0 || minor_us == US_PER_TMR0HIRES_INT);
AnnaBridge 175:b96e65c34a4d 131
AnnaBridge 175:b96e65c34a4d 132 return (major_minor_us / US_PER_TICK);
AnnaBridge 175:b96e65c34a4d 133 }
AnnaBridge 175:b96e65c34a4d 134 while (0);
AnnaBridge 175:b96e65c34a4d 135 }
AnnaBridge 175:b96e65c34a4d 136
AnnaBridge 175:b96e65c34a4d 137 void us_ticker_disable_interrupt(void)
AnnaBridge 175:b96e65c34a4d 138 {
AnnaBridge 175:b96e65c34a4d 139 TIMER_DisableInt((TIMER_T *) NU_MODBASE(timer1hires_modinit.modname));
AnnaBridge 175:b96e65c34a4d 140 }
AnnaBridge 175:b96e65c34a4d 141
AnnaBridge 175:b96e65c34a4d 142 void us_ticker_clear_interrupt(void)
AnnaBridge 175:b96e65c34a4d 143 {
AnnaBridge 175:b96e65c34a4d 144 TIMER_ClearIntFlag((TIMER_T *) NU_MODBASE(timer1hires_modinit.modname));
AnnaBridge 175:b96e65c34a4d 145 }
AnnaBridge 175:b96e65c34a4d 146
AnnaBridge 175:b96e65c34a4d 147 void us_ticker_set_interrupt(timestamp_t timestamp)
AnnaBridge 175:b96e65c34a4d 148 {
AnnaBridge 175:b96e65c34a4d 149 TIMER_Stop((TIMER_T *) NU_MODBASE(timer1hires_modinit.modname));
AnnaBridge 175:b96e65c34a4d 150
AnnaBridge 175:b96e65c34a4d 151 uint32_t delta = timestamp - us_ticker_read();
AnnaBridge 175:b96e65c34a4d 152 cd_major_minor_us = delta * US_PER_TICK;
AnnaBridge 175:b96e65c34a4d 153 us_ticker_arm_cd();
AnnaBridge 175:b96e65c34a4d 154 }
AnnaBridge 175:b96e65c34a4d 155
AnnaBridge 175:b96e65c34a4d 156 void us_ticker_fire_interrupt(void)
AnnaBridge 175:b96e65c34a4d 157 {
AnnaBridge 175:b96e65c34a4d 158 cd_major_minor_us = cd_minor_us = 0;
AnnaBridge 175:b96e65c34a4d 159 NVIC_SetPendingIRQ(timer1hires_modinit.irq_n);
AnnaBridge 175:b96e65c34a4d 160 }
AnnaBridge 175:b96e65c34a4d 161
AnnaBridge 175:b96e65c34a4d 162 void TMR0_IRQHandler(void)
AnnaBridge 175:b96e65c34a4d 163 {
AnnaBridge 175:b96e65c34a4d 164 TIMER_ClearIntFlag((TIMER_T *) NU_MODBASE(timer0hires_modinit.modname));
AnnaBridge 175:b96e65c34a4d 165 counter_major ++;
AnnaBridge 175:b96e65c34a4d 166 }
AnnaBridge 175:b96e65c34a4d 167
AnnaBridge 175:b96e65c34a4d 168 void TMR1_IRQHandler(void)
AnnaBridge 175:b96e65c34a4d 169 {
AnnaBridge 175:b96e65c34a4d 170 TIMER_ClearIntFlag((TIMER_T *) NU_MODBASE(timer1hires_modinit.modname));
AnnaBridge 175:b96e65c34a4d 171 cd_major_minor_us = (cd_major_minor_us > cd_minor_us) ? (cd_major_minor_us - cd_minor_us) : 0;
AnnaBridge 175:b96e65c34a4d 172 if (cd_major_minor_us == 0) {
AnnaBridge 175:b96e65c34a4d 173 // NOTE: us_ticker_set_interrupt() may get called in us_ticker_irq_handler();
AnnaBridge 175:b96e65c34a4d 174 us_ticker_irq_handler();
AnnaBridge 175:b96e65c34a4d 175 }
AnnaBridge 175:b96e65c34a4d 176 else {
AnnaBridge 175:b96e65c34a4d 177 us_ticker_arm_cd();
AnnaBridge 175:b96e65c34a4d 178 }
AnnaBridge 175:b96e65c34a4d 179 }
AnnaBridge 175:b96e65c34a4d 180
AnnaBridge 175:b96e65c34a4d 181 static void us_ticker_arm_cd(void)
AnnaBridge 175:b96e65c34a4d 182 {
AnnaBridge 175:b96e65c34a4d 183 TIMER_T * timer1_base = (TIMER_T *) NU_MODBASE(timer1hires_modinit.modname);
AnnaBridge 175:b96e65c34a4d 184
AnnaBridge 175:b96e65c34a4d 185 cd_minor_us = cd_major_minor_us;
AnnaBridge 175:b96e65c34a4d 186
AnnaBridge 175:b96e65c34a4d 187 // Reset Timer's pre-scale counter, internal 24-bit up-counter and TMR_CTL [TMR_EN] bit
AnnaBridge 175:b96e65c34a4d 188 timer1_base->CTL |= TIMER_CTL_SW_RST_Msk;
AnnaBridge 175:b96e65c34a4d 189 // One-shot mode, Clock = 1 MHz
AnnaBridge 175:b96e65c34a4d 190 uint32_t clk_timer1 = TIMER_GetModuleClock((TIMER_T *) NU_MODBASE(timer1hires_modinit.modname));
AnnaBridge 175:b96e65c34a4d 191 uint32_t prescale_timer1 = clk_timer1 / TMR1HIRES_CLK_PER_SEC - 1;
AnnaBridge 175:b96e65c34a4d 192 MBED_ASSERT((prescale_timer1 != (uint32_t) -1) && prescale_timer1 <= 127);
AnnaBridge 175:b96e65c34a4d 193 MBED_ASSERT((clk_timer1 % TMR1HIRES_CLK_PER_SEC) == 0);
AnnaBridge 175:b96e65c34a4d 194 timer1_base->CTL &= ~TIMER_CTL_MODE_SEL_Msk;
AnnaBridge 175:b96e65c34a4d 195 timer1_base->CTL |= TIMER_ONESHOT_MODE;
AnnaBridge 175:b96e65c34a4d 196 timer1_base->PRECNT = prescale_timer1;
AnnaBridge 175:b96e65c34a4d 197
AnnaBridge 175:b96e65c34a4d 198 uint32_t cmp_timer1 = cd_minor_us / US_PER_TMR1HIRES_CLK;
AnnaBridge 175:b96e65c34a4d 199 cmp_timer1 = NU_CLAMP(cmp_timer1, TMR_CMP_MIN, TMR_CMP_MAX);
AnnaBridge 175:b96e65c34a4d 200 timer1_base->CMPR = cmp_timer1;
AnnaBridge 175:b96e65c34a4d 201
AnnaBridge 175:b96e65c34a4d 202 TIMER_EnableInt(timer1_base);
AnnaBridge 175:b96e65c34a4d 203 TIMER_Start(timer1_base);
AnnaBridge 175:b96e65c34a4d 204 }