John Karatka / mbed

mbed

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targets/TARGET_STM/i2c_api.c@153:fa9ff456f731, 2016-12-20 (annotated)

Committer:
<>
Date:
Tue Dec 20 17:27:56 2016 +0000
Revision:
153:fa9ff456f731
Child:
154:37f96f9d4de2
This updates the lib to the mbed lib v132

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 153:fa9ff456f731 1 /* mbed Microcontroller Library
<> 153:fa9ff456f731 2 *******************************************************************************
<> 153:fa9ff456f731 3 * Copyright (c) 2015, STMicroelectronics
<> 153:fa9ff456f731 4 * All rights reserved.
<> 153:fa9ff456f731 5 *
<> 153:fa9ff456f731 6 * Redistribution and use in source and binary forms, with or without
<> 153:fa9ff456f731 7 * modification, are permitted provided that the following conditions are met:
<> 153:fa9ff456f731 8 *
<> 153:fa9ff456f731 9 * 1. Redistributions of source code must retain the above copyright notice,
<> 153:fa9ff456f731 10 * this list of conditions and the following disclaimer.
<> 153:fa9ff456f731 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 153:fa9ff456f731 12 * this list of conditions and the following disclaimer in the documentation
<> 153:fa9ff456f731 13 * and/or other materials provided with the distribution.
<> 153:fa9ff456f731 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 153:fa9ff456f731 15 * may be used to endorse or promote products derived from this software
<> 153:fa9ff456f731 16 * without specific prior written permission.
<> 153:fa9ff456f731 17 *
<> 153:fa9ff456f731 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 153:fa9ff456f731 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 153:fa9ff456f731 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 153:fa9ff456f731 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 153:fa9ff456f731 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 153:fa9ff456f731 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 153:fa9ff456f731 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 153:fa9ff456f731 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 153:fa9ff456f731 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 153:fa9ff456f731 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 153:fa9ff456f731 28 *******************************************************************************
<> 153:fa9ff456f731 29 */
<> 153:fa9ff456f731 30
<> 153:fa9ff456f731 31
<> 153:fa9ff456f731 32 #include "mbed_assert.h"
<> 153:fa9ff456f731 33 #include "i2c_api.h"
<> 153:fa9ff456f731 34 #include "platform/wait_api.h"
<> 153:fa9ff456f731 35
<> 153:fa9ff456f731 36 #if DEVICE_I2C
<> 153:fa9ff456f731 37
<> 153:fa9ff456f731 38 #include "cmsis.h"
<> 153:fa9ff456f731 39 #include "pinmap.h"
<> 153:fa9ff456f731 40 #include "PeripheralPins.h"
<> 153:fa9ff456f731 41 /* F1 HAL not ready to move to I2C common code - this is ongoing */
<> 153:fa9ff456f731 42 #if !defined(__STM32F1xx_HAL_H)
<> 153:fa9ff456f731 43 #include "i2c_device.h" // family specific defines
<> 153:fa9ff456f731 44
<> 153:fa9ff456f731 45 #ifndef DEBUG_STDIO
<> 153:fa9ff456f731 46 # define DEBUG_STDIO 0
<> 153:fa9ff456f731 47 #endif
<> 153:fa9ff456f731 48
<> 153:fa9ff456f731 49 #if DEBUG_STDIO
<> 153:fa9ff456f731 50 # include <stdio.h>
<> 153:fa9ff456f731 51 # define DEBUG_PRINTF(...) do { printf(__VA_ARGS__); } while(0)
<> 153:fa9ff456f731 52 #else
<> 153:fa9ff456f731 53 # define DEBUG_PRINTF(...) {}
<> 153:fa9ff456f731 54 #endif
<> 153:fa9ff456f731 55
<> 153:fa9ff456f731 56 #if DEVICE_I2C_ASYNCH
<> 153:fa9ff456f731 57 #define I2C_S(obj) (struct i2c_s *) (&((obj)->i2c))
<> 153:fa9ff456f731 58 #else
<> 153:fa9ff456f731 59 #define I2C_S(obj) (struct i2c_s *) (obj)
<> 153:fa9ff456f731 60 #endif
<> 153:fa9ff456f731 61
<> 153:fa9ff456f731 62 /* Family specific description for I2C */
<> 153:fa9ff456f731 63 #define I2C_NUM (5)
<> 153:fa9ff456f731 64 static I2C_HandleTypeDef* i2c_handles[I2C_NUM];
<> 153:fa9ff456f731 65
<> 153:fa9ff456f731 66 /* Timeout values are based on core clock and I2C clock.
<> 153:fa9ff456f731 67 The BYTE_TIMEOUT is computed as twice the number of cycles it would
<> 153:fa9ff456f731 68 take to send 10 bits over I2C. Most Flags should take less than that.
<> 153:fa9ff456f731 69 This is for immediate FLAG or ACK check.
<> 153:fa9ff456f731 70 */
<> 153:fa9ff456f731 71 #define BYTE_TIMEOUT ((SystemCoreClock / obj_s->hz) * 2 * 10)
<> 153:fa9ff456f731 72 /* Timeout values based on I2C clock.
<> 153:fa9ff456f731 73 The BYTE_TIMEOUT_US is computed as 3x the time in us it would
<> 153:fa9ff456f731 74 take to send 10 bits over I2C. Most Flags should take less than that.
<> 153:fa9ff456f731 75 This is for complete transfers check.
<> 153:fa9ff456f731 76 */
<> 153:fa9ff456f731 77 #define BYTE_TIMEOUT_US ((SystemCoreClock / obj_s->hz) * 3 * 10)
<> 153:fa9ff456f731 78 /* Timeout values for flags and events waiting loops. These timeouts are
<> 153:fa9ff456f731 79 not based on accurate values, they just guarantee that the application will
<> 153:fa9ff456f731 80 not remain stuck if the I2C communication is corrupted.
<> 153:fa9ff456f731 81 */
<> 153:fa9ff456f731 82 #define FLAG_TIMEOUT ((int)0x1000)
<> 153:fa9ff456f731 83
<> 153:fa9ff456f731 84 /* GENERIC INIT and HELPERS FUNCTIONS */
<> 153:fa9ff456f731 85
<> 153:fa9ff456f731 86 #if defined(I2C1_BASE)
<> 153:fa9ff456f731 87 static void i2c1_irq(void)
<> 153:fa9ff456f731 88 {
<> 153:fa9ff456f731 89 I2C_HandleTypeDef * handle = i2c_handles[0];
<> 153:fa9ff456f731 90 HAL_I2C_EV_IRQHandler(handle);
<> 153:fa9ff456f731 91 HAL_I2C_ER_IRQHandler(handle);
<> 153:fa9ff456f731 92 }
<> 153:fa9ff456f731 93 #endif
<> 153:fa9ff456f731 94 #if defined(I2C2_BASE)
<> 153:fa9ff456f731 95 static void i2c2_irq(void)
<> 153:fa9ff456f731 96 {
<> 153:fa9ff456f731 97 I2C_HandleTypeDef * handle = i2c_handles[1];
<> 153:fa9ff456f731 98 HAL_I2C_EV_IRQHandler(handle);
<> 153:fa9ff456f731 99 HAL_I2C_ER_IRQHandler(handle);
<> 153:fa9ff456f731 100 }
<> 153:fa9ff456f731 101 #endif
<> 153:fa9ff456f731 102 #if defined(I2C3_BASE)
<> 153:fa9ff456f731 103 static void i2c3_irq(void)
<> 153:fa9ff456f731 104 {
<> 153:fa9ff456f731 105 I2C_HandleTypeDef * handle = i2c_handles[2];
<> 153:fa9ff456f731 106 HAL_I2C_EV_IRQHandler(handle);
<> 153:fa9ff456f731 107 HAL_I2C_ER_IRQHandler(handle);
<> 153:fa9ff456f731 108 }
<> 153:fa9ff456f731 109 #endif
<> 153:fa9ff456f731 110 #if defined(I2C4_BASE)
<> 153:fa9ff456f731 111 static void i2c4_irq(void)
<> 153:fa9ff456f731 112 {
<> 153:fa9ff456f731 113 I2C_HandleTypeDef * handle = i2c_handles[3];
<> 153:fa9ff456f731 114 HAL_I2C_EV_IRQHandler(handle);
<> 153:fa9ff456f731 115 HAL_I2C_ER_IRQHandler(handle);
<> 153:fa9ff456f731 116 }
<> 153:fa9ff456f731 117 #endif
<> 153:fa9ff456f731 118 #if defined(FMPI2C1_BASE)
<> 153:fa9ff456f731 119 static void i2c5_irq(void)
<> 153:fa9ff456f731 120 {
<> 153:fa9ff456f731 121 I2C_HandleTypeDef * handle = i2c_handles[4];
<> 153:fa9ff456f731 122 HAL_I2C_EV_IRQHandler(handle);
<> 153:fa9ff456f731 123 HAL_I2C_ER_IRQHandler(handle);
<> 153:fa9ff456f731 124 }
<> 153:fa9ff456f731 125 #endif
<> 153:fa9ff456f731 126
<> 153:fa9ff456f731 127 void i2c_ev_err_enable(i2c_t *obj, uint32_t handler) {
<> 153:fa9ff456f731 128 struct i2c_s *obj_s = I2C_S(obj);
<> 153:fa9ff456f731 129 IRQn_Type irq_event_n = obj_s->event_i2cIRQ;
<> 153:fa9ff456f731 130 IRQn_Type irq_error_n = obj_s->error_i2cIRQ;
<> 153:fa9ff456f731 131 /* default prio in master case is set to 2 */
<> 153:fa9ff456f731 132 uint32_t prio = 2;
<> 153:fa9ff456f731 133
<> 153:fa9ff456f731 134 /* Set up ITs using IRQ and handler tables */
<> 153:fa9ff456f731 135 NVIC_SetVector(irq_event_n, handler);
<> 153:fa9ff456f731 136 NVIC_SetVector(irq_error_n, handler);
<> 153:fa9ff456f731 137
<> 153:fa9ff456f731 138 #if DEVICE_I2CSLAVE
<> 153:fa9ff456f731 139 /* Set higher priority to slave device than master.
<> 153:fa9ff456f731 140 * In case a device makes use of both master and slave, the
<> 153:fa9ff456f731 141 * slave needs higher responsiveness.
<> 153:fa9ff456f731 142 */
<> 153:fa9ff456f731 143 if (obj_s->slave) {
<> 153:fa9ff456f731 144 prio = 1;
<> 153:fa9ff456f731 145 }
<> 153:fa9ff456f731 146 #endif
<> 153:fa9ff456f731 147
<> 153:fa9ff456f731 148 NVIC_SetPriority(irq_event_n, prio);
<> 153:fa9ff456f731 149 NVIC_SetPriority(irq_error_n, prio);
<> 153:fa9ff456f731 150 NVIC_EnableIRQ(irq_event_n);
<> 153:fa9ff456f731 151 NVIC_EnableIRQ(irq_error_n);
<> 153:fa9ff456f731 152 }
<> 153:fa9ff456f731 153
<> 153:fa9ff456f731 154 void i2c_ev_err_disable(i2c_t *obj) {
<> 153:fa9ff456f731 155 struct i2c_s *obj_s = I2C_S(obj);
<> 153:fa9ff456f731 156 IRQn_Type irq_event_n = obj_s->event_i2cIRQ;
<> 153:fa9ff456f731 157 IRQn_Type irq_error_n = obj_s->error_i2cIRQ;
<> 153:fa9ff456f731 158
<> 153:fa9ff456f731 159 HAL_NVIC_DisableIRQ(irq_event_n);
<> 153:fa9ff456f731 160 HAL_NVIC_DisableIRQ(irq_error_n);
<> 153:fa9ff456f731 161 }
<> 153:fa9ff456f731 162
<> 153:fa9ff456f731 163 uint32_t i2c_get_irq_handler(i2c_t *obj)
<> 153:fa9ff456f731 164 {
<> 153:fa9ff456f731 165 struct i2c_s *obj_s = I2C_S(obj);
<> 153:fa9ff456f731 166 I2C_HandleTypeDef *handle = &(obj_s->handle);
<> 153:fa9ff456f731 167 uint32_t handler = 0;
<> 153:fa9ff456f731 168
<> 153:fa9ff456f731 169 switch (obj_s->index) {
<> 153:fa9ff456f731 170 #if defined(I2C1_BASE)
<> 153:fa9ff456f731 171 case 0:
<> 153:fa9ff456f731 172 handler = (uint32_t)&i2c1_irq;
<> 153:fa9ff456f731 173 break;
<> 153:fa9ff456f731 174 #endif
<> 153:fa9ff456f731 175 #if defined(I2C2_BASE)
<> 153:fa9ff456f731 176 case 1:
<> 153:fa9ff456f731 177 handler = (uint32_t)&i2c2_irq;
<> 153:fa9ff456f731 178 break;
<> 153:fa9ff456f731 179 #endif
<> 153:fa9ff456f731 180 #if defined(I2C3_BASE)
<> 153:fa9ff456f731 181 case 2:
<> 153:fa9ff456f731 182 handler = (uint32_t)&i2c3_irq;
<> 153:fa9ff456f731 183 break;
<> 153:fa9ff456f731 184 #endif
<> 153:fa9ff456f731 185 #if defined(I2C4_BASE)
<> 153:fa9ff456f731 186 case 3:
<> 153:fa9ff456f731 187 handler = (uint32_t)&i2c4_irq;
<> 153:fa9ff456f731 188 break;
<> 153:fa9ff456f731 189 #endif
<> 153:fa9ff456f731 190 #if defined(FMPI2C1_BASE)
<> 153:fa9ff456f731 191 case 4:
<> 153:fa9ff456f731 192 handler = (uint32_t)&i2c5_irq;
<> 153:fa9ff456f731 193 break;
<> 153:fa9ff456f731 194 #endif
<> 153:fa9ff456f731 195 }
<> 153:fa9ff456f731 196
<> 153:fa9ff456f731 197 i2c_handles[obj_s->index] = handle;
<> 153:fa9ff456f731 198 return handler;
<> 153:fa9ff456f731 199 }
<> 153:fa9ff456f731 200
<> 153:fa9ff456f731 201 void i2c_hw_reset(i2c_t *obj) {
<> 153:fa9ff456f731 202 int timeout;
<> 153:fa9ff456f731 203 struct i2c_s *obj_s = I2C_S(obj);
<> 153:fa9ff456f731 204 I2C_HandleTypeDef *handle = &(obj_s->handle);
<> 153:fa9ff456f731 205
<> 153:fa9ff456f731 206 handle->Instance = (I2C_TypeDef *)(obj_s->i2c);
<> 153:fa9ff456f731 207
<> 153:fa9ff456f731 208 // wait before reset
<> 153:fa9ff456f731 209 timeout = BYTE_TIMEOUT;
<> 153:fa9ff456f731 210 while ((__HAL_I2C_GET_FLAG(handle, I2C_FLAG_BUSY)) && (--timeout != 0));
<> 153:fa9ff456f731 211 #if defined I2C1_BASE
<> 153:fa9ff456f731 212 if (obj_s->i2c == I2C_1) {
<> 153:fa9ff456f731 213 __HAL_RCC_I2C1_FORCE_RESET();
<> 153:fa9ff456f731 214 __HAL_RCC_I2C1_RELEASE_RESET();
<> 153:fa9ff456f731 215 }
<> 153:fa9ff456f731 216 #endif
<> 153:fa9ff456f731 217 #if defined I2C2_BASE
<> 153:fa9ff456f731 218 if (obj_s->i2c == I2C_2) {
<> 153:fa9ff456f731 219 __HAL_RCC_I2C2_FORCE_RESET();
<> 153:fa9ff456f731 220 __HAL_RCC_I2C2_RELEASE_RESET();
<> 153:fa9ff456f731 221 }
<> 153:fa9ff456f731 222 #endif
<> 153:fa9ff456f731 223 #if defined I2C3_BASE
<> 153:fa9ff456f731 224 if (obj_s->i2c == I2C_3) {
<> 153:fa9ff456f731 225 __HAL_RCC_I2C3_FORCE_RESET();
<> 153:fa9ff456f731 226 __HAL_RCC_I2C3_RELEASE_RESET();
<> 153:fa9ff456f731 227 }
<> 153:fa9ff456f731 228 #endif
<> 153:fa9ff456f731 229 #if defined I2C4_BASE
<> 153:fa9ff456f731 230 if (obj_s->i2c == I2C_4) {
<> 153:fa9ff456f731 231 __HAL_RCC_I2C4_FORCE_RESET();
<> 153:fa9ff456f731 232 __HAL_RCC_I2C4_RELEASE_RESET();
<> 153:fa9ff456f731 233 }
<> 153:fa9ff456f731 234 #endif
<> 153:fa9ff456f731 235 #if defined FMPI2C1_BASE
<> 153:fa9ff456f731 236 if (obj_s->i2c == FMPI2C_1) {
<> 153:fa9ff456f731 237 __HAL_RCC_FMPI2C1_FORCE_RESET();
<> 153:fa9ff456f731 238 __HAL_RCC_FMPI2C1_RELEASE_RESET();
<> 153:fa9ff456f731 239 }
<> 153:fa9ff456f731 240 #endif
<> 153:fa9ff456f731 241 }
<> 153:fa9ff456f731 242
<> 153:fa9ff456f731 243 void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
<> 153:fa9ff456f731 244
<> 153:fa9ff456f731 245 struct i2c_s *obj_s = I2C_S(obj);
<> 153:fa9ff456f731 246
<> 153:fa9ff456f731 247 // Determine the I2C to use
<> 153:fa9ff456f731 248 I2CName i2c_sda = (I2CName)pinmap_peripheral(sda, PinMap_I2C_SDA);
<> 153:fa9ff456f731 249 I2CName i2c_scl = (I2CName)pinmap_peripheral(scl, PinMap_I2C_SCL);
<> 153:fa9ff456f731 250 obj_s->sda = sda;
<> 153:fa9ff456f731 251 obj_s->scl = scl;
<> 153:fa9ff456f731 252
<> 153:fa9ff456f731 253 obj_s->i2c = (I2CName)pinmap_merge(i2c_sda, i2c_scl);
<> 153:fa9ff456f731 254 MBED_ASSERT(obj_s->i2c != (I2CName)NC);
<> 153:fa9ff456f731 255
<> 153:fa9ff456f731 256 #if defined I2C1_BASE
<> 153:fa9ff456f731 257 // Enable I2C1 clock and pinout if not done
<> 153:fa9ff456f731 258 if (obj_s->i2c == I2C_1) {
<> 153:fa9ff456f731 259 obj_s->index = 0;
<> 153:fa9ff456f731 260 __HAL_RCC_I2C1_CLK_ENABLE();
<> 153:fa9ff456f731 261 // Configure I2C pins
<> 153:fa9ff456f731 262 pinmap_pinout(sda, PinMap_I2C_SDA);
<> 153:fa9ff456f731 263 pinmap_pinout(scl, PinMap_I2C_SCL);
<> 153:fa9ff456f731 264 pin_mode(sda, PullUp);
<> 153:fa9ff456f731 265 pin_mode(scl, PullUp);
<> 153:fa9ff456f731 266 obj_s->event_i2cIRQ = I2C1_EV_IRQn;
<> 153:fa9ff456f731 267 obj_s->error_i2cIRQ = I2C1_ER_IRQn;
<> 153:fa9ff456f731 268 }
<> 153:fa9ff456f731 269 #endif
<> 153:fa9ff456f731 270 #if defined I2C2_BASE
<> 153:fa9ff456f731 271 // Enable I2C2 clock and pinout if not done
<> 153:fa9ff456f731 272 if (obj_s->i2c == I2C_2) {
<> 153:fa9ff456f731 273 obj_s->index = 1;
<> 153:fa9ff456f731 274 __HAL_RCC_I2C2_CLK_ENABLE();
<> 153:fa9ff456f731 275 // Configure I2C pins
<> 153:fa9ff456f731 276 pinmap_pinout(sda, PinMap_I2C_SDA);
<> 153:fa9ff456f731 277 pinmap_pinout(scl, PinMap_I2C_SCL);
<> 153:fa9ff456f731 278 pin_mode(sda, PullUp);
<> 153:fa9ff456f731 279 pin_mode(scl, PullUp);
<> 153:fa9ff456f731 280 obj_s->event_i2cIRQ = I2C2_EV_IRQn;
<> 153:fa9ff456f731 281 obj_s->error_i2cIRQ = I2C2_ER_IRQn;
<> 153:fa9ff456f731 282 }
<> 153:fa9ff456f731 283 #endif
<> 153:fa9ff456f731 284 #if defined I2C3_BASE
<> 153:fa9ff456f731 285 // Enable I2C3 clock and pinout if not done
<> 153:fa9ff456f731 286 if (obj_s->i2c == I2C_3) {
<> 153:fa9ff456f731 287 obj_s->index = 2;
<> 153:fa9ff456f731 288 __HAL_RCC_I2C3_CLK_ENABLE();
<> 153:fa9ff456f731 289 // Configure I2C pins
<> 153:fa9ff456f731 290 pinmap_pinout(sda, PinMap_I2C_SDA);
<> 153:fa9ff456f731 291 pinmap_pinout(scl, PinMap_I2C_SCL);
<> 153:fa9ff456f731 292 pin_mode(sda, PullUp);
<> 153:fa9ff456f731 293 pin_mode(scl, PullUp);
<> 153:fa9ff456f731 294 obj_s->event_i2cIRQ = I2C3_EV_IRQn;
<> 153:fa9ff456f731 295 obj_s->error_i2cIRQ = I2C3_ER_IRQn;
<> 153:fa9ff456f731 296 }
<> 153:fa9ff456f731 297 #endif
<> 153:fa9ff456f731 298 #if defined I2C4_BASE
<> 153:fa9ff456f731 299 // Enable I2C3 clock and pinout if not done
<> 153:fa9ff456f731 300 if (obj_s->i2c == I2C_4) {
<> 153:fa9ff456f731 301 obj_s->index = 3;
<> 153:fa9ff456f731 302 __HAL_RCC_I2C4_CLK_ENABLE();
<> 153:fa9ff456f731 303 // Configure I2C pins
<> 153:fa9ff456f731 304 pinmap_pinout(sda, PinMap_I2C_SDA);
<> 153:fa9ff456f731 305 pinmap_pinout(scl, PinMap_I2C_SCL);
<> 153:fa9ff456f731 306 pin_mode(sda, PullUp);
<> 153:fa9ff456f731 307 pin_mode(scl, PullUp);
<> 153:fa9ff456f731 308 obj_s->event_i2cIRQ = I2C4_EV_IRQn;
<> 153:fa9ff456f731 309 obj_s->error_i2cIRQ = I2C4_ER_IRQn;
<> 153:fa9ff456f731 310 }
<> 153:fa9ff456f731 311 #endif
<> 153:fa9ff456f731 312 #if defined FMPI2C1_BASE
<> 153:fa9ff456f731 313 // Enable I2C3 clock and pinout if not done
<> 153:fa9ff456f731 314 if (obj_s->i2c == FMPI2C_1) {
<> 153:fa9ff456f731 315 obj_s->index = 4;
<> 153:fa9ff456f731 316 __HAL_RCC_FMPI2C1_CLK_ENABLE();
<> 153:fa9ff456f731 317 // Configure I2C pins
<> 153:fa9ff456f731 318 pinmap_pinout(sda, PinMap_I2C_SDA);
<> 153:fa9ff456f731 319 pinmap_pinout(scl, PinMap_I2C_SCL);
<> 153:fa9ff456f731 320 pin_mode(sda, PullUp);
<> 153:fa9ff456f731 321 pin_mode(scl, PullUp);
<> 153:fa9ff456f731 322 obj_s->event_i2cIRQ = FMPI2C1_EV_IRQn;
<> 153:fa9ff456f731 323 obj_s->error_i2cIRQ = FMPI2C1_ER_IRQn;
<> 153:fa9ff456f731 324 }
<> 153:fa9ff456f731 325 #endif
<> 153:fa9ff456f731 326
<> 153:fa9ff456f731 327 // I2C configuration
<> 153:fa9ff456f731 328 // Default hz value used for timeout computation
<> 153:fa9ff456f731 329 if(!obj_s->hz)
<> 153:fa9ff456f731 330 obj_s->hz = 100000; // 100 kHz per default
<> 153:fa9ff456f731 331
<> 153:fa9ff456f731 332 // Reset to clear pending flags if any
<> 153:fa9ff456f731 333 i2c_hw_reset(obj);
<> 153:fa9ff456f731 334 i2c_frequency(obj, obj_s->hz );
<> 153:fa9ff456f731 335
<> 153:fa9ff456f731 336 #if DEVICE_I2CSLAVE
<> 153:fa9ff456f731 337 // I2C master by default
<> 153:fa9ff456f731 338 obj_s->slave = 0;
<> 153:fa9ff456f731 339 obj_s->pending_slave_tx_master_rx = 0;
<> 153:fa9ff456f731 340 obj_s->pending_slave_rx_maxter_tx = 0;
<> 153:fa9ff456f731 341 #endif
<> 153:fa9ff456f731 342
<> 153:fa9ff456f731 343 // I2C Xfer operation init
<> 153:fa9ff456f731 344 obj_s->event = 0;
<> 153:fa9ff456f731 345 obj_s->XferOperation = I2C_FIRST_AND_LAST_FRAME;
<> 153:fa9ff456f731 346 }
<> 153:fa9ff456f731 347
<> 153:fa9ff456f731 348 void i2c_frequency(i2c_t *obj, int hz)
<> 153:fa9ff456f731 349 {
<> 153:fa9ff456f731 350 int timeout;
<> 153:fa9ff456f731 351 struct i2c_s *obj_s = I2C_S(obj);
<> 153:fa9ff456f731 352 I2C_HandleTypeDef *handle = &(obj_s->handle);
<> 153:fa9ff456f731 353
<> 153:fa9ff456f731 354 // wait before init
<> 153:fa9ff456f731 355 timeout = BYTE_TIMEOUT;
<> 153:fa9ff456f731 356 while ((__HAL_I2C_GET_FLAG(handle, I2C_FLAG_BUSY)) && (--timeout != 0));
<> 153:fa9ff456f731 357
<> 153:fa9ff456f731 358 #ifdef I2C_IP_VERSION_V1
<> 153:fa9ff456f731 359 handle->Init.ClockSpeed = hz;
<> 153:fa9ff456f731 360 handle->Init.DutyCycle = I2C_DUTYCYCLE_2;
<> 153:fa9ff456f731 361 #endif
<> 153:fa9ff456f731 362 #ifdef I2C_IP_VERSION_V2
<> 153:fa9ff456f731 363 /* Only predefined timing for below frequencies are supported */
<> 153:fa9ff456f731 364 MBED_ASSERT((hz == 100000) || (hz == 400000) || (hz == 1000000));
<> 153:fa9ff456f731 365 handle->Init.Timing = get_i2c_timing(hz);
<> 153:fa9ff456f731 366
<> 153:fa9ff456f731 367 // Enable the Fast Mode Plus capability
<> 153:fa9ff456f731 368 if (hz == 1000000) {
<> 153:fa9ff456f731 369 #if defined(I2C1_BASE) && defined(__HAL_SYSCFG_FASTMODEPLUS_ENABLE) && defined (I2C_FASTMODEPLUS_I2C1)
<> 153:fa9ff456f731 370 if (obj_s->i2c == I2C_1) {
<> 153:fa9ff456f731 371 __HAL_SYSCFG_FASTMODEPLUS_ENABLE(I2C_FASTMODEPLUS_I2C1);
<> 153:fa9ff456f731 372 }
<> 153:fa9ff456f731 373 #endif
<> 153:fa9ff456f731 374 #if defined(I2C2_BASE) && defined(__HAL_SYSCFG_FASTMODEPLUS_ENABLE) && defined (I2C_FASTMODEPLUS_I2C2)
<> 153:fa9ff456f731 375 if (obj_s->i2c == I2C_2) {
<> 153:fa9ff456f731 376 __HAL_SYSCFG_FASTMODEPLUS_ENABLE(I2C_FASTMODEPLUS_I2C2);
<> 153:fa9ff456f731 377 }
<> 153:fa9ff456f731 378 #endif
<> 153:fa9ff456f731 379 #if defined(I2C3_BASE) && defined(__HAL_SYSCFG_FASTMODEPLUS_ENABLE) && defined (I2C_FASTMODEPLUS_I2C3)
<> 153:fa9ff456f731 380 if (obj_s->i2c == I2C_3) {
<> 153:fa9ff456f731 381 __HAL_SYSCFG_FASTMODEPLUS_ENABLE(I2C_FASTMODEPLUS_I2C3);
<> 153:fa9ff456f731 382 }
<> 153:fa9ff456f731 383 #endif
<> 153:fa9ff456f731 384 #if defined(I2C4_BASE) && defined(__HAL_SYSCFG_FASTMODEPLUS_ENABLE) && defined (I2C_FASTMODEPLUS_I2C4)
<> 153:fa9ff456f731 385 if (obj_s->i2c == I2C_4) {
<> 153:fa9ff456f731 386 __HAL_SYSCFG_FASTMODEPLUS_ENABLE(I2C_FASTMODEPLUS_I2C4);
<> 153:fa9ff456f731 387 }
<> 153:fa9ff456f731 388 #endif
<> 153:fa9ff456f731 389 }
<> 153:fa9ff456f731 390 #endif //I2C_IP_VERSION_V2
<> 153:fa9ff456f731 391
<> 153:fa9ff456f731 392 /*##-1- Configure the I2C clock source. The clock is derived from the SYSCLK #*/
<> 153:fa9ff456f731 393 #if defined(I2C1_BASE) && defined (__HAL_RCC_I2C1_CONFIG)
<> 153:fa9ff456f731 394 if (obj_s->i2c == I2C_1) {
<> 153:fa9ff456f731 395 __HAL_RCC_I2C1_CONFIG(I2CAPI_I2C1_CLKSRC);
<> 153:fa9ff456f731 396 }
<> 153:fa9ff456f731 397 #endif
<> 153:fa9ff456f731 398 #if defined(I2C2_BASE) && defined(__HAL_RCC_I2C2_CONFIG)
<> 153:fa9ff456f731 399 if (obj_s->i2c == I2C_2) {
<> 153:fa9ff456f731 400 __HAL_RCC_I2C2_CONFIG(I2CAPI_I2C2_CLKSRC);
<> 153:fa9ff456f731 401 }
<> 153:fa9ff456f731 402 #endif
<> 153:fa9ff456f731 403 #if defined(I2C3_BASE) && defined(__HAL_RCC_I2C3_CONFIG)
<> 153:fa9ff456f731 404 if (obj_s->i2c == I2C_3) {
<> 153:fa9ff456f731 405 __HAL_RCC_I2C3_CONFIG(I2CAPI_I2C3_CLKSRC);
<> 153:fa9ff456f731 406 }
<> 153:fa9ff456f731 407 #endif
<> 153:fa9ff456f731 408 #if defined(I2C4_BASE) && defined(__HAL_RCC_I2C4_CONFIG)
<> 153:fa9ff456f731 409 if (obj_s->i2c == I2C_4) {
<> 153:fa9ff456f731 410 __HAL_RCC_I2C4_CONFIG(I2CAPI_I2C4_CLKSRC);
<> 153:fa9ff456f731 411 }
<> 153:fa9ff456f731 412 #endif
<> 153:fa9ff456f731 413
<> 153:fa9ff456f731 414 #ifdef I2C_ANALOGFILTER_ENABLE
<> 153:fa9ff456f731 415 /* Enable the Analog I2C Filter */
<> 153:fa9ff456f731 416 HAL_I2CEx_AnalogFilter_Config(handle,I2C_ANALOGFILTER_ENABLE);
<> 153:fa9ff456f731 417 #endif
<> 153:fa9ff456f731 418
<> 153:fa9ff456f731 419 // I2C configuration
<> 153:fa9ff456f731 420 handle->Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
<> 153:fa9ff456f731 421 handle->Init.DualAddressMode = I2C_DUALADDRESS_DISABLED;
<> 153:fa9ff456f731 422 handle->Init.GeneralCallMode = I2C_GENERALCALL_DISABLED;
<> 153:fa9ff456f731 423 handle->Init.NoStretchMode = I2C_NOSTRETCH_DISABLED;
<> 153:fa9ff456f731 424 handle->Init.OwnAddress1 = 0;
<> 153:fa9ff456f731 425 handle->Init.OwnAddress2 = 0;
<> 153:fa9ff456f731 426 HAL_I2C_Init(handle);
<> 153:fa9ff456f731 427
<> 153:fa9ff456f731 428 /* store frequency for timeout computation */
<> 153:fa9ff456f731 429 obj_s->hz = hz;
<> 153:fa9ff456f731 430 }
<> 153:fa9ff456f731 431
<> 153:fa9ff456f731 432 i2c_t *get_i2c_obj(I2C_HandleTypeDef *hi2c){
<> 153:fa9ff456f731 433 /* Aim of the function is to get i2c_s pointer using hi2c pointer */
<> 153:fa9ff456f731 434 /* Highly inspired from magical linux kernel's "container_of" */
<> 153:fa9ff456f731 435 /* (which was not directly used since not compatible with IAR toolchain) */
<> 153:fa9ff456f731 436 struct i2c_s *obj_s;
<> 153:fa9ff456f731 437 i2c_t *obj;
<> 153:fa9ff456f731 438
<> 153:fa9ff456f731 439 obj_s = (struct i2c_s *)( (char *)hi2c - offsetof(struct i2c_s,handle));
<> 153:fa9ff456f731 440 obj = (i2c_t *)( (char *)obj_s - offsetof(i2c_t,i2c));
<> 153:fa9ff456f731 441
<> 153:fa9ff456f731 442 return (obj);
<> 153:fa9ff456f731 443 }
<> 153:fa9ff456f731 444
<> 153:fa9ff456f731 445 /* SYNCHRONOUS API FUNCTIONS */
<> 153:fa9ff456f731 446
<> 153:fa9ff456f731 447 int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) {
<> 153:fa9ff456f731 448 struct i2c_s *obj_s = I2C_S(obj);
<> 153:fa9ff456f731 449 I2C_HandleTypeDef *handle = &(obj_s->handle);
<> 153:fa9ff456f731 450 int count = 0, ret = 0;
<> 153:fa9ff456f731 451 uint32_t timeout = 0;
<> 153:fa9ff456f731 452
<> 153:fa9ff456f731 453 if ((obj_s->XferOperation == I2C_FIRST_AND_LAST_FRAME) ||
<> 153:fa9ff456f731 454 (obj_s->XferOperation == I2C_LAST_FRAME)) {
<> 153:fa9ff456f731 455 if (stop)
<> 153:fa9ff456f731 456 obj_s->XferOperation = I2C_FIRST_AND_LAST_FRAME;
<> 153:fa9ff456f731 457 else
<> 153:fa9ff456f731 458 obj_s->XferOperation = I2C_FIRST_FRAME;
<> 153:fa9ff456f731 459 } else if ((obj_s->XferOperation == I2C_FIRST_FRAME) ||
<> 153:fa9ff456f731 460 (obj_s->XferOperation == I2C_NEXT_FRAME)) {
<> 153:fa9ff456f731 461 if (stop)
<> 153:fa9ff456f731 462 obj_s->XferOperation = I2C_LAST_FRAME;
<> 153:fa9ff456f731 463 else
<> 153:fa9ff456f731 464 obj_s->XferOperation = I2C_NEXT_FRAME;
<> 153:fa9ff456f731 465 }
<> 153:fa9ff456f731 466
<> 153:fa9ff456f731 467 obj_s->event = 0;
<> 153:fa9ff456f731 468
<> 153:fa9ff456f731 469 /* Activate default IRQ handlers for sync mode
<> 153:fa9ff456f731 470 * which would be overwritten in async mode
<> 153:fa9ff456f731 471 */
<> 153:fa9ff456f731 472 i2c_ev_err_enable(obj, i2c_get_irq_handler(obj));
<> 153:fa9ff456f731 473
<> 153:fa9ff456f731 474 ret = HAL_I2C_Master_Sequential_Receive_IT(handle, address, (uint8_t *) data, length, obj_s->XferOperation);
<> 153:fa9ff456f731 475
<> 153:fa9ff456f731 476 if(ret == HAL_OK) {
<> 153:fa9ff456f731 477 timeout = BYTE_TIMEOUT_US * length;
<> 153:fa9ff456f731 478 /* transfer started : wait completion or timeout */
<> 153:fa9ff456f731 479 while(!(obj_s->event & I2C_EVENT_ALL) && (--timeout != 0)) {
<> 153:fa9ff456f731 480 wait_us(1);
<> 153:fa9ff456f731 481 }
<> 153:fa9ff456f731 482
<> 153:fa9ff456f731 483 i2c_ev_err_disable(obj);
<> 153:fa9ff456f731 484
<> 153:fa9ff456f731 485 if((timeout == 0) || (obj_s->event != I2C_EVENT_TRANSFER_COMPLETE)) {
<> 153:fa9ff456f731 486 DEBUG_PRINTF(" TIMEOUT or error in i2c_read\r\n");
<> 153:fa9ff456f731 487 /* re-init IP to try and get back in a working state */
<> 153:fa9ff456f731 488 i2c_init(obj, obj_s->sda, obj_s->scl);
<> 153:fa9ff456f731 489 } else {
<> 153:fa9ff456f731 490 count = length;
<> 153:fa9ff456f731 491 }
<> 153:fa9ff456f731 492 } else {
<> 153:fa9ff456f731 493 DEBUG_PRINTF("ERROR in i2c_read\r\n");
<> 153:fa9ff456f731 494 }
<> 153:fa9ff456f731 495
<> 153:fa9ff456f731 496 return count;
<> 153:fa9ff456f731 497 }
<> 153:fa9ff456f731 498
<> 153:fa9ff456f731 499 /*
<> 153:fa9ff456f731 500 * UNITARY APIS.
<> 153:fa9ff456f731 501 * For very basic operations, direct registers access is needed
<> 153:fa9ff456f731 502 * There are 2 different IPs version that need to be supported
<> 153:fa9ff456f731 503 */
<> 153:fa9ff456f731 504 #ifdef I2C_IP_VERSION_V1
<> 153:fa9ff456f731 505 int i2c_start(i2c_t *obj) {
<> 153:fa9ff456f731 506
<> 153:fa9ff456f731 507 int timeout;
<> 153:fa9ff456f731 508 struct i2c_s *obj_s = I2C_S(obj);
<> 153:fa9ff456f731 509 I2C_HandleTypeDef *handle = &(obj_s->handle);
<> 153:fa9ff456f731 510
<> 153:fa9ff456f731 511 // Clear Acknowledge failure flag
<> 153:fa9ff456f731 512 __HAL_I2C_CLEAR_FLAG(handle, I2C_FLAG_AF);
<> 153:fa9ff456f731 513
<> 153:fa9ff456f731 514 // Wait the STOP condition has been previously correctly sent
<> 153:fa9ff456f731 515 // This timeout can be avoid in some specific cases by simply clearing the STOP bit
<> 153:fa9ff456f731 516 timeout = FLAG_TIMEOUT;
<> 153:fa9ff456f731 517 while ((handle->Instance->CR1 & I2C_CR1_STOP) == I2C_CR1_STOP) {
<> 153:fa9ff456f731 518 if ((timeout--) == 0) {
<> 153:fa9ff456f731 519 return 1;
<> 153:fa9ff456f731 520 }
<> 153:fa9ff456f731 521 }
<> 153:fa9ff456f731 522
<> 153:fa9ff456f731 523 // Generate the START condition
<> 153:fa9ff456f731 524 handle->Instance->CR1 |= I2C_CR1_START;
<> 153:fa9ff456f731 525
<> 153:fa9ff456f731 526 // Wait the START condition has been correctly sent
<> 153:fa9ff456f731 527 timeout = FLAG_TIMEOUT;
<> 153:fa9ff456f731 528 while (__HAL_I2C_GET_FLAG(handle, I2C_FLAG_SB) == RESET) {
<> 153:fa9ff456f731 529 if ((timeout--) == 0) {
<> 153:fa9ff456f731 530 return 1;
<> 153:fa9ff456f731 531 }
<> 153:fa9ff456f731 532 }
<> 153:fa9ff456f731 533
<> 153:fa9ff456f731 534 return 0;
<> 153:fa9ff456f731 535 }
<> 153:fa9ff456f731 536
<> 153:fa9ff456f731 537 int i2c_stop(i2c_t *obj) {
<> 153:fa9ff456f731 538 struct i2c_s *obj_s = I2C_S(obj);
<> 153:fa9ff456f731 539 I2C_TypeDef *i2c = (I2C_TypeDef *)obj_s->i2c;
<> 153:fa9ff456f731 540
<> 153:fa9ff456f731 541 // Generate the STOP condition
<> 153:fa9ff456f731 542 i2c->CR1 |= I2C_CR1_STOP;
<> 153:fa9ff456f731 543
<> 153:fa9ff456f731 544 return 0;
<> 153:fa9ff456f731 545 }
<> 153:fa9ff456f731 546
<> 153:fa9ff456f731 547 int i2c_byte_read(i2c_t *obj, int last) {
<> 153:fa9ff456f731 548
<> 153:fa9ff456f731 549 int timeout;
<> 153:fa9ff456f731 550 struct i2c_s *obj_s = I2C_S(obj);
<> 153:fa9ff456f731 551 I2C_HandleTypeDef *handle = &(obj_s->handle);
<> 153:fa9ff456f731 552
<> 153:fa9ff456f731 553 if (last) {
<> 153:fa9ff456f731 554 // Don't acknowledge the last byte
<> 153:fa9ff456f731 555 handle->Instance->CR1 &= ~I2C_CR1_ACK;
<> 153:fa9ff456f731 556 } else {
<> 153:fa9ff456f731 557 // Acknowledge the byte
<> 153:fa9ff456f731 558 handle->Instance->CR1 |= I2C_CR1_ACK;
<> 153:fa9ff456f731 559 }
<> 153:fa9ff456f731 560
<> 153:fa9ff456f731 561 // Wait until the byte is received
<> 153:fa9ff456f731 562 timeout = FLAG_TIMEOUT;
<> 153:fa9ff456f731 563 while (__HAL_I2C_GET_FLAG(handle, I2C_FLAG_RXNE) == RESET) {
<> 153:fa9ff456f731 564 if ((timeout--) == 0) {
<> 153:fa9ff456f731 565 return -1;
<> 153:fa9ff456f731 566 }
<> 153:fa9ff456f731 567 }
<> 153:fa9ff456f731 568
<> 153:fa9ff456f731 569 return (int)handle->Instance->DR;
<> 153:fa9ff456f731 570 }
<> 153:fa9ff456f731 571
<> 153:fa9ff456f731 572 int i2c_byte_write(i2c_t *obj, int data) {
<> 153:fa9ff456f731 573
<> 153:fa9ff456f731 574 int timeout;
<> 153:fa9ff456f731 575 struct i2c_s *obj_s = I2C_S(obj);
<> 153:fa9ff456f731 576 I2C_HandleTypeDef *handle = &(obj_s->handle);
<> 153:fa9ff456f731 577
<> 153:fa9ff456f731 578 handle->Instance->DR = (uint8_t)data;
<> 153:fa9ff456f731 579
<> 153:fa9ff456f731 580 // Wait until the byte (might be the address) is transmitted
<> 153:fa9ff456f731 581 timeout = FLAG_TIMEOUT;
<> 153:fa9ff456f731 582 while ((__HAL_I2C_GET_FLAG(handle, I2C_FLAG_TXE) == RESET) &&
<> 153:fa9ff456f731 583 (__HAL_I2C_GET_FLAG(handle, I2C_FLAG_BTF) == RESET) &&
<> 153:fa9ff456f731 584 (__HAL_I2C_GET_FLAG(handle, I2C_FLAG_ADDR) == RESET)) {
<> 153:fa9ff456f731 585 if ((timeout--) == 0) {
<> 153:fa9ff456f731 586 return 0;
<> 153:fa9ff456f731 587 }
<> 153:fa9ff456f731 588 }
<> 153:fa9ff456f731 589
<> 153:fa9ff456f731 590 if (__HAL_I2C_GET_FLAG(handle, I2C_FLAG_ADDR) != RESET)
<> 153:fa9ff456f731 591 {
<> 153:fa9ff456f731 592 __HAL_I2C_CLEAR_ADDRFLAG(handle);
<> 153:fa9ff456f731 593 }
<> 153:fa9ff456f731 594
<> 153:fa9ff456f731 595 return 1;
<> 153:fa9ff456f731 596 }
<> 153:fa9ff456f731 597 #endif //I2C_IP_VERSION_V1
<> 153:fa9ff456f731 598 #ifdef I2C_IP_VERSION_V2
<> 153:fa9ff456f731 599 int i2c_start(i2c_t *obj) {
<> 153:fa9ff456f731 600 struct i2c_s *obj_s = I2C_S(obj);
<> 153:fa9ff456f731 601 I2C_HandleTypeDef *handle = &(obj_s->handle);
<> 153:fa9ff456f731 602 I2C_TypeDef *i2c = (I2C_TypeDef *)obj_s->i2c;
<> 153:fa9ff456f731 603 int timeout;
<> 153:fa9ff456f731 604
<> 153:fa9ff456f731 605 // Clear Acknowledge failure flag
<> 153:fa9ff456f731 606 __HAL_I2C_CLEAR_FLAG(handle, I2C_FLAG_AF);
<> 153:fa9ff456f731 607
<> 153:fa9ff456f731 608 // Wait the STOP condition has been previously correctly sent
<> 153:fa9ff456f731 609 timeout = FLAG_TIMEOUT;
<> 153:fa9ff456f731 610 while ((i2c->CR2 & I2C_CR2_STOP) == I2C_CR2_STOP){
<> 153:fa9ff456f731 611 if ((timeout--) == 0) {
<> 153:fa9ff456f731 612 return 1;
<> 153:fa9ff456f731 613 }
<> 153:fa9ff456f731 614 }
<> 153:fa9ff456f731 615
<> 153:fa9ff456f731 616 // Generate the START condition
<> 153:fa9ff456f731 617 i2c->CR2 |= I2C_CR2_START;
<> 153:fa9ff456f731 618
<> 153:fa9ff456f731 619 // Wait the START condition has been correctly sent
<> 153:fa9ff456f731 620 timeout = FLAG_TIMEOUT;
<> 153:fa9ff456f731 621 while (__HAL_I2C_GET_FLAG(handle, I2C_FLAG_BUSY) == RESET) {
<> 153:fa9ff456f731 622 if ((timeout--) == 0) {
<> 153:fa9ff456f731 623 return 1;
<> 153:fa9ff456f731 624 }
<> 153:fa9ff456f731 625 }
<> 153:fa9ff456f731 626
<> 153:fa9ff456f731 627 return 0;
<> 153:fa9ff456f731 628 }
<> 153:fa9ff456f731 629
<> 153:fa9ff456f731 630 int i2c_stop(i2c_t *obj) {
<> 153:fa9ff456f731 631 struct i2c_s *obj_s = I2C_S(obj);
<> 153:fa9ff456f731 632 I2C_TypeDef *i2c = (I2C_TypeDef *)obj_s->i2c;
<> 153:fa9ff456f731 633
<> 153:fa9ff456f731 634 // Generate the STOP condition
<> 153:fa9ff456f731 635 i2c->CR2 |= I2C_CR2_STOP;
<> 153:fa9ff456f731 636
<> 153:fa9ff456f731 637 return 0;
<> 153:fa9ff456f731 638 }
<> 153:fa9ff456f731 639
<> 153:fa9ff456f731 640 int i2c_byte_read(i2c_t *obj, int last) {
<> 153:fa9ff456f731 641 struct i2c_s *obj_s = I2C_S(obj);
<> 153:fa9ff456f731 642 I2C_TypeDef *i2c = (I2C_TypeDef *)obj_s->i2c;
<> 153:fa9ff456f731 643 I2C_HandleTypeDef *handle = &(obj_s->handle);
<> 153:fa9ff456f731 644 int timeout;
<> 153:fa9ff456f731 645
<> 153:fa9ff456f731 646 // Wait until the byte is received
<> 153:fa9ff456f731 647 timeout = FLAG_TIMEOUT;
<> 153:fa9ff456f731 648 while (__HAL_I2C_GET_FLAG(handle, I2C_FLAG_RXNE) == RESET) {
<> 153:fa9ff456f731 649 if ((timeout--) == 0) {
<> 153:fa9ff456f731 650 return -1;
<> 153:fa9ff456f731 651 }
<> 153:fa9ff456f731 652 }
<> 153:fa9ff456f731 653
<> 153:fa9ff456f731 654 return (int)i2c->RXDR;
<> 153:fa9ff456f731 655 }
<> 153:fa9ff456f731 656
<> 153:fa9ff456f731 657 int i2c_byte_write(i2c_t *obj, int data) {
<> 153:fa9ff456f731 658 struct i2c_s *obj_s = I2C_S(obj);
<> 153:fa9ff456f731 659 I2C_TypeDef *i2c = (I2C_TypeDef *)obj_s->i2c;
<> 153:fa9ff456f731 660 I2C_HandleTypeDef *handle = &(obj_s->handle);
<> 153:fa9ff456f731 661 int timeout;
<> 153:fa9ff456f731 662
<> 153:fa9ff456f731 663 // Wait until the previous byte is transmitted
<> 153:fa9ff456f731 664 timeout = FLAG_TIMEOUT;
<> 153:fa9ff456f731 665 while (__HAL_I2C_GET_FLAG(handle, I2C_FLAG_TXIS) == RESET) {
<> 153:fa9ff456f731 666 if ((timeout--) == 0) {
<> 153:fa9ff456f731 667 return 0;
<> 153:fa9ff456f731 668 }
<> 153:fa9ff456f731 669 }
<> 153:fa9ff456f731 670
<> 153:fa9ff456f731 671 i2c->TXDR = (uint8_t)data;
<> 153:fa9ff456f731 672
<> 153:fa9ff456f731 673 return 1;
<> 153:fa9ff456f731 674 }
<> 153:fa9ff456f731 675 #endif //I2C_IP_VERSION_V2
<> 153:fa9ff456f731 676
<> 153:fa9ff456f731 677 void i2c_reset(i2c_t *obj) {
<> 153:fa9ff456f731 678 struct i2c_s *obj_s = I2C_S(obj);
<> 153:fa9ff456f731 679 /* As recommended in i2c_api.h, mainly send stop */
<> 153:fa9ff456f731 680 i2c_stop(obj);
<> 153:fa9ff456f731 681 /* then re-init */
<> 153:fa9ff456f731 682 i2c_init(obj, obj_s->sda, obj_s->scl);
<> 153:fa9ff456f731 683 }
<> 153:fa9ff456f731 684
<> 153:fa9ff456f731 685 /*
<> 153:fa9ff456f731 686 * SYNC APIS
<> 153:fa9ff456f731 687 */
<> 153:fa9ff456f731 688 int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) {
<> 153:fa9ff456f731 689 struct i2c_s *obj_s = I2C_S(obj);
<> 153:fa9ff456f731 690 I2C_HandleTypeDef *handle = &(obj_s->handle);
<> 153:fa9ff456f731 691 int count = 0, ret = 0;
<> 153:fa9ff456f731 692 uint32_t timeout = 0;
<> 153:fa9ff456f731 693
<> 153:fa9ff456f731 694 if ((obj_s->XferOperation == I2C_FIRST_AND_LAST_FRAME) ||
<> 153:fa9ff456f731 695 (obj_s->XferOperation == I2C_LAST_FRAME)) {
<> 153:fa9ff456f731 696 if (stop)
<> 153:fa9ff456f731 697 obj_s->XferOperation = I2C_FIRST_AND_LAST_FRAME;
<> 153:fa9ff456f731 698 else
<> 153:fa9ff456f731 699 obj_s->XferOperation = I2C_FIRST_FRAME;
<> 153:fa9ff456f731 700 } else if ((obj_s->XferOperation == I2C_FIRST_FRAME) ||
<> 153:fa9ff456f731 701 (obj_s->XferOperation == I2C_NEXT_FRAME)) {
<> 153:fa9ff456f731 702 if (stop)
<> 153:fa9ff456f731 703 obj_s->XferOperation = I2C_LAST_FRAME;
<> 153:fa9ff456f731 704 else
<> 153:fa9ff456f731 705 obj_s->XferOperation = I2C_NEXT_FRAME;
<> 153:fa9ff456f731 706 }
<> 153:fa9ff456f731 707
<> 153:fa9ff456f731 708 obj_s->event = 0;
<> 153:fa9ff456f731 709
<> 153:fa9ff456f731 710 i2c_ev_err_enable(obj, i2c_get_irq_handler(obj));
<> 153:fa9ff456f731 711
<> 153:fa9ff456f731 712 ret = HAL_I2C_Master_Sequential_Transmit_IT(handle, address, (uint8_t *) data, length, obj_s->XferOperation);
<> 153:fa9ff456f731 713
<> 153:fa9ff456f731 714 if(ret == HAL_OK) {
<> 153:fa9ff456f731 715 timeout = BYTE_TIMEOUT_US * length;
<> 153:fa9ff456f731 716 /* transfer started : wait completion or timeout */
<> 153:fa9ff456f731 717 while(!(obj_s->event & I2C_EVENT_ALL) && (--timeout != 0)) {
<> 153:fa9ff456f731 718 wait_us(1);
<> 153:fa9ff456f731 719 }
<> 153:fa9ff456f731 720
<> 153:fa9ff456f731 721 i2c_ev_err_disable(obj);
<> 153:fa9ff456f731 722
<> 153:fa9ff456f731 723 if((timeout == 0) || (obj_s->event != I2C_EVENT_TRANSFER_COMPLETE)) {
<> 153:fa9ff456f731 724 DEBUG_PRINTF(" TIMEOUT or error in i2c_write\r\n");
<> 153:fa9ff456f731 725 /* re-init IP to try and get back in a working state */
<> 153:fa9ff456f731 726 i2c_init(obj, obj_s->sda, obj_s->scl);
<> 153:fa9ff456f731 727 } else {
<> 153:fa9ff456f731 728 count = length;
<> 153:fa9ff456f731 729 }
<> 153:fa9ff456f731 730 } else {
<> 153:fa9ff456f731 731 DEBUG_PRINTF("ERROR in i2c_read\r\n");
<> 153:fa9ff456f731 732 }
<> 153:fa9ff456f731 733
<> 153:fa9ff456f731 734 return count;
<> 153:fa9ff456f731 735 }
<> 153:fa9ff456f731 736
<> 153:fa9ff456f731 737 void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c){
<> 153:fa9ff456f731 738 /* Get object ptr based on handler ptr */
<> 153:fa9ff456f731 739 i2c_t *obj = get_i2c_obj(hi2c);
<> 153:fa9ff456f731 740 struct i2c_s *obj_s = I2C_S(obj);
<> 153:fa9ff456f731 741
<> 153:fa9ff456f731 742 #if DEVICE_I2C_ASYNCH
<> 153:fa9ff456f731 743 /* Handle potential Tx/Rx use case */
<> 153:fa9ff456f731 744 if ((obj->tx_buff.length) && (obj->rx_buff.length)) {
<> 153:fa9ff456f731 745 if (obj_s->stop) {
<> 153:fa9ff456f731 746 obj_s->XferOperation = I2C_LAST_FRAME;
<> 153:fa9ff456f731 747 } else {
<> 153:fa9ff456f731 748 obj_s->XferOperation = I2C_NEXT_FRAME;
<> 153:fa9ff456f731 749 }
<> 153:fa9ff456f731 750
<> 153:fa9ff456f731 751 HAL_I2C_Master_Sequential_Receive_IT(hi2c, obj_s->address, (uint8_t*)obj->rx_buff.buffer , obj->rx_buff.length, obj_s->XferOperation);
<> 153:fa9ff456f731 752 }
<> 153:fa9ff456f731 753 else
<> 153:fa9ff456f731 754 #endif
<> 153:fa9ff456f731 755 {
<> 153:fa9ff456f731 756 /* Set event flag */
<> 153:fa9ff456f731 757 obj_s->event = I2C_EVENT_TRANSFER_COMPLETE;
<> 153:fa9ff456f731 758 }
<> 153:fa9ff456f731 759 }
<> 153:fa9ff456f731 760
<> 153:fa9ff456f731 761 void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c){
<> 153:fa9ff456f731 762 /* Get object ptr based on handler ptr */
<> 153:fa9ff456f731 763 i2c_t *obj = get_i2c_obj(hi2c);
<> 153:fa9ff456f731 764 struct i2c_s *obj_s = I2C_S(obj);
<> 153:fa9ff456f731 765
<> 153:fa9ff456f731 766 /* Set event flag */
<> 153:fa9ff456f731 767 obj_s->event = I2C_EVENT_TRANSFER_COMPLETE;
<> 153:fa9ff456f731 768 }
<> 153:fa9ff456f731 769
<> 153:fa9ff456f731 770 void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c){
<> 153:fa9ff456f731 771 /* Get object ptr based on handler ptr */
<> 153:fa9ff456f731 772 i2c_t *obj = get_i2c_obj(hi2c);
<> 153:fa9ff456f731 773 struct i2c_s *obj_s = I2C_S(obj);
<> 153:fa9ff456f731 774 #if DEVICE_I2CSLAVE
<> 153:fa9ff456f731 775 I2C_HandleTypeDef *handle = &(obj_s->handle);
<> 153:fa9ff456f731 776 uint32_t address = 0;
<> 153:fa9ff456f731 777 /* Store address to handle it after reset */
<> 153:fa9ff456f731 778 if(obj_s->slave)
<> 153:fa9ff456f731 779 address = handle->Init.OwnAddress1;
<> 153:fa9ff456f731 780 #endif
<> 153:fa9ff456f731 781
<> 153:fa9ff456f731 782 DEBUG_PRINTF("HAL_I2C_ErrorCallback:%d, index=%d\r\n", (int) hi2c->ErrorCode, obj_s->index);
<> 153:fa9ff456f731 783
<> 153:fa9ff456f731 784 /* re-init IP to try and get back in a working state */
<> 153:fa9ff456f731 785 i2c_init(obj, obj_s->sda, obj_s->scl);
<> 153:fa9ff456f731 786
<> 153:fa9ff456f731 787 #if DEVICE_I2CSLAVE
<> 153:fa9ff456f731 788 /* restore slave address */
<> 153:fa9ff456f731 789 i2c_slave_address(obj, 0, address, 0);
<> 153:fa9ff456f731 790 #endif
<> 153:fa9ff456f731 791
<> 153:fa9ff456f731 792 /* Keep Set event flag */
<> 153:fa9ff456f731 793 obj_s->event = I2C_EVENT_ERROR;
<> 153:fa9ff456f731 794 }
<> 153:fa9ff456f731 795
<> 153:fa9ff456f731 796 #if DEVICE_I2CSLAVE
<> 153:fa9ff456f731 797 /* SLAVE API FUNCTIONS */
<> 153:fa9ff456f731 798 void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask) {
<> 153:fa9ff456f731 799 struct i2c_s *obj_s = I2C_S(obj);
<> 153:fa9ff456f731 800 I2C_HandleTypeDef *handle = &(obj_s->handle);
<> 153:fa9ff456f731 801
<> 153:fa9ff456f731 802 // I2C configuration
<> 153:fa9ff456f731 803 handle->Init.OwnAddress1 = address;
<> 153:fa9ff456f731 804 HAL_I2C_Init(handle);
<> 153:fa9ff456f731 805
<> 153:fa9ff456f731 806 i2c_ev_err_enable(obj, i2c_get_irq_handler(obj));
<> 153:fa9ff456f731 807
<> 153:fa9ff456f731 808 HAL_I2C_EnableListen_IT(handle);
<> 153:fa9ff456f731 809 }
<> 153:fa9ff456f731 810
<> 153:fa9ff456f731 811 void i2c_slave_mode(i2c_t *obj, int enable_slave) {
<> 153:fa9ff456f731 812
<> 153:fa9ff456f731 813 struct i2c_s *obj_s = I2C_S(obj);
<> 153:fa9ff456f731 814 I2C_HandleTypeDef *handle = &(obj_s->handle);
<> 153:fa9ff456f731 815
<> 153:fa9ff456f731 816 if (enable_slave) {
<> 153:fa9ff456f731 817 obj_s->slave = 1;
<> 153:fa9ff456f731 818 HAL_I2C_EnableListen_IT(handle);
<> 153:fa9ff456f731 819 } else {
<> 153:fa9ff456f731 820 obj_s->slave = 0;
<> 153:fa9ff456f731 821 HAL_I2C_DisableListen_IT(handle);
<> 153:fa9ff456f731 822 }
<> 153:fa9ff456f731 823 }
<> 153:fa9ff456f731 824
<> 153:fa9ff456f731 825 // See I2CSlave.h
<> 153:fa9ff456f731 826 #define NoData 0 // the slave has not been addressed
<> 153:fa9ff456f731 827 #define ReadAddressed 1 // the master has requested a read from this slave (slave = transmitter)
<> 153:fa9ff456f731 828 #define WriteGeneral 2 // the master is writing to all slave
<> 153:fa9ff456f731 829 #define WriteAddressed 3 // the master is writing to this slave (slave = receiver)
<> 153:fa9ff456f731 830
<> 153:fa9ff456f731 831
<> 153:fa9ff456f731 832 void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode) {
<> 153:fa9ff456f731 833 /* Get object ptr based on handler ptr */
<> 153:fa9ff456f731 834 i2c_t *obj = get_i2c_obj(hi2c);
<> 153:fa9ff456f731 835 struct i2c_s *obj_s = I2C_S(obj);
<> 153:fa9ff456f731 836
<> 153:fa9ff456f731 837 /* Transfer direction in HAL is from Master point of view */
<> 153:fa9ff456f731 838 if(TransferDirection == I2C_DIRECTION_RECEIVE) {
<> 153:fa9ff456f731 839 obj_s->pending_slave_tx_master_rx = 1;
<> 153:fa9ff456f731 840 }
<> 153:fa9ff456f731 841
<> 153:fa9ff456f731 842 if(TransferDirection == I2C_DIRECTION_TRANSMIT) {
<> 153:fa9ff456f731 843 obj_s->pending_slave_rx_maxter_tx = 1;
<> 153:fa9ff456f731 844 }
<> 153:fa9ff456f731 845 }
<> 153:fa9ff456f731 846
<> 153:fa9ff456f731 847 void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *I2cHandle){
<> 153:fa9ff456f731 848 /* Get object ptr based on handler ptr */
<> 153:fa9ff456f731 849 i2c_t *obj = get_i2c_obj(I2cHandle);
<> 153:fa9ff456f731 850 struct i2c_s *obj_s = I2C_S(obj);
<> 153:fa9ff456f731 851 obj_s->pending_slave_tx_master_rx = 0;
<> 153:fa9ff456f731 852 }
<> 153:fa9ff456f731 853
<> 153:fa9ff456f731 854 void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *I2cHandle){
<> 153:fa9ff456f731 855 /* Get object ptr based on handler ptr */
<> 153:fa9ff456f731 856 i2c_t *obj = get_i2c_obj(I2cHandle);
<> 153:fa9ff456f731 857 struct i2c_s *obj_s = I2C_S(obj);
<> 153:fa9ff456f731 858 obj_s->pending_slave_rx_maxter_tx = 0;
<> 153:fa9ff456f731 859 }
<> 153:fa9ff456f731 860
<> 153:fa9ff456f731 861 void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c)
<> 153:fa9ff456f731 862 {
<> 153:fa9ff456f731 863 /* restart listening for master requests */
<> 153:fa9ff456f731 864 HAL_I2C_EnableListen_IT(hi2c);
<> 153:fa9ff456f731 865 }
<> 153:fa9ff456f731 866
<> 153:fa9ff456f731 867 int i2c_slave_receive(i2c_t *obj) {
<> 153:fa9ff456f731 868
<> 153:fa9ff456f731 869 struct i2c_s *obj_s = I2C_S(obj);
<> 153:fa9ff456f731 870 int retValue = NoData;
<> 153:fa9ff456f731 871
<> 153:fa9ff456f731 872 if(obj_s->pending_slave_rx_maxter_tx) {
<> 153:fa9ff456f731 873 retValue = WriteAddressed;
<> 153:fa9ff456f731 874 }
<> 153:fa9ff456f731 875
<> 153:fa9ff456f731 876 if(obj_s->pending_slave_tx_master_rx) {
<> 153:fa9ff456f731 877 retValue = ReadAddressed;
<> 153:fa9ff456f731 878 }
<> 153:fa9ff456f731 879
<> 153:fa9ff456f731 880 return (retValue);
<> 153:fa9ff456f731 881 }
<> 153:fa9ff456f731 882
<> 153:fa9ff456f731 883 int i2c_slave_read(i2c_t *obj, char *data, int length) {
<> 153:fa9ff456f731 884 struct i2c_s *obj_s = I2C_S(obj);
<> 153:fa9ff456f731 885 I2C_HandleTypeDef *handle = &(obj_s->handle);
<> 153:fa9ff456f731 886 int count = 0;
<> 153:fa9ff456f731 887 int ret = 0;
<> 153:fa9ff456f731 888 uint32_t timeout = 0;
<> 153:fa9ff456f731 889
<> 153:fa9ff456f731 890 /* Always use I2C_NEXT_FRAME as slave will just adapt to master requests */
<> 153:fa9ff456f731 891 ret = HAL_I2C_Slave_Sequential_Receive_IT(handle, (uint8_t *) data, length, I2C_NEXT_FRAME);
<> 153:fa9ff456f731 892
<> 153:fa9ff456f731 893 if(ret == HAL_OK) {
<> 153:fa9ff456f731 894 timeout = BYTE_TIMEOUT_US * length;
<> 153:fa9ff456f731 895 while(obj_s->pending_slave_rx_maxter_tx && (--timeout != 0)) {
<> 153:fa9ff456f731 896 wait_us(1);
<> 153:fa9ff456f731 897 }
<> 153:fa9ff456f731 898
<> 153:fa9ff456f731 899 if(timeout != 0) {
<> 153:fa9ff456f731 900 count = length;
<> 153:fa9ff456f731 901 } else {
<> 153:fa9ff456f731 902 DEBUG_PRINTF("TIMEOUT or error in i2c_slave_read\r\n");
<> 153:fa9ff456f731 903 }
<> 153:fa9ff456f731 904 }
<> 153:fa9ff456f731 905 return count;
<> 153:fa9ff456f731 906 }
<> 153:fa9ff456f731 907
<> 153:fa9ff456f731 908 int i2c_slave_write(i2c_t *obj, const char *data, int length) {
<> 153:fa9ff456f731 909 struct i2c_s *obj_s = I2C_S(obj);
<> 153:fa9ff456f731 910 I2C_HandleTypeDef *handle = &(obj_s->handle);
<> 153:fa9ff456f731 911 int count = 0;
<> 153:fa9ff456f731 912 int ret = 0;
<> 153:fa9ff456f731 913 uint32_t timeout = 0;
<> 153:fa9ff456f731 914
<> 153:fa9ff456f731 915 /* Always use I2C_NEXT_FRAME as slave will just adapt to master requests */
<> 153:fa9ff456f731 916 ret = HAL_I2C_Slave_Sequential_Transmit_IT(handle, (uint8_t *) data, length, I2C_NEXT_FRAME);
<> 153:fa9ff456f731 917
<> 153:fa9ff456f731 918 if(ret == HAL_OK) {
<> 153:fa9ff456f731 919 timeout = BYTE_TIMEOUT_US * length;
<> 153:fa9ff456f731 920 while(obj_s->pending_slave_tx_master_rx && (--timeout != 0)) {
<> 153:fa9ff456f731 921 wait_us(1);
<> 153:fa9ff456f731 922 }
<> 153:fa9ff456f731 923
<> 153:fa9ff456f731 924 if(timeout != 0) {
<> 153:fa9ff456f731 925 count = length;
<> 153:fa9ff456f731 926 } else {
<> 153:fa9ff456f731 927 DEBUG_PRINTF("TIMEOUT or error in i2c_slave_write\r\n");
<> 153:fa9ff456f731 928 }
<> 153:fa9ff456f731 929 }
<> 153:fa9ff456f731 930
<> 153:fa9ff456f731 931 return count;
<> 153:fa9ff456f731 932 }
<> 153:fa9ff456f731 933 #endif // DEVICE_I2CSLAVE
<> 153:fa9ff456f731 934
<> 153:fa9ff456f731 935 #if DEVICE_I2C_ASYNCH
<> 153:fa9ff456f731 936 /* ASYNCH MASTER API FUNCTIONS */
<> 153:fa9ff456f731 937 void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c){
<> 153:fa9ff456f731 938 /* Get object ptr based on handler ptr */
<> 153:fa9ff456f731 939 i2c_t *obj = get_i2c_obj(hi2c);
<> 153:fa9ff456f731 940 struct i2c_s *obj_s = I2C_S(obj);
<> 153:fa9ff456f731 941 I2C_HandleTypeDef *handle = &(obj_s->handle);
<> 153:fa9ff456f731 942
<> 153:fa9ff456f731 943 /* Disable IT. Not always done before calling macro */
<> 153:fa9ff456f731 944 __HAL_I2C_DISABLE_IT(handle, I2C_IT_ALL);
<> 153:fa9ff456f731 945 i2c_ev_err_disable(obj);
<> 153:fa9ff456f731 946
<> 153:fa9ff456f731 947 /* Set event flag */
<> 153:fa9ff456f731 948 obj_s->event = I2C_EVENT_ERROR;
<> 153:fa9ff456f731 949 }
<> 153:fa9ff456f731 950
<> 153:fa9ff456f731 951 void i2c_transfer_asynch(i2c_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length, uint32_t address, uint32_t stop, uint32_t handler, uint32_t event, DMAUsage hint) {
<> 153:fa9ff456f731 952
<> 153:fa9ff456f731 953 // TODO: DMA usage is currently ignored by this way
<> 153:fa9ff456f731 954 (void) hint;
<> 153:fa9ff456f731 955
<> 153:fa9ff456f731 956 struct i2c_s *obj_s = I2C_S(obj);
<> 153:fa9ff456f731 957 I2C_HandleTypeDef *handle = &(obj_s->handle);
<> 153:fa9ff456f731 958
<> 153:fa9ff456f731 959 /* Update object */
<> 153:fa9ff456f731 960 obj->tx_buff.buffer = (void *)tx;
<> 153:fa9ff456f731 961 obj->tx_buff.length = tx_length;
<> 153:fa9ff456f731 962 obj->tx_buff.pos = 0;
<> 153:fa9ff456f731 963 obj->tx_buff.width = 8;
<> 153:fa9ff456f731 964
<> 153:fa9ff456f731 965 obj->rx_buff.buffer = (void *)rx;
<> 153:fa9ff456f731 966 obj->rx_buff.length = rx_length;
<> 153:fa9ff456f731 967 obj->rx_buff.pos = SIZE_MAX;
<> 153:fa9ff456f731 968 obj->rx_buff.width = 8;
<> 153:fa9ff456f731 969
<> 153:fa9ff456f731 970 obj_s->available_events = event;
<> 153:fa9ff456f731 971 obj_s->event = 0;
<> 153:fa9ff456f731 972 obj_s->address = address;
<> 153:fa9ff456f731 973 obj_s->stop = stop;
<> 153:fa9ff456f731 974
<> 153:fa9ff456f731 975 i2c_ev_err_enable(obj, handler);
<> 153:fa9ff456f731 976
<> 153:fa9ff456f731 977 /* Set operation step depending if stop sending required or not */
<> 153:fa9ff456f731 978 if ((tx_length && !rx_length) || (!tx_length && rx_length)) {
<> 153:fa9ff456f731 979 if ((obj_s->XferOperation == I2C_FIRST_AND_LAST_FRAME) ||
<> 153:fa9ff456f731 980 (obj_s->XferOperation == I2C_LAST_FRAME)) {
<> 153:fa9ff456f731 981 if (stop)
<> 153:fa9ff456f731 982 obj_s->XferOperation = I2C_FIRST_AND_LAST_FRAME;
<> 153:fa9ff456f731 983 else
<> 153:fa9ff456f731 984 obj_s->XferOperation = I2C_FIRST_FRAME;
<> 153:fa9ff456f731 985 } else if ((obj_s->XferOperation == I2C_FIRST_FRAME) ||
<> 153:fa9ff456f731 986 (obj_s->XferOperation == I2C_NEXT_FRAME)) {
<> 153:fa9ff456f731 987 if (stop)
<> 153:fa9ff456f731 988 obj_s->XferOperation = I2C_LAST_FRAME;
<> 153:fa9ff456f731 989 else
<> 153:fa9ff456f731 990 obj_s->XferOperation = I2C_NEXT_FRAME;
<> 153:fa9ff456f731 991 }
<> 153:fa9ff456f731 992
<> 153:fa9ff456f731 993 if (tx_length > 0) {
<> 153:fa9ff456f731 994 HAL_I2C_Master_Sequential_Transmit_IT(handle, address, (uint8_t*)tx, tx_length, obj_s->XferOperation);
<> 153:fa9ff456f731 995 }
<> 153:fa9ff456f731 996 if (rx_length > 0) {
<> 153:fa9ff456f731 997 HAL_I2C_Master_Sequential_Receive_IT(handle, address, (uint8_t*)rx, rx_length, obj_s->XferOperation);
<> 153:fa9ff456f731 998 }
<> 153:fa9ff456f731 999 }
<> 153:fa9ff456f731 1000 else if (tx_length && rx_length) {
<> 153:fa9ff456f731 1001 /* Two steps operation, don't modify XferOperation, keep it for next step */
<> 153:fa9ff456f731 1002 if ((obj_s->XferOperation == I2C_FIRST_AND_LAST_FRAME) ||
<> 153:fa9ff456f731 1003 (obj_s->XferOperation == I2C_LAST_FRAME)) {
<> 153:fa9ff456f731 1004 HAL_I2C_Master_Sequential_Transmit_IT(handle, address, (uint8_t*)tx, tx_length, I2C_FIRST_FRAME);
<> 153:fa9ff456f731 1005 } else if ((obj_s->XferOperation == I2C_FIRST_FRAME) ||
<> 153:fa9ff456f731 1006 (obj_s->XferOperation == I2C_NEXT_FRAME)) {
<> 153:fa9ff456f731 1007 HAL_I2C_Master_Sequential_Transmit_IT(handle, address, (uint8_t*)tx, tx_length, I2C_NEXT_FRAME);
<> 153:fa9ff456f731 1008 }
<> 153:fa9ff456f731 1009 }
<> 153:fa9ff456f731 1010 }
<> 153:fa9ff456f731 1011
<> 153:fa9ff456f731 1012
<> 153:fa9ff456f731 1013 uint32_t i2c_irq_handler_asynch(i2c_t *obj) {
<> 153:fa9ff456f731 1014
<> 153:fa9ff456f731 1015 struct i2c_s *obj_s = I2C_S(obj);
<> 153:fa9ff456f731 1016 I2C_HandleTypeDef *handle = &(obj_s->handle);
<> 153:fa9ff456f731 1017
<> 153:fa9ff456f731 1018 HAL_I2C_EV_IRQHandler(handle);
<> 153:fa9ff456f731 1019 HAL_I2C_ER_IRQHandler(handle);
<> 153:fa9ff456f731 1020
<> 153:fa9ff456f731 1021 /* Return I2C event status */
<> 153:fa9ff456f731 1022 return (obj_s->event & obj_s->available_events);
<> 153:fa9ff456f731 1023 }
<> 153:fa9ff456f731 1024
<> 153:fa9ff456f731 1025 uint8_t i2c_active(i2c_t *obj) {
<> 153:fa9ff456f731 1026
<> 153:fa9ff456f731 1027 struct i2c_s *obj_s = I2C_S(obj);
<> 153:fa9ff456f731 1028 I2C_HandleTypeDef *handle = &(obj_s->handle);
<> 153:fa9ff456f731 1029
<> 153:fa9ff456f731 1030 if (handle->State == HAL_I2C_STATE_READY) {
<> 153:fa9ff456f731 1031 return 0;
<> 153:fa9ff456f731 1032 }
<> 153:fa9ff456f731 1033 else {
<> 153:fa9ff456f731 1034 return 1;
<> 153:fa9ff456f731 1035 }
<> 153:fa9ff456f731 1036 }
<> 153:fa9ff456f731 1037
<> 153:fa9ff456f731 1038 void i2c_abort_asynch(i2c_t *obj) {
<> 153:fa9ff456f731 1039
<> 153:fa9ff456f731 1040 struct i2c_s *obj_s = I2C_S(obj);
<> 153:fa9ff456f731 1041 I2C_HandleTypeDef *handle = &(obj_s->handle);
<> 153:fa9ff456f731 1042
<> 153:fa9ff456f731 1043 /* Abort HAL requires DevAddress, but is not used. Use Dummy */
<> 153:fa9ff456f731 1044 uint16_t Dummy_DevAddress = 0x00;
<> 153:fa9ff456f731 1045
<> 153:fa9ff456f731 1046 HAL_I2C_Master_Abort_IT(handle, Dummy_DevAddress);
<> 153:fa9ff456f731 1047 }
<> 153:fa9ff456f731 1048
<> 153:fa9ff456f731 1049 #endif // DEVICE_I2C_ASYNCH
<> 153:fa9ff456f731 1050
<> 153:fa9ff456f731 1051 #endif // STM32F1
<> 153:fa9ff456f731 1052
<> 153:fa9ff456f731 1053 #endif // DEVICE_I2C