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targets/hal/TARGET_Freescale/TARGET_KLXX/TARGET_KL05Z/serial_api.c@144:ef7eb2e8f9f7, 2016-09-02 (annotated)

Committer:
<>
Date:
Fri Sep 02 15:07:44 2016 +0100
Revision:
144:ef7eb2e8f9f7
Parent:
0:9b334a45a8ff 
This updates the lib to the mbed lib v125

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /* mbed Microcontroller Library
<> 144:ef7eb2e8f9f7 2 * Copyright (c) 2006-2013 ARM Limited
<> 144:ef7eb2e8f9f7 3 *
<> 144:ef7eb2e8f9f7 4 * Licensed under the Apache License, Version 2.0 (the "License");
<> 144:ef7eb2e8f9f7 5 * you may not use this file except in compliance with the License.
<> 144:ef7eb2e8f9f7 6 * You may obtain a copy of the License at
<> 144:ef7eb2e8f9f7 7 *
<> 144:ef7eb2e8f9f7 8 * http://www.apache.org/licenses/LICENSE-2.0
<> 144:ef7eb2e8f9f7 9 *
<> 144:ef7eb2e8f9f7 10 * Unless required by applicable law or agreed to in writing, software
<> 144:ef7eb2e8f9f7 11 * distributed under the License is distributed on an "AS IS" BASIS,
<> 144:ef7eb2e8f9f7 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
<> 144:ef7eb2e8f9f7 13 * See the License for the specific language governing permissions and
<> 144:ef7eb2e8f9f7 14 * limitations under the License.
<> 144:ef7eb2e8f9f7 15 */
<> 144:ef7eb2e8f9f7 16 #include "mbed_assert.h"
<> 144:ef7eb2e8f9f7 17 #include "serial_api.h"
<> 144:ef7eb2e8f9f7 18
<> 144:ef7eb2e8f9f7 19 // math.h required for floating point operations for baud rate calculation
<> 144:ef7eb2e8f9f7 20 #include <math.h>
<> 144:ef7eb2e8f9f7 21
<> 144:ef7eb2e8f9f7 22 #include <string.h>
<> 144:ef7eb2e8f9f7 23
<> 144:ef7eb2e8f9f7 24 #include "cmsis.h"
<> 144:ef7eb2e8f9f7 25 #include "pinmap.h"
<> 144:ef7eb2e8f9f7 26 #include "clk_freqs.h"
<> 144:ef7eb2e8f9f7 27 #include "PeripheralPins.h"
<> 144:ef7eb2e8f9f7 28
<> 144:ef7eb2e8f9f7 29 //Devices either user UART0 or UARTLP
<> 144:ef7eb2e8f9f7 30 #ifndef UARTLP_BASES
<> 144:ef7eb2e8f9f7 31 #define UARTLP_C2_RE_MASK UART0_C2_RE_MASK
<> 144:ef7eb2e8f9f7 32 #define UARTLP_C2_TE_MASK UART0_C2_TE_MASK
<> 144:ef7eb2e8f9f7 33 #define UARTLP_BDH_SBNS_MASK UART0_BDH_SBNS_MASK
<> 144:ef7eb2e8f9f7 34 #define UARTLP_BDH_SBNS_SHIFT UART0_BDH_SBNS_SHIFT
<> 144:ef7eb2e8f9f7 35 #define UARTLP_S1_TDRE_MASK UART0_S1_TDRE_MASK
<> 144:ef7eb2e8f9f7 36 #define UARTLP_S1_OR_MASK UART0_S1_OR_MASK
<> 144:ef7eb2e8f9f7 37 #define UARTLP_C2_RIE_MASK UART0_C2_RIE_MASK
<> 144:ef7eb2e8f9f7 38 #define UARTLP_C2_TIE_MASK UART0_C2_TIE_MASK
<> 144:ef7eb2e8f9f7 39 #define UARTLP_C2_SBK_MASK UART0_C2_SBK_MASK
<> 144:ef7eb2e8f9f7 40 #define UARTLP_S1_RDRF_MASK UART0_S1_RDRF_MASK
<> 144:ef7eb2e8f9f7 41 #endif
<> 144:ef7eb2e8f9f7 42
<> 144:ef7eb2e8f9f7 43 #ifdef UART2
<> 144:ef7eb2e8f9f7 44 #define UART_NUM 3
<> 144:ef7eb2e8f9f7 45 #else
<> 144:ef7eb2e8f9f7 46 #define UART_NUM 1
<> 144:ef7eb2e8f9f7 47 #endif
<> 144:ef7eb2e8f9f7 48
<> 144:ef7eb2e8f9f7 49 /******************************************************************************
<> 144:ef7eb2e8f9f7 50 * INITIALIZATION
<> 144:ef7eb2e8f9f7 51 ******************************************************************************/
<> 144:ef7eb2e8f9f7 52
<> 144:ef7eb2e8f9f7 53 static uint32_t serial_irq_ids[UART_NUM] = {0};
<> 144:ef7eb2e8f9f7 54 static uart_irq_handler irq_handler;
<> 144:ef7eb2e8f9f7 55
<> 144:ef7eb2e8f9f7 56 int stdio_uart_inited = 0;
<> 144:ef7eb2e8f9f7 57 serial_t stdio_uart;
<> 144:ef7eb2e8f9f7 58
<> 144:ef7eb2e8f9f7 59 void serial_init(serial_t *obj, PinName tx, PinName rx) {
<> 144:ef7eb2e8f9f7 60 // determine the UART to use
<> 144:ef7eb2e8f9f7 61 UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
<> 144:ef7eb2e8f9f7 62 UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
<> 144:ef7eb2e8f9f7 63 UARTName uart = (UARTName)pinmap_merge(uart_tx, uart_rx);
<> 144:ef7eb2e8f9f7 64 MBED_ASSERT((int)uart != NC);
<> 144:ef7eb2e8f9f7 65
<> 144:ef7eb2e8f9f7 66 obj->uart = (UARTLP_Type *)uart;
<> 144:ef7eb2e8f9f7 67 // enable clk
<> 144:ef7eb2e8f9f7 68 switch (uart) {
<> 144:ef7eb2e8f9f7 69 case UART_0: if (mcgpllfll_frequency() != 0) //PLL/FLL is selected
<> 144:ef7eb2e8f9f7 70 SIM->SOPT2 |= (1<<SIM_SOPT2_UART0SRC_SHIFT);
<> 144:ef7eb2e8f9f7 71 else
<> 144:ef7eb2e8f9f7 72 SIM->SOPT2 |= (2<<SIM_SOPT2_UART0SRC_SHIFT);
<> 144:ef7eb2e8f9f7 73 SIM->SCGC4 |= SIM_SCGC4_UART0_MASK; break;
<> 144:ef7eb2e8f9f7 74 #if UART_NUM > 1
<> 144:ef7eb2e8f9f7 75 case UART_1: SIM->SCGC4 |= SIM_SCGC4_UART1_MASK; break;
<> 144:ef7eb2e8f9f7 76 case UART_2: SIM->SCGC4 |= SIM_SCGC4_UART2_MASK; break;
<> 144:ef7eb2e8f9f7 77 #endif
<> 144:ef7eb2e8f9f7 78 }
<> 144:ef7eb2e8f9f7 79 // Disable UART before changing registers
<> 144:ef7eb2e8f9f7 80 obj->uart->C2 &= ~(UARTLP_C2_RE_MASK | UARTLP_C2_TE_MASK);
<> 144:ef7eb2e8f9f7 81
<> 144:ef7eb2e8f9f7 82 switch (uart) {
<> 144:ef7eb2e8f9f7 83 case UART_0: obj->index = 0; break;
<> 144:ef7eb2e8f9f7 84 #if UART_NUM > 1
<> 144:ef7eb2e8f9f7 85 case UART_1: obj->index = 1; break;
<> 144:ef7eb2e8f9f7 86 case UART_2: obj->index = 2; break;
<> 144:ef7eb2e8f9f7 87 #endif
<> 144:ef7eb2e8f9f7 88 }
<> 144:ef7eb2e8f9f7 89
<> 144:ef7eb2e8f9f7 90 // set default baud rate and format
<> 144:ef7eb2e8f9f7 91 serial_baud (obj, 9600);
<> 144:ef7eb2e8f9f7 92 serial_format(obj, 8, ParityNone, 1);
<> 144:ef7eb2e8f9f7 93
<> 144:ef7eb2e8f9f7 94 // pinout the chosen uart
<> 144:ef7eb2e8f9f7 95 pinmap_pinout(tx, PinMap_UART_TX);
<> 144:ef7eb2e8f9f7 96 pinmap_pinout(rx, PinMap_UART_RX);
<> 144:ef7eb2e8f9f7 97
<> 144:ef7eb2e8f9f7 98 // set rx/tx pins in PullUp mode
<> 144:ef7eb2e8f9f7 99 if (tx != NC) {
<> 144:ef7eb2e8f9f7 100 pin_mode(tx, PullUp);
<> 144:ef7eb2e8f9f7 101 }
<> 144:ef7eb2e8f9f7 102 if (rx != NC) {
<> 144:ef7eb2e8f9f7 103 pin_mode(rx, PullUp);
<> 144:ef7eb2e8f9f7 104 }
<> 144:ef7eb2e8f9f7 105
<> 144:ef7eb2e8f9f7 106 obj->uart->C2 |= (UARTLP_C2_RE_MASK | UARTLP_C2_TE_MASK);
<> 144:ef7eb2e8f9f7 107
<> 144:ef7eb2e8f9f7 108 if (uart == STDIO_UART) {
<> 144:ef7eb2e8f9f7 109 stdio_uart_inited = 1;
<> 144:ef7eb2e8f9f7 110 memcpy(&stdio_uart, obj, sizeof(serial_t));
<> 144:ef7eb2e8f9f7 111 }
<> 144:ef7eb2e8f9f7 112 }
<> 144:ef7eb2e8f9f7 113
<> 144:ef7eb2e8f9f7 114 void serial_free(serial_t *obj) {
<> 144:ef7eb2e8f9f7 115 serial_irq_ids[obj->index] = 0;
<> 144:ef7eb2e8f9f7 116 }
<> 144:ef7eb2e8f9f7 117
<> 144:ef7eb2e8f9f7 118 // serial_baud
<> 144:ef7eb2e8f9f7 119 //
<> 144:ef7eb2e8f9f7 120 // set the baud rate, taking in to account the current SystemFrequency
<> 144:ef7eb2e8f9f7 121 void serial_baud(serial_t *obj, int baudrate) {
<> 144:ef7eb2e8f9f7 122
<> 144:ef7eb2e8f9f7 123 // save C2 state
<> 144:ef7eb2e8f9f7 124 uint8_t c2_state = (obj->uart->C2 & (UARTLP_C2_RE_MASK | UARTLP_C2_TE_MASK));
<> 144:ef7eb2e8f9f7 125
<> 144:ef7eb2e8f9f7 126 // Disable UART before changing registers
<> 144:ef7eb2e8f9f7 127 obj->uart->C2 &= ~(UARTLP_C2_RE_MASK | UARTLP_C2_TE_MASK);
<> 144:ef7eb2e8f9f7 128
<> 144:ef7eb2e8f9f7 129 uint32_t PCLK;
<> 144:ef7eb2e8f9f7 130 if (obj->uart == UART0) {
<> 144:ef7eb2e8f9f7 131 if (mcgpllfll_frequency() != 0)
<> 144:ef7eb2e8f9f7 132 PCLK = mcgpllfll_frequency();
<> 144:ef7eb2e8f9f7 133 else
<> 144:ef7eb2e8f9f7 134 PCLK = extosc_frequency();
<> 144:ef7eb2e8f9f7 135 } else
<> 144:ef7eb2e8f9f7 136 PCLK = bus_frequency();
<> 144:ef7eb2e8f9f7 137
<> 144:ef7eb2e8f9f7 138 // First we check to see if the basic divide with no DivAddVal/MulVal
<> 144:ef7eb2e8f9f7 139 // ratio gives us an integer result. If it does, we set DivAddVal = 0,
<> 144:ef7eb2e8f9f7 140 // MulVal = 1. Otherwise, we search the valid ratio value range to find
<> 144:ef7eb2e8f9f7 141 // the closest match. This could be more elegant, using search methods
<> 144:ef7eb2e8f9f7 142 // and/or lookup tables, but the brute force method is not that much
<> 144:ef7eb2e8f9f7 143 // slower, and is more maintainable.
<> 144:ef7eb2e8f9f7 144 uint16_t DL = PCLK / (16 * baudrate);
<> 144:ef7eb2e8f9f7 145
<> 144:ef7eb2e8f9f7 146 // set BDH and BDL
<> 144:ef7eb2e8f9f7 147 obj->uart->BDH = (obj->uart->BDH & ~(0x1f)) | ((DL >> 8) & 0x1f);
<> 144:ef7eb2e8f9f7 148 obj->uart->BDL = (obj->uart->BDL & ~(0xff)) | ((DL >> 0) & 0xff);
<> 144:ef7eb2e8f9f7 149
<> 144:ef7eb2e8f9f7 150 // restore C2 state
<> 144:ef7eb2e8f9f7 151 obj->uart->C2 |= c2_state;
<> 144:ef7eb2e8f9f7 152 }
<> 144:ef7eb2e8f9f7 153
<> 144:ef7eb2e8f9f7 154 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
<> 144:ef7eb2e8f9f7 155 MBED_ASSERT((stop_bits == 1) || (stop_bits == 2));
<> 144:ef7eb2e8f9f7 156 MBED_ASSERT((parity == ParityNone) || (parity == ParityOdd) || (parity == ParityEven));
<> 144:ef7eb2e8f9f7 157 MBED_ASSERT(data_bits == 8); // TODO: Support other number of data bits (also in the write method!)
<> 144:ef7eb2e8f9f7 158
<> 144:ef7eb2e8f9f7 159 // save C2 state
<> 144:ef7eb2e8f9f7 160 uint8_t c2_state = (obj->uart->C2 & (UARTLP_C2_RE_MASK | UARTLP_C2_TE_MASK));
<> 144:ef7eb2e8f9f7 161
<> 144:ef7eb2e8f9f7 162 // Disable UART before changing registers
<> 144:ef7eb2e8f9f7 163 obj->uart->C2 &= ~(UARTLP_C2_RE_MASK | UARTLP_C2_TE_MASK);
<> 144:ef7eb2e8f9f7 164
<> 144:ef7eb2e8f9f7 165
<> 144:ef7eb2e8f9f7 166 uint8_t parity_enable, parity_select;
<> 144:ef7eb2e8f9f7 167 switch (parity) {
<> 144:ef7eb2e8f9f7 168 case ParityNone: parity_enable = 0; parity_select = 0; break;
<> 144:ef7eb2e8f9f7 169 case ParityOdd : parity_enable = 1; parity_select = 1; data_bits++; break;
<> 144:ef7eb2e8f9f7 170 case ParityEven: parity_enable = 1; parity_select = 0; data_bits++; break;
<> 144:ef7eb2e8f9f7 171 default:
<> 144:ef7eb2e8f9f7 172 break;
<> 144:ef7eb2e8f9f7 173 }
<> 144:ef7eb2e8f9f7 174
<> 144:ef7eb2e8f9f7 175 stop_bits -= 1;
<> 144:ef7eb2e8f9f7 176
<> 144:ef7eb2e8f9f7 177 // data bits, parity and parity mode
<> 144:ef7eb2e8f9f7 178 obj->uart->C1 = ((parity_enable << 1)
<> 144:ef7eb2e8f9f7 179 | (parity_select << 0));
<> 144:ef7eb2e8f9f7 180
<> 144:ef7eb2e8f9f7 181 // stop bits
<> 144:ef7eb2e8f9f7 182 obj->uart->BDH &= ~UARTLP_BDH_SBNS_MASK;
<> 144:ef7eb2e8f9f7 183 obj->uart->BDH |= (stop_bits << UARTLP_BDH_SBNS_SHIFT);
<> 144:ef7eb2e8f9f7 184
<> 144:ef7eb2e8f9f7 185 // restore C2 state
<> 144:ef7eb2e8f9f7 186 obj->uart->C2 |= c2_state;
<> 144:ef7eb2e8f9f7 187 }
<> 144:ef7eb2e8f9f7 188
<> 144:ef7eb2e8f9f7 189 /******************************************************************************
<> 144:ef7eb2e8f9f7 190 * INTERRUPTS HANDLING
<> 144:ef7eb2e8f9f7 191 ******************************************************************************/
<> 144:ef7eb2e8f9f7 192 static inline void uart_irq(uint8_t status, uint32_t index) {
<> 144:ef7eb2e8f9f7 193 if (serial_irq_ids[index] != 0) {
<> 144:ef7eb2e8f9f7 194 if (status & UARTLP_S1_TDRE_MASK)
<> 144:ef7eb2e8f9f7 195 irq_handler(serial_irq_ids[index], TxIrq);
<> 144:ef7eb2e8f9f7 196
<> 144:ef7eb2e8f9f7 197 if (status & UARTLP_S1_RDRF_MASK)
<> 144:ef7eb2e8f9f7 198 irq_handler(serial_irq_ids[index], RxIrq);
<> 144:ef7eb2e8f9f7 199 }
<> 144:ef7eb2e8f9f7 200 }
<> 144:ef7eb2e8f9f7 201
<> 144:ef7eb2e8f9f7 202 void uart0_irq() {
<> 144:ef7eb2e8f9f7 203 uart_irq(UART0->S1, 0);
<> 144:ef7eb2e8f9f7 204 if (UART0->S1 & UARTLP_S1_OR_MASK)
<> 144:ef7eb2e8f9f7 205 UART0->S1 |= UARTLP_S1_OR_MASK;
<> 144:ef7eb2e8f9f7 206 }
<> 144:ef7eb2e8f9f7 207 #if UART_NUM > 1
<> 144:ef7eb2e8f9f7 208 void uart1_irq() {uart_irq(UART1->S1, 1);}
<> 144:ef7eb2e8f9f7 209 void uart2_irq() {uart_irq(UART2->S1, 2);}
<> 144:ef7eb2e8f9f7 210 #endif
<> 144:ef7eb2e8f9f7 211
<> 144:ef7eb2e8f9f7 212 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
<> 144:ef7eb2e8f9f7 213 irq_handler = handler;
<> 144:ef7eb2e8f9f7 214 serial_irq_ids[obj->index] = id;
<> 144:ef7eb2e8f9f7 215 }
<> 144:ef7eb2e8f9f7 216
<> 144:ef7eb2e8f9f7 217 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
<> 144:ef7eb2e8f9f7 218 IRQn_Type irq_n = (IRQn_Type)0;
<> 144:ef7eb2e8f9f7 219 uint32_t vector = 0;
<> 144:ef7eb2e8f9f7 220 switch ((int)obj->uart) {
<> 144:ef7eb2e8f9f7 221 case UART_0: irq_n=UART0_IRQn; vector = (uint32_t)&uart0_irq; break;
<> 144:ef7eb2e8f9f7 222 #if UART_NUM > 1
<> 144:ef7eb2e8f9f7 223 case UART_1: irq_n=UART1_IRQn; vector = (uint32_t)&uart1_irq; break;
<> 144:ef7eb2e8f9f7 224 case UART_2: irq_n=UART2_IRQn; vector = (uint32_t)&uart2_irq; break;
<> 144:ef7eb2e8f9f7 225 #endif
<> 144:ef7eb2e8f9f7 226 }
<> 144:ef7eb2e8f9f7 227
<> 144:ef7eb2e8f9f7 228 if (enable) {
<> 144:ef7eb2e8f9f7 229 switch (irq) {
<> 144:ef7eb2e8f9f7 230 case RxIrq: obj->uart->C2 |= (UARTLP_C2_RIE_MASK); break;
<> 144:ef7eb2e8f9f7 231 case TxIrq: obj->uart->C2 |= (UARTLP_C2_TIE_MASK); break;
<> 144:ef7eb2e8f9f7 232 }
<> 144:ef7eb2e8f9f7 233 NVIC_SetVector(irq_n, vector);
<> 144:ef7eb2e8f9f7 234 NVIC_EnableIRQ(irq_n);
<> 144:ef7eb2e8f9f7 235
<> 144:ef7eb2e8f9f7 236 } else { // disable
<> 144:ef7eb2e8f9f7 237 int all_disabled = 0;
<> 144:ef7eb2e8f9f7 238 SerialIrq other_irq = (irq == RxIrq) ? (TxIrq) : (RxIrq);
<> 144:ef7eb2e8f9f7 239 switch (irq) {
<> 144:ef7eb2e8f9f7 240 case RxIrq: obj->uart->C2 &= ~(UARTLP_C2_RIE_MASK); break;
<> 144:ef7eb2e8f9f7 241 case TxIrq: obj->uart->C2 &= ~(UARTLP_C2_TIE_MASK); break;
<> 144:ef7eb2e8f9f7 242 }
<> 144:ef7eb2e8f9f7 243 switch (other_irq) {
<> 144:ef7eb2e8f9f7 244 case RxIrq: all_disabled = (obj->uart->C2 & (UARTLP_C2_RIE_MASK)) == 0; break;
<> 144:ef7eb2e8f9f7 245 case TxIrq: all_disabled = (obj->uart->C2 & (UARTLP_C2_TIE_MASK)) == 0; break;
<> 144:ef7eb2e8f9f7 246 }
<> 144:ef7eb2e8f9f7 247 if (all_disabled)
<> 144:ef7eb2e8f9f7 248 NVIC_DisableIRQ(irq_n);
<> 144:ef7eb2e8f9f7 249 }
<> 144:ef7eb2e8f9f7 250 }
<> 144:ef7eb2e8f9f7 251
<> 144:ef7eb2e8f9f7 252 /******************************************************************************
<> 144:ef7eb2e8f9f7 253 * READ/WRITE
<> 144:ef7eb2e8f9f7 254 ******************************************************************************/
<> 144:ef7eb2e8f9f7 255 int serial_getc(serial_t *obj) {
<> 144:ef7eb2e8f9f7 256 while (!serial_readable(obj));
<> 144:ef7eb2e8f9f7 257 return obj->uart->D;
<> 144:ef7eb2e8f9f7 258 }
<> 144:ef7eb2e8f9f7 259
<> 144:ef7eb2e8f9f7 260 void serial_putc(serial_t *obj, int c) {
<> 144:ef7eb2e8f9f7 261 while (!serial_writable(obj));
<> 144:ef7eb2e8f9f7 262 obj->uart->D = c;
<> 144:ef7eb2e8f9f7 263 }
<> 144:ef7eb2e8f9f7 264
<> 144:ef7eb2e8f9f7 265 int serial_readable(serial_t *obj) {
<> 144:ef7eb2e8f9f7 266 // check overrun
<> 144:ef7eb2e8f9f7 267 if (obj->uart->S1 & UARTLP_S1_OR_MASK) {
<> 144:ef7eb2e8f9f7 268 obj->uart->S1 |= UARTLP_S1_OR_MASK;
<> 144:ef7eb2e8f9f7 269 }
<> 144:ef7eb2e8f9f7 270 return (obj->uart->S1 & UARTLP_S1_RDRF_MASK);
<> 144:ef7eb2e8f9f7 271 }
<> 144:ef7eb2e8f9f7 272
<> 144:ef7eb2e8f9f7 273 int serial_writable(serial_t *obj) {
<> 144:ef7eb2e8f9f7 274 // check overrun
<> 144:ef7eb2e8f9f7 275 if (obj->uart->S1 & UARTLP_S1_OR_MASK) {
<> 144:ef7eb2e8f9f7 276 obj->uart->S1 |= UARTLP_S1_OR_MASK;
<> 144:ef7eb2e8f9f7 277 }
<> 144:ef7eb2e8f9f7 278 return (obj->uart->S1 & UARTLP_S1_TDRE_MASK);
<> 144:ef7eb2e8f9f7 279 }
<> 144:ef7eb2e8f9f7 280
<> 144:ef7eb2e8f9f7 281 void serial_clear(serial_t *obj) {
<> 144:ef7eb2e8f9f7 282 }
<> 144:ef7eb2e8f9f7 283
<> 144:ef7eb2e8f9f7 284 void serial_pinout_tx(PinName tx) {
<> 144:ef7eb2e8f9f7 285 pinmap_pinout(tx, PinMap_UART_TX);
<> 144:ef7eb2e8f9f7 286 }
<> 144:ef7eb2e8f9f7 287
<> 144:ef7eb2e8f9f7 288 void serial_break_set(serial_t *obj) {
<> 144:ef7eb2e8f9f7 289 obj->uart->C2 |= UARTLP_C2_SBK_MASK;
<> 144:ef7eb2e8f9f7 290 }
<> 144:ef7eb2e8f9f7 291
<> 144:ef7eb2e8f9f7 292 void serial_break_clear(serial_t *obj) {
<> 144:ef7eb2e8f9f7 293 obj->uart->C2 &= ~UARTLP_C2_SBK_MASK;
<> 144:ef7eb2e8f9f7 294 }
<> 144:ef7eb2e8f9f7 295