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targets/TARGET_NORDIC/TARGET_NRF5/sleep.c@165:e614a9f1c9e2, 2017-05-26 (annotated)
- Committer:
- AnnaBridge
- Date:
- Fri May 26 12:39:01 2017 +0100
- Revision:
- 165:e614a9f1c9e2
- Parent:
- 160:d5399cc887bb
This updates the lib to the mbed lib v 143
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 149:156823d33999 | 1 | /* mbed Microcontroller Library |
<> | 149:156823d33999 | 2 | * Copyright (c) 2006-2013 ARM Limited |
<> | 149:156823d33999 | 3 | * |
<> | 149:156823d33999 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
<> | 149:156823d33999 | 5 | * you may not use this file except in compliance with the License. |
<> | 149:156823d33999 | 6 | * You may obtain a copy of the License at |
<> | 149:156823d33999 | 7 | * |
<> | 149:156823d33999 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
<> | 149:156823d33999 | 9 | * |
<> | 149:156823d33999 | 10 | * Unless required by applicable law or agreed to in writing, software |
<> | 149:156823d33999 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
<> | 149:156823d33999 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
<> | 149:156823d33999 | 13 | * See the License for the specific language governing permissions and |
<> | 149:156823d33999 | 14 | * limitations under the License. |
<> | 149:156823d33999 | 15 | */ |
<> | 149:156823d33999 | 16 | #include "sleep_api.h" |
<> | 149:156823d33999 | 17 | #include "cmsis.h" |
<> | 149:156823d33999 | 18 | #include "mbed_interface.h" |
<> | 149:156823d33999 | 19 | #include "softdevice_handler.h" |
<> | 149:156823d33999 | 20 | #include "nrf_soc.h" |
<> | 149:156823d33999 | 21 | |
<> | 149:156823d33999 | 22 | // Mask of reserved bits of the register ICSR in the System Control Block peripheral |
<> | 149:156823d33999 | 23 | // In this case, bits which are equal to 0 are the bits reserved in this register |
<> | 149:156823d33999 | 24 | #define SCB_ICSR_RESERVED_BITS_MASK 0x9E43F03F |
<> | 149:156823d33999 | 25 | |
<> | 150:02e0a0aed4ec | 26 | #define FPU_EXCEPTION_MASK 0x0000009F |
<> | 150:02e0a0aed4ec | 27 | |
<> | 160:d5399cc887bb | 28 | void hal_sleep(void) |
<> | 149:156823d33999 | 29 | { |
<> | 149:156823d33999 | 30 | // ensure debug is disconnected if semihost is enabled.... |
<> | 149:156823d33999 | 31 | |
<> | 149:156823d33999 | 32 | // Trigger an event when an interrupt is pending. This allows to wake up |
<> | 149:156823d33999 | 33 | // the processor from disabled interrupts. |
<> | 149:156823d33999 | 34 | SCB->SCR |= SCB_SCR_SEVONPEND_Msk; |
<> | 149:156823d33999 | 35 | |
AnnaBridge | 165:e614a9f1c9e2 | 36 | #if defined(NRF52) || defined(NRF52840_XXAA) |
<> | 150:02e0a0aed4ec | 37 | /* Clear exceptions and PendingIRQ from the FPU unit */ |
<> | 150:02e0a0aed4ec | 38 | __set_FPSCR(__get_FPSCR() & ~(FPU_EXCEPTION_MASK)); |
<> | 150:02e0a0aed4ec | 39 | (void) __get_FPSCR(); |
<> | 150:02e0a0aed4ec | 40 | NVIC_ClearPendingIRQ(FPU_IRQn); |
<> | 150:02e0a0aed4ec | 41 | #endif |
<> | 150:02e0a0aed4ec | 42 | |
<> | 149:156823d33999 | 43 | // If the SoftDevice is enabled, its API must be used to go to sleep. |
AnnaBridge | 165:e614a9f1c9e2 | 44 | if (softdevice_handler_is_enabled()) { |
<> | 149:156823d33999 | 45 | sd_power_mode_set(NRF_POWER_MODE_LOWPWR); |
<> | 149:156823d33999 | 46 | sd_app_evt_wait(); |
<> | 149:156823d33999 | 47 | } else { |
<> | 149:156823d33999 | 48 | NRF_POWER->TASKS_LOWPWR = 1; |
<> | 149:156823d33999 | 49 | |
<> | 149:156823d33999 | 50 | // Note: it is not sufficient to just use WFE here, since the internal |
<> | 149:156823d33999 | 51 | // event register may be already set from an event that occurred in the |
<> | 149:156823d33999 | 52 | // past (like an SVC call to the SoftDevice) and in such case WFE will |
<> | 149:156823d33999 | 53 | // just clear the register and continue execution. |
<> | 149:156823d33999 | 54 | // Therefore, the strategy here is to first clear the event register |
<> | 149:156823d33999 | 55 | // by using SEV/WFE pair, and then execute WFE again, unless there is |
<> | 149:156823d33999 | 56 | // a pending interrupt. |
<> | 149:156823d33999 | 57 | |
<> | 149:156823d33999 | 58 | // Set an event and wake up whatsoever, this will clear the event |
<> | 149:156823d33999 | 59 | // register from all previous events set (SVC call included) |
<> | 149:156823d33999 | 60 | __SEV(); |
<> | 149:156823d33999 | 61 | __WFE(); |
<> | 149:156823d33999 | 62 | |
<> | 149:156823d33999 | 63 | // Test if there is an interrupt pending (mask reserved regions) |
<> | 149:156823d33999 | 64 | if (SCB->ICSR & (SCB_ICSR_RESERVED_BITS_MASK)) { |
<> | 149:156823d33999 | 65 | // Ok, there is an interrut pending, no need to go to sleep |
<> | 149:156823d33999 | 66 | return; |
<> | 149:156823d33999 | 67 | } else { |
<> | 149:156823d33999 | 68 | // next event will wakeup the CPU |
<> | 149:156823d33999 | 69 | // If an interrupt occured between the test of SCB->ICSR and this |
<> | 149:156823d33999 | 70 | // instruction, WFE will just not put the CPU to sleep |
<> | 149:156823d33999 | 71 | __WFE(); |
<> | 149:156823d33999 | 72 | } |
<> | 149:156823d33999 | 73 | } |
<> | 149:156823d33999 | 74 | } |
<> | 149:156823d33999 | 75 | |
<> | 160:d5399cc887bb | 76 | void hal_deepsleep(void) |
<> | 149:156823d33999 | 77 | { |
<> | 160:d5399cc887bb | 78 | hal_sleep(); |
<> | 149:156823d33999 | 79 | // NRF_POWER->SYSTEMOFF=1; |
<> | 149:156823d33999 | 80 | } |