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targets/cmsis/TARGET_STM/TARGET_STM32F1/stm32f1xx_hal_adc_ex.h@0:9b334a45a8ff, 2015-10-01 (annotated)
- Committer:
- bogdanm
- Date:
- Thu Oct 01 15:25:22 2015 +0300
- Revision:
- 0:9b334a45a8ff
- Child:
- 124:6a4a5b7d7324
Initial commit on mbed-dev
Replaces mbed-src (now inactive)
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| bogdanm | 0:9b334a45a8ff | 1 | /** |
| bogdanm | 0:9b334a45a8ff | 2 | ****************************************************************************** |
| bogdanm | 0:9b334a45a8ff | 3 | * @file stm32f1xx_hal_adc_ex.h |
| bogdanm | 0:9b334a45a8ff | 4 | * @author MCD Application Team |
| bogdanm | 0:9b334a45a8ff | 5 | * @version V1.0.0 |
| bogdanm | 0:9b334a45a8ff | 6 | * @date 15-December-2014 |
| bogdanm | 0:9b334a45a8ff | 7 | * @brief Header file of ADC HAL extension module. |
| bogdanm | 0:9b334a45a8ff | 8 | ****************************************************************************** |
| bogdanm | 0:9b334a45a8ff | 9 | * @attention |
| bogdanm | 0:9b334a45a8ff | 10 | * |
| bogdanm | 0:9b334a45a8ff | 11 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
| bogdanm | 0:9b334a45a8ff | 12 | * |
| bogdanm | 0:9b334a45a8ff | 13 | * Redistribution and use in source and binary forms, with or without modification, |
| bogdanm | 0:9b334a45a8ff | 14 | * are permitted provided that the following conditions are met: |
| bogdanm | 0:9b334a45a8ff | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| bogdanm | 0:9b334a45a8ff | 16 | * this list of conditions and the following disclaimer. |
| bogdanm | 0:9b334a45a8ff | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| bogdanm | 0:9b334a45a8ff | 18 | * this list of conditions and the following disclaimer in the documentation |
| bogdanm | 0:9b334a45a8ff | 19 | * and/or other materials provided with the distribution. |
| bogdanm | 0:9b334a45a8ff | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| bogdanm | 0:9b334a45a8ff | 21 | * may be used to endorse or promote products derived from this software |
| bogdanm | 0:9b334a45a8ff | 22 | * without specific prior written permission. |
| bogdanm | 0:9b334a45a8ff | 23 | * |
| bogdanm | 0:9b334a45a8ff | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| bogdanm | 0:9b334a45a8ff | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| bogdanm | 0:9b334a45a8ff | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| bogdanm | 0:9b334a45a8ff | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| bogdanm | 0:9b334a45a8ff | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| bogdanm | 0:9b334a45a8ff | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| bogdanm | 0:9b334a45a8ff | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| bogdanm | 0:9b334a45a8ff | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| bogdanm | 0:9b334a45a8ff | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| bogdanm | 0:9b334a45a8ff | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| bogdanm | 0:9b334a45a8ff | 34 | * |
| bogdanm | 0:9b334a45a8ff | 35 | ****************************************************************************** |
| bogdanm | 0:9b334a45a8ff | 36 | */ |
| bogdanm | 0:9b334a45a8ff | 37 | |
| bogdanm | 0:9b334a45a8ff | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 39 | #ifndef __STM32F1xx_HAL_ADC_EX_H |
| bogdanm | 0:9b334a45a8ff | 40 | #define __STM32F1xx_HAL_ADC_EX_H |
| bogdanm | 0:9b334a45a8ff | 41 | |
| bogdanm | 0:9b334a45a8ff | 42 | #ifdef __cplusplus |
| bogdanm | 0:9b334a45a8ff | 43 | extern "C" { |
| bogdanm | 0:9b334a45a8ff | 44 | #endif |
| bogdanm | 0:9b334a45a8ff | 45 | |
| bogdanm | 0:9b334a45a8ff | 46 | /* Includes ------------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 47 | #include "stm32f1xx_hal_def.h" |
| bogdanm | 0:9b334a45a8ff | 48 | |
| bogdanm | 0:9b334a45a8ff | 49 | /** @addtogroup STM32F1xx_HAL_Driver |
| bogdanm | 0:9b334a45a8ff | 50 | * @{ |
| bogdanm | 0:9b334a45a8ff | 51 | */ |
| bogdanm | 0:9b334a45a8ff | 52 | |
| bogdanm | 0:9b334a45a8ff | 53 | /** @addtogroup ADCEx |
| bogdanm | 0:9b334a45a8ff | 54 | * @{ |
| bogdanm | 0:9b334a45a8ff | 55 | */ |
| bogdanm | 0:9b334a45a8ff | 56 | |
| bogdanm | 0:9b334a45a8ff | 57 | /* Exported types ------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 58 | /** @defgroup ADCEx_Exported_Types ADCEx Exported Types |
| bogdanm | 0:9b334a45a8ff | 59 | * @{ |
| bogdanm | 0:9b334a45a8ff | 60 | */ |
| bogdanm | 0:9b334a45a8ff | 61 | |
| bogdanm | 0:9b334a45a8ff | 62 | /** |
| bogdanm | 0:9b334a45a8ff | 63 | * @brief ADC Configuration injected Channel structure definition |
| bogdanm | 0:9b334a45a8ff | 64 | * @note Parameters of this structure are shared within 2 scopes: |
| bogdanm | 0:9b334a45a8ff | 65 | * - Scope channel: InjectedChannel, InjectedRank, InjectedSamplingTime, InjectedOffset |
| bogdanm | 0:9b334a45a8ff | 66 | * - Scope injected group (affects all channels of injected group): InjectedNbrOfConversion, InjectedDiscontinuousConvMode, |
| bogdanm | 0:9b334a45a8ff | 67 | * AutoInjectedConv, ExternalTrigInjecConvEdge, ExternalTrigInjecConv. |
| bogdanm | 0:9b334a45a8ff | 68 | * @note The setting of these parameters with function HAL_ADCEx_InjectedConfigChannel() is conditioned to ADC state. |
| bogdanm | 0:9b334a45a8ff | 69 | * ADC state can be either: |
| bogdanm | 0:9b334a45a8ff | 70 | * - For all parameters: ADC disabled (this is the only possible ADC state to modify parameter 'ExternalTrigInjecConv') |
| bogdanm | 0:9b334a45a8ff | 71 | * - For all except parameters 'ExternalTrigInjecConv': ADC enabled without conversion on going on injected group. |
| bogdanm | 0:9b334a45a8ff | 72 | */ |
| bogdanm | 0:9b334a45a8ff | 73 | typedef struct |
| bogdanm | 0:9b334a45a8ff | 74 | { |
| bogdanm | 0:9b334a45a8ff | 75 | uint32_t InjectedChannel; /*!< Selection of ADC channel to configure |
| bogdanm | 0:9b334a45a8ff | 76 | This parameter can be a value of @ref ADC_channels |
| bogdanm | 0:9b334a45a8ff | 77 | Note: Depending on devices, some channels may not be available on package pins. Refer to device datasheet for channels availability. |
| bogdanm | 0:9b334a45a8ff | 78 | Note: On STM32F1 devices with several ADC: Only ADC1 can access internal measurement channels (VrefInt/TempSensor) |
| bogdanm | 0:9b334a45a8ff | 79 | Note: On STM32F10xx8 and STM32F10xxB devices: A low-amplitude voltage glitch may be generated (on ADC input 0) on the PA0 pin, when the ADC is converting with injection trigger. |
| bogdanm | 0:9b334a45a8ff | 80 | It is advised to distribute the analog channels so that Channel 0 is configured as an injected channel. |
| bogdanm | 0:9b334a45a8ff | 81 | Refer to errata sheet of these devices for more details. */ |
| bogdanm | 0:9b334a45a8ff | 82 | uint32_t InjectedRank; /*!< Rank in the injected group sequencer |
| bogdanm | 0:9b334a45a8ff | 83 | This parameter must be a value of @ref ADCEx_injected_rank |
| bogdanm | 0:9b334a45a8ff | 84 | Note: In case of need to disable a channel or change order of conversion sequencer, rank containing a previous channel setting can be overwritten by the new channel setting (or parameter number of conversions can be adjusted) */ |
| bogdanm | 0:9b334a45a8ff | 85 | uint32_t InjectedSamplingTime; /*!< Sampling time value to be set for the selected channel. |
| bogdanm | 0:9b334a45a8ff | 86 | Unit: ADC clock cycles |
| bogdanm | 0:9b334a45a8ff | 87 | Conversion time is the addition of sampling time and processing time (12.5 ADC clock cycles at ADC resolution 12 bits). |
| bogdanm | 0:9b334a45a8ff | 88 | This parameter can be a value of @ref ADC_sampling_times |
| bogdanm | 0:9b334a45a8ff | 89 | Caution: This parameter updates the parameter property of the channel, that can be used into regular and/or injected groups. |
| bogdanm | 0:9b334a45a8ff | 90 | If this same channel has been previously configured in the other group (regular/injected), it will be updated to last setting. |
| bogdanm | 0:9b334a45a8ff | 91 | Note: In case of usage of internal measurement channels (VrefInt/TempSensor), |
| bogdanm | 0:9b334a45a8ff | 92 | sampling time constraints must be respected (sampling time can be adjusted in function of ADC clock frequency and sampling time setting) |
| bogdanm | 0:9b334a45a8ff | 93 | Refer to device datasheet for timings values, parameters TS_vrefint, TS_temp (values rough order: 5us to 17.1us min). */ |
| bogdanm | 0:9b334a45a8ff | 94 | uint32_t InjectedOffset; /*!< Defines the offset to be subtracted from the raw converted data (for channels set on injected group only). |
| bogdanm | 0:9b334a45a8ff | 95 | Offset value must be a positive number. |
| bogdanm | 0:9b334a45a8ff | 96 | Depending of ADC resolution selected (12, 10, 8 or 6 bits), |
| bogdanm | 0:9b334a45a8ff | 97 | this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF, 0x3FF, 0xFF or 0x3F respectively. */ |
| bogdanm | 0:9b334a45a8ff | 98 | uint32_t InjectedNbrOfConversion; /*!< Specifies the number of ranks that will be converted within the injected group sequencer. |
| bogdanm | 0:9b334a45a8ff | 99 | To use the injected group sequencer and convert several ranks, parameter 'ScanConvMode' must be enabled. |
| bogdanm | 0:9b334a45a8ff | 100 | This parameter must be a number between Min_Data = 1 and Max_Data = 4. |
| bogdanm | 0:9b334a45a8ff | 101 | Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to |
| bogdanm | 0:9b334a45a8ff | 102 | configure a channel on injected group can impact the configuration of other channels previously set. */ |
| bogdanm | 0:9b334a45a8ff | 103 | uint32_t InjectedDiscontinuousConvMode; /*!< Specifies whether the conversions sequence of injected group is performed in Complete-sequence/Discontinuous-sequence (main sequence subdivided in successive parts). |
| bogdanm | 0:9b334a45a8ff | 104 | Discontinuous mode is used only if sequencer is enabled (parameter 'ScanConvMode'). If sequencer is disabled, this parameter is discarded. |
| bogdanm | 0:9b334a45a8ff | 105 | Discontinuous mode can be enabled only if continuous mode is disabled. If continuous mode is enabled, this parameter setting is discarded. |
| bogdanm | 0:9b334a45a8ff | 106 | This parameter can be set to ENABLE or DISABLE. |
| bogdanm | 0:9b334a45a8ff | 107 | Note: For injected group, number of discontinuous ranks increment is fixed to one-by-one. |
| bogdanm | 0:9b334a45a8ff | 108 | Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to |
| bogdanm | 0:9b334a45a8ff | 109 | configure a channel on injected group can impact the configuration of other channels previously set. */ |
| bogdanm | 0:9b334a45a8ff | 110 | uint32_t AutoInjectedConv; /*!< Enables or disables the selected ADC automatic injected group conversion after regular one |
| bogdanm | 0:9b334a45a8ff | 111 | This parameter can be set to ENABLE or DISABLE. |
| bogdanm | 0:9b334a45a8ff | 112 | Note: To use Automatic injected conversion, discontinuous mode must be disabled ('DiscontinuousConvMode' and 'InjectedDiscontinuousConvMode' set to DISABLE) |
| bogdanm | 0:9b334a45a8ff | 113 | Note: To use Automatic injected conversion, injected group external triggers must be disabled ('ExternalTrigInjecConv' set to ADC_SOFTWARE_START) |
| bogdanm | 0:9b334a45a8ff | 114 | Note: In case of DMA used with regular group: if DMA configured in normal mode (single shot) JAUTO will be stopped upon DMA transfer complete. |
| bogdanm | 0:9b334a45a8ff | 115 | To maintain JAUTO always enabled, DMA must be configured in circular mode. |
| bogdanm | 0:9b334a45a8ff | 116 | Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to |
| bogdanm | 0:9b334a45a8ff | 117 | configure a channel on injected group can impact the configuration of other channels previously set. */ |
| bogdanm | 0:9b334a45a8ff | 118 | uint32_t ExternalTrigInjecConv; /*!< Selects the external event used to trigger the conversion start of injected group. |
| bogdanm | 0:9b334a45a8ff | 119 | If set to ADC_INJECTED_SOFTWARE_START, external triggers are disabled. |
| bogdanm | 0:9b334a45a8ff | 120 | If set to external trigger source, triggering is on event rising edge. |
| bogdanm | 0:9b334a45a8ff | 121 | This parameter can be a value of @ref ADCEx_External_trigger_source_Injected |
| bogdanm | 0:9b334a45a8ff | 122 | Note: This parameter must be modified when ADC is disabled (before ADC start conversion or after ADC stop conversion). |
| bogdanm | 0:9b334a45a8ff | 123 | If ADC is enabled, this parameter setting is bypassed without error reporting (as it can be the expected behaviour in case of another parameter update on the fly) |
| bogdanm | 0:9b334a45a8ff | 124 | Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to |
| bogdanm | 0:9b334a45a8ff | 125 | configure a channel on injected group can impact the configuration of other channels previously set. */ |
| bogdanm | 0:9b334a45a8ff | 126 | }ADC_InjectionConfTypeDef; |
| bogdanm | 0:9b334a45a8ff | 127 | |
| bogdanm | 0:9b334a45a8ff | 128 | #if defined (STM32F101xG) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG) |
| bogdanm | 0:9b334a45a8ff | 129 | /** |
| bogdanm | 0:9b334a45a8ff | 130 | * @brief Structure definition of ADC multimode |
| bogdanm | 0:9b334a45a8ff | 131 | * @note The setting of these parameters with function HAL_ADCEx_MultiModeConfigChannel() is conditioned to ADCs state (both ADCs of the common group). |
| bogdanm | 0:9b334a45a8ff | 132 | * State of ADCs of the common group must be: disabled. |
| bogdanm | 0:9b334a45a8ff | 133 | */ |
| bogdanm | 0:9b334a45a8ff | 134 | typedef struct |
| bogdanm | 0:9b334a45a8ff | 135 | { |
| bogdanm | 0:9b334a45a8ff | 136 | uint32_t Mode; /*!< Configures the ADC to operate in independent or multi mode. |
| bogdanm | 0:9b334a45a8ff | 137 | This parameter can be a value of @ref ADCEx_Common_mode |
| bogdanm | 0:9b334a45a8ff | 138 | Note: In dual mode, a change of channel configuration generates a restart that can produce a loss of synchronization. It is recommended to disable dual mode before any configuration change. |
| bogdanm | 0:9b334a45a8ff | 139 | Note: In case of simultaneous mode used: Exactly the same sampling time should be configured for the 2 channels that will be sampled simultaneously by ACD1 and ADC2. |
| bogdanm | 0:9b334a45a8ff | 140 | Note: In case of interleaved mode used: To avoid overlap between conversions, maximum sampling time allowed is 7 ADC clock cycles for fast interleaved mode and 14 ADC clock cycles for slow interleaved mode. |
| bogdanm | 0:9b334a45a8ff | 141 | Note: Some multimode parameters are fixed on STM32F1 and can be configured on other STM32 devices with several ADC (multimode configuration structure can have additional parameters). |
| bogdanm | 0:9b334a45a8ff | 142 | The equivalences are: |
| bogdanm | 0:9b334a45a8ff | 143 | - Parameter 'DMAAccessMode': On STM32F1, this parameter is fixed to 1 DMA channel (one DMA channel for both ADC, DMA of ADC master). On other STM32 devices with several ADC, this is equivalent to parameter 'ADC_DMAACCESSMODE_12_10_BITS'. |
| bogdanm | 0:9b334a45a8ff | 144 | - Parameter 'TwoSamplingDelay': On STM32F1, this parameter is fixed to 7 or 14 ADC clock cycles depending on fast or slow interleaved mode selected. On other STM32 devices with several ADC, this is equivalent to parameter 'ADC_TWOSAMPLINGDELAY_7CYCLES' (for fast interleaved mode). */ |
| bogdanm | 0:9b334a45a8ff | 145 | |
| bogdanm | 0:9b334a45a8ff | 146 | |
| bogdanm | 0:9b334a45a8ff | 147 | }ADC_MultiModeTypeDef; |
| bogdanm | 0:9b334a45a8ff | 148 | #endif /* STM32F101xG || defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */ |
| bogdanm | 0:9b334a45a8ff | 149 | |
| bogdanm | 0:9b334a45a8ff | 150 | /** |
| bogdanm | 0:9b334a45a8ff | 151 | * @} |
| bogdanm | 0:9b334a45a8ff | 152 | */ |
| bogdanm | 0:9b334a45a8ff | 153 | |
| bogdanm | 0:9b334a45a8ff | 154 | |
| bogdanm | 0:9b334a45a8ff | 155 | /* Exported constants --------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 156 | |
| bogdanm | 0:9b334a45a8ff | 157 | /** @defgroup ADCEx_Exported_Constants ADCEx Exported Constants |
| bogdanm | 0:9b334a45a8ff | 158 | * @{ |
| bogdanm | 0:9b334a45a8ff | 159 | */ |
| bogdanm | 0:9b334a45a8ff | 160 | |
| bogdanm | 0:9b334a45a8ff | 161 | /** @defgroup ADCEx_injected_rank ADCEx rank into injected group |
| bogdanm | 0:9b334a45a8ff | 162 | * @{ |
| bogdanm | 0:9b334a45a8ff | 163 | */ |
| bogdanm | 0:9b334a45a8ff | 164 | #define ADC_INJECTED_RANK_1 ((uint32_t)0x00000001) |
| bogdanm | 0:9b334a45a8ff | 165 | #define ADC_INJECTED_RANK_2 ((uint32_t)0x00000002) |
| bogdanm | 0:9b334a45a8ff | 166 | #define ADC_INJECTED_RANK_3 ((uint32_t)0x00000003) |
| bogdanm | 0:9b334a45a8ff | 167 | #define ADC_INJECTED_RANK_4 ((uint32_t)0x00000004) |
| bogdanm | 0:9b334a45a8ff | 168 | /** |
| bogdanm | 0:9b334a45a8ff | 169 | * @} |
| bogdanm | 0:9b334a45a8ff | 170 | */ |
| bogdanm | 0:9b334a45a8ff | 171 | |
| bogdanm | 0:9b334a45a8ff | 172 | /** @defgroup ADCEx_External_trigger_edge_Injected ADCEx external trigger enable for injected group |
| bogdanm | 0:9b334a45a8ff | 173 | * @{ |
| bogdanm | 0:9b334a45a8ff | 174 | */ |
| bogdanm | 0:9b334a45a8ff | 175 | #define ADC_EXTERNALTRIGINJECCONV_EDGE_NONE ((uint32_t)0x00000000) |
| bogdanm | 0:9b334a45a8ff | 176 | #define ADC_EXTERNALTRIGINJECCONV_EDGE_RISING ((uint32_t)ADC_CR2_JEXTTRIG) |
| bogdanm | 0:9b334a45a8ff | 177 | /** |
| bogdanm | 0:9b334a45a8ff | 178 | * @} |
| bogdanm | 0:9b334a45a8ff | 179 | */ |
| bogdanm | 0:9b334a45a8ff | 180 | |
| bogdanm | 0:9b334a45a8ff | 181 | /** @defgroup ADC_External_trigger_source_Regular ADC External trigger selection for regular group |
| bogdanm | 0:9b334a45a8ff | 182 | * @{ |
| bogdanm | 0:9b334a45a8ff | 183 | */ |
| bogdanm | 0:9b334a45a8ff | 184 | /*!< List of external triggers with generic trigger name, independently of */ |
| bogdanm | 0:9b334a45a8ff | 185 | /* ADC target, sorted by trigger name: */ |
| bogdanm | 0:9b334a45a8ff | 186 | |
| bogdanm | 0:9b334a45a8ff | 187 | /*!< External triggers of regular group for ADC1&ADC2 only */ |
| bogdanm | 0:9b334a45a8ff | 188 | #define ADC_EXTERNALTRIGCONV_T1_CC1 ADC1_2_EXTERNALTRIG_T1_CC1 |
| bogdanm | 0:9b334a45a8ff | 189 | #define ADC_EXTERNALTRIGCONV_T1_CC2 ADC1_2_EXTERNALTRIG_T1_CC2 |
| bogdanm | 0:9b334a45a8ff | 190 | #define ADC_EXTERNALTRIGCONV_T2_CC2 ADC1_2_EXTERNALTRIG_T2_CC2 |
| bogdanm | 0:9b334a45a8ff | 191 | #define ADC_EXTERNALTRIGCONV_T3_TRGO ADC1_2_EXTERNALTRIG_T3_TRGO |
| bogdanm | 0:9b334a45a8ff | 192 | #define ADC_EXTERNALTRIGCONV_T4_CC4 ADC1_2_EXTERNALTRIG_T4_CC4 |
| bogdanm | 0:9b334a45a8ff | 193 | #define ADC_EXTERNALTRIGCONV_EXT_IT11 ADC1_2_EXTERNALTRIG_EXT_IT11 |
| bogdanm | 0:9b334a45a8ff | 194 | |
| bogdanm | 0:9b334a45a8ff | 195 | #if defined (STM32F103xE) || defined (STM32F103xG) |
| bogdanm | 0:9b334a45a8ff | 196 | /*!< External triggers of regular group for ADC3 only */ |
| bogdanm | 0:9b334a45a8ff | 197 | #define ADC_EXTERNALTRIGCONV_T2_CC3 ADC3_EXTERNALTRIG_T2_CC3 |
| bogdanm | 0:9b334a45a8ff | 198 | #define ADC_EXTERNALTRIGCONV_T3_CC1 ADC3_EXTERNALTRIG_T3_CC1 |
| bogdanm | 0:9b334a45a8ff | 199 | #define ADC_EXTERNALTRIGCONV_T5_CC1 ADC3_EXTERNALTRIG_T5_CC1 |
| bogdanm | 0:9b334a45a8ff | 200 | #define ADC_EXTERNALTRIGCONV_T5_CC3 ADC3_EXTERNALTRIG_T5_CC3 |
| bogdanm | 0:9b334a45a8ff | 201 | #define ADC_EXTERNALTRIGCONV_T8_CC1 ADC3_EXTERNALTRIG_T8_CC1 |
| bogdanm | 0:9b334a45a8ff | 202 | #endif /* STM32F103xE || defined STM32F103xG */ |
| bogdanm | 0:9b334a45a8ff | 203 | |
| bogdanm | 0:9b334a45a8ff | 204 | /*!< External triggers of regular group for all ADC instances */ |
| bogdanm | 0:9b334a45a8ff | 205 | #define ADC_EXTERNALTRIGCONV_T1_CC3 ADC1_2_3_EXTERNALTRIG_T1_CC3 |
| bogdanm | 0:9b334a45a8ff | 206 | |
| bogdanm | 0:9b334a45a8ff | 207 | #if defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC) |
| bogdanm | 0:9b334a45a8ff | 208 | /*!< Note: TIM8_TRGO is available on ADC1 and ADC2 only in high-density and */ |
| bogdanm | 0:9b334a45a8ff | 209 | /* XL-density devices. */ |
| bogdanm | 0:9b334a45a8ff | 210 | /* To use it on ADC or ADC2, a rempap of trigger must be done from */ |
| bogdanm | 0:9b334a45a8ff | 211 | /* EXTI line 11 to TIM8_TRGO with macro: */ |
| bogdanm | 0:9b334a45a8ff | 212 | /* __HAL_AFIO_REMAP_ADC1_ETRGREG_ENABLE() */ |
| bogdanm | 0:9b334a45a8ff | 213 | /* __HAL_AFIO_REMAP_ADC2_ETRGREG_ENABLE() */ |
| bogdanm | 0:9b334a45a8ff | 214 | |
| bogdanm | 0:9b334a45a8ff | 215 | /* Note for internal constant value management: If TIM8_TRGO is available, */ |
| bogdanm | 0:9b334a45a8ff | 216 | /* its definition is set to value for ADC1&ADC2 by default and changed to */ |
| bogdanm | 0:9b334a45a8ff | 217 | /* value for ADC3 by HAL ADC driver if ADC3 is selected. */ |
| bogdanm | 0:9b334a45a8ff | 218 | #define ADC_EXTERNALTRIGCONV_T8_TRGO ADC1_2_EXTERNALTRIG_T8_TRGO |
| bogdanm | 0:9b334a45a8ff | 219 | #endif /* STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */ |
| bogdanm | 0:9b334a45a8ff | 220 | |
| bogdanm | 0:9b334a45a8ff | 221 | #define ADC_SOFTWARE_START ADC1_2_3_SWSTART |
| bogdanm | 0:9b334a45a8ff | 222 | /** |
| bogdanm | 0:9b334a45a8ff | 223 | * @} |
| bogdanm | 0:9b334a45a8ff | 224 | */ |
| bogdanm | 0:9b334a45a8ff | 225 | |
| bogdanm | 0:9b334a45a8ff | 226 | /** @defgroup ADCEx_External_trigger_source_Injected ADCEx External trigger selection for injected group |
| bogdanm | 0:9b334a45a8ff | 227 | * @{ |
| bogdanm | 0:9b334a45a8ff | 228 | */ |
| bogdanm | 0:9b334a45a8ff | 229 | /*!< List of external triggers with generic trigger name, independently of */ |
| bogdanm | 0:9b334a45a8ff | 230 | /* ADC target, sorted by trigger name: */ |
| bogdanm | 0:9b334a45a8ff | 231 | |
| bogdanm | 0:9b334a45a8ff | 232 | /*!< External triggers of injected group for ADC1&ADC2 only */ |
| bogdanm | 0:9b334a45a8ff | 233 | #define ADC_EXTERNALTRIGINJECCONV_T2_TRGO ADC1_2_EXTERNALTRIGINJEC_T2_TRGO |
| bogdanm | 0:9b334a45a8ff | 234 | #define ADC_EXTERNALTRIGINJECCONV_T2_CC1 ADC1_2_EXTERNALTRIGINJEC_T2_CC1 |
| bogdanm | 0:9b334a45a8ff | 235 | #define ADC_EXTERNALTRIGINJECCONV_T3_CC4 ADC1_2_EXTERNALTRIGINJEC_T3_CC4 |
| bogdanm | 0:9b334a45a8ff | 236 | #define ADC_EXTERNALTRIGINJECCONV_T4_TRGO ADC1_2_EXTERNALTRIGINJEC_T4_TRGO |
| bogdanm | 0:9b334a45a8ff | 237 | #define ADC_EXTERNALTRIGINJECCONV_EXT_IT15 ADC1_2_EXTERNALTRIGINJEC_EXT_IT15 |
| bogdanm | 0:9b334a45a8ff | 238 | |
| bogdanm | 0:9b334a45a8ff | 239 | #if defined (STM32F103xE) || defined (STM32F103xG) |
| bogdanm | 0:9b334a45a8ff | 240 | /*!< External triggers of injected group for ADC3 only */ |
| bogdanm | 0:9b334a45a8ff | 241 | #define ADC_EXTERNALTRIGINJECCONV_T4_CC3 ADC3_EXTERNALTRIGINJEC_T4_CC3 |
| bogdanm | 0:9b334a45a8ff | 242 | #define ADC_EXTERNALTRIGINJECCONV_T8_CC2 ADC3_EXTERNALTRIGINJEC_T8_CC2 |
| bogdanm | 0:9b334a45a8ff | 243 | #define ADC_EXTERNALTRIGINJECCONV_T5_TRGO ADC3_EXTERNALTRIGINJEC_T5_TRGO |
| bogdanm | 0:9b334a45a8ff | 244 | #define ADC_EXTERNALTRIGINJECCONV_T5_CC4 ADC3_EXTERNALTRIGINJEC_T5_CC4 |
| bogdanm | 0:9b334a45a8ff | 245 | #endif /* STM32F103xE || defined STM32F103xG */ |
| bogdanm | 0:9b334a45a8ff | 246 | |
| bogdanm | 0:9b334a45a8ff | 247 | /*!< External triggers of injected group for all ADC instances */ |
| bogdanm | 0:9b334a45a8ff | 248 | #define ADC_EXTERNALTRIGINJECCONV_T1_CC4 ADC1_2_3_EXTERNALTRIGINJEC_T1_CC4 |
| bogdanm | 0:9b334a45a8ff | 249 | #define ADC_EXTERNALTRIGINJECCONV_T1_TRGO ADC1_2_3_EXTERNALTRIGINJEC_T1_TRGO |
| bogdanm | 0:9b334a45a8ff | 250 | |
| bogdanm | 0:9b334a45a8ff | 251 | #if defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC) |
| bogdanm | 0:9b334a45a8ff | 252 | /*!< Note: TIM8_CC4 is available on ADC1 and ADC2 only in high-density and */ |
| bogdanm | 0:9b334a45a8ff | 253 | /* XL-density devices. */ |
| bogdanm | 0:9b334a45a8ff | 254 | /* To use it on ADC or ADC2, a rempap of trigger must be done from */ |
| bogdanm | 0:9b334a45a8ff | 255 | /* EXTI line 11 to TIM8_TRGO with macro: */ |
| bogdanm | 0:9b334a45a8ff | 256 | /* __HAL_AFIO_REMAP_ADC1_ETRGINJ_ENABLE() */ |
| bogdanm | 0:9b334a45a8ff | 257 | /* __HAL_AFIO_REMAP_ADC2_ETRGINJ_ENABLE() */ |
| bogdanm | 0:9b334a45a8ff | 258 | |
| bogdanm | 0:9b334a45a8ff | 259 | /* Note for internal constant value management: If TIM8_CC4 is available, */ |
| bogdanm | 0:9b334a45a8ff | 260 | /* its definition is set to value for ADC1&ADC2 by default and changed to */ |
| bogdanm | 0:9b334a45a8ff | 261 | /* value for ADC3 by HAL ADC driver if ADC3 is selected. */ |
| bogdanm | 0:9b334a45a8ff | 262 | #define ADC_EXTERNALTRIGINJECCONV_T8_CC4 ADC1_2_EXTERNALTRIGINJEC_T8_CC4 |
| bogdanm | 0:9b334a45a8ff | 263 | #endif /* STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */ |
| bogdanm | 0:9b334a45a8ff | 264 | |
| bogdanm | 0:9b334a45a8ff | 265 | #define ADC_INJECTED_SOFTWARE_START ADC1_2_3_JSWSTART |
| bogdanm | 0:9b334a45a8ff | 266 | /** |
| bogdanm | 0:9b334a45a8ff | 267 | * @} |
| bogdanm | 0:9b334a45a8ff | 268 | */ |
| bogdanm | 0:9b334a45a8ff | 269 | |
| bogdanm | 0:9b334a45a8ff | 270 | #if defined (STM32F101xG) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG) |
| bogdanm | 0:9b334a45a8ff | 271 | /** @defgroup ADCEx_Common_mode ADC Extended Dual ADC Mode |
| bogdanm | 0:9b334a45a8ff | 272 | * @{ |
| bogdanm | 0:9b334a45a8ff | 273 | */ |
| bogdanm | 0:9b334a45a8ff | 274 | #define ADC_MODE_INDEPENDENT ((uint32_t)(0x00000000)) /*!< ADC dual mode disabled (ADC independent mode) */ |
| bogdanm | 0:9b334a45a8ff | 275 | #define ADC_DUALMODE_REGSIMULT_INJECSIMULT ((uint32_t)( ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Combined regular simultaneous + injected simultaneous mode */ |
| bogdanm | 0:9b334a45a8ff | 276 | #define ADC_DUALMODE_REGSIMULT_ALTERTRIG ((uint32_t)( ADC_CR1_DUALMOD_1 )) /*!< ADC dual mode enabled: Combined regular simultaneous + alternate trigger mode */ |
| bogdanm | 0:9b334a45a8ff | 277 | #define ADC_DUALMODE_INJECSIMULT_INTERLFAST ((uint32_t)( ADC_CR1_DUALMOD_1 | ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Combined injected simultaneous + fast interleaved mode (delay between ADC sampling phases: 7 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */ |
| bogdanm | 0:9b334a45a8ff | 278 | #define ADC_DUALMODE_INJECSIMULT_INTERLSLOW ((uint32_t)( ADC_CR1_DUALMOD_2 )) /*!< ADC dual mode enabled: Combined injected simultaneous + slow Interleaved mode (delay between ADC sampling phases: 14 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */ |
| bogdanm | 0:9b334a45a8ff | 279 | #define ADC_DUALMODE_INJECSIMULT ((uint32_t)( ADC_CR1_DUALMOD_2 | ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Injected simultaneous mode only */ |
| bogdanm | 0:9b334a45a8ff | 280 | #define ADC_DUALMODE_REGSIMULT ((uint32_t)( ADC_CR1_DUALMOD_2 | ADC_CR1_DUALMOD_1 )) /*!< ADC dual mode enabled: Regular simultaneous mode only */ |
| bogdanm | 0:9b334a45a8ff | 281 | #define ADC_DUALMODE_INTERLFAST ((uint32_t)( ADC_CR1_DUALMOD_2 | ADC_CR1_DUALMOD_1 | ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Fast interleaved mode only (delay between ADC sampling phases: 7 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */ |
| bogdanm | 0:9b334a45a8ff | 282 | #define ADC_DUALMODE_INTERLSLOW ((uint32_t)(ADC_CR1_DUALMOD_3 )) /*!< ADC dual mode enabled: Slow interleaved mode only (delay between ADC sampling phases: 14 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */ |
| bogdanm | 0:9b334a45a8ff | 283 | #define ADC_DUALMODE_ALTERTRIG ((uint32_t)(ADC_CR1_DUALMOD_3 | ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Alternate trigger mode only */ |
| bogdanm | 0:9b334a45a8ff | 284 | /** |
| bogdanm | 0:9b334a45a8ff | 285 | * @} |
| bogdanm | 0:9b334a45a8ff | 286 | */ |
| bogdanm | 0:9b334a45a8ff | 287 | #endif /* STM32F101xG || defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */ |
| bogdanm | 0:9b334a45a8ff | 288 | |
| bogdanm | 0:9b334a45a8ff | 289 | /** |
| bogdanm | 0:9b334a45a8ff | 290 | * @} |
| bogdanm | 0:9b334a45a8ff | 291 | */ |
| bogdanm | 0:9b334a45a8ff | 292 | |
| bogdanm | 0:9b334a45a8ff | 293 | |
| bogdanm | 0:9b334a45a8ff | 294 | /* Private constants ---------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 295 | |
| bogdanm | 0:9b334a45a8ff | 296 | /** @addtogroup ADCEx_Private_Constants ADCEx Private Constants |
| bogdanm | 0:9b334a45a8ff | 297 | * @{ |
| bogdanm | 0:9b334a45a8ff | 298 | */ |
| bogdanm | 0:9b334a45a8ff | 299 | |
| bogdanm | 0:9b334a45a8ff | 300 | /** @defgroup ADCEx_Internal_HAL_driver_Ext_trig_src_Regular ADC Extended Internal HAL driver trigger selection for regular group |
| bogdanm | 0:9b334a45a8ff | 301 | * @{ |
| bogdanm | 0:9b334a45a8ff | 302 | */ |
| bogdanm | 0:9b334a45a8ff | 303 | /* List of external triggers of regular group for ADC1, ADC2, ADC3 (if ADC */ |
| bogdanm | 0:9b334a45a8ff | 304 | /* instance is availble on the selected device). */ |
| bogdanm | 0:9b334a45a8ff | 305 | /* (used internally by HAL driver. To not use into HAL structure parameters) */ |
| bogdanm | 0:9b334a45a8ff | 306 | |
| bogdanm | 0:9b334a45a8ff | 307 | /* External triggers of regular group for ADC1&ADC2 (if ADCx available) */ |
| bogdanm | 0:9b334a45a8ff | 308 | #define ADC1_2_EXTERNALTRIG_T1_CC1 ((uint32_t) 0x00000000) |
| bogdanm | 0:9b334a45a8ff | 309 | #define ADC1_2_EXTERNALTRIG_T1_CC2 ((uint32_t)( ADC_CR2_EXTSEL_0)) |
| bogdanm | 0:9b334a45a8ff | 310 | #define ADC1_2_EXTERNALTRIG_T2_CC2 ((uint32_t)( ADC_CR2_EXTSEL_1 | ADC_CR2_EXTSEL_0)) |
| bogdanm | 0:9b334a45a8ff | 311 | #define ADC1_2_EXTERNALTRIG_T3_TRGO ((uint32_t)(ADC_CR2_EXTSEL_2 )) |
| bogdanm | 0:9b334a45a8ff | 312 | #define ADC1_2_EXTERNALTRIG_T4_CC4 ((uint32_t)(ADC_CR2_EXTSEL_2 | ADC_CR2_EXTSEL_0)) |
| bogdanm | 0:9b334a45a8ff | 313 | #define ADC1_2_EXTERNALTRIG_EXT_IT11 ((uint32_t)(ADC_CR2_EXTSEL_2 | ADC_CR2_EXTSEL_1 )) |
| bogdanm | 0:9b334a45a8ff | 314 | #if defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || defined (STM32F103xG) |
| bogdanm | 0:9b334a45a8ff | 315 | /* Note: TIM8_TRGO is available on ADC1 and ADC2 only in high-density and */ |
| bogdanm | 0:9b334a45a8ff | 316 | /* XL-density devices. */ |
| bogdanm | 0:9b334a45a8ff | 317 | #define ADC1_2_EXTERNALTRIG_T8_TRGO ADC1_2_EXTERNALTRIG_EXT_IT11 |
| bogdanm | 0:9b334a45a8ff | 318 | #endif |
| bogdanm | 0:9b334a45a8ff | 319 | |
| bogdanm | 0:9b334a45a8ff | 320 | #if defined (STM32F103xE) || defined (STM32F103xG) |
| bogdanm | 0:9b334a45a8ff | 321 | /* External triggers of regular group for ADC3 */ |
| bogdanm | 0:9b334a45a8ff | 322 | #define ADC3_EXTERNALTRIG_T3_CC1 ADC1_2_EXTERNALTRIG_T1_CC1 |
| bogdanm | 0:9b334a45a8ff | 323 | #define ADC3_EXTERNALTRIG_T2_CC3 ADC1_2_EXTERNALTRIG_T1_CC2 |
| bogdanm | 0:9b334a45a8ff | 324 | #define ADC3_EXTERNALTRIG_T8_CC1 ADC1_2_EXTERNALTRIG_T2_CC2 |
| bogdanm | 0:9b334a45a8ff | 325 | #define ADC3_EXTERNALTRIG_T8_TRGO ADC1_2_EXTERNALTRIG_T3_TRGO |
| bogdanm | 0:9b334a45a8ff | 326 | #define ADC3_EXTERNALTRIG_T5_CC1 ADC1_2_EXTERNALTRIG_T4_CC4 |
| bogdanm | 0:9b334a45a8ff | 327 | #define ADC3_EXTERNALTRIG_T5_CC3 ADC1_2_EXTERNALTRIG_EXT_IT11 |
| bogdanm | 0:9b334a45a8ff | 328 | #endif |
| bogdanm | 0:9b334a45a8ff | 329 | |
| bogdanm | 0:9b334a45a8ff | 330 | /* External triggers of regular group for ADC1&ADC2&ADC3 (if ADCx available) */ |
| bogdanm | 0:9b334a45a8ff | 331 | #define ADC1_2_3_EXTERNALTRIG_T1_CC3 ((uint32_t)( ADC_CR2_EXTSEL_1 )) |
| bogdanm | 0:9b334a45a8ff | 332 | #define ADC1_2_3_SWSTART ((uint32_t)(ADC_CR2_EXTSEL_2 | ADC_CR2_EXTSEL_1 | ADC_CR2_EXTSEL_0)) |
| bogdanm | 0:9b334a45a8ff | 333 | /** |
| bogdanm | 0:9b334a45a8ff | 334 | * @} |
| bogdanm | 0:9b334a45a8ff | 335 | */ |
| bogdanm | 0:9b334a45a8ff | 336 | |
| bogdanm | 0:9b334a45a8ff | 337 | /** @defgroup ADCEx_Internal_HAL_driver_Ext_trig_src_Injected ADC Extended Internal HAL driver trigger selection for injected group |
| bogdanm | 0:9b334a45a8ff | 338 | * @{ |
| bogdanm | 0:9b334a45a8ff | 339 | */ |
| bogdanm | 0:9b334a45a8ff | 340 | /* List of external triggers of injected group for ADC1, ADC2, ADC3 (if ADC */ |
| bogdanm | 0:9b334a45a8ff | 341 | /* instance is availble on the selected device). */ |
| bogdanm | 0:9b334a45a8ff | 342 | /* (used internally by HAL driver. To not use into HAL structure parameters) */ |
| bogdanm | 0:9b334a45a8ff | 343 | |
| bogdanm | 0:9b334a45a8ff | 344 | /* External triggers of injected group for ADC1&ADC2 (if ADCx available) */ |
| bogdanm | 0:9b334a45a8ff | 345 | #define ADC1_2_EXTERNALTRIGINJEC_T2_TRGO ((uint32_t)( ADC_CR2_JEXTSEL_1 )) |
| bogdanm | 0:9b334a45a8ff | 346 | #define ADC1_2_EXTERNALTRIGINJEC_T2_CC1 ((uint32_t)( ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0)) |
| bogdanm | 0:9b334a45a8ff | 347 | #define ADC1_2_EXTERNALTRIGINJEC_T3_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_2 )) |
| bogdanm | 0:9b334a45a8ff | 348 | #define ADC1_2_EXTERNALTRIGINJEC_T4_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_0)) |
| bogdanm | 0:9b334a45a8ff | 349 | #define ADC1_2_EXTERNALTRIGINJEC_EXT_IT15 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1 )) |
| bogdanm | 0:9b334a45a8ff | 350 | #if defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || defined (STM32F103xG) |
| bogdanm | 0:9b334a45a8ff | 351 | /* Note: TIM8_CC4 is available on ADC1 and ADC2 only in high-density and */ |
| bogdanm | 0:9b334a45a8ff | 352 | /* XL-density devices. */ |
| bogdanm | 0:9b334a45a8ff | 353 | #define ADC1_2_EXTERNALTRIGINJEC_T8_CC4 ADC1_2_EXTERNALTRIGINJEC_EXT_IT15 |
| bogdanm | 0:9b334a45a8ff | 354 | #endif |
| bogdanm | 0:9b334a45a8ff | 355 | |
| bogdanm | 0:9b334a45a8ff | 356 | #if defined (STM32F103xE) || defined (STM32F103xG) |
| bogdanm | 0:9b334a45a8ff | 357 | /* External triggers of injected group for ADC3 */ |
| bogdanm | 0:9b334a45a8ff | 358 | #define ADC3_EXTERNALTRIGINJEC_T4_CC3 ADC1_2_EXTERNALTRIGINJEC_T2_TRGO |
| bogdanm | 0:9b334a45a8ff | 359 | #define ADC3_EXTERNALTRIGINJEC_T8_CC2 ADC1_2_EXTERNALTRIGINJEC_T2_CC1 |
| bogdanm | 0:9b334a45a8ff | 360 | #define ADC3_EXTERNALTRIGINJEC_T8_CC4 ADC1_2_EXTERNALTRIGINJEC_T3_CC4 |
| bogdanm | 0:9b334a45a8ff | 361 | #define ADC3_EXTERNALTRIGINJEC_T5_TRGO ADC1_2_EXTERNALTRIGINJEC_T4_TRGO |
| bogdanm | 0:9b334a45a8ff | 362 | #define ADC3_EXTERNALTRIGINJEC_T5_CC4 ADC1_2_EXTERNALTRIGINJEC_EXT_IT15 |
| bogdanm | 0:9b334a45a8ff | 363 | #endif /* STM32F103xE || defined STM32F103xG */ |
| bogdanm | 0:9b334a45a8ff | 364 | |
| bogdanm | 0:9b334a45a8ff | 365 | /* External triggers of injected group for ADC1&ADC2&ADC3 (if ADCx available) */ |
| bogdanm | 0:9b334a45a8ff | 366 | #define ADC1_2_3_EXTERNALTRIGINJEC_T1_TRGO ((uint32_t) 0x00000000) |
| bogdanm | 0:9b334a45a8ff | 367 | #define ADC1_2_3_EXTERNALTRIGINJEC_T1_CC4 ((uint32_t)( ADC_CR2_JEXTSEL_0)) |
| bogdanm | 0:9b334a45a8ff | 368 | #define ADC1_2_3_JSWSTART ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0)) |
| bogdanm | 0:9b334a45a8ff | 369 | /** |
| bogdanm | 0:9b334a45a8ff | 370 | * @} |
| bogdanm | 0:9b334a45a8ff | 371 | */ |
| bogdanm | 0:9b334a45a8ff | 372 | |
| bogdanm | 0:9b334a45a8ff | 373 | /** |
| bogdanm | 0:9b334a45a8ff | 374 | * @} |
| bogdanm | 0:9b334a45a8ff | 375 | */ |
| bogdanm | 0:9b334a45a8ff | 376 | |
| bogdanm | 0:9b334a45a8ff | 377 | |
| bogdanm | 0:9b334a45a8ff | 378 | /* Exported macro ------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 379 | |
| bogdanm | 0:9b334a45a8ff | 380 | /* Private macro -------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 381 | |
| bogdanm | 0:9b334a45a8ff | 382 | /** @defgroup ADCEx_Private_Macro ADCEx Private Macro |
| bogdanm | 0:9b334a45a8ff | 383 | * @{ |
| bogdanm | 0:9b334a45a8ff | 384 | */ |
| bogdanm | 0:9b334a45a8ff | 385 | /* Macro reserved for internal HAL driver usage, not intended to be used in */ |
| bogdanm | 0:9b334a45a8ff | 386 | /* code of final user. */ |
| bogdanm | 0:9b334a45a8ff | 387 | |
| bogdanm | 0:9b334a45a8ff | 388 | |
| bogdanm | 0:9b334a45a8ff | 389 | /** |
| bogdanm | 0:9b334a45a8ff | 390 | * @brief For devices with 3 ADCs: Defines the external trigger source |
| bogdanm | 0:9b334a45a8ff | 391 | * for regular group according to ADC into common group ADC1&ADC2 or |
| bogdanm | 0:9b334a45a8ff | 392 | * ADC3 (some triggers with same source have different value to |
| bogdanm | 0:9b334a45a8ff | 393 | * be programmed into ADC EXTSEL bits of CR2 register). |
| bogdanm | 0:9b334a45a8ff | 394 | * For devices with 2 ADCs or less: this macro makes no change. |
| bogdanm | 0:9b334a45a8ff | 395 | * @param __HANDLE__: ADC handle |
| bogdanm | 0:9b334a45a8ff | 396 | * @param __EXT_TRIG_CONV__: External trigger selected for regular group. |
| bogdanm | 0:9b334a45a8ff | 397 | * @retval External trigger to be programmed into EXTSEL bits of CR2 register |
| bogdanm | 0:9b334a45a8ff | 398 | */ |
| bogdanm | 0:9b334a45a8ff | 399 | #if defined (STM32F103xE) || defined (STM32F103xG) |
| bogdanm | 0:9b334a45a8ff | 400 | #define ADC_CFGR_EXTSEL(__HANDLE__, __EXT_TRIG_CONV__) \ |
| bogdanm | 0:9b334a45a8ff | 401 | (( (((__HANDLE__)->Instance) == ADC3) \ |
| bogdanm | 0:9b334a45a8ff | 402 | )? \ |
| bogdanm | 0:9b334a45a8ff | 403 | ( ( (__EXT_TRIG_CONV__) == ADC_EXTERNALTRIGCONV_T8_TRGO \ |
| bogdanm | 0:9b334a45a8ff | 404 | )? \ |
| bogdanm | 0:9b334a45a8ff | 405 | (ADC3_EXTERNALTRIG_T8_TRGO) \ |
| bogdanm | 0:9b334a45a8ff | 406 | : \ |
| bogdanm | 0:9b334a45a8ff | 407 | (__EXT_TRIG_CONV__) \ |
| bogdanm | 0:9b334a45a8ff | 408 | ) \ |
| bogdanm | 0:9b334a45a8ff | 409 | : \ |
| bogdanm | 0:9b334a45a8ff | 410 | (__EXT_TRIG_CONV__) \ |
| bogdanm | 0:9b334a45a8ff | 411 | ) |
| bogdanm | 0:9b334a45a8ff | 412 | #else |
| bogdanm | 0:9b334a45a8ff | 413 | #define ADC_CFGR_EXTSEL(__HANDLE__, __EXT_TRIG_CONV__) \ |
| bogdanm | 0:9b334a45a8ff | 414 | (__EXT_TRIG_CONV__) |
| bogdanm | 0:9b334a45a8ff | 415 | #endif /* STM32F103xE || STM32F103xG */ |
| bogdanm | 0:9b334a45a8ff | 416 | |
| bogdanm | 0:9b334a45a8ff | 417 | /** |
| bogdanm | 0:9b334a45a8ff | 418 | * @brief For devices with 3 ADCs: Defines the external trigger source |
| bogdanm | 0:9b334a45a8ff | 419 | * for injected group according to ADC into common group ADC1&ADC2 or |
| bogdanm | 0:9b334a45a8ff | 420 | * ADC3 (some triggers with same source have different value to |
| bogdanm | 0:9b334a45a8ff | 421 | * be programmed into ADC JEXTSEL bits of CR2 register). |
| bogdanm | 0:9b334a45a8ff | 422 | * For devices with 2 ADCs or less: this macro makes no change. |
| bogdanm | 0:9b334a45a8ff | 423 | * @param __HANDLE__: ADC handle |
| bogdanm | 0:9b334a45a8ff | 424 | * @param __EXT_TRIG_INJECTCONV__: External trigger selected for injected group. |
| bogdanm | 0:9b334a45a8ff | 425 | * @retval External trigger to be programmed into JEXTSEL bits of CR2 register |
| bogdanm | 0:9b334a45a8ff | 426 | */ |
| bogdanm | 0:9b334a45a8ff | 427 | #if defined (STM32F103xE) || defined (STM32F103xG) |
| bogdanm | 0:9b334a45a8ff | 428 | #define ADC_CFGR_JEXTSEL(__HANDLE__, __EXT_TRIG_INJECTCONV__) \ |
| bogdanm | 0:9b334a45a8ff | 429 | (( (((__HANDLE__)->Instance) == ADC3) \ |
| bogdanm | 0:9b334a45a8ff | 430 | )? \ |
| bogdanm | 0:9b334a45a8ff | 431 | ( ( (__EXT_TRIG_INJECTCONV__) == ADC_EXTERNALTRIGINJECCONV_T8_CC4 \ |
| bogdanm | 0:9b334a45a8ff | 432 | )? \ |
| bogdanm | 0:9b334a45a8ff | 433 | (ADC3_EXTERNALTRIGINJEC_T8_CC4) \ |
| bogdanm | 0:9b334a45a8ff | 434 | : \ |
| bogdanm | 0:9b334a45a8ff | 435 | (__EXT_TRIG_INJECTCONV__) \ |
| bogdanm | 0:9b334a45a8ff | 436 | ) \ |
| bogdanm | 0:9b334a45a8ff | 437 | : \ |
| bogdanm | 0:9b334a45a8ff | 438 | (__EXT_TRIG_INJECTCONV__) \ |
| bogdanm | 0:9b334a45a8ff | 439 | ) |
| bogdanm | 0:9b334a45a8ff | 440 | #else |
| bogdanm | 0:9b334a45a8ff | 441 | #define ADC_CFGR_JEXTSEL(__HANDLE__, __EXT_TRIG_INJECTCONV__) \ |
| bogdanm | 0:9b334a45a8ff | 442 | (__EXT_TRIG_INJECTCONV__) |
| bogdanm | 0:9b334a45a8ff | 443 | #endif /* STM32F103xE || STM32F103xG */ |
| bogdanm | 0:9b334a45a8ff | 444 | |
| bogdanm | 0:9b334a45a8ff | 445 | |
| bogdanm | 0:9b334a45a8ff | 446 | /** |
| bogdanm | 0:9b334a45a8ff | 447 | * @brief Verification if multimode is enabled for the selected ADC (multimode ADC master or ADC slave) (applicable for devices with several ADCs) |
| bogdanm | 0:9b334a45a8ff | 448 | * @param __HANDLE__: ADC handle |
| bogdanm | 0:9b334a45a8ff | 449 | * @retval Multimode state: RESET if multimode is disabled, other value if multimode is enabled |
| bogdanm | 0:9b334a45a8ff | 450 | */ |
| bogdanm | 0:9b334a45a8ff | 451 | #if defined (STM32F101xG) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG) |
| bogdanm | 0:9b334a45a8ff | 452 | #define ADC_MULTIMODE_IS_ENABLE(__HANDLE__) \ |
| bogdanm | 0:9b334a45a8ff | 453 | (( (((__HANDLE__)->Instance) == ADC1) || (((__HANDLE__)->Instance) == ADC2) \ |
| bogdanm | 0:9b334a45a8ff | 454 | )? \ |
| bogdanm | 0:9b334a45a8ff | 455 | (ADC1->CR1 & ADC_CR1_DUALMOD) \ |
| bogdanm | 0:9b334a45a8ff | 456 | : \ |
| bogdanm | 0:9b334a45a8ff | 457 | (RESET) \ |
| bogdanm | 0:9b334a45a8ff | 458 | ) |
| bogdanm | 0:9b334a45a8ff | 459 | #else |
| bogdanm | 0:9b334a45a8ff | 460 | #define ADC_MULTIMODE_IS_ENABLE(__HANDLE__) \ |
| bogdanm | 0:9b334a45a8ff | 461 | (RESET) |
| bogdanm | 0:9b334a45a8ff | 462 | #endif /* STM32F101xG || defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */ |
| bogdanm | 0:9b334a45a8ff | 463 | |
| bogdanm | 0:9b334a45a8ff | 464 | /** |
| bogdanm | 0:9b334a45a8ff | 465 | * @brief Verification of condition for ADC start conversion: ADC must be in non-multimode, or multimode with handle of ADC master (applicable for devices with several ADCs) |
| bogdanm | 0:9b334a45a8ff | 466 | * @param __HANDLE__: ADC handle |
| bogdanm | 0:9b334a45a8ff | 467 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 468 | */ |
| bogdanm | 0:9b334a45a8ff | 469 | #if defined (STM32F101xG) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG) |
| bogdanm | 0:9b334a45a8ff | 470 | #define ADC_NONMULTIMODE_OR_MULTIMODEMASTER(__HANDLE__) \ |
| bogdanm | 0:9b334a45a8ff | 471 | (( (((__HANDLE__)->Instance) == ADC2) \ |
| bogdanm | 0:9b334a45a8ff | 472 | )? \ |
| bogdanm | 0:9b334a45a8ff | 473 | ((ADC1->CR1 & ADC_CR1_DUALMOD) == RESET) \ |
| bogdanm | 0:9b334a45a8ff | 474 | : \ |
| bogdanm | 0:9b334a45a8ff | 475 | (!RESET) \ |
| bogdanm | 0:9b334a45a8ff | 476 | ) |
| bogdanm | 0:9b334a45a8ff | 477 | #else |
| bogdanm | 0:9b334a45a8ff | 478 | #define ADC_NONMULTIMODE_OR_MULTIMODEMASTER(__HANDLE__) \ |
| bogdanm | 0:9b334a45a8ff | 479 | (!RESET) |
| bogdanm | 0:9b334a45a8ff | 480 | #endif /* STM32F101xG || defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */ |
| bogdanm | 0:9b334a45a8ff | 481 | |
| bogdanm | 0:9b334a45a8ff | 482 | #if defined (STM32F101xG) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG) |
| bogdanm | 0:9b334a45a8ff | 483 | /** |
| bogdanm | 0:9b334a45a8ff | 484 | * @brief Set handle of the other ADC sharing the common multimode settings |
| bogdanm | 0:9b334a45a8ff | 485 | * @param __HANDLE__: ADC handle |
| bogdanm | 0:9b334a45a8ff | 486 | * @param __HANDLE_OTHER_ADC__: other ADC handle |
| bogdanm | 0:9b334a45a8ff | 487 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 488 | */ |
| bogdanm | 0:9b334a45a8ff | 489 | #define ADC_COMMON_ADC_OTHER(__HANDLE__, __HANDLE_OTHER_ADC__) \ |
| bogdanm | 0:9b334a45a8ff | 490 | ((__HANDLE_OTHER_ADC__)->Instance = ADC2) |
| bogdanm | 0:9b334a45a8ff | 491 | |
| bogdanm | 0:9b334a45a8ff | 492 | /** |
| bogdanm | 0:9b334a45a8ff | 493 | * @brief Set handle of the ADC slave associated to the ADC master |
| bogdanm | 0:9b334a45a8ff | 494 | * On STM32F1 devices, ADC slave is always ADC2 (this can be different |
| bogdanm | 0:9b334a45a8ff | 495 | * on other STM32 devices) |
| bogdanm | 0:9b334a45a8ff | 496 | * @param __HANDLE_MASTER__: ADC master handle |
| bogdanm | 0:9b334a45a8ff | 497 | * @param __HANDLE_SLAVE__: ADC slave handle |
| bogdanm | 0:9b334a45a8ff | 498 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 499 | */ |
| bogdanm | 0:9b334a45a8ff | 500 | #define ADC_MULTI_SLAVE(__HANDLE_MASTER__, __HANDLE_SLAVE__) \ |
| bogdanm | 0:9b334a45a8ff | 501 | ((__HANDLE_SLAVE__)->Instance = ADC2) |
| bogdanm | 0:9b334a45a8ff | 502 | |
| bogdanm | 0:9b334a45a8ff | 503 | #endif /* STM32F101xG || defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */ |
| bogdanm | 0:9b334a45a8ff | 504 | |
| bogdanm | 0:9b334a45a8ff | 505 | #define IS_ADC_INJECTED_RANK(CHANNEL) (((CHANNEL) == ADC_INJECTED_RANK_1) || \ |
| bogdanm | 0:9b334a45a8ff | 506 | ((CHANNEL) == ADC_INJECTED_RANK_2) || \ |
| bogdanm | 0:9b334a45a8ff | 507 | ((CHANNEL) == ADC_INJECTED_RANK_3) || \ |
| bogdanm | 0:9b334a45a8ff | 508 | ((CHANNEL) == ADC_INJECTED_RANK_4) ) |
| bogdanm | 0:9b334a45a8ff | 509 | |
| bogdanm | 0:9b334a45a8ff | 510 | #define IS_ADC_EXTTRIGINJEC_EDGE(EDGE) (((EDGE) == ADC_EXTERNALTRIGINJECCONV_EDGE_NONE) || \ |
| bogdanm | 0:9b334a45a8ff | 511 | ((EDGE) == ADC_EXTERNALTRIGINJECCONV_EDGE_RISING) ) |
| bogdanm | 0:9b334a45a8ff | 512 | |
| bogdanm | 0:9b334a45a8ff | 513 | /** @defgroup ADCEx_injected_nb_conv_verification ADCEx injected nb conv verification |
| bogdanm | 0:9b334a45a8ff | 514 | * @{ |
| bogdanm | 0:9b334a45a8ff | 515 | */ |
| bogdanm | 0:9b334a45a8ff | 516 | #define IS_ADC_INJECTED_NB_CONV(LENGTH) \ |
| bogdanm | 0:9b334a45a8ff | 517 | (((LENGTH) >= ((uint32_t)1)) && ((LENGTH) <= ((uint32_t)4))) |
| bogdanm | 0:9b334a45a8ff | 518 | /** |
| bogdanm | 0:9b334a45a8ff | 519 | * @} |
| bogdanm | 0:9b334a45a8ff | 520 | */ |
| bogdanm | 0:9b334a45a8ff | 521 | |
| bogdanm | 0:9b334a45a8ff | 522 | #if defined (STM32F100xB) || defined (STM32F100xE) || defined (STM32F101x6) || defined (STM32F101xB) || defined (STM32F102x6) || defined (STM32F102xB) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) |
| bogdanm | 0:9b334a45a8ff | 523 | #define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1) || \ |
| bogdanm | 0:9b334a45a8ff | 524 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2) || \ |
| bogdanm | 0:9b334a45a8ff | 525 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2) || \ |
| bogdanm | 0:9b334a45a8ff | 526 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO) || \ |
| bogdanm | 0:9b334a45a8ff | 527 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4) || \ |
| bogdanm | 0:9b334a45a8ff | 528 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_EXT_IT11) || \ |
| bogdanm | 0:9b334a45a8ff | 529 | \ |
| bogdanm | 0:9b334a45a8ff | 530 | ((REGTRIG) == ADC_SOFTWARE_START) ) |
| bogdanm | 0:9b334a45a8ff | 531 | #endif |
| bogdanm | 0:9b334a45a8ff | 532 | #if defined (STM32F101xE) || defined (STM32F101xG) |
| bogdanm | 0:9b334a45a8ff | 533 | #define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1) || \ |
| bogdanm | 0:9b334a45a8ff | 534 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2) || \ |
| bogdanm | 0:9b334a45a8ff | 535 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2) || \ |
| bogdanm | 0:9b334a45a8ff | 536 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO) || \ |
| bogdanm | 0:9b334a45a8ff | 537 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4) || \ |
| bogdanm | 0:9b334a45a8ff | 538 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_EXT_IT11) || \ |
| bogdanm | 0:9b334a45a8ff | 539 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T8_TRGO) || \ |
| bogdanm | 0:9b334a45a8ff | 540 | \ |
| bogdanm | 0:9b334a45a8ff | 541 | ((REGTRIG) == ADC_SOFTWARE_START) ) |
| bogdanm | 0:9b334a45a8ff | 542 | #endif |
| bogdanm | 0:9b334a45a8ff | 543 | #if defined (STM32F103xE) || defined (STM32F103xG) |
| bogdanm | 0:9b334a45a8ff | 544 | #define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1) || \ |
| bogdanm | 0:9b334a45a8ff | 545 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2) || \ |
| bogdanm | 0:9b334a45a8ff | 546 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2) || \ |
| bogdanm | 0:9b334a45a8ff | 547 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO) || \ |
| bogdanm | 0:9b334a45a8ff | 548 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4) || \ |
| bogdanm | 0:9b334a45a8ff | 549 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_EXT_IT11) || \ |
| bogdanm | 0:9b334a45a8ff | 550 | \ |
| bogdanm | 0:9b334a45a8ff | 551 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_CC1) || \ |
| bogdanm | 0:9b334a45a8ff | 552 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC3) || \ |
| bogdanm | 0:9b334a45a8ff | 553 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T8_CC1) || \ |
| bogdanm | 0:9b334a45a8ff | 554 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T5_CC1) || \ |
| bogdanm | 0:9b334a45a8ff | 555 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T5_CC3) || \ |
| bogdanm | 0:9b334a45a8ff | 556 | \ |
| bogdanm | 0:9b334a45a8ff | 557 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC3) || \ |
| bogdanm | 0:9b334a45a8ff | 558 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T8_TRGO) || \ |
| bogdanm | 0:9b334a45a8ff | 559 | ((REGTRIG) == ADC_SOFTWARE_START) ) |
| bogdanm | 0:9b334a45a8ff | 560 | #endif |
| bogdanm | 0:9b334a45a8ff | 561 | |
| bogdanm | 0:9b334a45a8ff | 562 | #if defined (STM32F100xB) || defined (STM32F100xE) || defined (STM32F101x6) || defined (STM32F101xB) || defined (STM32F102x6) || defined (STM32F102xB) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) |
| bogdanm | 0:9b334a45a8ff | 563 | #define IS_ADC_EXTTRIGINJEC(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO) || \ |
| bogdanm | 0:9b334a45a8ff | 564 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1) || \ |
| bogdanm | 0:9b334a45a8ff | 565 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4) || \ |
| bogdanm | 0:9b334a45a8ff | 566 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO) || \ |
| bogdanm | 0:9b334a45a8ff | 567 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15) || \ |
| bogdanm | 0:9b334a45a8ff | 568 | \ |
| bogdanm | 0:9b334a45a8ff | 569 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4) || \ |
| bogdanm | 0:9b334a45a8ff | 570 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO) || \ |
| bogdanm | 0:9b334a45a8ff | 571 | \ |
| bogdanm | 0:9b334a45a8ff | 572 | ((REGTRIG) == ADC_INJECTED_SOFTWARE_START) ) |
| bogdanm | 0:9b334a45a8ff | 573 | #endif |
| bogdanm | 0:9b334a45a8ff | 574 | #if defined (STM32F101xE) || defined (STM32F101xG) |
| bogdanm | 0:9b334a45a8ff | 575 | #define IS_ADC_EXTTRIGINJEC(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO) || \ |
| bogdanm | 0:9b334a45a8ff | 576 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1) || \ |
| bogdanm | 0:9b334a45a8ff | 577 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4) || \ |
| bogdanm | 0:9b334a45a8ff | 578 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO) || \ |
| bogdanm | 0:9b334a45a8ff | 579 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15) || \ |
| bogdanm | 0:9b334a45a8ff | 580 | \ |
| bogdanm | 0:9b334a45a8ff | 581 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4) || \ |
| bogdanm | 0:9b334a45a8ff | 582 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO) || \ |
| bogdanm | 0:9b334a45a8ff | 583 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC4) || \ |
| bogdanm | 0:9b334a45a8ff | 584 | \ |
| bogdanm | 0:9b334a45a8ff | 585 | ((REGTRIG) == ADC_INJECTED_SOFTWARE_START) ) |
| bogdanm | 0:9b334a45a8ff | 586 | #endif |
| bogdanm | 0:9b334a45a8ff | 587 | #if defined (STM32F103xE) || defined (STM32F103xG) |
| bogdanm | 0:9b334a45a8ff | 588 | #define IS_ADC_EXTTRIGINJEC(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO) || \ |
| bogdanm | 0:9b334a45a8ff | 589 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1) || \ |
| bogdanm | 0:9b334a45a8ff | 590 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4) || \ |
| bogdanm | 0:9b334a45a8ff | 591 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO) || \ |
| bogdanm | 0:9b334a45a8ff | 592 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_CC4) || \ |
| bogdanm | 0:9b334a45a8ff | 593 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15) || \ |
| bogdanm | 0:9b334a45a8ff | 594 | \ |
| bogdanm | 0:9b334a45a8ff | 595 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC3) || \ |
| bogdanm | 0:9b334a45a8ff | 596 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC2) || \ |
| bogdanm | 0:9b334a45a8ff | 597 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_TRGO) || \ |
| bogdanm | 0:9b334a45a8ff | 598 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_CC4) || \ |
| bogdanm | 0:9b334a45a8ff | 599 | \ |
| bogdanm | 0:9b334a45a8ff | 600 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4) || \ |
| bogdanm | 0:9b334a45a8ff | 601 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO) || \ |
| bogdanm | 0:9b334a45a8ff | 602 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC4) || \ |
| bogdanm | 0:9b334a45a8ff | 603 | \ |
| bogdanm | 0:9b334a45a8ff | 604 | ((REGTRIG) == ADC_INJECTED_SOFTWARE_START) ) |
| bogdanm | 0:9b334a45a8ff | 605 | #endif |
| bogdanm | 0:9b334a45a8ff | 606 | |
| bogdanm | 0:9b334a45a8ff | 607 | #if defined (STM32F101xG) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG) |
| bogdanm | 0:9b334a45a8ff | 608 | #define IS_ADC_MODE(MODE) (((MODE) == ADC_MODE_INDEPENDENT) || \ |
| bogdanm | 0:9b334a45a8ff | 609 | ((MODE) == ADC_DUALMODE_REGSIMULT_INJECSIMULT) || \ |
| bogdanm | 0:9b334a45a8ff | 610 | ((MODE) == ADC_DUALMODE_REGSIMULT_ALTERTRIG) || \ |
| bogdanm | 0:9b334a45a8ff | 611 | ((MODE) == ADC_DUALMODE_INJECSIMULT_INTERLFAST) || \ |
| bogdanm | 0:9b334a45a8ff | 612 | ((MODE) == ADC_DUALMODE_INJECSIMULT_INTERLSLOW) || \ |
| bogdanm | 0:9b334a45a8ff | 613 | ((MODE) == ADC_DUALMODE_INJECSIMULT) || \ |
| bogdanm | 0:9b334a45a8ff | 614 | ((MODE) == ADC_DUALMODE_REGSIMULT) || \ |
| bogdanm | 0:9b334a45a8ff | 615 | ((MODE) == ADC_DUALMODE_INTERLFAST) || \ |
| bogdanm | 0:9b334a45a8ff | 616 | ((MODE) == ADC_DUALMODE_INTERLSLOW) || \ |
| bogdanm | 0:9b334a45a8ff | 617 | ((MODE) == ADC_DUALMODE_ALTERTRIG) ) |
| bogdanm | 0:9b334a45a8ff | 618 | #endif /* STM32F101xG || defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */ |
| bogdanm | 0:9b334a45a8ff | 619 | |
| bogdanm | 0:9b334a45a8ff | 620 | /** |
| bogdanm | 0:9b334a45a8ff | 621 | * @} |
| bogdanm | 0:9b334a45a8ff | 622 | */ |
| bogdanm | 0:9b334a45a8ff | 623 | |
| bogdanm | 0:9b334a45a8ff | 624 | |
| bogdanm | 0:9b334a45a8ff | 625 | |
| bogdanm | 0:9b334a45a8ff | 626 | |
| bogdanm | 0:9b334a45a8ff | 627 | |
| bogdanm | 0:9b334a45a8ff | 628 | |
| bogdanm | 0:9b334a45a8ff | 629 | /* Exported functions --------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 630 | /** @addtogroup ADCEx_Exported_Functions |
| bogdanm | 0:9b334a45a8ff | 631 | * @{ |
| bogdanm | 0:9b334a45a8ff | 632 | */ |
| bogdanm | 0:9b334a45a8ff | 633 | |
| bogdanm | 0:9b334a45a8ff | 634 | /* IO operation functions *****************************************************/ |
| bogdanm | 0:9b334a45a8ff | 635 | /** @addtogroup ADCEx_Exported_Functions_Group1 |
| bogdanm | 0:9b334a45a8ff | 636 | * @{ |
| bogdanm | 0:9b334a45a8ff | 637 | */ |
| bogdanm | 0:9b334a45a8ff | 638 | |
| bogdanm | 0:9b334a45a8ff | 639 | /* ADC calibration */ |
| bogdanm | 0:9b334a45a8ff | 640 | HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc); |
| bogdanm | 0:9b334a45a8ff | 641 | |
| bogdanm | 0:9b334a45a8ff | 642 | /* Blocking mode: Polling */ |
| bogdanm | 0:9b334a45a8ff | 643 | HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc); |
| bogdanm | 0:9b334a45a8ff | 644 | HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc); |
| bogdanm | 0:9b334a45a8ff | 645 | HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout); |
| bogdanm | 0:9b334a45a8ff | 646 | |
| bogdanm | 0:9b334a45a8ff | 647 | /* Non-blocking mode: Interruption */ |
| bogdanm | 0:9b334a45a8ff | 648 | HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc); |
| bogdanm | 0:9b334a45a8ff | 649 | HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc); |
| bogdanm | 0:9b334a45a8ff | 650 | |
| bogdanm | 0:9b334a45a8ff | 651 | #if defined (STM32F101xG) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG) |
| bogdanm | 0:9b334a45a8ff | 652 | /* ADC multimode */ |
| bogdanm | 0:9b334a45a8ff | 653 | HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef *hadc, uint32_t *pData, uint32_t Length); |
| bogdanm | 0:9b334a45a8ff | 654 | HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef *hadc); |
| bogdanm | 0:9b334a45a8ff | 655 | #endif /* STM32F101xG || defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */ |
| bogdanm | 0:9b334a45a8ff | 656 | |
| bogdanm | 0:9b334a45a8ff | 657 | /* ADC retrieve conversion value intended to be used with polling or interruption */ |
| bogdanm | 0:9b334a45a8ff | 658 | uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank); |
| bogdanm | 0:9b334a45a8ff | 659 | #if defined (STM32F101xG) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG) |
| bogdanm | 0:9b334a45a8ff | 660 | uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef *hadc); |
| bogdanm | 0:9b334a45a8ff | 661 | #endif /* STM32F101xG || defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */ |
| bogdanm | 0:9b334a45a8ff | 662 | |
| bogdanm | 0:9b334a45a8ff | 663 | /* ADC IRQHandler and Callbacks used in non-blocking modes (Interruption) */ |
| bogdanm | 0:9b334a45a8ff | 664 | void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc); |
| bogdanm | 0:9b334a45a8ff | 665 | /** |
| bogdanm | 0:9b334a45a8ff | 666 | * @} |
| bogdanm | 0:9b334a45a8ff | 667 | */ |
| bogdanm | 0:9b334a45a8ff | 668 | |
| bogdanm | 0:9b334a45a8ff | 669 | |
| bogdanm | 0:9b334a45a8ff | 670 | /* Peripheral Control functions ***********************************************/ |
| bogdanm | 0:9b334a45a8ff | 671 | /** @addtogroup ADCEx_Exported_Functions_Group2 |
| bogdanm | 0:9b334a45a8ff | 672 | * @{ |
| bogdanm | 0:9b334a45a8ff | 673 | */ |
| bogdanm | 0:9b334a45a8ff | 674 | HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc,ADC_InjectionConfTypeDef* sConfigInjected); |
| bogdanm | 0:9b334a45a8ff | 675 | #if defined (STM32F101xG) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG) |
| bogdanm | 0:9b334a45a8ff | 676 | HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef *hadc, ADC_MultiModeTypeDef *multimode); |
| bogdanm | 0:9b334a45a8ff | 677 | #endif /* STM32F101xG || defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */ |
| bogdanm | 0:9b334a45a8ff | 678 | /** |
| bogdanm | 0:9b334a45a8ff | 679 | * @} |
| bogdanm | 0:9b334a45a8ff | 680 | */ |
| bogdanm | 0:9b334a45a8ff | 681 | |
| bogdanm | 0:9b334a45a8ff | 682 | |
| bogdanm | 0:9b334a45a8ff | 683 | /** |
| bogdanm | 0:9b334a45a8ff | 684 | * @} |
| bogdanm | 0:9b334a45a8ff | 685 | */ |
| bogdanm | 0:9b334a45a8ff | 686 | |
| bogdanm | 0:9b334a45a8ff | 687 | |
| bogdanm | 0:9b334a45a8ff | 688 | /** |
| bogdanm | 0:9b334a45a8ff | 689 | * @} |
| bogdanm | 0:9b334a45a8ff | 690 | */ |
| bogdanm | 0:9b334a45a8ff | 691 | |
| bogdanm | 0:9b334a45a8ff | 692 | /** |
| bogdanm | 0:9b334a45a8ff | 693 | * @} |
| bogdanm | 0:9b334a45a8ff | 694 | */ |
| bogdanm | 0:9b334a45a8ff | 695 | |
| bogdanm | 0:9b334a45a8ff | 696 | #ifdef __cplusplus |
| bogdanm | 0:9b334a45a8ff | 697 | } |
| bogdanm | 0:9b334a45a8ff | 698 | #endif |
| bogdanm | 0:9b334a45a8ff | 699 | |
| bogdanm | 0:9b334a45a8ff | 700 | #endif /* __STM32F1xx_HAL_ADC_EX_H */ |
| bogdanm | 0:9b334a45a8ff | 701 | |
| bogdanm | 0:9b334a45a8ff | 702 | |
| bogdanm | 0:9b334a45a8ff | 703 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |