mbed

Fork of mbed-dev by mbed official

Committer:
AnnaBridge
Date:
Fri Feb 16 16:09:33 2018 +0000
Revision:
182:57724642e740
Parent:
165:e614a9f1c9e2
mbed-dev library. Release version 159.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /* mbed Microcontroller Library
<> 144:ef7eb2e8f9f7 2 *******************************************************************************
<> 144:ef7eb2e8f9f7 3 * Copyright (c) 2015 WIZnet Co.,Ltd. All rights reserved.
<> 144:ef7eb2e8f9f7 4 * All rights reserved.
<> 144:ef7eb2e8f9f7 5 *
<> 144:ef7eb2e8f9f7 6 * Redistribution and use in source and binary forms, with or without
<> 144:ef7eb2e8f9f7 7 * modification, are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 8 *
<> 144:ef7eb2e8f9f7 9 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 10 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 12 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 13 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 14 * 3. Neither the name of ARM Limited nor the names of its contributors
<> 144:ef7eb2e8f9f7 15 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 16 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 17 *
<> 144:ef7eb2e8f9f7 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 28 *******************************************************************************
<> 144:ef7eb2e8f9f7 29 */
<> 144:ef7eb2e8f9f7 30
<> 144:ef7eb2e8f9f7 31 #include "mbed_assert.h"
<> 144:ef7eb2e8f9f7 32 #include "pinmap.h"
<> 144:ef7eb2e8f9f7 33 #include "PortNames.h"
<> 144:ef7eb2e8f9f7 34 #include "mbed_error.h"
<> 144:ef7eb2e8f9f7 35 #include "W7500x.h"
<> 144:ef7eb2e8f9f7 36 #include "W7500x_gpio.h"
<> 144:ef7eb2e8f9f7 37
<> 144:ef7eb2e8f9f7 38
<> 144:ef7eb2e8f9f7 39 uint32_t Get_GPIO_BaseAddress(uint32_t port_idx)
<> 144:ef7eb2e8f9f7 40 {
<> 144:ef7eb2e8f9f7 41 uint32_t gpio_add = 0;
<> 144:ef7eb2e8f9f7 42 switch(port_idx) {
<> 144:ef7eb2e8f9f7 43 case PortA:
<> 144:ef7eb2e8f9f7 44 gpio_add = GPIOA_BASE;
<> 144:ef7eb2e8f9f7 45 break;
<> 144:ef7eb2e8f9f7 46 case PortB:
<> 144:ef7eb2e8f9f7 47 gpio_add = GPIOB_BASE;
<> 144:ef7eb2e8f9f7 48 break;
<> 144:ef7eb2e8f9f7 49 case PortC:
<> 144:ef7eb2e8f9f7 50 gpio_add = GPIOC_BASE;
<> 144:ef7eb2e8f9f7 51 break;
<> 144:ef7eb2e8f9f7 52 case PortD:
<> 144:ef7eb2e8f9f7 53 gpio_add = GPIOD_BASE;
<> 144:ef7eb2e8f9f7 54 break;
<> 144:ef7eb2e8f9f7 55 default:
<> 144:ef7eb2e8f9f7 56 error("Pinmap error: wrong port number.");
<> 144:ef7eb2e8f9f7 57 break;
<> 144:ef7eb2e8f9f7 58 }
<> 144:ef7eb2e8f9f7 59 return gpio_add;
<> 144:ef7eb2e8f9f7 60 }
<> 144:ef7eb2e8f9f7 61
<> 144:ef7eb2e8f9f7 62 /**
<> 144:ef7eb2e8f9f7 63 * Configure pin (input, output, alternate function or analog) + output speed + AF
<> 144:ef7eb2e8f9f7 64 */
<> 144:ef7eb2e8f9f7 65
<> 144:ef7eb2e8f9f7 66 void pin_function(PinName pin, int data) {
<> 144:ef7eb2e8f9f7 67 MBED_ASSERT(pin != (PinName)NC);
<> 144:ef7eb2e8f9f7 68 // Get the pin informations
<> 144:ef7eb2e8f9f7 69 uint32_t mode = WIZ_PIN_MODE(data);
<> 144:ef7eb2e8f9f7 70 uint32_t pupd = WIZ_PIN_PUPD(data);
<> 144:ef7eb2e8f9f7 71 uint32_t afnum = WIZ_PIN_AFNUM(data);
<> 144:ef7eb2e8f9f7 72
<> 144:ef7eb2e8f9f7 73 uint32_t port_num = WIZ_PORT(pin);
<> 144:ef7eb2e8f9f7 74 uint32_t pin_index = WIZ_PIN_INDEX(pin);
<> 144:ef7eb2e8f9f7 75
<> 144:ef7eb2e8f9f7 76 GPIO_TypeDef *gpio;
<> 144:ef7eb2e8f9f7 77
<> 144:ef7eb2e8f9f7 78 // Configure Alternate Function
<> 144:ef7eb2e8f9f7 79 // Warning: Must be done before the GPIO is initialized
<> 144:ef7eb2e8f9f7 80 switch (afnum) {
<> 144:ef7eb2e8f9f7 81 case 0:
<> 144:ef7eb2e8f9f7 82 HAL_PAD_AFConfig((PAD_Type)port_num, (uint16_t)pin_index, (PAD_AF_TypeDef)Px_AFSR_AF0);
<> 144:ef7eb2e8f9f7 83 break;
<> 144:ef7eb2e8f9f7 84 case 1:
<> 144:ef7eb2e8f9f7 85 HAL_PAD_AFConfig((PAD_Type)port_num, (uint16_t)pin_index, (PAD_AF_TypeDef)Px_AFSR_AF1);
<> 144:ef7eb2e8f9f7 86 break;
<> 144:ef7eb2e8f9f7 87 case 2:
<> 144:ef7eb2e8f9f7 88 HAL_PAD_AFConfig((PAD_Type)port_num, (uint16_t)pin_index, (PAD_AF_TypeDef)Px_AFSR_AF2);
<> 144:ef7eb2e8f9f7 89 break;
<> 144:ef7eb2e8f9f7 90 case 3:
<> 144:ef7eb2e8f9f7 91 HAL_PAD_AFConfig((PAD_Type)port_num, (uint16_t)pin_index, (PAD_AF_TypeDef)Px_AFSR_AF3);
<> 144:ef7eb2e8f9f7 92 break;
<> 144:ef7eb2e8f9f7 93 default:
<> 144:ef7eb2e8f9f7 94 break;
<> 144:ef7eb2e8f9f7 95 }
<> 144:ef7eb2e8f9f7 96
<> 144:ef7eb2e8f9f7 97 if(mode == WIZ_MODE_AF)
<> 144:ef7eb2e8f9f7 98 return;
<> 144:ef7eb2e8f9f7 99
<> 144:ef7eb2e8f9f7 100 // Configure GPIO
<> 144:ef7eb2e8f9f7 101 gpio = (GPIO_TypeDef *)Get_GPIO_BaseAddress(port_num);
<> 144:ef7eb2e8f9f7 102
<> 144:ef7eb2e8f9f7 103 GPIO_InitTypeDef GPIO_InitStructure;
<> 144:ef7eb2e8f9f7 104 GPIO_InitStructure.GPIO_Pin = pin_index;
<> 144:ef7eb2e8f9f7 105 GPIO_InitStructure.GPIO_Mode = (GPIOMode_TypeDef)mode;
<> 144:ef7eb2e8f9f7 106 GPIO_InitStructure.GPIO_Pad = (GPIOPad_TypeDef)pupd;
<> 144:ef7eb2e8f9f7 107 HAL_GPIO_Init(gpio, &GPIO_InitStructure);
<> 144:ef7eb2e8f9f7 108 }
<> 144:ef7eb2e8f9f7 109
<> 144:ef7eb2e8f9f7 110 /**
<> 144:ef7eb2e8f9f7 111 * Configure pin pull-up/pull-down
<> 144:ef7eb2e8f9f7 112 */
<> 144:ef7eb2e8f9f7 113 void pin_mode(PinName pin, PinMode pupd)
<> 144:ef7eb2e8f9f7 114 {
<> 144:ef7eb2e8f9f7 115 MBED_ASSERT(pin != (PinName)NC);
<> 144:ef7eb2e8f9f7 116
<> 144:ef7eb2e8f9f7 117 uint32_t port_num = WIZ_PORT(pin);
<> 144:ef7eb2e8f9f7 118 uint32_t pin_num = WIZ_PIN_NUM(pin);
<> 144:ef7eb2e8f9f7 119
AnnaBridge 165:e614a9f1c9e2 120 switch(port_num) {
<> 144:ef7eb2e8f9f7 121 case PortA:
AnnaBridge 165:e614a9f1c9e2 122 if(pupd != 0) {
AnnaBridge 165:e614a9f1c9e2 123 PA_PCR->Port[pin_num] &= 0xFFFFFFFC;
AnnaBridge 165:e614a9f1c9e2 124 }
<> 144:ef7eb2e8f9f7 125 PA_PCR->Port[pin_num] |= pupd;
<> 144:ef7eb2e8f9f7 126 break;
<> 144:ef7eb2e8f9f7 127 case PortB:
AnnaBridge 165:e614a9f1c9e2 128 if(pupd != 0) {
AnnaBridge 165:e614a9f1c9e2 129 PB_PCR->Port[pin_num] &= 0xFFFFFFFC;
AnnaBridge 165:e614a9f1c9e2 130 }
<> 144:ef7eb2e8f9f7 131 PB_PCR->Port[pin_num] |= pupd;
<> 144:ef7eb2e8f9f7 132 break;
<> 144:ef7eb2e8f9f7 133 case PortC:
AnnaBridge 165:e614a9f1c9e2 134 if(pupd != 0) {
AnnaBridge 165:e614a9f1c9e2 135 PC_PCR->Port[pin_num] &= 0xFFFFFFFC;
AnnaBridge 165:e614a9f1c9e2 136 }
<> 144:ef7eb2e8f9f7 137 PC_PCR->Port[pin_num] |= pupd;
<> 144:ef7eb2e8f9f7 138 break;
<> 144:ef7eb2e8f9f7 139 case PortD:
AnnaBridge 165:e614a9f1c9e2 140 if(pupd != 0) {
AnnaBridge 165:e614a9f1c9e2 141 PD_PCR->Port[pin_num] &= 0xFFFFFFFC;
AnnaBridge 165:e614a9f1c9e2 142 }
<> 144:ef7eb2e8f9f7 143 PD_PCR->Port[pin_num] |= pupd;
<> 144:ef7eb2e8f9f7 144 break;
<> 144:ef7eb2e8f9f7 145 default:
<> 144:ef7eb2e8f9f7 146 error("Pinmap error: wrong port number.");
<> 144:ef7eb2e8f9f7 147 return;
<> 144:ef7eb2e8f9f7 148 }
<> 144:ef7eb2e8f9f7 149 }