mbed

Fork of mbed-dev by mbed official

Committer:
AnnaBridge
Date:
Fri Feb 16 16:09:33 2018 +0000
Revision:
182:57724642e740
Parent:
149:156823d33999
mbed-dev library. Release version 159.

Who changed what in which revision?

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<> 149:156823d33999 1 /**
<> 149:156823d33999 2 ******************************************************************************
<> 149:156823d33999 3 * @file uart_16c550.h
<> 149:156823d33999 4 * @brief Definitions and API for the 16c550 driver.
<> 149:156823d33999 5 * @internal
<> 149:156823d33999 6 * @author ON Semiconductor
<> 149:156823d33999 7 * $Rev: 2607 $
<> 149:156823d33999 8 * $Date: 2013-12-06 18:02:43 +0530 (Fri, 06 Dec 2013) $
<> 149:156823d33999 9 ******************************************************************************
<> 149:156823d33999 10 * Copyright 2016 Semiconductor Components Industries LLC (d/b/a “ON Semiconductor”).
<> 149:156823d33999 11 * All rights reserved. This software and/or documentation is licensed by ON Semiconductor
<> 149:156823d33999 12 * under limited terms and conditions. The terms and conditions pertaining to the software
<> 149:156823d33999 13 * and/or documentation are available at http://www.onsemi.com/site/pdf/ONSEMI_T&C.pdf
<> 149:156823d33999 14 * (“ON Semiconductor Standard Terms and Conditions of Sale, Section 8 Software”) and
<> 149:156823d33999 15 * if applicable the software license agreement. Do not use this software and/or
<> 149:156823d33999 16 * documentation unless you have carefully read and you agree to the limited terms and
<> 149:156823d33999 17 * conditions. By using this software and/or documentation, you agree to the limited
<> 149:156823d33999 18 * terms and conditions.
<> 149:156823d33999 19 *
<> 149:156823d33999 20 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
<> 149:156823d33999 21 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
<> 149:156823d33999 22 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
<> 149:156823d33999 23 * ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL,
<> 149:156823d33999 24 * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
<> 149:156823d33999 25 * @endinternal
<> 149:156823d33999 26 *
<> 149:156823d33999 27 * @ingroup uart_16c550
<> 149:156823d33999 28 *
<> 149:156823d33999 29 * @details
<> 149:156823d33999 30 * The driver for the 16c550 UART is a character driver (see char_driver.h).
<> 149:156823d33999 31 * The driver can be accessed via the uart_16c550_driver variable.
<> 149:156823d33999 32 *
<> 149:156823d33999 33 * This file defines the options structure to be passed to the driver when
<> 149:156823d33999 34 * opening a device. The structure depends on the generic uart_options_t
<> 149:156823d33999 35 * options structure for any UART implementation (see uart.h).
<> 149:156823d33999 36 *
<> 149:156823d33999 37 * Any application that uses this driver must define an interrupt handler
<> 149:156823d33999 38 * for the 16C550 interrupt and call the fUart16C550Handler() function from
<> 149:156823d33999 39 * that ISR.
<> 149:156823d33999 40 */
<> 149:156823d33999 41
<> 149:156823d33999 42 #ifndef UART_16C550_H_
<> 149:156823d33999 43 #define UART_16C550_H_
<> 149:156823d33999 44
<> 149:156823d33999 45 #include "architecture.h"
<> 149:156823d33999 46 #include "uart.h"
<> 149:156823d33999 47 #include "uart_16c550_map.h"
<> 149:156823d33999 48 #include "memory_map.h"
<> 149:156823d33999 49 #include "crossbar.h"
<> 149:156823d33999 50 #include "types.h"
<> 149:156823d33999 51 #include "clock.h"
<> 149:156823d33999 52 #include "pad.h"
<> 149:156823d33999 53 #include "serial_api.h"
<> 149:156823d33999 54
<> 149:156823d33999 55 /** A set of options to be passed when opening a 16C550 UART device. */
<> 149:156823d33999 56 typedef struct uart_16c550_options {
<> 149:156823d33999 57 uart_options_t uartOptions; /**< The generic UART options. */
<> 149:156823d33999 58 Uart16C550Reg_pt membase; /**< The memory base for the device's registers. */
<> 149:156823d33999 59 uint8_t irq; /**< The IRQ number of the IRQ associated to the device. */
<> 149:156823d33999 60 } uart_16c550_options_t, *uart_16c550_options_pt;
<> 149:156823d33999 61
<> 149:156823d33999 62 #define UART_NUM 2
<> 149:156823d33999 63
<> 149:156823d33999 64 #define CTS_ASSERT 1
<> 149:156823d33999 65 #define CTS_UNASSERT 0
<> 149:156823d33999 66 #define RTS_ASSERT 1
<> 149:156823d33999 67 #define RTS_UNASSERT 0
<> 149:156823d33999 68
<> 149:156823d33999 69 #define UART_ERROR_INSUFFICIENT_SPACE ((uint8_t)0xF0)
<> 149:156823d33999 70 #define UART_ERROR_TOO_BIG ((uint8_t)0xF1)
<> 149:156823d33999 71
<> 149:156823d33999 72 /** The depth of the hardware FIFOs. */
<> 149:156823d33999 73 #define UART_HW_FIFO_DEPTH 16
<> 149:156823d33999 74
<> 149:156823d33999 75 /** The length of the receive buffer in software. */
<> 149:156823d33999 76 #define UART_RX_BUFFER_LENGTH (1<<8)
<> 149:156823d33999 77 #define UART_TX_BUFFER_LENGTH (1<<8)
<> 149:156823d33999 78
<> 149:156823d33999 79 #define STATUS_INVALID_PARAMETER 0x1
<> 149:156823d33999 80 #define STATUS_SUCCESS 0x1
<> 149:156823d33999 81
<> 149:156823d33999 82 #define UART_LCR_DATALEN_BIT_POS 0
<> 149:156823d33999 83 #define UART_LCR_STPBIT_BIT_POS 2
<> 149:156823d33999 84 #define UART_LCR_PARITY_BIT_POS 3
<> 149:156823d33999 85
<> 149:156823d33999 86 #define UART_FCS_RX_FIFO_RST_BIT_POS 1
<> 149:156823d33999 87 #define UART_FCS_TX_FIFO_RST_BIT_POS 2
<> 149:156823d33999 88
<> 149:156823d33999 89 #define UART_RX_IRQ 0x0
<> 149:156823d33999 90 #define UART_TX_IRQ 0x1
<> 149:156823d33999 91
<> 149:156823d33999 92 #define UART_RX_BUFFER_LEN_MAX 16
<> 149:156823d33999 93
<> 149:156823d33999 94 #define UART_LSR_TX_EMPTY_MASK 0x40
<> 149:156823d33999 95 #define UART_LSR_RX_DATA_READY_MASK 0x01
<> 149:156823d33999 96
<> 149:156823d33999 97 #define UART_IER_TX_EMPTY_MASK 0x02
<> 149:156823d33999 98 #define UART_IER_RX_DATA_READY_MASK 0x01
<> 149:156823d33999 99
<> 149:156823d33999 100 #define UART_DEFAULT_BAUD 9600
<> 149:156823d33999 101
<> 149:156823d33999 102 /** Interrupt handler for 16C550 UART devices; to be called from an actual ISR.
<> 149:156823d33999 103 * @param membase The memory base for the device that corresponds to the IRQ.
<> 149:156823d33999 104 */
<> 149:156823d33999 105 void fUart16C550Handler(Uart16C550Reg_pt membase);
<> 149:156823d33999 106
<> 149:156823d33999 107 /** An externally accessible instance of the UART driver implementation. */
<> 149:156823d33999 108 //extern char_driver_t uart_16c550_driver;
<> 149:156823d33999 109 typedef void (*fUartCallBack)(void);
<> 149:156823d33999 110 //void serial_init(serial_t *obj, PinName tx, PinName rx);
<> 149:156823d33999 111 //extern void fSerialInit(Uart16C550Reg_pt UartRegBase, flow_control_t FlowControl);
<> 149:156823d33999 112 extern void fSerialFree(void);
<> 149:156823d33999 113 extern void fSerialBaud(Uart16C550Reg_pt UartRegBase, uint32_t BaudRate);
<> 149:156823d33999 114 extern void fSerialFormat(Uart16C550Reg_pt UartRegBase, uint8_t DataLen, uint8_t Parity, uint8_t StopBit);
<> 149:156823d33999 115 extern void fSerialIrqSet(Uart16C550Reg_pt UartRegBase, fUartCallBack PtrUartCallBack, uint8_t IrqType, boolean Enable);
<> 149:156823d33999 116 extern uint8_t fSerialGetc(Uart16C550Reg_pt UartRegBase);
<> 149:156823d33999 117 extern void fSerialPutc(Uart16C550Reg_pt UartRegBase, uint8_t c);
<> 149:156823d33999 118 extern boolean fSerialReadable(Uart16C550Reg_pt UartRegBase);
<> 149:156823d33999 119 extern boolean fSerialWritable(Uart16C550Reg_pt UartRegBase);
<> 149:156823d33999 120 extern void fSerialClear(Uart16C550Reg_pt UartRegBase);
<> 149:156823d33999 121 extern void fSerialBreakSet(Uart16C550Reg_pt UartRegBase);
<> 149:156823d33999 122 extern void fSerialBreakClear(Uart16C550Reg_pt UartRegBase);
<> 149:156823d33999 123 extern void fSerialPinoutTx(uint8_t PinNo);
<> 149:156823d33999 124
<> 149:156823d33999 125 extern void Uart1_Irq(void);
<> 149:156823d33999 126 extern void Uart2_Irq(void);
<> 149:156823d33999 127
<> 149:156823d33999 128 #endif /* UART_16C550_H_ */