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targets/TARGET_NUVOTON/TARGET_NANO100/i2c_api.c@177:447f873cad2f, 2017-10-25 (annotated)

Committer:
AnnaBridge
Date:
Wed Oct 25 14:53:38 2017 +0100
Revision:
177:447f873cad2f
Parent:
175:b96e65c34a4d 
This updates the lib to the mbed lib v 154

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 175:b96e65c34a4d 1 /* mbed Microcontroller Library
AnnaBridge 175:b96e65c34a4d 2 * Copyright (c) 2015-2017 Nuvoton
AnnaBridge 175:b96e65c34a4d 3 *
AnnaBridge 175:b96e65c34a4d 4 * Licensed under the Apache License, Version 2.0 (the "License");
AnnaBridge 175:b96e65c34a4d 5 * you may not use this file except in compliance with the License.
AnnaBridge 175:b96e65c34a4d 6 * You may obtain a copy of the License at
AnnaBridge 175:b96e65c34a4d 7 *
AnnaBridge 175:b96e65c34a4d 8 * http://www.apache.org/licenses/LICENSE-2.0
AnnaBridge 175:b96e65c34a4d 9 *
AnnaBridge 175:b96e65c34a4d 10 * Unless required by applicable law or agreed to in writing, software
AnnaBridge 175:b96e65c34a4d 11 * distributed under the License is distributed on an "AS IS" BASIS,
AnnaBridge 175:b96e65c34a4d 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
AnnaBridge 175:b96e65c34a4d 13 * See the License for the specific language governing permissions and
AnnaBridge 175:b96e65c34a4d 14 * limitations under the License.
AnnaBridge 175:b96e65c34a4d 15 */
AnnaBridge 175:b96e65c34a4d 16
AnnaBridge 175:b96e65c34a4d 17 #include "i2c_api.h"
AnnaBridge 175:b96e65c34a4d 18
AnnaBridge 175:b96e65c34a4d 19 #if DEVICE_I2C
AnnaBridge 175:b96e65c34a4d 20
AnnaBridge 175:b96e65c34a4d 21 #include "cmsis.h"
AnnaBridge 175:b96e65c34a4d 22 #include "pinmap.h"
AnnaBridge 175:b96e65c34a4d 23 #include "PeripheralPins.h"
AnnaBridge 175:b96e65c34a4d 24 #include "nu_modutil.h"
AnnaBridge 175:b96e65c34a4d 25 #include "nu_miscutil.h"
AnnaBridge 175:b96e65c34a4d 26 #include "nu_bitutil.h"
AnnaBridge 175:b96e65c34a4d 27 #include "mbed_critical.h"
AnnaBridge 175:b96e65c34a4d 28
AnnaBridge 175:b96e65c34a4d 29 #define NU_I2C_DEBUG 0
AnnaBridge 175:b96e65c34a4d 30
AnnaBridge 175:b96e65c34a4d 31 #if NU_I2C_DEBUG
AnnaBridge 175:b96e65c34a4d 32 struct i2c_s MY_I2C;
AnnaBridge 175:b96e65c34a4d 33 struct i2c_s MY_I2C_2;
AnnaBridge 175:b96e65c34a4d 34 char MY_I2C_STATUS[64];
AnnaBridge 175:b96e65c34a4d 35 int MY_I2C_STATUS_POS = 0;
AnnaBridge 175:b96e65c34a4d 36 uint32_t MY_I2C_TIMEOUT;
AnnaBridge 175:b96e65c34a4d 37 uint32_t MY_I2C_ELAPSED;
AnnaBridge 175:b96e65c34a4d 38 uint32_t MY_I2C_T1;
AnnaBridge 175:b96e65c34a4d 39 uint32_t MY_I2C_T2;
AnnaBridge 175:b96e65c34a4d 40 #endif
AnnaBridge 175:b96e65c34a4d 41
AnnaBridge 175:b96e65c34a4d 42 struct nu_i2c_var {
AnnaBridge 175:b96e65c34a4d 43 i2c_t * obj;
AnnaBridge 175:b96e65c34a4d 44 void (*vec)(void);
AnnaBridge 175:b96e65c34a4d 45 };
AnnaBridge 175:b96e65c34a4d 46
AnnaBridge 175:b96e65c34a4d 47 // NOTE: NANO130 doesn't support relocating vector table. ISR vector passed into NVIC_SetVector() can only be weak symbol defined in startup_Nano100Series.c.
AnnaBridge 175:b96e65c34a4d 48 void I2C0_IRQHandler(void);
AnnaBridge 175:b96e65c34a4d 49 void I2C1_IRQHandler(void);
AnnaBridge 175:b96e65c34a4d 50 static void i2c_irq(i2c_t *obj);
AnnaBridge 175:b96e65c34a4d 51 static void i2c_fsm_reset(i2c_t *obj, uint32_t i2c_ctl);
AnnaBridge 175:b96e65c34a4d 52 static void i2c_fsm_tranfini(i2c_t *obj, int lastdatanaked);
AnnaBridge 175:b96e65c34a4d 53
AnnaBridge 175:b96e65c34a4d 54 static struct nu_i2c_var i2c0_var = {
AnnaBridge 175:b96e65c34a4d 55 .obj = NULL,
AnnaBridge 175:b96e65c34a4d 56 .vec = I2C0_IRQHandler,
AnnaBridge 175:b96e65c34a4d 57 };
AnnaBridge 175:b96e65c34a4d 58 static struct nu_i2c_var i2c1_var = {
AnnaBridge 175:b96e65c34a4d 59 .obj = NULL,
AnnaBridge 175:b96e65c34a4d 60 .vec = I2C1_IRQHandler,
AnnaBridge 175:b96e65c34a4d 61 };
AnnaBridge 175:b96e65c34a4d 62
AnnaBridge 175:b96e65c34a4d 63 static uint32_t i2c_modinit_mask = 0;
AnnaBridge 175:b96e65c34a4d 64
AnnaBridge 175:b96e65c34a4d 65 static const struct nu_modinit_s i2c_modinit_tab[] = {
AnnaBridge 175:b96e65c34a4d 66 {I2C_0, I2C0_MODULE, 0, 0, I2C0_RST, I2C0_IRQn, &i2c0_var},
AnnaBridge 175:b96e65c34a4d 67 {I2C_1, I2C1_MODULE, 0, 0, I2C1_RST, I2C1_IRQn, &i2c1_var},
AnnaBridge 175:b96e65c34a4d 68
AnnaBridge 175:b96e65c34a4d 69 {NC, 0, 0, 0, 0, (IRQn_Type) 0, NULL}
AnnaBridge 175:b96e65c34a4d 70 };
AnnaBridge 175:b96e65c34a4d 71
AnnaBridge 175:b96e65c34a4d 72 static int i2c_do_tran(i2c_t *obj, char *buf, int length, int read, int naklastdata);
AnnaBridge 175:b96e65c34a4d 73 static int i2c_do_trsn(i2c_t *obj, uint32_t i2c_ctl, int sync);
AnnaBridge 175:b96e65c34a4d 74 #define NU_I2C_TIMEOUT_STAT_INT 500000
AnnaBridge 175:b96e65c34a4d 75 #define NU_I2C_TIMEOUT_STOP 500000
AnnaBridge 175:b96e65c34a4d 76 static int i2c_poll_status_timeout(i2c_t *obj, int (*is_status)(i2c_t *obj), uint32_t timeout);
AnnaBridge 175:b96e65c34a4d 77 static int i2c_poll_tran_heatbeat_timeout(i2c_t *obj, uint32_t timeout);
AnnaBridge 175:b96e65c34a4d 78 static int i2c_is_trsn_done(i2c_t *obj);
AnnaBridge 175:b96e65c34a4d 79 static int i2c_is_tran_started(i2c_t *obj);
AnnaBridge 175:b96e65c34a4d 80 static int i2c_addr2data(int address, int read);
AnnaBridge 175:b96e65c34a4d 81
AnnaBridge 175:b96e65c34a4d 82 /*
AnnaBridge 175:b96e65c34a4d 83 * Wrapper for I2C_SET_CONTROL_REG. Clear new state IF before state change is triggered.
AnnaBridge 175:b96e65c34a4d 84 *
AnnaBridge 175:b96e65c34a4d 85 * NOTE:
AnnaBridge 175:b96e65c34a4d 86 * NUC472/M453/M487: I2C_T::CTL.SI for both I2C new state IF and trigger state change
AnnaBridge 175:b96e65c34a4d 87 * NANO130: I2C_T::INTSTS.INTSTS for I2C new state IF and I2C_T::CON.I2C_STS for trigger state change
AnnaBridge 175:b96e65c34a4d 88 */
AnnaBridge 175:b96e65c34a4d 89 __STATIC_INLINE void i2c_set_control_reg(I2C_T *i2c_base, uint8_t i2c_ctrl)
AnnaBridge 175:b96e65c34a4d 90 {
AnnaBridge 175:b96e65c34a4d 91 if ((i2c_ctrl & I2C_CON_I2C_STS_Msk) && (i2c_base->INTSTS & I2C_INTSTS_INTSTS_Msk)) {
AnnaBridge 175:b96e65c34a4d 92 i2c_base->INTSTS = I2C_INTSTS_INTSTS_Msk;
AnnaBridge 175:b96e65c34a4d 93 }
AnnaBridge 175:b96e65c34a4d 94 I2C_SET_CONTROL_REG(i2c_base, i2c_ctrl);
AnnaBridge 175:b96e65c34a4d 95 }
AnnaBridge 175:b96e65c34a4d 96
AnnaBridge 175:b96e65c34a4d 97 #if DEVICE_I2CSLAVE
AnnaBridge 175:b96e65c34a4d 98 // Convert mbed address to BSP address.
AnnaBridge 175:b96e65c34a4d 99 static int i2c_addr2bspaddr(int address);
AnnaBridge 175:b96e65c34a4d 100 #endif // #if DEVICE_I2CSLAVE
AnnaBridge 175:b96e65c34a4d 101 static void i2c_enable_int(i2c_t *obj);
AnnaBridge 175:b96e65c34a4d 102 static void i2c_disable_int(i2c_t *obj);
AnnaBridge 175:b96e65c34a4d 103 static int i2c_set_int(i2c_t *obj, int inten);
AnnaBridge 175:b96e65c34a4d 104
AnnaBridge 175:b96e65c34a4d 105
AnnaBridge 175:b96e65c34a4d 106 #if DEVICE_I2C_ASYNCH
AnnaBridge 175:b96e65c34a4d 107 static void i2c_buffer_set(i2c_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length);
AnnaBridge 175:b96e65c34a4d 108 static void i2c_enable_vector_interrupt(i2c_t *obj, uint32_t handler, int enable);
AnnaBridge 175:b96e65c34a4d 109 static void i2c_teardown_async(i2c_t *obj);
AnnaBridge 175:b96e65c34a4d 110 #endif
AnnaBridge 175:b96e65c34a4d 111
AnnaBridge 175:b96e65c34a4d 112 #define TRANCTRL_STARTED (1)
AnnaBridge 175:b96e65c34a4d 113 #define TRANCTRL_NAKLASTDATA (1 << 1)
AnnaBridge 175:b96e65c34a4d 114 #define TRANCTRL_LASTDATANAKED (1 << 2)
AnnaBridge 175:b96e65c34a4d 115
AnnaBridge 175:b96e65c34a4d 116 uint32_t us_ticker_read(void);
AnnaBridge 175:b96e65c34a4d 117
AnnaBridge 175:b96e65c34a4d 118 void i2c_init(i2c_t *obj, PinName sda, PinName scl)
AnnaBridge 175:b96e65c34a4d 119 {
AnnaBridge 175:b96e65c34a4d 120 uint32_t i2c_sda = pinmap_peripheral(sda, PinMap_I2C_SDA);
AnnaBridge 175:b96e65c34a4d 121 uint32_t i2c_scl = pinmap_peripheral(scl, PinMap_I2C_SCL);
AnnaBridge 175:b96e65c34a4d 122 obj->i2c.i2c = (I2CName) pinmap_merge(i2c_sda, i2c_scl);
AnnaBridge 175:b96e65c34a4d 123 MBED_ASSERT((int)obj->i2c.i2c != NC);
AnnaBridge 175:b96e65c34a4d 124
AnnaBridge 175:b96e65c34a4d 125 const struct nu_modinit_s *modinit = get_modinit(obj->i2c.i2c, i2c_modinit_tab);
AnnaBridge 175:b96e65c34a4d 126 MBED_ASSERT(modinit != NULL);
AnnaBridge 175:b96e65c34a4d 127 MBED_ASSERT((I2CName) modinit->modname == obj->i2c.i2c);
AnnaBridge 175:b96e65c34a4d 128
AnnaBridge 175:b96e65c34a4d 129 // Reset this module
AnnaBridge 175:b96e65c34a4d 130 SYS_ResetModule(modinit->rsetidx);
AnnaBridge 175:b96e65c34a4d 131
AnnaBridge 175:b96e65c34a4d 132 // Enable IP clock
AnnaBridge 175:b96e65c34a4d 133 CLK_EnableModuleClock(modinit->clkidx);
AnnaBridge 175:b96e65c34a4d 134
AnnaBridge 175:b96e65c34a4d 135 pinmap_pinout(sda, PinMap_I2C_SDA);
AnnaBridge 175:b96e65c34a4d 136 pinmap_pinout(scl, PinMap_I2C_SCL);
AnnaBridge 175:b96e65c34a4d 137
AnnaBridge 175:b96e65c34a4d 138 #if DEVICE_I2C_ASYNCH
AnnaBridge 175:b96e65c34a4d 139 obj->i2c.dma_usage = DMA_USAGE_NEVER;
AnnaBridge 175:b96e65c34a4d 140 obj->i2c.event = 0;
AnnaBridge 175:b96e65c34a4d 141 obj->i2c.stop = 0;
AnnaBridge 175:b96e65c34a4d 142 obj->i2c.address = 0;
AnnaBridge 175:b96e65c34a4d 143 #endif
AnnaBridge 175:b96e65c34a4d 144
AnnaBridge 175:b96e65c34a4d 145 // NOTE: Setting I2C bus clock to 100 KHz is required. See I2C::I2C in common/I2C.cpp.
AnnaBridge 175:b96e65c34a4d 146 I2C_Open((I2C_T *) NU_MODBASE(obj->i2c.i2c), 100000);
AnnaBridge 175:b96e65c34a4d 147 // NOTE: INTEN bit and FSM control bits (STA, STO, SI, AA) are packed in one register CTL0. We cannot control interrupt through
AnnaBridge 175:b96e65c34a4d 148 // INTEN bit without impacting FSM control bits. Use NVIC_EnableIRQ/NVIC_DisableIRQ instead for interrupt control.
AnnaBridge 175:b96e65c34a4d 149 I2C_T *i2c_base = (I2C_T *) NU_MODBASE(obj->i2c.i2c);
AnnaBridge 175:b96e65c34a4d 150 i2c_base->CON |= (I2C_CON_INTEN_Msk | I2C_CON_IPEN_Msk);
AnnaBridge 175:b96e65c34a4d 151
AnnaBridge 175:b96e65c34a4d 152 // Enable sync-mode vector interrupt.
AnnaBridge 175:b96e65c34a4d 153 struct nu_i2c_var *var = (struct nu_i2c_var *) modinit->var;
AnnaBridge 175:b96e65c34a4d 154 var->obj = obj;
AnnaBridge 175:b96e65c34a4d 155 obj->i2c.tran_ctrl = 0;
AnnaBridge 175:b96e65c34a4d 156 obj->i2c.stop = 0;
AnnaBridge 175:b96e65c34a4d 157 obj->i2c.hdlr_async = 0;
AnnaBridge 175:b96e65c34a4d 158 i2c_enable_vector_interrupt(obj, (uint32_t) var->vec, 1);
AnnaBridge 175:b96e65c34a4d 159
AnnaBridge 175:b96e65c34a4d 160 // Mark this module to be inited.
AnnaBridge 175:b96e65c34a4d 161 int i = modinit - i2c_modinit_tab;
AnnaBridge 175:b96e65c34a4d 162 i2c_modinit_mask |= 1 << i;
AnnaBridge 175:b96e65c34a4d 163 }
AnnaBridge 175:b96e65c34a4d 164
AnnaBridge 175:b96e65c34a4d 165 int i2c_start(i2c_t *obj)
AnnaBridge 175:b96e65c34a4d 166 {
AnnaBridge 175:b96e65c34a4d 167 return i2c_do_trsn(obj, I2C_CON_START_Msk | I2C_CON_I2C_STS_Msk, 1);
AnnaBridge 175:b96e65c34a4d 168 }
AnnaBridge 175:b96e65c34a4d 169
AnnaBridge 175:b96e65c34a4d 170 int i2c_stop(i2c_t *obj)
AnnaBridge 175:b96e65c34a4d 171 {
AnnaBridge 175:b96e65c34a4d 172 return i2c_do_trsn(obj, I2C_CON_STOP_Msk | I2C_CON_I2C_STS_Msk, 1);
AnnaBridge 175:b96e65c34a4d 173 }
AnnaBridge 175:b96e65c34a4d 174
AnnaBridge 175:b96e65c34a4d 175 void i2c_frequency(i2c_t *obj, int hz)
AnnaBridge 175:b96e65c34a4d 176 {
AnnaBridge 175:b96e65c34a4d 177 I2C_SetBusClockFreq((I2C_T *) NU_MODBASE(obj->i2c.i2c), hz);
AnnaBridge 175:b96e65c34a4d 178 }
AnnaBridge 175:b96e65c34a4d 179
AnnaBridge 175:b96e65c34a4d 180 int i2c_read(i2c_t *obj, int address, char *data, int length, int stop)
AnnaBridge 175:b96e65c34a4d 181 {
AnnaBridge 175:b96e65c34a4d 182 if (i2c_start(obj)) {
AnnaBridge 175:b96e65c34a4d 183 i2c_stop(obj);
AnnaBridge 175:b96e65c34a4d 184 return I2C_ERROR_BUS_BUSY;
AnnaBridge 175:b96e65c34a4d 185 }
AnnaBridge 175:b96e65c34a4d 186
AnnaBridge 175:b96e65c34a4d 187 if (i2c_byte_write(obj, i2c_addr2data(address, 1)) != 1) {
AnnaBridge 175:b96e65c34a4d 188 i2c_stop(obj);
AnnaBridge 175:b96e65c34a4d 189 return I2C_ERROR_NO_SLAVE;
AnnaBridge 175:b96e65c34a4d 190 }
AnnaBridge 175:b96e65c34a4d 191
AnnaBridge 175:b96e65c34a4d 192 // Read in bytes
AnnaBridge 175:b96e65c34a4d 193 length = i2c_do_tran(obj, data, length, 1, 1);
AnnaBridge 175:b96e65c34a4d 194
AnnaBridge 175:b96e65c34a4d 195 // If not repeated start, send stop.
AnnaBridge 175:b96e65c34a4d 196 if (stop) {
AnnaBridge 175:b96e65c34a4d 197 i2c_stop(obj);
AnnaBridge 175:b96e65c34a4d 198 }
AnnaBridge 175:b96e65c34a4d 199
AnnaBridge 175:b96e65c34a4d 200 return length;
AnnaBridge 175:b96e65c34a4d 201 }
AnnaBridge 175:b96e65c34a4d 202
AnnaBridge 175:b96e65c34a4d 203 int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop)
AnnaBridge 175:b96e65c34a4d 204 {
AnnaBridge 175:b96e65c34a4d 205 if (i2c_start(obj)) {
AnnaBridge 175:b96e65c34a4d 206 i2c_stop(obj);
AnnaBridge 175:b96e65c34a4d 207 return I2C_ERROR_BUS_BUSY;
AnnaBridge 175:b96e65c34a4d 208 }
AnnaBridge 175:b96e65c34a4d 209
AnnaBridge 175:b96e65c34a4d 210 if (i2c_byte_write(obj, i2c_addr2data(address, 0)) != 1) {
AnnaBridge 175:b96e65c34a4d 211 i2c_stop(obj);
AnnaBridge 175:b96e65c34a4d 212 return I2C_ERROR_NO_SLAVE;
AnnaBridge 175:b96e65c34a4d 213 }
AnnaBridge 175:b96e65c34a4d 214
AnnaBridge 175:b96e65c34a4d 215 // Write out bytes
AnnaBridge 175:b96e65c34a4d 216 length = i2c_do_tran(obj, (char *) data, length, 0, 1);
AnnaBridge 175:b96e65c34a4d 217
AnnaBridge 175:b96e65c34a4d 218 if (stop) {
AnnaBridge 175:b96e65c34a4d 219 i2c_stop(obj);
AnnaBridge 175:b96e65c34a4d 220 }
AnnaBridge 175:b96e65c34a4d 221
AnnaBridge 175:b96e65c34a4d 222 return length;
AnnaBridge 175:b96e65c34a4d 223 }
AnnaBridge 175:b96e65c34a4d 224
AnnaBridge 175:b96e65c34a4d 225 void i2c_reset(i2c_t *obj)
AnnaBridge 175:b96e65c34a4d 226 {
AnnaBridge 175:b96e65c34a4d 227 i2c_stop(obj);
AnnaBridge 175:b96e65c34a4d 228 }
AnnaBridge 175:b96e65c34a4d 229
AnnaBridge 175:b96e65c34a4d 230 int i2c_byte_read(i2c_t *obj, int last)
AnnaBridge 175:b96e65c34a4d 231 {
AnnaBridge 175:b96e65c34a4d 232 char data = 0;
AnnaBridge 175:b96e65c34a4d 233 i2c_do_tran(obj, &data, 1, 1, last);
AnnaBridge 175:b96e65c34a4d 234 return data;
AnnaBridge 175:b96e65c34a4d 235 }
AnnaBridge 175:b96e65c34a4d 236
AnnaBridge 175:b96e65c34a4d 237 int i2c_byte_write(i2c_t *obj, int data)
AnnaBridge 175:b96e65c34a4d 238 {
AnnaBridge 175:b96e65c34a4d 239 char data_[1];
AnnaBridge 175:b96e65c34a4d 240 data_[0] = data & 0xFF;
AnnaBridge 175:b96e65c34a4d 241
AnnaBridge 175:b96e65c34a4d 242 if (i2c_do_tran(obj, data_, 1, 0, 0) == 1 &&
AnnaBridge 175:b96e65c34a4d 243 ! (obj->i2c.tran_ctrl & TRANCTRL_LASTDATANAKED)) {
AnnaBridge 175:b96e65c34a4d 244 return 1;
AnnaBridge 175:b96e65c34a4d 245 }
AnnaBridge 175:b96e65c34a4d 246 else {
AnnaBridge 175:b96e65c34a4d 247 return 0;
AnnaBridge 175:b96e65c34a4d 248 }
AnnaBridge 175:b96e65c34a4d 249 }
AnnaBridge 175:b96e65c34a4d 250
AnnaBridge 175:b96e65c34a4d 251 #if DEVICE_I2CSLAVE
AnnaBridge 175:b96e65c34a4d 252
AnnaBridge 175:b96e65c34a4d 253 // See I2CSlave.h
AnnaBridge 175:b96e65c34a4d 254 #define NoData 0 // the slave has not been addressed
AnnaBridge 175:b96e65c34a4d 255 #define ReadAddressed 1 // the master has requested a read from this slave (slave = transmitter)
AnnaBridge 175:b96e65c34a4d 256 #define WriteGeneral 2 // the master is writing to all slave
AnnaBridge 175:b96e65c34a4d 257 #define WriteAddressed 3 // the master is writing to this slave (slave = receiver)
AnnaBridge 175:b96e65c34a4d 258
AnnaBridge 175:b96e65c34a4d 259 void i2c_slave_mode(i2c_t *obj, int enable_slave)
AnnaBridge 175:b96e65c34a4d 260 {
AnnaBridge 175:b96e65c34a4d 261 I2C_T *i2c_base = (I2C_T *) NU_MODBASE(obj->i2c.i2c);
AnnaBridge 175:b96e65c34a4d 262
AnnaBridge 175:b96e65c34a4d 263 i2c_disable_int(obj);
AnnaBridge 175:b96e65c34a4d 264
AnnaBridge 175:b96e65c34a4d 265 obj->i2c.slaveaddr_state = NoData;
AnnaBridge 175:b96e65c34a4d 266 obj->i2c.hdlr_async = 0;
AnnaBridge 175:b96e65c34a4d 267
AnnaBridge 175:b96e65c34a4d 268 // Switch to not addressed mode
AnnaBridge 175:b96e65c34a4d 269 i2c_set_control_reg(i2c_base, I2C_CON_I2C_STS_Msk | I2C_CON_ACK_Msk);
AnnaBridge 175:b96e65c34a4d 270
AnnaBridge 175:b96e65c34a4d 271 i2c_enable_int(obj);
AnnaBridge 175:b96e65c34a4d 272 }
AnnaBridge 175:b96e65c34a4d 273
AnnaBridge 175:b96e65c34a4d 274 int i2c_slave_receive(i2c_t *obj)
AnnaBridge 175:b96e65c34a4d 275 {
AnnaBridge 175:b96e65c34a4d 276 int slaveaddr_state;
AnnaBridge 175:b96e65c34a4d 277
AnnaBridge 175:b96e65c34a4d 278 i2c_disable_int(obj);
AnnaBridge 175:b96e65c34a4d 279 slaveaddr_state = obj->i2c.slaveaddr_state;
AnnaBridge 175:b96e65c34a4d 280 i2c_enable_int(obj);
AnnaBridge 175:b96e65c34a4d 281
AnnaBridge 175:b96e65c34a4d 282 return slaveaddr_state;
AnnaBridge 175:b96e65c34a4d 283 }
AnnaBridge 175:b96e65c34a4d 284
AnnaBridge 175:b96e65c34a4d 285 int i2c_slave_read(i2c_t *obj, char *data, int length)
AnnaBridge 175:b96e65c34a4d 286 {
AnnaBridge 175:b96e65c34a4d 287 return i2c_do_tran(obj, data, length, 1, 1);
AnnaBridge 175:b96e65c34a4d 288 }
AnnaBridge 175:b96e65c34a4d 289
AnnaBridge 175:b96e65c34a4d 290 int i2c_slave_write(i2c_t *obj, const char *data, int length)
AnnaBridge 175:b96e65c34a4d 291 {
AnnaBridge 175:b96e65c34a4d 292 return i2c_do_tran(obj, (char *) data, length, 0, 1);
AnnaBridge 175:b96e65c34a4d 293 }
AnnaBridge 175:b96e65c34a4d 294
AnnaBridge 175:b96e65c34a4d 295 void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask)
AnnaBridge 175:b96e65c34a4d 296 {
AnnaBridge 175:b96e65c34a4d 297 I2C_T *i2c_base = (I2C_T *) NU_MODBASE(obj->i2c.i2c);
AnnaBridge 175:b96e65c34a4d 298
AnnaBridge 175:b96e65c34a4d 299 i2c_disable_int(obj);
AnnaBridge 175:b96e65c34a4d 300
AnnaBridge 175:b96e65c34a4d 301 // NOTE: On NUC472/M451, non-zero slave address can still work as GC mode is enabled.
AnnaBridge 175:b96e65c34a4d 302 // On M480, non-zero slave address won't work as GC mode is enabled.
AnnaBridge 175:b96e65c34a4d 303 I2C_SetSlaveAddr(i2c_base, 0, i2c_addr2bspaddr(address), I2C_GCMODE_DISABLE);
AnnaBridge 175:b96e65c34a4d 304
AnnaBridge 175:b96e65c34a4d 305 i2c_enable_int(obj);
AnnaBridge 175:b96e65c34a4d 306 }
AnnaBridge 175:b96e65c34a4d 307
AnnaBridge 175:b96e65c34a4d 308 static int i2c_addr2bspaddr(int address)
AnnaBridge 175:b96e65c34a4d 309 {
AnnaBridge 175:b96e65c34a4d 310 return (address >> 1);
AnnaBridge 175:b96e65c34a4d 311 }
AnnaBridge 175:b96e65c34a4d 312
AnnaBridge 175:b96e65c34a4d 313 #endif // #if DEVICE_I2CSLAVE
AnnaBridge 175:b96e65c34a4d 314
AnnaBridge 175:b96e65c34a4d 315 static void i2c_enable_int(i2c_t *obj)
AnnaBridge 175:b96e65c34a4d 316 {
AnnaBridge 175:b96e65c34a4d 317 const struct nu_modinit_s *modinit = get_modinit(obj->i2c.i2c, i2c_modinit_tab);
AnnaBridge 175:b96e65c34a4d 318
AnnaBridge 175:b96e65c34a4d 319 core_util_critical_section_enter();
AnnaBridge 175:b96e65c34a4d 320
AnnaBridge 175:b96e65c34a4d 321 // Enable I2C interrupt
AnnaBridge 175:b96e65c34a4d 322 NVIC_EnableIRQ(modinit->irq_n);
AnnaBridge 175:b96e65c34a4d 323 obj->i2c.inten = 1;
AnnaBridge 175:b96e65c34a4d 324
AnnaBridge 175:b96e65c34a4d 325 core_util_critical_section_exit();
AnnaBridge 175:b96e65c34a4d 326 }
AnnaBridge 175:b96e65c34a4d 327
AnnaBridge 175:b96e65c34a4d 328 static void i2c_disable_int(i2c_t *obj)
AnnaBridge 175:b96e65c34a4d 329 {
AnnaBridge 175:b96e65c34a4d 330 const struct nu_modinit_s *modinit = get_modinit(obj->i2c.i2c, i2c_modinit_tab);
AnnaBridge 175:b96e65c34a4d 331
AnnaBridge 175:b96e65c34a4d 332 core_util_critical_section_enter();
AnnaBridge 175:b96e65c34a4d 333
AnnaBridge 175:b96e65c34a4d 334 // Disable I2C interrupt
AnnaBridge 175:b96e65c34a4d 335 NVIC_DisableIRQ(modinit->irq_n);
AnnaBridge 175:b96e65c34a4d 336 obj->i2c.inten = 0;
AnnaBridge 175:b96e65c34a4d 337
AnnaBridge 175:b96e65c34a4d 338 core_util_critical_section_exit();
AnnaBridge 175:b96e65c34a4d 339 }
AnnaBridge 175:b96e65c34a4d 340
AnnaBridge 175:b96e65c34a4d 341 static int i2c_set_int(i2c_t *obj, int inten)
AnnaBridge 175:b96e65c34a4d 342 {
AnnaBridge 175:b96e65c34a4d 343 int inten_back;
AnnaBridge 175:b96e65c34a4d 344
AnnaBridge 175:b96e65c34a4d 345 core_util_critical_section_enter();
AnnaBridge 175:b96e65c34a4d 346
AnnaBridge 175:b96e65c34a4d 347 inten_back = obj->i2c.inten;
AnnaBridge 175:b96e65c34a4d 348
AnnaBridge 175:b96e65c34a4d 349 core_util_critical_section_exit();
AnnaBridge 175:b96e65c34a4d 350
AnnaBridge 175:b96e65c34a4d 351 if (inten) {
AnnaBridge 175:b96e65c34a4d 352 i2c_enable_int(obj);
AnnaBridge 175:b96e65c34a4d 353 }
AnnaBridge 175:b96e65c34a4d 354 else {
AnnaBridge 175:b96e65c34a4d 355 i2c_disable_int(obj);
AnnaBridge 175:b96e65c34a4d 356 }
AnnaBridge 175:b96e65c34a4d 357
AnnaBridge 175:b96e65c34a4d 358 return inten_back;
AnnaBridge 175:b96e65c34a4d 359 }
AnnaBridge 175:b96e65c34a4d 360
AnnaBridge 175:b96e65c34a4d 361 static int i2c_do_tran(i2c_t *obj, char *buf, int length, int read, int naklastdata)
AnnaBridge 175:b96e65c34a4d 362 {
AnnaBridge 175:b96e65c34a4d 363 if (! buf || ! length) {
AnnaBridge 175:b96e65c34a4d 364 return 0;
AnnaBridge 175:b96e65c34a4d 365 }
AnnaBridge 175:b96e65c34a4d 366
AnnaBridge 175:b96e65c34a4d 367 int tran_len = 0;
AnnaBridge 175:b96e65c34a4d 368
AnnaBridge 175:b96e65c34a4d 369 i2c_disable_int(obj);
AnnaBridge 175:b96e65c34a4d 370 obj->i2c.tran_ctrl = naklastdata ? (TRANCTRL_STARTED | TRANCTRL_NAKLASTDATA) : TRANCTRL_STARTED;
AnnaBridge 175:b96e65c34a4d 371 obj->i2c.tran_beg = buf;
AnnaBridge 175:b96e65c34a4d 372 obj->i2c.tran_pos = buf;
AnnaBridge 175:b96e65c34a4d 373 obj->i2c.tran_end = buf + length;
AnnaBridge 175:b96e65c34a4d 374 obj->i2c.hdlr_async = 0;
AnnaBridge 175:b96e65c34a4d 375 i2c_enable_int(obj);
AnnaBridge 175:b96e65c34a4d 376
AnnaBridge 175:b96e65c34a4d 377 if (i2c_poll_tran_heatbeat_timeout(obj, NU_I2C_TIMEOUT_STAT_INT)) {
AnnaBridge 175:b96e65c34a4d 378 #if NU_I2C_DEBUG
AnnaBridge 175:b96e65c34a4d 379 MY_I2C_2 = obj->i2c;
AnnaBridge 175:b96e65c34a4d 380 while (1);
AnnaBridge 175:b96e65c34a4d 381 #endif
AnnaBridge 175:b96e65c34a4d 382 }
AnnaBridge 175:b96e65c34a4d 383 else {
AnnaBridge 175:b96e65c34a4d 384 i2c_disable_int(obj);
AnnaBridge 175:b96e65c34a4d 385 tran_len = obj->i2c.tran_pos - obj->i2c.tran_beg;
AnnaBridge 175:b96e65c34a4d 386 obj->i2c.tran_beg = NULL;
AnnaBridge 175:b96e65c34a4d 387 obj->i2c.tran_pos = NULL;
AnnaBridge 175:b96e65c34a4d 388 obj->i2c.tran_end = NULL;
AnnaBridge 175:b96e65c34a4d 389 i2c_enable_int(obj);
AnnaBridge 175:b96e65c34a4d 390 }
AnnaBridge 175:b96e65c34a4d 391
AnnaBridge 175:b96e65c34a4d 392 return tran_len;
AnnaBridge 175:b96e65c34a4d 393 }
AnnaBridge 175:b96e65c34a4d 394
AnnaBridge 175:b96e65c34a4d 395 static int i2c_do_trsn(i2c_t *obj, uint32_t i2c_ctl, int sync)
AnnaBridge 175:b96e65c34a4d 396 {
AnnaBridge 175:b96e65c34a4d 397 I2C_T *i2c_base = (I2C_T *) NU_MODBASE(obj->i2c.i2c);
AnnaBridge 175:b96e65c34a4d 398 int err = 0;
AnnaBridge 175:b96e65c34a4d 399
AnnaBridge 175:b96e65c34a4d 400 i2c_disable_int(obj);
AnnaBridge 175:b96e65c34a4d 401
AnnaBridge 175:b96e65c34a4d 402 if (i2c_poll_status_timeout(obj, i2c_is_trsn_done, NU_I2C_TIMEOUT_STAT_INT)) {
AnnaBridge 175:b96e65c34a4d 403 err = I2C_ERROR_BUS_BUSY;
AnnaBridge 175:b96e65c34a4d 404 #if NU_I2C_DEBUG
AnnaBridge 175:b96e65c34a4d 405 MY_I2C_2 = obj->i2c;
AnnaBridge 175:b96e65c34a4d 406 while (1);
AnnaBridge 175:b96e65c34a4d 407 #endif
AnnaBridge 175:b96e65c34a4d 408 }
AnnaBridge 175:b96e65c34a4d 409 else {
AnnaBridge 175:b96e65c34a4d 410 #if 1
AnnaBridge 175:b96e65c34a4d 411 // NOTE: Avoid duplicate Start/Stop. Otherwise, we may meet strange error.
AnnaBridge 175:b96e65c34a4d 412 uint32_t status = I2C_GET_STATUS(i2c_base);
AnnaBridge 175:b96e65c34a4d 413
AnnaBridge 175:b96e65c34a4d 414 switch (status) {
AnnaBridge 175:b96e65c34a4d 415 case 0x08: // Start
AnnaBridge 175:b96e65c34a4d 416 case 0x10: // Master Repeat Start
AnnaBridge 175:b96e65c34a4d 417 if (i2c_ctl & I2C_CON_START_Msk) {
AnnaBridge 175:b96e65c34a4d 418 return 0;
AnnaBridge 175:b96e65c34a4d 419 }
AnnaBridge 175:b96e65c34a4d 420 else {
AnnaBridge 175:b96e65c34a4d 421 break;
AnnaBridge 175:b96e65c34a4d 422 }
AnnaBridge 175:b96e65c34a4d 423 case 0xF8: // Bus Released
AnnaBridge 175:b96e65c34a4d 424 if ((i2c_ctl & (I2C_CON_START_Msk | I2C_CON_STOP_Msk)) == I2C_CON_STOP_Msk) {
AnnaBridge 175:b96e65c34a4d 425 return 0;
AnnaBridge 175:b96e65c34a4d 426 }
AnnaBridge 175:b96e65c34a4d 427 else {
AnnaBridge 175:b96e65c34a4d 428 break;
AnnaBridge 175:b96e65c34a4d 429 }
AnnaBridge 175:b96e65c34a4d 430 }
AnnaBridge 175:b96e65c34a4d 431 #endif
AnnaBridge 175:b96e65c34a4d 432 i2c_set_control_reg(i2c_base, i2c_ctl);
AnnaBridge 175:b96e65c34a4d 433 if (sync && i2c_poll_status_timeout(obj, i2c_is_trsn_done, NU_I2C_TIMEOUT_STAT_INT)) {
AnnaBridge 175:b96e65c34a4d 434 err = I2C_ERROR_BUS_BUSY;
AnnaBridge 175:b96e65c34a4d 435 #if NU_I2C_DEBUG
AnnaBridge 175:b96e65c34a4d 436 MY_I2C_2 = obj->i2c;
AnnaBridge 175:b96e65c34a4d 437 while (1);
AnnaBridge 175:b96e65c34a4d 438 #endif
AnnaBridge 175:b96e65c34a4d 439 }
AnnaBridge 175:b96e65c34a4d 440 }
AnnaBridge 175:b96e65c34a4d 441
AnnaBridge 175:b96e65c34a4d 442 i2c_enable_int(obj);
AnnaBridge 175:b96e65c34a4d 443
AnnaBridge 175:b96e65c34a4d 444 return err;
AnnaBridge 175:b96e65c34a4d 445 }
AnnaBridge 175:b96e65c34a4d 446
AnnaBridge 175:b96e65c34a4d 447 static int i2c_poll_status_timeout(i2c_t *obj, int (*is_status)(i2c_t *obj), uint32_t timeout)
AnnaBridge 175:b96e65c34a4d 448 {
AnnaBridge 175:b96e65c34a4d 449 uint32_t t1, t2, elapsed = 0;
AnnaBridge 175:b96e65c34a4d 450 int status_assert = 0;
AnnaBridge 175:b96e65c34a4d 451
AnnaBridge 175:b96e65c34a4d 452 t1 = us_ticker_read();
AnnaBridge 175:b96e65c34a4d 453 while (1) {
AnnaBridge 175:b96e65c34a4d 454 status_assert = is_status(obj);
AnnaBridge 175:b96e65c34a4d 455 if (status_assert) {
AnnaBridge 175:b96e65c34a4d 456 break;
AnnaBridge 175:b96e65c34a4d 457 }
AnnaBridge 175:b96e65c34a4d 458
AnnaBridge 175:b96e65c34a4d 459 t2 = us_ticker_read();
AnnaBridge 175:b96e65c34a4d 460 elapsed = (t2 > t1) ? (t2 - t1) : ((uint64_t) t2 + 0xFFFFFFFF - t1 + 1);
AnnaBridge 175:b96e65c34a4d 461 if (elapsed >= timeout) {
AnnaBridge 175:b96e65c34a4d 462 #if NU_I2C_DEBUG
AnnaBridge 175:b96e65c34a4d 463 MY_I2C_T1 = t1;
AnnaBridge 175:b96e65c34a4d 464 MY_I2C_T2 = t2;
AnnaBridge 175:b96e65c34a4d 465 MY_I2C_ELAPSED = elapsed;
AnnaBridge 175:b96e65c34a4d 466 MY_I2C_TIMEOUT = timeout;
AnnaBridge 175:b96e65c34a4d 467 MY_I2C_2 = obj->i2c;
AnnaBridge 175:b96e65c34a4d 468 while (1);
AnnaBridge 175:b96e65c34a4d 469 #endif
AnnaBridge 175:b96e65c34a4d 470 break;
AnnaBridge 175:b96e65c34a4d 471 }
AnnaBridge 175:b96e65c34a4d 472 }
AnnaBridge 175:b96e65c34a4d 473
AnnaBridge 175:b96e65c34a4d 474 return (elapsed >= timeout);
AnnaBridge 175:b96e65c34a4d 475 }
AnnaBridge 175:b96e65c34a4d 476
AnnaBridge 175:b96e65c34a4d 477 static int i2c_poll_tran_heatbeat_timeout(i2c_t *obj, uint32_t timeout)
AnnaBridge 175:b96e65c34a4d 478 {
AnnaBridge 175:b96e65c34a4d 479 uint32_t t1, t2, elapsed = 0;
AnnaBridge 175:b96e65c34a4d 480 int tran_started;
AnnaBridge 175:b96e65c34a4d 481 char *tran_pos = NULL;
AnnaBridge 175:b96e65c34a4d 482 char *tran_pos2 = NULL;
AnnaBridge 175:b96e65c34a4d 483
AnnaBridge 175:b96e65c34a4d 484 i2c_disable_int(obj);
AnnaBridge 175:b96e65c34a4d 485 tran_pos = obj->i2c.tran_pos;
AnnaBridge 175:b96e65c34a4d 486 i2c_enable_int(obj);
AnnaBridge 175:b96e65c34a4d 487 t1 = us_ticker_read();
AnnaBridge 175:b96e65c34a4d 488 while (1) {
AnnaBridge 175:b96e65c34a4d 489 i2c_disable_int(obj);
AnnaBridge 175:b96e65c34a4d 490 tran_started = i2c_is_tran_started(obj);
AnnaBridge 175:b96e65c34a4d 491 i2c_enable_int(obj);
AnnaBridge 175:b96e65c34a4d 492 if (! tran_started) { // Transfer completed or stopped
AnnaBridge 175:b96e65c34a4d 493 break;
AnnaBridge 175:b96e65c34a4d 494 }
AnnaBridge 175:b96e65c34a4d 495
AnnaBridge 175:b96e65c34a4d 496 i2c_disable_int(obj);
AnnaBridge 175:b96e65c34a4d 497 tran_pos2 = obj->i2c.tran_pos;
AnnaBridge 175:b96e65c34a4d 498 i2c_enable_int(obj);
AnnaBridge 175:b96e65c34a4d 499 t2 = us_ticker_read();
AnnaBridge 175:b96e65c34a4d 500 if (tran_pos2 != tran_pos) { // Transfer on-going
AnnaBridge 175:b96e65c34a4d 501 t1 = t2;
AnnaBridge 175:b96e65c34a4d 502 tran_pos = tran_pos2;
AnnaBridge 175:b96e65c34a4d 503 continue;
AnnaBridge 175:b96e65c34a4d 504 }
AnnaBridge 175:b96e65c34a4d 505
AnnaBridge 175:b96e65c34a4d 506 elapsed = (t2 > t1) ? (t2 - t1) : ((uint64_t) t2 + 0xFFFFFFFF - t1 + 1);
AnnaBridge 175:b96e65c34a4d 507 if (elapsed >= timeout) { // Transfer idle
AnnaBridge 175:b96e65c34a4d 508 #if NU_I2C_DEBUG
AnnaBridge 175:b96e65c34a4d 509 MY_I2C = obj->i2c;
AnnaBridge 175:b96e65c34a4d 510 MY_I2C_T1 = t1;
AnnaBridge 175:b96e65c34a4d 511 MY_I2C_T2 = t2;
AnnaBridge 175:b96e65c34a4d 512 MY_I2C_ELAPSED = elapsed;
AnnaBridge 175:b96e65c34a4d 513 MY_I2C_TIMEOUT = timeout;
AnnaBridge 175:b96e65c34a4d 514 MY_I2C_2 = obj->i2c;
AnnaBridge 175:b96e65c34a4d 515 while (1);
AnnaBridge 175:b96e65c34a4d 516 #endif
AnnaBridge 175:b96e65c34a4d 517 break;
AnnaBridge 175:b96e65c34a4d 518 }
AnnaBridge 175:b96e65c34a4d 519 }
AnnaBridge 175:b96e65c34a4d 520
AnnaBridge 175:b96e65c34a4d 521 return (elapsed >= timeout);
AnnaBridge 175:b96e65c34a4d 522 }
AnnaBridge 175:b96e65c34a4d 523
AnnaBridge 175:b96e65c34a4d 524
AnnaBridge 175:b96e65c34a4d 525 static int i2c_is_trsn_done(i2c_t *obj)
AnnaBridge 175:b96e65c34a4d 526 {
AnnaBridge 175:b96e65c34a4d 527 I2C_T *i2c_base = (I2C_T *) NU_MODBASE(obj->i2c.i2c);
AnnaBridge 175:b96e65c34a4d 528 int i2c_int;
AnnaBridge 175:b96e65c34a4d 529 uint32_t status;
AnnaBridge 175:b96e65c34a4d 530 int inten_back;
AnnaBridge 175:b96e65c34a4d 531
AnnaBridge 175:b96e65c34a4d 532 inten_back = i2c_set_int(obj, 0);
AnnaBridge 175:b96e65c34a4d 533 // NANO130
AnnaBridge 175:b96e65c34a4d 534 i2c_int = !! (i2c_base->INTSTS & I2C_INTSTS_INTSTS_Msk);
AnnaBridge 175:b96e65c34a4d 535 status = I2C_GET_STATUS(i2c_base);
AnnaBridge 175:b96e65c34a4d 536 i2c_set_int(obj, inten_back);
AnnaBridge 175:b96e65c34a4d 537
AnnaBridge 175:b96e65c34a4d 538 return (i2c_int || status == 0xF8);
AnnaBridge 175:b96e65c34a4d 539 }
AnnaBridge 175:b96e65c34a4d 540
AnnaBridge 175:b96e65c34a4d 541 static int i2c_is_tran_started(i2c_t *obj)
AnnaBridge 175:b96e65c34a4d 542 {
AnnaBridge 175:b96e65c34a4d 543 int started;
AnnaBridge 175:b96e65c34a4d 544 int inten_back;
AnnaBridge 175:b96e65c34a4d 545
AnnaBridge 175:b96e65c34a4d 546 inten_back = i2c_set_int(obj, 0);
AnnaBridge 175:b96e65c34a4d 547 started = !! (obj->i2c.tran_ctrl & TRANCTRL_STARTED);
AnnaBridge 175:b96e65c34a4d 548 i2c_set_int(obj, inten_back);
AnnaBridge 175:b96e65c34a4d 549
AnnaBridge 175:b96e65c34a4d 550 return started;
AnnaBridge 175:b96e65c34a4d 551 }
AnnaBridge 175:b96e65c34a4d 552
AnnaBridge 175:b96e65c34a4d 553 static int i2c_addr2data(int address, int read)
AnnaBridge 175:b96e65c34a4d 554 {
AnnaBridge 175:b96e65c34a4d 555 return read ? (address | 1) : (address & 0xFE);
AnnaBridge 175:b96e65c34a4d 556 }
AnnaBridge 175:b96e65c34a4d 557
AnnaBridge 175:b96e65c34a4d 558 void I2C0_IRQHandler(void)
AnnaBridge 175:b96e65c34a4d 559 {
AnnaBridge 175:b96e65c34a4d 560 i2c_irq(i2c0_var.obj);
AnnaBridge 175:b96e65c34a4d 561 }
AnnaBridge 175:b96e65c34a4d 562 void I2C1_IRQHandler(void)
AnnaBridge 175:b96e65c34a4d 563 {
AnnaBridge 175:b96e65c34a4d 564 i2c_irq(i2c1_var.obj);
AnnaBridge 175:b96e65c34a4d 565 }
AnnaBridge 175:b96e65c34a4d 566
AnnaBridge 175:b96e65c34a4d 567 static void i2c_irq(i2c_t *obj)
AnnaBridge 175:b96e65c34a4d 568 {
AnnaBridge 175:b96e65c34a4d 569 if (obj->i2c.hdlr_async) {
AnnaBridge 175:b96e65c34a4d 570 void (*hdlr_async)(void) = (void(*)(void))(obj->i2c.hdlr_async);
AnnaBridge 175:b96e65c34a4d 571 hdlr_async();
AnnaBridge 175:b96e65c34a4d 572 return;
AnnaBridge 175:b96e65c34a4d 573 }
AnnaBridge 175:b96e65c34a4d 574
AnnaBridge 175:b96e65c34a4d 575 I2C_T *i2c_base = (I2C_T *) NU_MODBASE(obj->i2c.i2c);
AnnaBridge 175:b96e65c34a4d 576 uint32_t status;
AnnaBridge 175:b96e65c34a4d 577
AnnaBridge 175:b96e65c34a4d 578 if (I2C_GET_TIMEOUT_FLAG(i2c_base)) {
AnnaBridge 175:b96e65c34a4d 579 I2C_ClearTimeoutFlag(i2c_base);
AnnaBridge 175:b96e65c34a4d 580 return;
AnnaBridge 175:b96e65c34a4d 581 }
AnnaBridge 175:b96e65c34a4d 582
AnnaBridge 175:b96e65c34a4d 583 status = I2C_GET_STATUS(i2c_base);
AnnaBridge 175:b96e65c34a4d 584 #if NU_I2C_DEBUG
AnnaBridge 175:b96e65c34a4d 585 if (MY_I2C_STATUS_POS < (sizeof (MY_I2C_STATUS) / sizeof (MY_I2C_STATUS[0]))) {
AnnaBridge 175:b96e65c34a4d 586 MY_I2C_STATUS[MY_I2C_STATUS_POS ++] = status;
AnnaBridge 175:b96e65c34a4d 587 }
AnnaBridge 175:b96e65c34a4d 588 else {
AnnaBridge 175:b96e65c34a4d 589 memset(MY_I2C_STATUS, 0x00, sizeof (MY_I2C_STATUS));
AnnaBridge 175:b96e65c34a4d 590 MY_I2C_STATUS_POS = 0;
AnnaBridge 175:b96e65c34a4d 591 }
AnnaBridge 175:b96e65c34a4d 592 #endif
AnnaBridge 175:b96e65c34a4d 593
AnnaBridge 175:b96e65c34a4d 594 switch (status) {
AnnaBridge 175:b96e65c34a4d 595 // Master Transmit
AnnaBridge 175:b96e65c34a4d 596 case 0x28: // Master Transmit Data ACK
AnnaBridge 175:b96e65c34a4d 597 case 0x18: // Master Transmit Address ACK
AnnaBridge 175:b96e65c34a4d 598 case 0x08: // Start
AnnaBridge 175:b96e65c34a4d 599 case 0x10: // Master Repeat Start
AnnaBridge 175:b96e65c34a4d 600 if ((obj->i2c.tran_ctrl & TRANCTRL_STARTED) && obj->i2c.tran_pos) {
AnnaBridge 175:b96e65c34a4d 601 if (obj->i2c.tran_pos < obj->i2c.tran_end) {
AnnaBridge 175:b96e65c34a4d 602 I2C_SET_DATA(i2c_base, *obj->i2c.tran_pos ++);
AnnaBridge 175:b96e65c34a4d 603 i2c_set_control_reg(i2c_base, I2C_CON_I2C_STS_Msk | I2C_CON_ACK_Msk);
AnnaBridge 175:b96e65c34a4d 604 }
AnnaBridge 175:b96e65c34a4d 605 else {
AnnaBridge 175:b96e65c34a4d 606 i2c_fsm_tranfini(obj, 0);
AnnaBridge 175:b96e65c34a4d 607 }
AnnaBridge 175:b96e65c34a4d 608 }
AnnaBridge 175:b96e65c34a4d 609 else {
AnnaBridge 175:b96e65c34a4d 610 i2c_disable_int(obj);
AnnaBridge 175:b96e65c34a4d 611 }
AnnaBridge 175:b96e65c34a4d 612 break;
AnnaBridge 175:b96e65c34a4d 613
AnnaBridge 175:b96e65c34a4d 614 case 0x30: // Master Transmit Data NACK
AnnaBridge 175:b96e65c34a4d 615 i2c_fsm_tranfini(obj, 1);
AnnaBridge 175:b96e65c34a4d 616 break;
AnnaBridge 175:b96e65c34a4d 617
AnnaBridge 175:b96e65c34a4d 618 case 0x20: // Master Transmit Address NACK
AnnaBridge 175:b96e65c34a4d 619 i2c_fsm_tranfini(obj, 1);
AnnaBridge 175:b96e65c34a4d 620 break;
AnnaBridge 175:b96e65c34a4d 621
AnnaBridge 175:b96e65c34a4d 622 case 0x38: // Master Arbitration Lost
AnnaBridge 175:b96e65c34a4d 623 i2c_fsm_reset(obj, I2C_CON_I2C_STS_Msk | I2C_CON_ACK_Msk);
AnnaBridge 175:b96e65c34a4d 624 break;
AnnaBridge 175:b96e65c34a4d 625
AnnaBridge 175:b96e65c34a4d 626 case 0x48: // Master Receive Address NACK
AnnaBridge 175:b96e65c34a4d 627 i2c_fsm_tranfini(obj, 1);
AnnaBridge 175:b96e65c34a4d 628 break;
AnnaBridge 175:b96e65c34a4d 629
AnnaBridge 175:b96e65c34a4d 630 case 0x40: // Master Receive Address ACK
AnnaBridge 175:b96e65c34a4d 631 case 0x50: // Master Receive Data ACK
AnnaBridge 175:b96e65c34a4d 632 case 0x58: // Master Receive Data NACK
AnnaBridge 175:b96e65c34a4d 633 if ((obj->i2c.tran_ctrl & TRANCTRL_STARTED) && obj->i2c.tran_pos) {
AnnaBridge 175:b96e65c34a4d 634 if (obj->i2c.tran_pos < obj->i2c.tran_end) {
AnnaBridge 175:b96e65c34a4d 635 if (status == 0x50 || status == 0x58) {
AnnaBridge 175:b96e65c34a4d 636 *obj->i2c.tran_pos ++ = I2C_GET_DATA(i2c_base);
AnnaBridge 175:b96e65c34a4d 637 }
AnnaBridge 175:b96e65c34a4d 638
AnnaBridge 175:b96e65c34a4d 639 if (status == 0x58) {
AnnaBridge 175:b96e65c34a4d 640 #if NU_I2C_DEBUG
AnnaBridge 175:b96e65c34a4d 641 if (obj->i2c.tran_pos != obj->i2c.tran_end) {
AnnaBridge 175:b96e65c34a4d 642 MY_I2C = obj->i2c;
AnnaBridge 175:b96e65c34a4d 643 while (1);
AnnaBridge 175:b96e65c34a4d 644 }
AnnaBridge 175:b96e65c34a4d 645 #endif
AnnaBridge 175:b96e65c34a4d 646 i2c_fsm_tranfini(obj, 1);
AnnaBridge 175:b96e65c34a4d 647 }
AnnaBridge 175:b96e65c34a4d 648 else {
AnnaBridge 175:b96e65c34a4d 649 uint32_t i2c_ctl = I2C_CON_I2C_STS_Msk | I2C_CON_ACK_Msk;
AnnaBridge 175:b96e65c34a4d 650 if ((obj->i2c.tran_end - obj->i2c.tran_pos) == 1 &&
AnnaBridge 175:b96e65c34a4d 651 obj->i2c.tran_ctrl & TRANCTRL_NAKLASTDATA) {
AnnaBridge 175:b96e65c34a4d 652 // Last data
AnnaBridge 175:b96e65c34a4d 653 i2c_ctl &= ~I2C_CON_ACK_Msk;
AnnaBridge 175:b96e65c34a4d 654 }
AnnaBridge 175:b96e65c34a4d 655 i2c_set_control_reg(i2c_base, i2c_ctl);
AnnaBridge 175:b96e65c34a4d 656 }
AnnaBridge 175:b96e65c34a4d 657 }
AnnaBridge 175:b96e65c34a4d 658 else {
AnnaBridge 175:b96e65c34a4d 659 obj->i2c.tran_ctrl &= ~TRANCTRL_STARTED;
AnnaBridge 175:b96e65c34a4d 660 i2c_disable_int(obj);
AnnaBridge 175:b96e65c34a4d 661 break;
AnnaBridge 175:b96e65c34a4d 662 }
AnnaBridge 175:b96e65c34a4d 663 }
AnnaBridge 175:b96e65c34a4d 664 else {
AnnaBridge 175:b96e65c34a4d 665 i2c_disable_int(obj);
AnnaBridge 175:b96e65c34a4d 666 }
AnnaBridge 175:b96e65c34a4d 667 break;
AnnaBridge 175:b96e65c34a4d 668
AnnaBridge 175:b96e65c34a4d 669 //case 0x00: // Bus error
AnnaBridge 175:b96e65c34a4d 670
AnnaBridge 175:b96e65c34a4d 671 // Slave Transmit
AnnaBridge 175:b96e65c34a4d 672 case 0xB8: // Slave Transmit Data ACK
AnnaBridge 175:b96e65c34a4d 673 case 0xA8: // Slave Transmit Address ACK
AnnaBridge 175:b96e65c34a4d 674 case 0xB0: // Slave Transmit Arbitration Lost
AnnaBridge 175:b96e65c34a4d 675 if ((obj->i2c.tran_ctrl & TRANCTRL_STARTED) && obj->i2c.tran_pos) {
AnnaBridge 175:b96e65c34a4d 676 if (obj->i2c.tran_pos < obj->i2c.tran_end) {
AnnaBridge 175:b96e65c34a4d 677 uint32_t i2c_ctl = I2C_CON_I2C_STS_Msk | I2C_CON_ACK_Msk;
AnnaBridge 175:b96e65c34a4d 678
AnnaBridge 175:b96e65c34a4d 679 I2C_SET_DATA(i2c_base, *obj->i2c.tran_pos ++);
AnnaBridge 175:b96e65c34a4d 680 if (obj->i2c.tran_pos == obj->i2c.tran_end &&
AnnaBridge 175:b96e65c34a4d 681 obj->i2c.tran_ctrl & TRANCTRL_NAKLASTDATA) {
AnnaBridge 175:b96e65c34a4d 682 // Last data
AnnaBridge 175:b96e65c34a4d 683 i2c_ctl &= ~I2C_CON_ACK_Msk;
AnnaBridge 175:b96e65c34a4d 684 }
AnnaBridge 175:b96e65c34a4d 685 i2c_set_control_reg(i2c_base, i2c_ctl);
AnnaBridge 175:b96e65c34a4d 686 }
AnnaBridge 175:b96e65c34a4d 687 else {
AnnaBridge 175:b96e65c34a4d 688 obj->i2c.tran_ctrl &= ~TRANCTRL_STARTED;
AnnaBridge 175:b96e65c34a4d 689 i2c_disable_int(obj);
AnnaBridge 175:b96e65c34a4d 690 break;
AnnaBridge 175:b96e65c34a4d 691 }
AnnaBridge 175:b96e65c34a4d 692 }
AnnaBridge 175:b96e65c34a4d 693 else {
AnnaBridge 175:b96e65c34a4d 694 i2c_disable_int(obj);
AnnaBridge 175:b96e65c34a4d 695 }
AnnaBridge 175:b96e65c34a4d 696 obj->i2c.slaveaddr_state = ReadAddressed;
AnnaBridge 175:b96e65c34a4d 697 break;
AnnaBridge 175:b96e65c34a4d 698 //case 0xA0: // Slave Transmit Repeat Start or Stop
AnnaBridge 175:b96e65c34a4d 699 case 0xC0: // Slave Transmit Data NACK
AnnaBridge 175:b96e65c34a4d 700 case 0xC8: // Slave Transmit Last Data ACK
AnnaBridge 175:b96e65c34a4d 701 obj->i2c.slaveaddr_state = NoData;
AnnaBridge 175:b96e65c34a4d 702 i2c_fsm_reset(obj, I2C_CON_I2C_STS_Msk | I2C_CON_ACK_Msk);
AnnaBridge 175:b96e65c34a4d 703 break;
AnnaBridge 175:b96e65c34a4d 704
AnnaBridge 175:b96e65c34a4d 705 // Slave Receive
AnnaBridge 175:b96e65c34a4d 706 case 0x80: // Slave Receive Data ACK
AnnaBridge 175:b96e65c34a4d 707 case 0x88: // Slave Receive Data NACK
AnnaBridge 175:b96e65c34a4d 708 case 0x60: // Slave Receive Address ACK
AnnaBridge 175:b96e65c34a4d 709 case 0x68: // Slave Receive Arbitration Lost
AnnaBridge 175:b96e65c34a4d 710 obj->i2c.slaveaddr_state = WriteAddressed;
AnnaBridge 175:b96e65c34a4d 711 if ((obj->i2c.tran_ctrl & TRANCTRL_STARTED) && obj->i2c.tran_pos) {
AnnaBridge 175:b96e65c34a4d 712 if (obj->i2c.tran_pos < obj->i2c.tran_end) {
AnnaBridge 175:b96e65c34a4d 713 if (status == 0x80 || status == 0x88) {
AnnaBridge 175:b96e65c34a4d 714 *obj->i2c.tran_pos ++ = I2C_GET_DATA(i2c_base);
AnnaBridge 175:b96e65c34a4d 715 }
AnnaBridge 175:b96e65c34a4d 716
AnnaBridge 175:b96e65c34a4d 717 if (status == 0x88) {
AnnaBridge 175:b96e65c34a4d 718 #if NU_I2C_DEBUG
AnnaBridge 175:b96e65c34a4d 719 if (obj->i2c.tran_pos != obj->i2c.tran_end) {
AnnaBridge 175:b96e65c34a4d 720 MY_I2C = obj->i2c;
AnnaBridge 175:b96e65c34a4d 721 while (1);
AnnaBridge 175:b96e65c34a4d 722 }
AnnaBridge 175:b96e65c34a4d 723 #endif
AnnaBridge 175:b96e65c34a4d 724 obj->i2c.slaveaddr_state = NoData;
AnnaBridge 175:b96e65c34a4d 725 i2c_fsm_reset(obj, I2C_CON_I2C_STS_Msk | I2C_CON_ACK_Msk);
AnnaBridge 175:b96e65c34a4d 726 }
AnnaBridge 175:b96e65c34a4d 727 else {
AnnaBridge 175:b96e65c34a4d 728 uint32_t i2c_ctl = I2C_CON_I2C_STS_Msk | I2C_CON_ACK_Msk;
AnnaBridge 175:b96e65c34a4d 729 if ((obj->i2c.tran_end - obj->i2c.tran_pos) == 1 &&
AnnaBridge 175:b96e65c34a4d 730 obj->i2c.tran_ctrl & TRANCTRL_NAKLASTDATA) {
AnnaBridge 175:b96e65c34a4d 731 // Last data
AnnaBridge 175:b96e65c34a4d 732 i2c_ctl &= ~I2C_CON_ACK_Msk;
AnnaBridge 175:b96e65c34a4d 733 }
AnnaBridge 175:b96e65c34a4d 734 i2c_set_control_reg(i2c_base, i2c_ctl);
AnnaBridge 175:b96e65c34a4d 735 }
AnnaBridge 175:b96e65c34a4d 736 }
AnnaBridge 175:b96e65c34a4d 737 else {
AnnaBridge 175:b96e65c34a4d 738 obj->i2c.tran_ctrl &= ~TRANCTRL_STARTED;
AnnaBridge 175:b96e65c34a4d 739 i2c_disable_int(obj);
AnnaBridge 175:b96e65c34a4d 740 break;
AnnaBridge 175:b96e65c34a4d 741 }
AnnaBridge 175:b96e65c34a4d 742 }
AnnaBridge 175:b96e65c34a4d 743 else {
AnnaBridge 175:b96e65c34a4d 744 i2c_disable_int(obj);
AnnaBridge 175:b96e65c34a4d 745 }
AnnaBridge 175:b96e65c34a4d 746 break;
AnnaBridge 175:b96e65c34a4d 747 //case 0xA0: // Slave Receive Repeat Start or Stop
AnnaBridge 175:b96e65c34a4d 748
AnnaBridge 175:b96e65c34a4d 749 // GC mode
AnnaBridge 175:b96e65c34a4d 750 //case 0xA0: // GC mode Repeat Start or Stop
AnnaBridge 175:b96e65c34a4d 751 case 0x90: // GC mode Data ACK
AnnaBridge 175:b96e65c34a4d 752 case 0x98: // GC mode Data NACK
AnnaBridge 175:b96e65c34a4d 753 case 0x70: // GC mode Address ACK
AnnaBridge 175:b96e65c34a4d 754 case 0x78: // GC mode Arbitration Lost
AnnaBridge 175:b96e65c34a4d 755 obj->i2c.slaveaddr_state = WriteAddressed;
AnnaBridge 175:b96e65c34a4d 756 if ((obj->i2c.tran_ctrl & TRANCTRL_STARTED) && obj->i2c.tran_pos) {
AnnaBridge 175:b96e65c34a4d 757 if (obj->i2c.tran_pos < obj->i2c.tran_end) {
AnnaBridge 175:b96e65c34a4d 758 if (status == 0x90 || status == 0x98) {
AnnaBridge 175:b96e65c34a4d 759 *obj->i2c.tran_pos ++ = I2C_GET_DATA(i2c_base);
AnnaBridge 175:b96e65c34a4d 760 }
AnnaBridge 175:b96e65c34a4d 761
AnnaBridge 175:b96e65c34a4d 762 if (status == 0x98) {
AnnaBridge 175:b96e65c34a4d 763 #if NU_I2C_DEBUG
AnnaBridge 175:b96e65c34a4d 764 if (obj->i2c.tran_pos != obj->i2c.tran_end) {
AnnaBridge 175:b96e65c34a4d 765 MY_I2C = obj->i2c;
AnnaBridge 175:b96e65c34a4d 766 while (1);
AnnaBridge 175:b96e65c34a4d 767 }
AnnaBridge 175:b96e65c34a4d 768 #endif
AnnaBridge 175:b96e65c34a4d 769 obj->i2c.slaveaddr_state = NoData;
AnnaBridge 175:b96e65c34a4d 770 i2c_fsm_reset(obj, I2C_CON_I2C_STS_Msk | I2C_CON_ACK_Msk);
AnnaBridge 175:b96e65c34a4d 771 }
AnnaBridge 175:b96e65c34a4d 772 else {
AnnaBridge 175:b96e65c34a4d 773 uint32_t i2c_ctl = I2C_CON_I2C_STS_Msk | I2C_CON_ACK_Msk;
AnnaBridge 175:b96e65c34a4d 774 if ((obj->i2c.tran_end - obj->i2c.tran_pos) == 1 &&
AnnaBridge 175:b96e65c34a4d 775 obj->i2c.tran_ctrl & TRANCTRL_NAKLASTDATA) {
AnnaBridge 175:b96e65c34a4d 776 // Last data
AnnaBridge 175:b96e65c34a4d 777 i2c_ctl &= ~I2C_CON_ACK_Msk;
AnnaBridge 175:b96e65c34a4d 778 }
AnnaBridge 175:b96e65c34a4d 779 i2c_set_control_reg(i2c_base, i2c_ctl);
AnnaBridge 175:b96e65c34a4d 780 }
AnnaBridge 175:b96e65c34a4d 781 }
AnnaBridge 175:b96e65c34a4d 782 else {
AnnaBridge 175:b96e65c34a4d 783 obj->i2c.tran_ctrl &= ~TRANCTRL_STARTED;
AnnaBridge 175:b96e65c34a4d 784 i2c_disable_int(obj);
AnnaBridge 175:b96e65c34a4d 785 break;
AnnaBridge 175:b96e65c34a4d 786 }
AnnaBridge 175:b96e65c34a4d 787 }
AnnaBridge 175:b96e65c34a4d 788 else {
AnnaBridge 175:b96e65c34a4d 789 i2c_disable_int(obj);
AnnaBridge 175:b96e65c34a4d 790 }
AnnaBridge 175:b96e65c34a4d 791 break;
AnnaBridge 175:b96e65c34a4d 792
AnnaBridge 175:b96e65c34a4d 793 case 0xF8: // Bus Released
AnnaBridge 175:b96e65c34a4d 794 break;
AnnaBridge 175:b96e65c34a4d 795
AnnaBridge 175:b96e65c34a4d 796 default:
AnnaBridge 175:b96e65c34a4d 797 i2c_fsm_reset(obj, I2C_CON_I2C_STS_Msk | I2C_CON_ACK_Msk);
AnnaBridge 175:b96e65c34a4d 798 }
AnnaBridge 175:b96e65c34a4d 799 }
AnnaBridge 175:b96e65c34a4d 800
AnnaBridge 175:b96e65c34a4d 801 static void i2c_fsm_reset(i2c_t *obj, uint32_t i2c_ctl)
AnnaBridge 175:b96e65c34a4d 802 {
AnnaBridge 175:b96e65c34a4d 803 I2C_T *i2c_base = (I2C_T *) NU_MODBASE(obj->i2c.i2c);
AnnaBridge 175:b96e65c34a4d 804
AnnaBridge 175:b96e65c34a4d 805 obj->i2c.stop = 0;
AnnaBridge 175:b96e65c34a4d 806
AnnaBridge 175:b96e65c34a4d 807 obj->i2c.tran_ctrl = 0;
AnnaBridge 175:b96e65c34a4d 808
AnnaBridge 175:b96e65c34a4d 809 i2c_set_control_reg(i2c_base, i2c_ctl);
AnnaBridge 175:b96e65c34a4d 810 obj->i2c.slaveaddr_state = NoData;
AnnaBridge 175:b96e65c34a4d 811 }
AnnaBridge 175:b96e65c34a4d 812
AnnaBridge 175:b96e65c34a4d 813 static void i2c_fsm_tranfini(i2c_t *obj, int lastdatanaked)
AnnaBridge 175:b96e65c34a4d 814 {
AnnaBridge 175:b96e65c34a4d 815 if (lastdatanaked) {
AnnaBridge 175:b96e65c34a4d 816 obj->i2c.tran_ctrl |= TRANCTRL_LASTDATANAKED;
AnnaBridge 175:b96e65c34a4d 817 }
AnnaBridge 175:b96e65c34a4d 818
AnnaBridge 175:b96e65c34a4d 819 obj->i2c.tran_ctrl &= ~TRANCTRL_STARTED;
AnnaBridge 175:b96e65c34a4d 820 i2c_disable_int(obj);
AnnaBridge 175:b96e65c34a4d 821 }
AnnaBridge 175:b96e65c34a4d 822
AnnaBridge 175:b96e65c34a4d 823 #if DEVICE_I2C_ASYNCH
AnnaBridge 175:b96e65c34a4d 824
AnnaBridge 175:b96e65c34a4d 825 void i2c_transfer_asynch(i2c_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length, uint32_t address, uint32_t stop, uint32_t handler, uint32_t event, DMAUsage hint)
AnnaBridge 175:b96e65c34a4d 826 {
AnnaBridge 175:b96e65c34a4d 827 // NOTE: M451 I2C only supports 7-bit slave address. The mbed I2C address passed in is shifted left by 1 bit (7-bit addr << 1).
AnnaBridge 175:b96e65c34a4d 828 MBED_ASSERT((address & 0xFFFFFF00) == 0);
AnnaBridge 175:b96e65c34a4d 829
AnnaBridge 175:b96e65c34a4d 830 // NOTE: First transmit and then receive.
AnnaBridge 175:b96e65c34a4d 831
AnnaBridge 175:b96e65c34a4d 832 (void) hint;
AnnaBridge 175:b96e65c34a4d 833 obj->i2c.dma_usage = DMA_USAGE_NEVER;
AnnaBridge 175:b96e65c34a4d 834 obj->i2c.stop = stop;
AnnaBridge 175:b96e65c34a4d 835 obj->i2c.address = address;
AnnaBridge 175:b96e65c34a4d 836 obj->i2c.event = event;
AnnaBridge 175:b96e65c34a4d 837 i2c_buffer_set(obj, tx, tx_length, rx, rx_length);
AnnaBridge 175:b96e65c34a4d 838
AnnaBridge 175:b96e65c34a4d 839 obj->i2c.hdlr_async = handler;
AnnaBridge 175:b96e65c34a4d 840 i2c_start(obj);
AnnaBridge 175:b96e65c34a4d 841 }
AnnaBridge 175:b96e65c34a4d 842
AnnaBridge 175:b96e65c34a4d 843 uint32_t i2c_irq_handler_asynch(i2c_t *obj)
AnnaBridge 175:b96e65c34a4d 844 {
AnnaBridge 175:b96e65c34a4d 845 int event = 0;
AnnaBridge 175:b96e65c34a4d 846
AnnaBridge 175:b96e65c34a4d 847 I2C_T *i2c_base = (I2C_T *) NU_MODBASE(obj->i2c.i2c);
AnnaBridge 175:b96e65c34a4d 848 uint32_t status = I2C_GET_STATUS(i2c_base);
AnnaBridge 175:b96e65c34a4d 849 switch (status) {
AnnaBridge 175:b96e65c34a4d 850 case 0x08: // Start
AnnaBridge 175:b96e65c34a4d 851 case 0x10: {// Master Repeat Start
AnnaBridge 175:b96e65c34a4d 852 if (obj->tx_buff.buffer && obj->tx_buff.pos < obj->tx_buff.length) {
AnnaBridge 175:b96e65c34a4d 853 I2C_SET_DATA(i2c_base, (i2c_addr2data(obj->i2c.address, 0)));
AnnaBridge 175:b96e65c34a4d 854 i2c_set_control_reg(i2c_base, I2C_CON_I2C_STS_Msk);
AnnaBridge 175:b96e65c34a4d 855 }
AnnaBridge 175:b96e65c34a4d 856 else if (obj->rx_buff.buffer && obj->rx_buff.pos < obj->rx_buff.length) {
AnnaBridge 175:b96e65c34a4d 857 I2C_SET_DATA(i2c_base, (i2c_addr2data(obj->i2c.address, 1)));
AnnaBridge 175:b96e65c34a4d 858 i2c_set_control_reg(i2c_base, I2C_CON_I2C_STS_Msk);
AnnaBridge 175:b96e65c34a4d 859 }
AnnaBridge 175:b96e65c34a4d 860 else {
AnnaBridge 175:b96e65c34a4d 861 event = I2C_EVENT_TRANSFER_COMPLETE;
AnnaBridge 175:b96e65c34a4d 862 if (obj->i2c.stop) {
AnnaBridge 175:b96e65c34a4d 863 i2c_set_control_reg(i2c_base, I2C_CON_STOP_Msk | I2C_CON_I2C_STS_Msk);
AnnaBridge 175:b96e65c34a4d 864 }
AnnaBridge 175:b96e65c34a4d 865 }
AnnaBridge 175:b96e65c34a4d 866 break;
AnnaBridge 175:b96e65c34a4d 867 }
AnnaBridge 175:b96e65c34a4d 868
AnnaBridge 175:b96e65c34a4d 869 case 0x18: // Master Transmit Address ACK
AnnaBridge 175:b96e65c34a4d 870 case 0x28: // Master Transmit Data ACK
AnnaBridge 175:b96e65c34a4d 871 if (obj->tx_buff.buffer && obj->tx_buff.pos < obj->tx_buff.length) {
AnnaBridge 175:b96e65c34a4d 872 uint8_t *tx = (uint8_t *)obj->tx_buff.buffer;
AnnaBridge 175:b96e65c34a4d 873 I2C_SET_DATA(i2c_base, tx[obj->tx_buff.pos ++]);
AnnaBridge 175:b96e65c34a4d 874 i2c_set_control_reg(i2c_base, I2C_CON_I2C_STS_Msk);
AnnaBridge 175:b96e65c34a4d 875 }
AnnaBridge 175:b96e65c34a4d 876 else if (obj->rx_buff.buffer && obj->rx_buff.pos < obj->rx_buff.length) {
AnnaBridge 175:b96e65c34a4d 877 i2c_set_control_reg(i2c_base, I2C_CON_START_Msk | I2C_CON_I2C_STS_Msk);
AnnaBridge 175:b96e65c34a4d 878 }
AnnaBridge 175:b96e65c34a4d 879 else {
AnnaBridge 175:b96e65c34a4d 880 event = I2C_EVENT_TRANSFER_COMPLETE;
AnnaBridge 175:b96e65c34a4d 881 if (obj->i2c.stop) {
AnnaBridge 175:b96e65c34a4d 882 i2c_set_control_reg(i2c_base, I2C_CON_STOP_Msk | I2C_CON_I2C_STS_Msk);
AnnaBridge 175:b96e65c34a4d 883 }
AnnaBridge 175:b96e65c34a4d 884 }
AnnaBridge 175:b96e65c34a4d 885 break;
AnnaBridge 175:b96e65c34a4d 886
AnnaBridge 175:b96e65c34a4d 887 case 0x20: // Master Transmit Address NACK
AnnaBridge 175:b96e65c34a4d 888 event = I2C_EVENT_ERROR_NO_SLAVE;
AnnaBridge 175:b96e65c34a4d 889 if (obj->i2c.stop) {
AnnaBridge 175:b96e65c34a4d 890 i2c_set_control_reg(i2c_base, I2C_CON_STOP_Msk | I2C_CON_I2C_STS_Msk);
AnnaBridge 175:b96e65c34a4d 891 }
AnnaBridge 175:b96e65c34a4d 892 break;
AnnaBridge 175:b96e65c34a4d 893
AnnaBridge 175:b96e65c34a4d 894 case 0x30: // Master Transmit Data NACK
AnnaBridge 175:b96e65c34a4d 895 if (obj->tx_buff.buffer && obj->tx_buff.pos < obj->tx_buff.length) {
AnnaBridge 175:b96e65c34a4d 896 event = I2C_EVENT_TRANSFER_EARLY_NACK;
AnnaBridge 175:b96e65c34a4d 897 i2c_set_control_reg(i2c_base, I2C_CON_STOP_Msk | I2C_CON_I2C_STS_Msk);
AnnaBridge 175:b96e65c34a4d 898 }
AnnaBridge 175:b96e65c34a4d 899 else if (obj->rx_buff.buffer && obj->rx_buff.pos < obj->rx_buff.length) {
AnnaBridge 175:b96e65c34a4d 900 i2c_set_control_reg(i2c_base, I2C_CON_START_Msk | I2C_CON_I2C_STS_Msk);
AnnaBridge 175:b96e65c34a4d 901 }
AnnaBridge 175:b96e65c34a4d 902 else {
AnnaBridge 175:b96e65c34a4d 903 event = I2C_EVENT_TRANSFER_COMPLETE;
AnnaBridge 175:b96e65c34a4d 904 if (obj->i2c.stop) {
AnnaBridge 175:b96e65c34a4d 905 i2c_set_control_reg(i2c_base, I2C_CON_STOP_Msk | I2C_CON_I2C_STS_Msk);
AnnaBridge 175:b96e65c34a4d 906 }
AnnaBridge 175:b96e65c34a4d 907 }
AnnaBridge 175:b96e65c34a4d 908 break;
AnnaBridge 175:b96e65c34a4d 909
AnnaBridge 175:b96e65c34a4d 910 case 0x38: // Master Arbitration Lost
AnnaBridge 175:b96e65c34a4d 911 i2c_set_control_reg(i2c_base, I2C_CON_I2C_STS_Msk); // Enter not addressed SLV mode
AnnaBridge 175:b96e65c34a4d 912 event = I2C_EVENT_ERROR;
AnnaBridge 175:b96e65c34a4d 913 break;
AnnaBridge 175:b96e65c34a4d 914
AnnaBridge 175:b96e65c34a4d 915 case 0x50: // Master Receive Data ACK
AnnaBridge 175:b96e65c34a4d 916 if (obj->rx_buff.buffer && obj->rx_buff.pos < obj->rx_buff.length) {
AnnaBridge 175:b96e65c34a4d 917 uint8_t *rx = (uint8_t *) obj->rx_buff.buffer;
AnnaBridge 175:b96e65c34a4d 918 rx[obj->rx_buff.pos ++] = I2C_GET_DATA(((I2C_T *) NU_MODBASE(obj->i2c.i2c)));
AnnaBridge 175:b96e65c34a4d 919 }
AnnaBridge 175:b96e65c34a4d 920 case 0x40: // Master Receive Address ACK
AnnaBridge 175:b96e65c34a4d 921 i2c_set_control_reg(i2c_base, I2C_CON_I2C_STS_Msk | ((obj->rx_buff.pos != obj->rx_buff.length - 1) ? I2C_CON_ACK_Msk : 0));
AnnaBridge 175:b96e65c34a4d 922 break;
AnnaBridge 175:b96e65c34a4d 923
AnnaBridge 175:b96e65c34a4d 924 case 0x48: // Master Receive Address NACK
AnnaBridge 175:b96e65c34a4d 925 event = I2C_EVENT_ERROR_NO_SLAVE;
AnnaBridge 175:b96e65c34a4d 926 if (obj->i2c.stop) {
AnnaBridge 175:b96e65c34a4d 927 i2c_set_control_reg(i2c_base, I2C_CON_STOP_Msk | I2C_CON_I2C_STS_Msk);
AnnaBridge 175:b96e65c34a4d 928 }
AnnaBridge 175:b96e65c34a4d 929 break;
AnnaBridge 175:b96e65c34a4d 930
AnnaBridge 175:b96e65c34a4d 931 case 0x58: // Master Receive Data NACK
AnnaBridge 175:b96e65c34a4d 932 if (obj->rx_buff.buffer && obj->rx_buff.pos < obj->rx_buff.length) {
AnnaBridge 175:b96e65c34a4d 933 uint8_t *rx = (uint8_t *) obj->rx_buff.buffer;
AnnaBridge 175:b96e65c34a4d 934 rx[obj->rx_buff.pos ++] = I2C_GET_DATA(((I2C_T *) NU_MODBASE(obj->i2c.i2c)));
AnnaBridge 175:b96e65c34a4d 935 }
AnnaBridge 175:b96e65c34a4d 936 i2c_set_control_reg(i2c_base, I2C_CON_START_Msk | I2C_CON_I2C_STS_Msk);
AnnaBridge 175:b96e65c34a4d 937 break;
AnnaBridge 175:b96e65c34a4d 938
AnnaBridge 175:b96e65c34a4d 939 case 0x00: // Bus error
AnnaBridge 175:b96e65c34a4d 940 event = I2C_EVENT_ERROR;
AnnaBridge 175:b96e65c34a4d 941 i2c_reset(obj);
AnnaBridge 175:b96e65c34a4d 942 break;
AnnaBridge 175:b96e65c34a4d 943
AnnaBridge 175:b96e65c34a4d 944 default:
AnnaBridge 175:b96e65c34a4d 945 event = I2C_EVENT_ERROR;
AnnaBridge 175:b96e65c34a4d 946 if (obj->i2c.stop) {
AnnaBridge 175:b96e65c34a4d 947 i2c_set_control_reg(i2c_base, I2C_CON_STOP_Msk | I2C_CON_I2C_STS_Msk);
AnnaBridge 175:b96e65c34a4d 948 }
AnnaBridge 175:b96e65c34a4d 949 }
AnnaBridge 175:b96e65c34a4d 950
AnnaBridge 175:b96e65c34a4d 951 if (event) {
AnnaBridge 175:b96e65c34a4d 952 i2c_teardown_async(obj);
AnnaBridge 175:b96e65c34a4d 953 }
AnnaBridge 175:b96e65c34a4d 954
AnnaBridge 175:b96e65c34a4d 955 return (event & obj->i2c.event);
AnnaBridge 175:b96e65c34a4d 956 }
AnnaBridge 175:b96e65c34a4d 957
AnnaBridge 175:b96e65c34a4d 958 uint8_t i2c_active(i2c_t *obj)
AnnaBridge 175:b96e65c34a4d 959 {
AnnaBridge 175:b96e65c34a4d 960 // hdlr_async will get non-NULL for async transfer. Use it to judge if async transfer is on-going.
AnnaBridge 175:b96e65c34a4d 961 return !! obj->i2c.hdlr_async;
AnnaBridge 175:b96e65c34a4d 962 }
AnnaBridge 175:b96e65c34a4d 963
AnnaBridge 175:b96e65c34a4d 964 void i2c_abort_asynch(i2c_t *obj)
AnnaBridge 175:b96e65c34a4d 965 {
AnnaBridge 175:b96e65c34a4d 966 i2c_teardown_async(obj);
AnnaBridge 175:b96e65c34a4d 967 i2c_stop(obj);
AnnaBridge 175:b96e65c34a4d 968 }
AnnaBridge 175:b96e65c34a4d 969
AnnaBridge 175:b96e65c34a4d 970 static void i2c_buffer_set(i2c_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length)
AnnaBridge 175:b96e65c34a4d 971 {
AnnaBridge 175:b96e65c34a4d 972 obj->tx_buff.buffer = (void *) tx;
AnnaBridge 175:b96e65c34a4d 973 obj->tx_buff.length = tx_length;
AnnaBridge 175:b96e65c34a4d 974 obj->tx_buff.pos = 0;
AnnaBridge 175:b96e65c34a4d 975 obj->rx_buff.buffer = rx;
AnnaBridge 175:b96e65c34a4d 976 obj->rx_buff.length = rx_length;
AnnaBridge 175:b96e65c34a4d 977 obj->rx_buff.pos = 0;
AnnaBridge 175:b96e65c34a4d 978 }
AnnaBridge 175:b96e65c34a4d 979
AnnaBridge 175:b96e65c34a4d 980 static void i2c_enable_vector_interrupt(i2c_t *obj, uint32_t handler, int enable)
AnnaBridge 175:b96e65c34a4d 981 {
AnnaBridge 175:b96e65c34a4d 982 const struct nu_modinit_s *modinit = get_modinit(obj->i2c.i2c, i2c_modinit_tab);
AnnaBridge 175:b96e65c34a4d 983 MBED_ASSERT(modinit != NULL);
AnnaBridge 175:b96e65c34a4d 984 MBED_ASSERT((I2CName) modinit->modname == obj->i2c.i2c);
AnnaBridge 175:b96e65c34a4d 985
AnnaBridge 175:b96e65c34a4d 986 if (enable) {
AnnaBridge 175:b96e65c34a4d 987 NVIC_SetVector(modinit->irq_n, handler);
AnnaBridge 175:b96e65c34a4d 988 i2c_enable_int(obj);
AnnaBridge 175:b96e65c34a4d 989 }
AnnaBridge 175:b96e65c34a4d 990 else {
AnnaBridge 175:b96e65c34a4d 991 i2c_disable_int(obj);
AnnaBridge 175:b96e65c34a4d 992 }
AnnaBridge 175:b96e65c34a4d 993
AnnaBridge 175:b96e65c34a4d 994 }
AnnaBridge 175:b96e65c34a4d 995
AnnaBridge 175:b96e65c34a4d 996 static void i2c_teardown_async(i2c_t *obj)
AnnaBridge 175:b96e65c34a4d 997 {
AnnaBridge 175:b96e65c34a4d 998 obj->i2c.hdlr_async = 0;
AnnaBridge 175:b96e65c34a4d 999 }
AnnaBridge 175:b96e65c34a4d 1000
AnnaBridge 175:b96e65c34a4d 1001 #endif
AnnaBridge 175:b96e65c34a4d 1002
AnnaBridge 175:b96e65c34a4d 1003 #endif