Dhruv Bhatt / Mbed 2 deprecated final_proj1

Bank Account Security System

Dependencies:   FatFileSystemSD mbed

SDFileSystem.cpp@0:7e4786a3584b, 2012-10-11 (annotated)

Committer:
Dhruv_Varun
Date:
Thu Oct 11 20:49:25 2012 +0000
Revision:
0:7e4786a3584b
Code For Bank Account Security System

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Dhruv_Varun 0:7e4786a3584b 1 /* mbed SDFileSystem Library, for providing file access to SD cards
Dhruv_Varun 0:7e4786a3584b 2 * Copyright (c) 2008-2010, sford
Dhruv_Varun 0:7e4786a3584b 3 *
Dhruv_Varun 0:7e4786a3584b 4 * Permission is hereby granted, free of charge, to any person obtaining a copy
Dhruv_Varun 0:7e4786a3584b 5 * of this software and associated documentation files (the "Software"), to deal
Dhruv_Varun 0:7e4786a3584b 6 * in the Software without restriction, including without limitation the rights
Dhruv_Varun 0:7e4786a3584b 7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
Dhruv_Varun 0:7e4786a3584b 8 * copies of the Software, and to permit persons to whom the Software is
Dhruv_Varun 0:7e4786a3584b 9 * furnished to do so, subject to the following conditions:
Dhruv_Varun 0:7e4786a3584b 10 *
Dhruv_Varun 0:7e4786a3584b 11 * The above copyright notice and this permission notice shall be included in
Dhruv_Varun 0:7e4786a3584b 12 * all copies or substantial portions of the Software.
Dhruv_Varun 0:7e4786a3584b 13 *
Dhruv_Varun 0:7e4786a3584b 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
Dhruv_Varun 0:7e4786a3584b 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
Dhruv_Varun 0:7e4786a3584b 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
Dhruv_Varun 0:7e4786a3584b 17 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
Dhruv_Varun 0:7e4786a3584b 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
Dhruv_Varun 0:7e4786a3584b 19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
Dhruv_Varun 0:7e4786a3584b 20 * THE SOFTWARE.
Dhruv_Varun 0:7e4786a3584b 21 */
Dhruv_Varun 0:7e4786a3584b 22
Dhruv_Varun 0:7e4786a3584b 23 /* Introduction
Dhruv_Varun 0:7e4786a3584b 24 * ------------
Dhruv_Varun 0:7e4786a3584b 25 * SD and MMC cards support a number of interfaces, but common to them all
Dhruv_Varun 0:7e4786a3584b 26 * is one based on SPI. This is the one I'm implmenting because it means
Dhruv_Varun 0:7e4786a3584b 27 * it is much more portable even though not so performant, and we already
Dhruv_Varun 0:7e4786a3584b 28 * have the mbed SPI Interface!
Dhruv_Varun 0:7e4786a3584b 29 *
Dhruv_Varun 0:7e4786a3584b 30 * The main reference I'm using is Chapter 7, "SPI Mode" of:
Dhruv_Varun 0:7e4786a3584b 31 * http://www.sdcard.org/developers/tech/sdcard/pls/Simplified_Physical_Layer_Spec.pdf
Dhruv_Varun 0:7e4786a3584b 32 *
Dhruv_Varun 0:7e4786a3584b 33 * SPI Startup
Dhruv_Varun 0:7e4786a3584b 34 * -----------
Dhruv_Varun 0:7e4786a3584b 35 * The SD card powers up in SD mode. The SPI interface mode is selected by
Dhruv_Varun 0:7e4786a3584b 36 * asserting CS low and sending the reset command (CMD0). The card will
Dhruv_Varun 0:7e4786a3584b 37 * respond with a (R1) response.
Dhruv_Varun 0:7e4786a3584b 38 *
Dhruv_Varun 0:7e4786a3584b 39 * CMD8 is optionally sent to determine the voltage range supported, and
Dhruv_Varun 0:7e4786a3584b 40 * indirectly determine whether it is a version 1.x SD/non-SD card or
Dhruv_Varun 0:7e4786a3584b 41 * version 2.x. I'll just ignore this for now.
Dhruv_Varun 0:7e4786a3584b 42 *
Dhruv_Varun 0:7e4786a3584b 43 * ACMD41 is repeatedly issued to initialise the card, until "in idle"
Dhruv_Varun 0:7e4786a3584b 44 * (bit 0) of the R1 response goes to '0', indicating it is initialised.
Dhruv_Varun 0:7e4786a3584b 45 *
Dhruv_Varun 0:7e4786a3584b 46 * You should also indicate whether the host supports High Capicity cards,
Dhruv_Varun 0:7e4786a3584b 47 * and check whether the card is high capacity - i'll also ignore this
Dhruv_Varun 0:7e4786a3584b 48 *
Dhruv_Varun 0:7e4786a3584b 49 * SPI Protocol
Dhruv_Varun 0:7e4786a3584b 50 * ------------
Dhruv_Varun 0:7e4786a3584b 51 * The SD SPI protocol is based on transactions made up of 8-bit words, with
Dhruv_Varun 0:7e4786a3584b 52 * the host starting every bus transaction by asserting the CS signal low. The
Dhruv_Varun 0:7e4786a3584b 53 * card always responds to commands, data blocks and errors.
Dhruv_Varun 0:7e4786a3584b 54 *
Dhruv_Varun 0:7e4786a3584b 55 * The protocol supports a CRC, but by default it is off (except for the
Dhruv_Varun 0:7e4786a3584b 56 * first reset CMD0, where the CRC can just be pre-calculated, and CMD8)
Dhruv_Varun 0:7e4786a3584b 57 * I'll leave the CRC off I think!
Dhruv_Varun 0:7e4786a3584b 58 *
Dhruv_Varun 0:7e4786a3584b 59 * Standard capacity cards have variable data block sizes, whereas High
Dhruv_Varun 0:7e4786a3584b 60 * Capacity cards fix the size of data block to 512 bytes. I'll therefore
Dhruv_Varun 0:7e4786a3584b 61 * just always use the Standard Capacity cards with a block size of 512 bytes.
Dhruv_Varun 0:7e4786a3584b 62 * This is set with CMD16.
Dhruv_Varun 0:7e4786a3584b 63 *
Dhruv_Varun 0:7e4786a3584b 64 * You can read and write single blocks (CMD17, CMD25) or multiple blocks
Dhruv_Varun 0:7e4786a3584b 65 * (CMD18, CMD25). For simplicity, I'll just use single block accesses. When
Dhruv_Varun 0:7e4786a3584b 66 * the card gets a read command, it responds with a response token, and then
Dhruv_Varun 0:7e4786a3584b 67 * a data token or an error.
Dhruv_Varun 0:7e4786a3584b 68 *
Dhruv_Varun 0:7e4786a3584b 69 * SPI Command Format
Dhruv_Varun 0:7e4786a3584b 70 * ------------------
Dhruv_Varun 0:7e4786a3584b 71 * Commands are 6-bytes long, containing the command, 32-bit argument, and CRC.
Dhruv_Varun 0:7e4786a3584b 72 *
Dhruv_Varun 0:7e4786a3584b 73 * +---------------+------------+------------+-----------+----------+--------------+
Dhruv_Varun 0:7e4786a3584b 74 * | 01 | cmd[5:0] | arg[31:24] | arg[23:16] | arg[15:8] | arg[7:0] | crc[6:0] | 1 |
Dhruv_Varun 0:7e4786a3584b 75 * +---------------+------------+------------+-----------+----------+--------------+
Dhruv_Varun 0:7e4786a3584b 76 *
Dhruv_Varun 0:7e4786a3584b 77 * As I'm not using CRC, I can fix that byte to what is needed for CMD0 (0x95)
Dhruv_Varun 0:7e4786a3584b 78 *
Dhruv_Varun 0:7e4786a3584b 79 * All Application Specific commands shall be preceded with APP_CMD (CMD55).
Dhruv_Varun 0:7e4786a3584b 80 *
Dhruv_Varun 0:7e4786a3584b 81 * SPI Response Format
Dhruv_Varun 0:7e4786a3584b 82 * -------------------
Dhruv_Varun 0:7e4786a3584b 83 * The main response format (R1) is a status byte (normally zero). Key flags:
Dhruv_Varun 0:7e4786a3584b 84 * idle - 1 if the card is in an idle state/initialising
Dhruv_Varun 0:7e4786a3584b 85 * cmd - 1 if an illegal command code was detected
Dhruv_Varun 0:7e4786a3584b 86 *
Dhruv_Varun 0:7e4786a3584b 87 * +-------------------------------------------------+
Dhruv_Varun 0:7e4786a3584b 88 * R1 | 0 | arg | addr | seq | crc | cmd | erase | idle |
Dhruv_Varun 0:7e4786a3584b 89 * +-------------------------------------------------+
Dhruv_Varun 0:7e4786a3584b 90 *
Dhruv_Varun 0:7e4786a3584b 91 * R1b is the same, except it is followed by a busy signal (zeros) until
Dhruv_Varun 0:7e4786a3584b 92 * the first non-zero byte when it is ready again.
Dhruv_Varun 0:7e4786a3584b 93 *
Dhruv_Varun 0:7e4786a3584b 94 * Data Response Token
Dhruv_Varun 0:7e4786a3584b 95 * -------------------
Dhruv_Varun 0:7e4786a3584b 96 * Every data block written to the card is acknowledged by a byte
Dhruv_Varun 0:7e4786a3584b 97 * response token
Dhruv_Varun 0:7e4786a3584b 98 *
Dhruv_Varun 0:7e4786a3584b 99 * +----------------------+
Dhruv_Varun 0:7e4786a3584b 100 * | xxx | 0 | status | 1 |
Dhruv_Varun 0:7e4786a3584b 101 * +----------------------+
Dhruv_Varun 0:7e4786a3584b 102 * 010 - OK!
Dhruv_Varun 0:7e4786a3584b 103 * 101 - CRC Error
Dhruv_Varun 0:7e4786a3584b 104 * 110 - Write Error
Dhruv_Varun 0:7e4786a3584b 105 *
Dhruv_Varun 0:7e4786a3584b 106 * Single Block Read and Write
Dhruv_Varun 0:7e4786a3584b 107 * ---------------------------
Dhruv_Varun 0:7e4786a3584b 108 *
Dhruv_Varun 0:7e4786a3584b 109 * Block transfers have a byte header, followed by the data, followed
Dhruv_Varun 0:7e4786a3584b 110 * by a 16-bit CRC. In our case, the data will always be 512 bytes.
Dhruv_Varun 0:7e4786a3584b 111 *
Dhruv_Varun 0:7e4786a3584b 112 * +------+---------+---------+- - - -+---------+-----------+----------+
Dhruv_Varun 0:7e4786a3584b 113 * | 0xFE | data[0] | data[1] | | data[n] | crc[15:8] | crc[7:0] |
Dhruv_Varun 0:7e4786a3584b 114 * +------+---------+---------+- - - -+---------+-----------+----------+
Dhruv_Varun 0:7e4786a3584b 115 */
Dhruv_Varun 0:7e4786a3584b 116
Dhruv_Varun 0:7e4786a3584b 117 #include "SDFileSystem.h"
Dhruv_Varun 0:7e4786a3584b 118
Dhruv_Varun 0:7e4786a3584b 119 #define SD_COMMAND_TIMEOUT 5000
Dhruv_Varun 0:7e4786a3584b 120
Dhruv_Varun 0:7e4786a3584b 121 SDFileSystem::SDFileSystem(PinName mosi, PinName miso, PinName sclk, PinName cs, const char* name) :
Dhruv_Varun 0:7e4786a3584b 122 FATFileSystem(name), _spi(mosi, miso, sclk), _cs(cs) {
Dhruv_Varun 0:7e4786a3584b 123 _cs = 1;
Dhruv_Varun 0:7e4786a3584b 124 }
Dhruv_Varun 0:7e4786a3584b 125
Dhruv_Varun 0:7e4786a3584b 126 #define R1_IDLE_STATE (1 << 0)
Dhruv_Varun 0:7e4786a3584b 127 #define R1_ERASE_RESET (1 << 1)
Dhruv_Varun 0:7e4786a3584b 128 #define R1_ILLEGAL_COMMAND (1 << 2)
Dhruv_Varun 0:7e4786a3584b 129 #define R1_COM_CRC_ERROR (1 << 3)
Dhruv_Varun 0:7e4786a3584b 130 #define R1_ERASE_SEQUENCE_ERROR (1 << 4)
Dhruv_Varun 0:7e4786a3584b 131 #define R1_ADDRESS_ERROR (1 << 5)
Dhruv_Varun 0:7e4786a3584b 132 #define R1_PARAMETER_ERROR (1 << 6)
Dhruv_Varun 0:7e4786a3584b 133
Dhruv_Varun 0:7e4786a3584b 134 // Types
Dhruv_Varun 0:7e4786a3584b 135 // - v1.x Standard Capacity
Dhruv_Varun 0:7e4786a3584b 136 // - v2.x Standard Capacity
Dhruv_Varun 0:7e4786a3584b 137 // - v2.x High Capacity
Dhruv_Varun 0:7e4786a3584b 138 // - Not recognised as an SD Card
Dhruv_Varun 0:7e4786a3584b 139
Dhruv_Varun 0:7e4786a3584b 140 #define SDCARD_FAIL 0
Dhruv_Varun 0:7e4786a3584b 141 #define SDCARD_V1 1
Dhruv_Varun 0:7e4786a3584b 142 #define SDCARD_V2 2
Dhruv_Varun 0:7e4786a3584b 143 #define SDCARD_V2HC 3
Dhruv_Varun 0:7e4786a3584b 144
Dhruv_Varun 0:7e4786a3584b 145 int SDFileSystem::initialise_card() {
Dhruv_Varun 0:7e4786a3584b 146 // Set to 100kHz for initialisation, and clock card with cs = 1
Dhruv_Varun 0:7e4786a3584b 147 _spi.frequency(100000);
Dhruv_Varun 0:7e4786a3584b 148 _cs = 1;
Dhruv_Varun 0:7e4786a3584b 149 for(int i=0; i<16; i++) {
Dhruv_Varun 0:7e4786a3584b 150 _spi.write(0xFF);
Dhruv_Varun 0:7e4786a3584b 151 }
Dhruv_Varun 0:7e4786a3584b 152
Dhruv_Varun 0:7e4786a3584b 153 // send CMD0, should return with all zeros except IDLE STATE set (bit 0)
Dhruv_Varun 0:7e4786a3584b 154 if(_cmd(0, 0) != R1_IDLE_STATE) {
Dhruv_Varun 0:7e4786a3584b 155 fprintf(stderr, "No disk, or could not put SD card in to SPI idle state\n");
Dhruv_Varun 0:7e4786a3584b 156 return SDCARD_FAIL;
Dhruv_Varun 0:7e4786a3584b 157 }
Dhruv_Varun 0:7e4786a3584b 158
Dhruv_Varun 0:7e4786a3584b 159 // send CMD8 to determine whther it is ver 2.x
Dhruv_Varun 0:7e4786a3584b 160 int r = _cmd8();
Dhruv_Varun 0:7e4786a3584b 161 if(r == R1_IDLE_STATE) {
Dhruv_Varun 0:7e4786a3584b 162 return initialise_card_v2();
Dhruv_Varun 0:7e4786a3584b 163 } else if(r == (R1_IDLE_STATE | R1_ILLEGAL_COMMAND)) {
Dhruv_Varun 0:7e4786a3584b 164 return initialise_card_v1();
Dhruv_Varun 0:7e4786a3584b 165 } else {
Dhruv_Varun 0:7e4786a3584b 166 fprintf(stderr, "Not in idle state after sending CMD8 (not an SD card?)\n");
Dhruv_Varun 0:7e4786a3584b 167 return SDCARD_FAIL;
Dhruv_Varun 0:7e4786a3584b 168 }
Dhruv_Varun 0:7e4786a3584b 169 }
Dhruv_Varun 0:7e4786a3584b 170
Dhruv_Varun 0:7e4786a3584b 171 int SDFileSystem::initialise_card_v1() {
Dhruv_Varun 0:7e4786a3584b 172 for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
Dhruv_Varun 0:7e4786a3584b 173 _cmd(55, 0);
Dhruv_Varun 0:7e4786a3584b 174 if(_cmd(41, 0) == 0) {
Dhruv_Varun 0:7e4786a3584b 175 return SDCARD_V1;
Dhruv_Varun 0:7e4786a3584b 176 }
Dhruv_Varun 0:7e4786a3584b 177 }
Dhruv_Varun 0:7e4786a3584b 178
Dhruv_Varun 0:7e4786a3584b 179 fprintf(stderr, "Timeout waiting for v1.x card\n");
Dhruv_Varun 0:7e4786a3584b 180 return SDCARD_FAIL;
Dhruv_Varun 0:7e4786a3584b 181 }
Dhruv_Varun 0:7e4786a3584b 182
Dhruv_Varun 0:7e4786a3584b 183 int SDFileSystem::initialise_card_v2() {
Dhruv_Varun 0:7e4786a3584b 184
Dhruv_Varun 0:7e4786a3584b 185 for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
Dhruv_Varun 0:7e4786a3584b 186 _cmd(55, 0);
Dhruv_Varun 0:7e4786a3584b 187 if(_cmd(41, 0) == 0) {
Dhruv_Varun 0:7e4786a3584b 188 _cmd58();
Dhruv_Varun 0:7e4786a3584b 189 return SDCARD_V2;
Dhruv_Varun 0:7e4786a3584b 190 }
Dhruv_Varun 0:7e4786a3584b 191 }
Dhruv_Varun 0:7e4786a3584b 192
Dhruv_Varun 0:7e4786a3584b 193 fprintf(stderr, "Timeout waiting for v2.x card\n");
Dhruv_Varun 0:7e4786a3584b 194 return SDCARD_FAIL;
Dhruv_Varun 0:7e4786a3584b 195 }
Dhruv_Varun 0:7e4786a3584b 196
Dhruv_Varun 0:7e4786a3584b 197 int SDFileSystem::disk_initialize() {
Dhruv_Varun 0:7e4786a3584b 198
Dhruv_Varun 0:7e4786a3584b 199 int i = initialise_card();
Dhruv_Varun 0:7e4786a3584b 200 // printf("init card = %d\n", i);
Dhruv_Varun 0:7e4786a3584b 201 // printf("OK\n");
Dhruv_Varun 0:7e4786a3584b 202
Dhruv_Varun 0:7e4786a3584b 203 _sectors = _sd_sectors();
Dhruv_Varun 0:7e4786a3584b 204
Dhruv_Varun 0:7e4786a3584b 205 // Set block length to 512 (CMD16)
Dhruv_Varun 0:7e4786a3584b 206 if(_cmd(16, 512) != 0) {
Dhruv_Varun 0:7e4786a3584b 207 fprintf(stderr, "Set 512-byte block timed out\n");
Dhruv_Varun 0:7e4786a3584b 208 return 1;
Dhruv_Varun 0:7e4786a3584b 209 }
Dhruv_Varun 0:7e4786a3584b 210
Dhruv_Varun 0:7e4786a3584b 211 _spi.frequency(1000000); // Set to 1MHz for data transfer
Dhruv_Varun 0:7e4786a3584b 212 return 0;
Dhruv_Varun 0:7e4786a3584b 213 }
Dhruv_Varun 0:7e4786a3584b 214
Dhruv_Varun 0:7e4786a3584b 215 int SDFileSystem::disk_write(const char *buffer, int block_number) {
Dhruv_Varun 0:7e4786a3584b 216 // set write address for single block (CMD24)
Dhruv_Varun 0:7e4786a3584b 217 if(_cmd(24, block_number * 512) != 0) {
Dhruv_Varun 0:7e4786a3584b 218 return 1;
Dhruv_Varun 0:7e4786a3584b 219 }
Dhruv_Varun 0:7e4786a3584b 220
Dhruv_Varun 0:7e4786a3584b 221 // send the data block
Dhruv_Varun 0:7e4786a3584b 222 _write(buffer, 512);
Dhruv_Varun 0:7e4786a3584b 223 return 0;
Dhruv_Varun 0:7e4786a3584b 224 }
Dhruv_Varun 0:7e4786a3584b 225
Dhruv_Varun 0:7e4786a3584b 226 int SDFileSystem::disk_read(char *buffer, int block_number) {
Dhruv_Varun 0:7e4786a3584b 227 // set read address for single block (CMD17)
Dhruv_Varun 0:7e4786a3584b 228 if(_cmd(17, block_number * 512) != 0) {
Dhruv_Varun 0:7e4786a3584b 229 return 1;
Dhruv_Varun 0:7e4786a3584b 230 }
Dhruv_Varun 0:7e4786a3584b 231
Dhruv_Varun 0:7e4786a3584b 232 // receive the data
Dhruv_Varun 0:7e4786a3584b 233 _read(buffer, 512);
Dhruv_Varun 0:7e4786a3584b 234 return 0;
Dhruv_Varun 0:7e4786a3584b 235 }
Dhruv_Varun 0:7e4786a3584b 236
Dhruv_Varun 0:7e4786a3584b 237 int SDFileSystem::disk_status() { return 0; }
Dhruv_Varun 0:7e4786a3584b 238 int SDFileSystem::disk_sync() { return 0; }
Dhruv_Varun 0:7e4786a3584b 239 int SDFileSystem::disk_sectors() { return _sectors; }
Dhruv_Varun 0:7e4786a3584b 240
Dhruv_Varun 0:7e4786a3584b 241 // PRIVATE FUNCTIONS
Dhruv_Varun 0:7e4786a3584b 242
Dhruv_Varun 0:7e4786a3584b 243 int SDFileSystem::_cmd(int cmd, int arg) {
Dhruv_Varun 0:7e4786a3584b 244 _cs = 0;
Dhruv_Varun 0:7e4786a3584b 245
Dhruv_Varun 0:7e4786a3584b 246 // send a command
Dhruv_Varun 0:7e4786a3584b 247 _spi.write(0x40 | cmd);
Dhruv_Varun 0:7e4786a3584b 248 _spi.write(arg >> 24);
Dhruv_Varun 0:7e4786a3584b 249 _spi.write(arg >> 16);
Dhruv_Varun 0:7e4786a3584b 250 _spi.write(arg >> 8);
Dhruv_Varun 0:7e4786a3584b 251 _spi.write(arg >> 0);
Dhruv_Varun 0:7e4786a3584b 252 _spi.write(0x95);
Dhruv_Varun 0:7e4786a3584b 253
Dhruv_Varun 0:7e4786a3584b 254 // wait for the repsonse (response[7] == 0)
Dhruv_Varun 0:7e4786a3584b 255 for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
Dhruv_Varun 0:7e4786a3584b 256 int response = _spi.write(0xFF);
Dhruv_Varun 0:7e4786a3584b 257 if(!(response & 0x80)) {
Dhruv_Varun 0:7e4786a3584b 258 _cs = 1;
Dhruv_Varun 0:7e4786a3584b 259 _spi.write(0xFF);
Dhruv_Varun 0:7e4786a3584b 260 return response;
Dhruv_Varun 0:7e4786a3584b 261 }
Dhruv_Varun 0:7e4786a3584b 262 }
Dhruv_Varun 0:7e4786a3584b 263 _cs = 1;
Dhruv_Varun 0:7e4786a3584b 264 _spi.write(0xFF);
Dhruv_Varun 0:7e4786a3584b 265 return -1; // timeout
Dhruv_Varun 0:7e4786a3584b 266 }
Dhruv_Varun 0:7e4786a3584b 267 int SDFileSystem::_cmdx(int cmd, int arg) {
Dhruv_Varun 0:7e4786a3584b 268 _cs = 0;
Dhruv_Varun 0:7e4786a3584b 269
Dhruv_Varun 0:7e4786a3584b 270 // send a command
Dhruv_Varun 0:7e4786a3584b 271 _spi.write(0x40 | cmd);
Dhruv_Varun 0:7e4786a3584b 272 _spi.write(arg >> 24);
Dhruv_Varun 0:7e4786a3584b 273 _spi.write(arg >> 16);
Dhruv_Varun 0:7e4786a3584b 274 _spi.write(arg >> 8);
Dhruv_Varun 0:7e4786a3584b 275 _spi.write(arg >> 0);
Dhruv_Varun 0:7e4786a3584b 276 _spi.write(0x95);
Dhruv_Varun 0:7e4786a3584b 277
Dhruv_Varun 0:7e4786a3584b 278 // wait for the repsonse (response[7] == 0)
Dhruv_Varun 0:7e4786a3584b 279 for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
Dhruv_Varun 0:7e4786a3584b 280 int response = _spi.write(0xFF);
Dhruv_Varun 0:7e4786a3584b 281 if(!(response & 0x80)) {
Dhruv_Varun 0:7e4786a3584b 282 return response;
Dhruv_Varun 0:7e4786a3584b 283 }
Dhruv_Varun 0:7e4786a3584b 284 }
Dhruv_Varun 0:7e4786a3584b 285 _cs = 1;
Dhruv_Varun 0:7e4786a3584b 286 _spi.write(0xFF);
Dhruv_Varun 0:7e4786a3584b 287 return -1; // timeout
Dhruv_Varun 0:7e4786a3584b 288 }
Dhruv_Varun 0:7e4786a3584b 289
Dhruv_Varun 0:7e4786a3584b 290
Dhruv_Varun 0:7e4786a3584b 291 int SDFileSystem::_cmd58() {
Dhruv_Varun 0:7e4786a3584b 292 _cs = 0;
Dhruv_Varun 0:7e4786a3584b 293 int arg = 0;
Dhruv_Varun 0:7e4786a3584b 294
Dhruv_Varun 0:7e4786a3584b 295 // send a command
Dhruv_Varun 0:7e4786a3584b 296 _spi.write(0x40 | 58);
Dhruv_Varun 0:7e4786a3584b 297 _spi.write(arg >> 24);
Dhruv_Varun 0:7e4786a3584b 298 _spi.write(arg >> 16);
Dhruv_Varun 0:7e4786a3584b 299 _spi.write(arg >> 8);
Dhruv_Varun 0:7e4786a3584b 300 _spi.write(arg >> 0);
Dhruv_Varun 0:7e4786a3584b 301 _spi.write(0x95);
Dhruv_Varun 0:7e4786a3584b 302
Dhruv_Varun 0:7e4786a3584b 303 // wait for the repsonse (response[7] == 0)
Dhruv_Varun 0:7e4786a3584b 304 for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
Dhruv_Varun 0:7e4786a3584b 305 int response = _spi.write(0xFF);
Dhruv_Varun 0:7e4786a3584b 306 if(!(response & 0x80)) {
Dhruv_Varun 0:7e4786a3584b 307 int ocr = _spi.write(0xFF) << 24;
Dhruv_Varun 0:7e4786a3584b 308 ocr |= _spi.write(0xFF) << 16;
Dhruv_Varun 0:7e4786a3584b 309 ocr |= _spi.write(0xFF) << 8;
Dhruv_Varun 0:7e4786a3584b 310 ocr |= _spi.write(0xFF) << 0;
Dhruv_Varun 0:7e4786a3584b 311 // printf("OCR = 0x%08X\n", ocr);
Dhruv_Varun 0:7e4786a3584b 312 _cs = 1;
Dhruv_Varun 0:7e4786a3584b 313 _spi.write(0xFF);
Dhruv_Varun 0:7e4786a3584b 314 return response;
Dhruv_Varun 0:7e4786a3584b 315 }
Dhruv_Varun 0:7e4786a3584b 316 }
Dhruv_Varun 0:7e4786a3584b 317 _cs = 1;
Dhruv_Varun 0:7e4786a3584b 318 _spi.write(0xFF);
Dhruv_Varun 0:7e4786a3584b 319 return -1; // timeout
Dhruv_Varun 0:7e4786a3584b 320 }
Dhruv_Varun 0:7e4786a3584b 321
Dhruv_Varun 0:7e4786a3584b 322 int SDFileSystem::_cmd8() {
Dhruv_Varun 0:7e4786a3584b 323 _cs = 0;
Dhruv_Varun 0:7e4786a3584b 324
Dhruv_Varun 0:7e4786a3584b 325 // send a command
Dhruv_Varun 0:7e4786a3584b 326 _spi.write(0x40 | 8); // CMD8
Dhruv_Varun 0:7e4786a3584b 327 _spi.write(0x00); // reserved
Dhruv_Varun 0:7e4786a3584b 328 _spi.write(0x00); // reserved
Dhruv_Varun 0:7e4786a3584b 329 _spi.write(0x01); // 3.3v
Dhruv_Varun 0:7e4786a3584b 330 _spi.write(0xAA); // check pattern
Dhruv_Varun 0:7e4786a3584b 331 _spi.write(0x87); // crc
Dhruv_Varun 0:7e4786a3584b 332
Dhruv_Varun 0:7e4786a3584b 333 // wait for the repsonse (response[7] == 0)
Dhruv_Varun 0:7e4786a3584b 334 for(int i=0; i<SD_COMMAND_TIMEOUT * 1000; i++) {
Dhruv_Varun 0:7e4786a3584b 335 char response[5];
Dhruv_Varun 0:7e4786a3584b 336 response[0] = _spi.write(0xFF);
Dhruv_Varun 0:7e4786a3584b 337 if(!(response[0] & 0x80)) {
Dhruv_Varun 0:7e4786a3584b 338 for(int j=1; j<5; j++) {
Dhruv_Varun 0:7e4786a3584b 339 response[i] = _spi.write(0xFF);
Dhruv_Varun 0:7e4786a3584b 340 }
Dhruv_Varun 0:7e4786a3584b 341 _cs = 1;
Dhruv_Varun 0:7e4786a3584b 342 _spi.write(0xFF);
Dhruv_Varun 0:7e4786a3584b 343 return response[0];
Dhruv_Varun 0:7e4786a3584b 344 }
Dhruv_Varun 0:7e4786a3584b 345 }
Dhruv_Varun 0:7e4786a3584b 346 _cs = 1;
Dhruv_Varun 0:7e4786a3584b 347 _spi.write(0xFF);
Dhruv_Varun 0:7e4786a3584b 348 return -1; // timeout
Dhruv_Varun 0:7e4786a3584b 349 }
Dhruv_Varun 0:7e4786a3584b 350
Dhruv_Varun 0:7e4786a3584b 351 int SDFileSystem::_read(char *buffer, int length) {
Dhruv_Varun 0:7e4786a3584b 352 _cs = 0;
Dhruv_Varun 0:7e4786a3584b 353
Dhruv_Varun 0:7e4786a3584b 354 // read until start byte (0xFF)
Dhruv_Varun 0:7e4786a3584b 355 while(_spi.write(0xFF) != 0xFE);
Dhruv_Varun 0:7e4786a3584b 356
Dhruv_Varun 0:7e4786a3584b 357 // read data
Dhruv_Varun 0:7e4786a3584b 358 for(int i=0; i<length; i++) {
Dhruv_Varun 0:7e4786a3584b 359 buffer[i] = _spi.write(0xFF);
Dhruv_Varun 0:7e4786a3584b 360 }
Dhruv_Varun 0:7e4786a3584b 361 _spi.write(0xFF); // checksum
Dhruv_Varun 0:7e4786a3584b 362 _spi.write(0xFF);
Dhruv_Varun 0:7e4786a3584b 363
Dhruv_Varun 0:7e4786a3584b 364 _cs = 1;
Dhruv_Varun 0:7e4786a3584b 365 _spi.write(0xFF);
Dhruv_Varun 0:7e4786a3584b 366 return 0;
Dhruv_Varun 0:7e4786a3584b 367 }
Dhruv_Varun 0:7e4786a3584b 368
Dhruv_Varun 0:7e4786a3584b 369 int SDFileSystem::_write(const char *buffer, int length) {
Dhruv_Varun 0:7e4786a3584b 370 _cs = 0;
Dhruv_Varun 0:7e4786a3584b 371
Dhruv_Varun 0:7e4786a3584b 372 // indicate start of block
Dhruv_Varun 0:7e4786a3584b 373 _spi.write(0xFE);
Dhruv_Varun 0:7e4786a3584b 374
Dhruv_Varun 0:7e4786a3584b 375 // write the data
Dhruv_Varun 0:7e4786a3584b 376 for(int i=0; i<length; i++) {
Dhruv_Varun 0:7e4786a3584b 377 _spi.write(buffer[i]);
Dhruv_Varun 0:7e4786a3584b 378 }
Dhruv_Varun 0:7e4786a3584b 379
Dhruv_Varun 0:7e4786a3584b 380 // write the checksum
Dhruv_Varun 0:7e4786a3584b 381 _spi.write(0xFF);
Dhruv_Varun 0:7e4786a3584b 382 _spi.write(0xFF);
Dhruv_Varun 0:7e4786a3584b 383
Dhruv_Varun 0:7e4786a3584b 384 // check the repsonse token
Dhruv_Varun 0:7e4786a3584b 385 if((_spi.write(0xFF) & 0x1F) != 0x05) {
Dhruv_Varun 0:7e4786a3584b 386 _cs = 1;
Dhruv_Varun 0:7e4786a3584b 387 _spi.write(0xFF);
Dhruv_Varun 0:7e4786a3584b 388 return 1;
Dhruv_Varun 0:7e4786a3584b 389 }
Dhruv_Varun 0:7e4786a3584b 390
Dhruv_Varun 0:7e4786a3584b 391 // wait for write to finish
Dhruv_Varun 0:7e4786a3584b 392 while(_spi.write(0xFF) == 0);
Dhruv_Varun 0:7e4786a3584b 393
Dhruv_Varun 0:7e4786a3584b 394 _cs = 1;
Dhruv_Varun 0:7e4786a3584b 395 _spi.write(0xFF);
Dhruv_Varun 0:7e4786a3584b 396 return 0;
Dhruv_Varun 0:7e4786a3584b 397 }
Dhruv_Varun 0:7e4786a3584b 398
Dhruv_Varun 0:7e4786a3584b 399 static int ext_bits(char *data, int msb, int lsb) {
Dhruv_Varun 0:7e4786a3584b 400 int bits = 0;
Dhruv_Varun 0:7e4786a3584b 401 int size = 1 + msb - lsb;
Dhruv_Varun 0:7e4786a3584b 402 for(int i=0; i<size; i++) {
Dhruv_Varun 0:7e4786a3584b 403 int position = lsb + i;
Dhruv_Varun 0:7e4786a3584b 404 int byte = 15 - (position >> 3);
Dhruv_Varun 0:7e4786a3584b 405 int bit = position & 0x7;
Dhruv_Varun 0:7e4786a3584b 406 int value = (data[byte] >> bit) & 1;
Dhruv_Varun 0:7e4786a3584b 407 bits |= value << i;
Dhruv_Varun 0:7e4786a3584b 408 }
Dhruv_Varun 0:7e4786a3584b 409 return bits;
Dhruv_Varun 0:7e4786a3584b 410 }
Dhruv_Varun 0:7e4786a3584b 411
Dhruv_Varun 0:7e4786a3584b 412 int SDFileSystem::_sd_sectors() {
Dhruv_Varun 0:7e4786a3584b 413
Dhruv_Varun 0:7e4786a3584b 414 // CMD9, Response R2 (R1 byte + 16-byte block read)
Dhruv_Varun 0:7e4786a3584b 415 if(_cmdx(9, 0) != 0) {
Dhruv_Varun 0:7e4786a3584b 416 fprintf(stderr, "Didn't get a response from the disk\n");
Dhruv_Varun 0:7e4786a3584b 417 return 0;
Dhruv_Varun 0:7e4786a3584b 418 }
Dhruv_Varun 0:7e4786a3584b 419
Dhruv_Varun 0:7e4786a3584b 420 char csd[16];
Dhruv_Varun 0:7e4786a3584b 421 if(_read(csd, 16) != 0) {
Dhruv_Varun 0:7e4786a3584b 422 fprintf(stderr, "Couldn't read csd response from disk\n");
Dhruv_Varun 0:7e4786a3584b 423 return 0;
Dhruv_Varun 0:7e4786a3584b 424 }
Dhruv_Varun 0:7e4786a3584b 425
Dhruv_Varun 0:7e4786a3584b 426 // csd_structure : csd[127:126]
Dhruv_Varun 0:7e4786a3584b 427 // c_size : csd[73:62]
Dhruv_Varun 0:7e4786a3584b 428 // c_size_mult : csd[49:47]
Dhruv_Varun 0:7e4786a3584b 429 // read_bl_len : csd[83:80] - the *maximum* read block length
Dhruv_Varun 0:7e4786a3584b 430
Dhruv_Varun 0:7e4786a3584b 431 int csd_structure = ext_bits(csd, 127, 126);
Dhruv_Varun 0:7e4786a3584b 432 int c_size = ext_bits(csd, 73, 62);
Dhruv_Varun 0:7e4786a3584b 433 int c_size_mult = ext_bits(csd, 49, 47);
Dhruv_Varun 0:7e4786a3584b 434 int read_bl_len = ext_bits(csd, 83, 80);
Dhruv_Varun 0:7e4786a3584b 435
Dhruv_Varun 0:7e4786a3584b 436 // printf("CSD_STRUCT = %d\n", csd_structure);
Dhruv_Varun 0:7e4786a3584b 437
Dhruv_Varun 0:7e4786a3584b 438 if(csd_structure != 0) {
Dhruv_Varun 0:7e4786a3584b 439 fprintf(stderr, "This disk tastes funny! I only know about type 0 CSD structures\n");
Dhruv_Varun 0:7e4786a3584b 440 return 0;
Dhruv_Varun 0:7e4786a3584b 441 }
Dhruv_Varun 0:7e4786a3584b 442
Dhruv_Varun 0:7e4786a3584b 443 // memory capacity = BLOCKNR * BLOCK_LEN
Dhruv_Varun 0:7e4786a3584b 444 // where
Dhruv_Varun 0:7e4786a3584b 445 // BLOCKNR = (C_SIZE+1) * MULT
Dhruv_Varun 0:7e4786a3584b 446 // MULT = 2^(C_SIZE_MULT+2) (C_SIZE_MULT < 8)
Dhruv_Varun 0:7e4786a3584b 447 // BLOCK_LEN = 2^READ_BL_LEN, (READ_BL_LEN < 12)
Dhruv_Varun 0:7e4786a3584b 448
Dhruv_Varun 0:7e4786a3584b 449 int block_len = 1 << read_bl_len;
Dhruv_Varun 0:7e4786a3584b 450 int mult = 1 << (c_size_mult + 2);
Dhruv_Varun 0:7e4786a3584b 451 int blocknr = (c_size + 1) * mult;
Dhruv_Varun 0:7e4786a3584b 452 int capacity = blocknr * block_len;
Dhruv_Varun 0:7e4786a3584b 453
Dhruv_Varun 0:7e4786a3584b 454 int blocks = capacity / 512;
Dhruv_Varun 0:7e4786a3584b 455
Dhruv_Varun 0:7e4786a3584b 456 return blocks;
Dhruv_Varun 0:7e4786a3584b 457 }