Deepti AST / Envt_Shield_F4_API

Environmental Shield API

BSP/Components/uvis3/uvis3.c@0:9e645e6ed2ce, 2014-08-19 (annotated)

Committer:
Deepti
Date:
Tue Aug 19 07:13:15 2014 +0000
Revision:
0:9e645e6ed2ce
Environment Shield API

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Deepti 0:9e645e6ed2ce 1 /**
Deepti 0:9e645e6ed2ce 2 ******************************************************************************
Deepti 0:9e645e6ed2ce 3 * @file uvis3.c
Deepti 0:9e645e6ed2ce 4 * @author AST Robotics Team
Deepti 0:9e645e6ed2ce 5 * @version V0.0.1
Deepti 0:9e645e6ed2ce 6 * @date 10-March-2014
Deepti 0:9e645e6ed2ce 7 * @brief This file provides a set of functions needed to manage the uvis3.
Deepti 0:9e645e6ed2ce 8 ******************************************************************************
Deepti 0:9e645e6ed2ce 9 * @attention
Deepti 0:9e645e6ed2ce 10 *
Deepti 0:9e645e6ed2ce 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
Deepti 0:9e645e6ed2ce 12 *
Deepti 0:9e645e6ed2ce 13 * Redistribution and use in source and binary forms, with or without modification,
Deepti 0:9e645e6ed2ce 14 * are permitted provided that the following conditions are met:
Deepti 0:9e645e6ed2ce 15 * 1. Redistributions of source code must retain the above copyright notice,
Deepti 0:9e645e6ed2ce 16 * this list of conditions and the following disclaimer.
Deepti 0:9e645e6ed2ce 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
Deepti 0:9e645e6ed2ce 18 * this list of conditions and the following disclaimer in the documentation
Deepti 0:9e645e6ed2ce 19 * and/or other materials provided with the distribution.
Deepti 0:9e645e6ed2ce 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Deepti 0:9e645e6ed2ce 21 * may be used to endorse or promote products derived from this software
Deepti 0:9e645e6ed2ce 22 * without specific prior written permission.
Deepti 0:9e645e6ed2ce 23 *
Deepti 0:9e645e6ed2ce 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Deepti 0:9e645e6ed2ce 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Deepti 0:9e645e6ed2ce 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Deepti 0:9e645e6ed2ce 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Deepti 0:9e645e6ed2ce 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Deepti 0:9e645e6ed2ce 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Deepti 0:9e645e6ed2ce 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Deepti 0:9e645e6ed2ce 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Deepti 0:9e645e6ed2ce 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Deepti 0:9e645e6ed2ce 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Deepti 0:9e645e6ed2ce 34 *
Deepti 0:9e645e6ed2ce 35 ******************************************************************************
Deepti 0:9e645e6ed2ce 36 */
Deepti 0:9e645e6ed2ce 37 /* Includes ------------------------------------------------------------------*/
Deepti 0:9e645e6ed2ce 38 #include "uvis3.h"
Deepti 0:9e645e6ed2ce 39
Deepti 0:9e645e6ed2ce 40 /** @addtogroup BSP
Deepti 0:9e645e6ed2ce 41 * @{
Deepti 0:9e645e6ed2ce 42 */
Deepti 0:9e645e6ed2ce 43
Deepti 0:9e645e6ed2ce 44 /** @addtogroup STM32F439_SENSITRON
Deepti 0:9e645e6ed2ce 45 * @{
Deepti 0:9e645e6ed2ce 46 */
Deepti 0:9e645e6ed2ce 47
Deepti 0:9e645e6ed2ce 48 /** @addtogroup UVIS3
Deepti 0:9e645e6ed2ce 49 * @{
Deepti 0:9e645e6ed2ce 50 */
Deepti 0:9e645e6ed2ce 51
Deepti 0:9e645e6ed2ce 52
Deepti 0:9e645e6ed2ce 53 /** @defgroup UVIS3_Private_TypesDefinitions
Deepti 0:9e645e6ed2ce 54 * @{
Deepti 0:9e645e6ed2ce 55 */
Deepti 0:9e645e6ed2ce 56
Deepti 0:9e645e6ed2ce 57 /**
Deepti 0:9e645e6ed2ce 58 * @}
Deepti 0:9e645e6ed2ce 59 */
Deepti 0:9e645e6ed2ce 60
Deepti 0:9e645e6ed2ce 61 /** @defgroup UVIS3_Private_Defines
Deepti 0:9e645e6ed2ce 62 * @{
Deepti 0:9e645e6ed2ce 63 */
Deepti 0:9e645e6ed2ce 64
Deepti 0:9e645e6ed2ce 65 /**
Deepti 0:9e645e6ed2ce 66 * @}
Deepti 0:9e645e6ed2ce 67 */
Deepti 0:9e645e6ed2ce 68
Deepti 0:9e645e6ed2ce 69 /** @defgroup UVIS3_Private_Macros
Deepti 0:9e645e6ed2ce 70 * @{
Deepti 0:9e645e6ed2ce 71 */
Deepti 0:9e645e6ed2ce 72
Deepti 0:9e645e6ed2ce 73 /**
Deepti 0:9e645e6ed2ce 74 * @}
Deepti 0:9e645e6ed2ce 75 */
Deepti 0:9e645e6ed2ce 76
Deepti 0:9e645e6ed2ce 77 /** @defgroup UVIS3_Private_Variables
Deepti 0:9e645e6ed2ce 78 * @{
Deepti 0:9e645e6ed2ce 79 */
Deepti 0:9e645e6ed2ce 80
Deepti 0:9e645e6ed2ce 81 UV_DrvTypeDef Uvis3Drv =
Deepti 0:9e645e6ed2ce 82 {
Deepti 0:9e645e6ed2ce 83 UVIS3_Init,
Deepti 0:9e645e6ed2ce 84 UVIS3_ReadID,
Deepti 0:9e645e6ed2ce 85 UVIS3_RebootCmd,
Deepti 0:9e645e6ed2ce 86 0,//UVIS3_INT1InterruptConfig,
Deepti 0:9e645e6ed2ce 87 0,//UVIS3_EnableIT,
Deepti 0:9e645e6ed2ce 88 0,//UVIS3_DisableIT,
Deepti 0:9e645e6ed2ce 89 0,
Deepti 0:9e645e6ed2ce 90 0,
Deepti 0:9e645e6ed2ce 91 UVIS3_GetIndex
Deepti 0:9e645e6ed2ce 92 };
Deepti 0:9e645e6ed2ce 93 /**
Deepti 0:9e645e6ed2ce 94 * @}
Deepti 0:9e645e6ed2ce 95 */
Deepti 0:9e645e6ed2ce 96
Deepti 0:9e645e6ed2ce 97 /** @defgroup UVIS3_Private_FunctionPrototypes
Deepti 0:9e645e6ed2ce 98 * @{
Deepti 0:9e645e6ed2ce 99 */
Deepti 0:9e645e6ed2ce 100
Deepti 0:9e645e6ed2ce 101 /**
Deepti 0:9e645e6ed2ce 102 * @}
Deepti 0:9e645e6ed2ce 103 */
Deepti 0:9e645e6ed2ce 104
Deepti 0:9e645e6ed2ce 105 /** @defgroup UVIS3_Private_Functions
Deepti 0:9e645e6ed2ce 106 * @{
Deepti 0:9e645e6ed2ce 107 */
Deepti 0:9e645e6ed2ce 108
Deepti 0:9e645e6ed2ce 109 /**
Deepti 0:9e645e6ed2ce 110 * @brief Set UVIS3 Initialization.
Deepti 0:9e645e6ed2ce 111 * @param InitStruct: it contains the configuration setting for the UVIS3.
Deepti 0:9e645e6ed2ce 112 * @retval None
Deepti 0:9e645e6ed2ce 113 */
Deepti 0:9e645e6ed2ce 114 void UVIS3_Init(UV_InitTypeDef *UVIS3_Init)
Deepti 0:9e645e6ed2ce 115 {
Deepti 0:9e645e6ed2ce 116 uint8_t ctrl = 0x00;
Deepti 0:9e645e6ed2ce 117
Deepti 0:9e645e6ed2ce 118 /* Configure the low level interface ---------------------------------------*/
Deepti 0:9e645e6ed2ce 119 UV_IO_Init();
Deepti 0:9e645e6ed2ce 120
Deepti 0:9e645e6ed2ce 121 /* Read CTRL_REG1 register */
Deepti 0:9e645e6ed2ce 122 UV_IO_Read(&ctrl, UVIS3_ADDRESS, UVIS3_CTRL_REG1_ADDR, 1);
Deepti 0:9e645e6ed2ce 123
Deepti 0:9e645e6ed2ce 124 /* Power Mode selection */
Deepti 0:9e645e6ed2ce 125 ctrl &= ~(UVIS3_MODE_MASK);
Deepti 0:9e645e6ed2ce 126 ctrl |= UVIS3_Init->Power_Mode;
Deepti 0:9e645e6ed2ce 127
Deepti 0:9e645e6ed2ce 128 // if(UVIS3_Init->Power_Mode==UVIS3_MODE_POWERDOWN) {
Deepti 0:9e645e6ed2ce 129 // ctrl |= 0x80;
Deepti 0:9e645e6ed2ce 130 // } else {
Deepti 0:9e645e6ed2ce 131 // ctrl &= 0x7F;
Deepti 0:9e645e6ed2ce 132 // }
Deepti 0:9e645e6ed2ce 133
Deepti 0:9e645e6ed2ce 134 /* Data Rate selection */
Deepti 0:9e645e6ed2ce 135 ctrl &= ~(UVIS3_ODR_MASK);
Deepti 0:9e645e6ed2ce 136 ctrl |= UVIS3_Init->Output_DataRate;
Deepti 0:9e645e6ed2ce 137
Deepti 0:9e645e6ed2ce 138 // if(UVIS3_Init->Output_DataRate==UVIS3_ODR_1HZ) {
Deepti 0:9e645e6ed2ce 139 // ctrl |= 0x01;
Deepti 0:9e645e6ed2ce 140 // } else {
Deepti 0:9e645e6ed2ce 141 // ctrl &= 0xFE;
Deepti 0:9e645e6ed2ce 142 // }
Deepti 0:9e645e6ed2ce 143
Deepti 0:9e645e6ed2ce 144 /* Write value to MEMS CTRL_REG1 regsister */
Deepti 0:9e645e6ed2ce 145 UV_IO_Write(&ctrl, UVIS3_ADDRESS, UVIS3_CTRL_REG1_ADDR, 1);
Deepti 0:9e645e6ed2ce 146
Deepti 0:9e645e6ed2ce 147 /* Write value to MEMS CTRL_REG2 regsister ??*/
Deepti 0:9e645e6ed2ce 148 //ctrl = (uint8_t) InitStruct>>8;
Deepti 0:9e645e6ed2ce 149 //UV_IO_Write(&ctrl, UVIS3_CTRL_REG2_ADDR, 1);
Deepti 0:9e645e6ed2ce 150 }
Deepti 0:9e645e6ed2ce 151
Deepti 0:9e645e6ed2ce 152 /**
Deepti 0:9e645e6ed2ce 153 * @brief Read ID address of UVIS3
Deepti 0:9e645e6ed2ce 154 * @param Device ID address
Deepti 0:9e645e6ed2ce 155 * @retval ID name
Deepti 0:9e645e6ed2ce 156 */
Deepti 0:9e645e6ed2ce 157 uint8_t UVIS3_ReadID(void)
Deepti 0:9e645e6ed2ce 158 {
Deepti 0:9e645e6ed2ce 159 uint8_t tmp;
Deepti 0:9e645e6ed2ce 160
Deepti 0:9e645e6ed2ce 161 /* Read WHO I AM register */
Deepti 0:9e645e6ed2ce 162 UV_IO_Read(&tmp, UVIS3_ADDRESS, UVIS3_WHO_AM_I_ADDR, 1);
Deepti 0:9e645e6ed2ce 163
Deepti 0:9e645e6ed2ce 164 /* Return the ID */
Deepti 0:9e645e6ed2ce 165 return (uint8_t)tmp;
Deepti 0:9e645e6ed2ce 166 }
Deepti 0:9e645e6ed2ce 167
Deepti 0:9e645e6ed2ce 168 /**
Deepti 0:9e645e6ed2ce 169 * @brief Reboot memory content of UVIS3
Deepti 0:9e645e6ed2ce 170 * @param None
Deepti 0:9e645e6ed2ce 171 * @retval None
Deepti 0:9e645e6ed2ce 172 */
Deepti 0:9e645e6ed2ce 173 void UVIS3_RebootCmd(void)
Deepti 0:9e645e6ed2ce 174 {
Deepti 0:9e645e6ed2ce 175 uint8_t tmpreg;
Deepti 0:9e645e6ed2ce 176
Deepti 0:9e645e6ed2ce 177 /* Read CTRL_REG5 register */
Deepti 0:9e645e6ed2ce 178 UV_IO_Read(&tmpreg, UVIS3_ADDRESS, UVIS3_CTRL_REG2_ADDR, 1);
Deepti 0:9e645e6ed2ce 179
Deepti 0:9e645e6ed2ce 180 /* Enable or Disable the reboot memory */
Deepti 0:9e645e6ed2ce 181 tmpreg |= UVIS3_BOOT_REBOOTMEMORY;
Deepti 0:9e645e6ed2ce 182
Deepti 0:9e645e6ed2ce 183 /* Write value to MEMS CTRL_REG5 regsister */
Deepti 0:9e645e6ed2ce 184 UV_IO_Write(&tmpreg, UVIS3_ADDRESS, UVIS3_CTRL_REG2_ADDR, 1);
Deepti 0:9e645e6ed2ce 185 }
Deepti 0:9e645e6ed2ce 186
Deepti 0:9e645e6ed2ce 187 /**
Deepti 0:9e645e6ed2ce 188 * @brief Set UVIS3 Interrupt INT1 configuration
Deepti 0:9e645e6ed2ce 189 * @param UVIS3_InterruptConfig_TypeDef: pointer to a UVIS3_InterruptConfig_TypeDef
Deepti 0:9e645e6ed2ce 190 * structure that contains the configuration setting for the UVIS3 Interrupt.
Deepti 0:9e645e6ed2ce 191 * @retval None
Deepti 0:9e645e6ed2ce 192 */
Deepti 0:9e645e6ed2ce 193 void UVIS3_INT1InterruptConfig(uint16_t Int1Config)
Deepti 0:9e645e6ed2ce 194 {
Deepti 0:9e645e6ed2ce 195
Deepti 0:9e645e6ed2ce 196 }
Deepti 0:9e645e6ed2ce 197
Deepti 0:9e645e6ed2ce 198 /**
Deepti 0:9e645e6ed2ce 199 * @brief Enable INT1
Deepti 0:9e645e6ed2ce 200 * @retval None
Deepti 0:9e645e6ed2ce 201 */
Deepti 0:9e645e6ed2ce 202 void UVIS3_EnableIT()
Deepti 0:9e645e6ed2ce 203 {
Deepti 0:9e645e6ed2ce 204
Deepti 0:9e645e6ed2ce 205 }
Deepti 0:9e645e6ed2ce 206
Deepti 0:9e645e6ed2ce 207 /**
Deepti 0:9e645e6ed2ce 208 * @brief Disable INT1
Deepti 0:9e645e6ed2ce 209 * @retval None
Deepti 0:9e645e6ed2ce 210 */
Deepti 0:9e645e6ed2ce 211 void UVIS3_DisableIT()
Deepti 0:9e645e6ed2ce 212 {
Deepti 0:9e645e6ed2ce 213
Deepti 0:9e645e6ed2ce 214 }
Deepti 0:9e645e6ed2ce 215
Deepti 0:9e645e6ed2ce 216
Deepti 0:9e645e6ed2ce 217 /**
Deepti 0:9e645e6ed2ce 218 * @brief Calculate the UVIS3 UV index data.
Deepti 0:9e645e6ed2ce 219 * @param pfData : Data out pointer
Deepti 0:9e645e6ed2ce 220 * @retval None
Deepti 0:9e645e6ed2ce 221 */
Deepti 0:9e645e6ed2ce 222 void UVIS3_GetIndex(float* pfData)
Deepti 0:9e645e6ed2ce 223 {
Deepti 0:9e645e6ed2ce 224 uint8_t tmpreg;
Deepti 0:9e645e6ed2ce 225 /* Read UVIS3_UVDATA_OUT_ADDR register */
Deepti 0:9e645e6ed2ce 226 UV_IO_Read(&tmpreg, UVIS3_ADDRESS, UVIS3_UVDATA_OUT_ADDR, 1);
Deepti 0:9e645e6ed2ce 227 //tmpreg=32;
Deepti 0:9e645e6ed2ce 228 *pfData=(float)tmpreg/16.0f;
Deepti 0:9e645e6ed2ce 229
Deepti 0:9e645e6ed2ce 230 }
Deepti 0:9e645e6ed2ce 231
Deepti 0:9e645e6ed2ce 232 /**
Deepti 0:9e645e6ed2ce 233 * @}
Deepti 0:9e645e6ed2ce 234 */
Deepti 0:9e645e6ed2ce 235
Deepti 0:9e645e6ed2ce 236 /**
Deepti 0:9e645e6ed2ce 237 * @}
Deepti 0:9e645e6ed2ce 238 */
Deepti 0:9e645e6ed2ce 239
Deepti 0:9e645e6ed2ce 240 /**
Deepti 0:9e645e6ed2ce 241 * @}
Deepti 0:9e645e6ed2ce 242 */
Deepti 0:9e645e6ed2ce 243
Deepti 0:9e645e6ed2ce 244 /**
Deepti 0:9e645e6ed2ce 245 * @}
Deepti 0:9e645e6ed2ce 246 */
Deepti 0:9e645e6ed2ce 247
Deepti 0:9e645e6ed2ce 248
Deepti 0:9e645e6ed2ce 249 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
Deepti 0:9e645e6ed2ce 250