Environmental Shield API

Committer:
Deepti
Date:
Tue Aug 19 07:13:15 2014 +0000
Revision:
0:9e645e6ed2ce
Environment Shield API

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Deepti 0:9e645e6ed2ce 1 /**
Deepti 0:9e645e6ed2ce 2 ******************************************************************************
Deepti 0:9e645e6ed2ce 3 * @file nucleo-f401re.h
Deepti 0:9e645e6ed2ce 4 * @author MCD Application Team
Deepti 0:9e645e6ed2ce 5 * @version V1.0.0
Deepti 0:9e645e6ed2ce 6 * @date 22-April-2014
Deepti 0:9e645e6ed2ce 7 * @brief This file contains definitions for:
Deepti 0:9e645e6ed2ce 8 * - LEDs and push-button available on NUCLEO-F401RE Kit
Deepti 0:9e645e6ed2ce 9 * from STMicroelectronics
Deepti 0:9e645e6ed2ce 10 * - LCD, joystick and microSD available on Adafruit 1.8" TFT LCD
Deepti 0:9e645e6ed2ce 11 * shield (reference ID 802)
Deepti 0:9e645e6ed2ce 12 ******************************************************************************
Deepti 0:9e645e6ed2ce 13 * @attention
Deepti 0:9e645e6ed2ce 14 *
Deepti 0:9e645e6ed2ce 15 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
Deepti 0:9e645e6ed2ce 16 *
Deepti 0:9e645e6ed2ce 17 * Redistribution and use in source and binary forms, with or without modification,
Deepti 0:9e645e6ed2ce 18 * are permitted provided that the following conditions are met:
Deepti 0:9e645e6ed2ce 19 * 1. Redistributions of source code must retain the above copyright notice,
Deepti 0:9e645e6ed2ce 20 * this list of conditions and the following disclaimer.
Deepti 0:9e645e6ed2ce 21 * 2. Redistributions in binary form must reproduce the above copyright notice,
Deepti 0:9e645e6ed2ce 22 * this list of conditions and the following disclaimer in the documentation
Deepti 0:9e645e6ed2ce 23 * and/or other materials provided with the distribution.
Deepti 0:9e645e6ed2ce 24 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Deepti 0:9e645e6ed2ce 25 * may be used to endorse or promote products derived from this software
Deepti 0:9e645e6ed2ce 26 * without specific prior written permission.
Deepti 0:9e645e6ed2ce 27 *
Deepti 0:9e645e6ed2ce 28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Deepti 0:9e645e6ed2ce 29 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Deepti 0:9e645e6ed2ce 30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Deepti 0:9e645e6ed2ce 31 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Deepti 0:9e645e6ed2ce 32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Deepti 0:9e645e6ed2ce 33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Deepti 0:9e645e6ed2ce 34 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Deepti 0:9e645e6ed2ce 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Deepti 0:9e645e6ed2ce 36 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Deepti 0:9e645e6ed2ce 37 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Deepti 0:9e645e6ed2ce 38 *
Deepti 0:9e645e6ed2ce 39 ******************************************************************************
Deepti 0:9e645e6ed2ce 40 */
Deepti 0:9e645e6ed2ce 41
Deepti 0:9e645e6ed2ce 42 /* Define to prevent recursive inclusion -------------------------------------*/
Deepti 0:9e645e6ed2ce 43 #ifndef __NUCLEO_F401RE_H
Deepti 0:9e645e6ed2ce 44 #define __NUCLEO_F401RE_H
Deepti 0:9e645e6ed2ce 45
Deepti 0:9e645e6ed2ce 46 #ifdef __cplusplus
Deepti 0:9e645e6ed2ce 47 extern "C" {
Deepti 0:9e645e6ed2ce 48 #endif
Deepti 0:9e645e6ed2ce 49
Deepti 0:9e645e6ed2ce 50 /* Includes ------------------------------------------------------------------*/
Deepti 0:9e645e6ed2ce 51 #include "stm32f4xx_hal.h"
Deepti 0:9e645e6ed2ce 52
Deepti 0:9e645e6ed2ce 53
Deepti 0:9e645e6ed2ce 54 /** @addtogroup BSP
Deepti 0:9e645e6ed2ce 55 * @{
Deepti 0:9e645e6ed2ce 56 */
Deepti 0:9e645e6ed2ce 57
Deepti 0:9e645e6ed2ce 58 /** @addtogroup NUCLEO_F401RE
Deepti 0:9e645e6ed2ce 59 * @{
Deepti 0:9e645e6ed2ce 60 */
Deepti 0:9e645e6ed2ce 61
Deepti 0:9e645e6ed2ce 62 /** @addtogroup NUCLEO_F401RE_LOW_LEVEL
Deepti 0:9e645e6ed2ce 63 * @{
Deepti 0:9e645e6ed2ce 64 */
Deepti 0:9e645e6ed2ce 65
Deepti 0:9e645e6ed2ce 66 /** @defgroup NUCLEO_F401RE_LOW_LEVEL_Exported_Types
Deepti 0:9e645e6ed2ce 67 * @{
Deepti 0:9e645e6ed2ce 68 */
Deepti 0:9e645e6ed2ce 69
Deepti 0:9e645e6ed2ce 70
Deepti 0:9e645e6ed2ce 71 typedef enum
Deepti 0:9e645e6ed2ce 72 {
Deepti 0:9e645e6ed2ce 73 BUTTON_KEY = 0
Deepti 0:9e645e6ed2ce 74 } Button_TypeDef;
Deepti 0:9e645e6ed2ce 75
Deepti 0:9e645e6ed2ce 76 typedef enum
Deepti 0:9e645e6ed2ce 77 {
Deepti 0:9e645e6ed2ce 78 BUTTON_MODE_GPIO = 0,
Deepti 0:9e645e6ed2ce 79 BUTTON_MODE_EXTI = 1
Deepti 0:9e645e6ed2ce 80 } ButtonMode_TypeDef;
Deepti 0:9e645e6ed2ce 81
Deepti 0:9e645e6ed2ce 82 typedef enum
Deepti 0:9e645e6ed2ce 83 {
Deepti 0:9e645e6ed2ce 84 JOY_NONE = 0,
Deepti 0:9e645e6ed2ce 85 JOY_SEL = 1,
Deepti 0:9e645e6ed2ce 86 JOY_DOWN = 2,
Deepti 0:9e645e6ed2ce 87 JOY_LEFT = 3,
Deepti 0:9e645e6ed2ce 88 JOY_RIGHT = 4,
Deepti 0:9e645e6ed2ce 89 JOY_UP = 5
Deepti 0:9e645e6ed2ce 90 } JOYState_TypeDef;
Deepti 0:9e645e6ed2ce 91
Deepti 0:9e645e6ed2ce 92 /**
Deepti 0:9e645e6ed2ce 93 * @}
Deepti 0:9e645e6ed2ce 94 */
Deepti 0:9e645e6ed2ce 95
Deepti 0:9e645e6ed2ce 96 /** @defgroup NUCLEO_F401RE_LOW_LEVEL_Exported_Constants
Deepti 0:9e645e6ed2ce 97 * @{
Deepti 0:9e645e6ed2ce 98 */
Deepti 0:9e645e6ed2ce 99
Deepti 0:9e645e6ed2ce 100 /**
Deepti 0:9e645e6ed2ce 101 * @brief Define for NUCLEO_F401RE board
Deepti 0:9e645e6ed2ce 102 */
Deepti 0:9e645e6ed2ce 103 #if !defined (USE_NUCLEO_F401RE)
Deepti 0:9e645e6ed2ce 104 #define USE_NUCLEO_F401RE
Deepti 0:9e645e6ed2ce 105 #endif
Deepti 0:9e645e6ed2ce 106
Deepti 0:9e645e6ed2ce 107 /**
Deepti 0:9e645e6ed2ce 108 * @}
Deepti 0:9e645e6ed2ce 109 */
Deepti 0:9e645e6ed2ce 110
Deepti 0:9e645e6ed2ce 111 /** @addtogroup NUCLEO_F401RE_LOW_LEVEL_LED
Deepti 0:9e645e6ed2ce 112 * @{
Deepti 0:9e645e6ed2ce 113 */
Deepti 0:9e645e6ed2ce 114 #define LEDn 1
Deepti 0:9e645e6ed2ce 115
Deepti 0:9e645e6ed2ce 116 #define LED2_PIN GPIO_PIN_5
Deepti 0:9e645e6ed2ce 117 #define LED2_GPIO_PORT GPIOA
Deepti 0:9e645e6ed2ce 118 #define LED2_GPIO_CLK_ENABLE() __GPIOA_CLK_ENABLE()
Deepti 0:9e645e6ed2ce 119 #define LED2_GPIO_CLK_DISABLE() __GPIOA_CLK_DISABLE()
Deepti 0:9e645e6ed2ce 120
Deepti 0:9e645e6ed2ce 121 #define LEDx_GPIO_CLK_ENABLE(__INDEX__) (((__INDEX__) == 0) ? LED2_GPIO_CLK_ENABLE() : 0)
Deepti 0:9e645e6ed2ce 122 #define LEDx_GPIO_CLK_DISABLE(__INDEX__) (((__INDEX__) == 0) ? LED2_GPIO_CLK_DISABLE() : 0)
Deepti 0:9e645e6ed2ce 123 /**
Deepti 0:9e645e6ed2ce 124 * @}
Deepti 0:9e645e6ed2ce 125 */
Deepti 0:9e645e6ed2ce 126
Deepti 0:9e645e6ed2ce 127 /** @addtogroup NUCLEO_F401RE_LOW_LEVEL_BUTTON
Deepti 0:9e645e6ed2ce 128 * @{
Deepti 0:9e645e6ed2ce 129 */
Deepti 0:9e645e6ed2ce 130 #define BUTTONn 1
Deepti 0:9e645e6ed2ce 131
Deepti 0:9e645e6ed2ce 132 /**
Deepti 0:9e645e6ed2ce 133 * @brief Key push-button
Deepti 0:9e645e6ed2ce 134 */
Deepti 0:9e645e6ed2ce 135 #define KEY_BUTTON_PIN GPIO_PIN_13
Deepti 0:9e645e6ed2ce 136 #define KEY_BUTTON_GPIO_PORT GPIOC
Deepti 0:9e645e6ed2ce 137 #define KEY_BUTTON_GPIO_CLK_ENABLE() __GPIOC_CLK_ENABLE()
Deepti 0:9e645e6ed2ce 138 #define KEY_BUTTON_GPIO_CLK_DISABLE() __GPIOC_CLK_DISABLE()
Deepti 0:9e645e6ed2ce 139 #define KEY_BUTTON_EXTI_LINE GPIO_PIN_13
Deepti 0:9e645e6ed2ce 140 #define KEY_BUTTON_EXTI_IRQn EXTI15_10_IRQn
Deepti 0:9e645e6ed2ce 141 //EXTI4_15_IRQn
Deepti 0:9e645e6ed2ce 142
Deepti 0:9e645e6ed2ce 143 #define BUTTONx_GPIO_CLK_ENABLE(__INDEX__) (((__INDEX__) == 0) ? KEY_BUTTON_GPIO_CLK_ENABLE() : 0)
Deepti 0:9e645e6ed2ce 144 #define BUTTONx_GPIO_CLK_DISABLE(__INDEX__) (((__INDEX__) == 0) ? KEY_BUTTON_GPIO_CLK_DISABLE() : 0)
Deepti 0:9e645e6ed2ce 145 /**
Deepti 0:9e645e6ed2ce 146 * @}
Deepti 0:9e645e6ed2ce 147 */
Deepti 0:9e645e6ed2ce 148
Deepti 0:9e645e6ed2ce 149 /** @addtogroup NUCLEO_F401RE_LOW_LEVEL_BUS
Deepti 0:9e645e6ed2ce 150 * @{
Deepti 0:9e645e6ed2ce 151 */
Deepti 0:9e645e6ed2ce 152 /*###################### SPI1 ###################################*/
Deepti 0:9e645e6ed2ce 153 //#define NUCLEO_SPIx SPI1
Deepti 0:9e645e6ed2ce 154 //#define NUCLEO_SPIx_CLK_ENABLE() __SPI1_CLK_ENABLE()
Deepti 0:9e645e6ed2ce 155 //
Deepti 0:9e645e6ed2ce 156 //#define NUCLEO_SPIx_SCK_AF GPIO_AF0_SPI1
Deepti 0:9e645e6ed2ce 157 //#define NUCLEO_SPIx_SCK_GPIO_PORT GPIOA
Deepti 0:9e645e6ed2ce 158 //#define NUCLEO_SPIx_SCK_PIN GPIO_PIN_5
Deepti 0:9e645e6ed2ce 159 //#define NUCLEO_SPIx_SCK_GPIO_CLK_ENABLE() __GPIOA_CLK_ENABLE()
Deepti 0:9e645e6ed2ce 160 //#define NUCLEO_SPIx_SCK_GPIO_CLK_DISABLE() __GPIOA_CLK_DISABLE()
Deepti 0:9e645e6ed2ce 161 //
Deepti 0:9e645e6ed2ce 162 //#define NUCLEO_SPIx_MISO_MOSI_AF GPIO_AF0_SPI1
Deepti 0:9e645e6ed2ce 163 //#define NUCLEO_SPIx_MISO_MOSI_GPIO_PORT GPIOA
Deepti 0:9e645e6ed2ce 164 //#define NUCLEO_SPIx_MISO_MOSI_GPIO_CLK_ENABLE() __GPIOA_CLK_ENABLE()
Deepti 0:9e645e6ed2ce 165 //#define NUCLEO_SPIx_MISO_MOSI_GPIO_CLK_DISABLE() __GPIOA_CLK_DISABLE()
Deepti 0:9e645e6ed2ce 166 //#define NUCLEO_SPIx_MISO_PIN GPIO_PIN_6
Deepti 0:9e645e6ed2ce 167 //#define NUCLEO_SPIx_MOSI_PIN GPIO_PIN_7
Deepti 0:9e645e6ed2ce 168 ///* Maximum Timeout values for flags waiting loops. These timeouts are not based
Deepti 0:9e645e6ed2ce 169 // on accurate values, they just guarantee that the application will not remain
Deepti 0:9e645e6ed2ce 170 // stuck if the SPI communication is corrupted.
Deepti 0:9e645e6ed2ce 171 // You may modify these timeout values depending on CPU frequency and application
Deepti 0:9e645e6ed2ce 172 // conditions (interrupts routines ...). */
Deepti 0:9e645e6ed2ce 173 //#define NUCLEO_SPIx_TIMEOUT_MAX 1000
Deepti 0:9e645e6ed2ce 174
Deepti 0:9e645e6ed2ce 175
Deepti 0:9e645e6ed2ce 176 /**
Deepti 0:9e645e6ed2ce 177 * @brief Definition for I2C_ONBOARD_SENSORS port, connected to I2C3
Deepti 0:9e645e6ed2ce 178 */
Deepti 0:9e645e6ed2ce 179
Deepti 0:9e645e6ed2ce 180 /* I2C clock speed configuration (in Hz) */
Deepti 0:9e645e6ed2ce 181 #ifndef NUCLEO_I2C_SHIELDS_SPEED
Deepti 0:9e645e6ed2ce 182 #define NUCLEO_I2C_SHIELDS_SPEED 100000
Deepti 0:9e645e6ed2ce 183 #endif /* I2C_ONBOARD_SENSORS_SPEED */
Deepti 0:9e645e6ed2ce 184
Deepti 0:9e645e6ed2ce 185 /* I2C peripheral configuration defines (control interface of the audio codec) */
Deepti 0:9e645e6ed2ce 186 #define NUCLEO_I2C_SHIELDS I2C1
Deepti 0:9e645e6ed2ce 187 #define NUCLEO_I2C_SHIELDS_CLK_ENABLE() __I2C1_CLK_ENABLE()
Deepti 0:9e645e6ed2ce 188 #define NUCLEO_I2C_SHIELDS_SCL_SDA_GPIO_CLK_ENABLE() __GPIOB_CLK_ENABLE()
Deepti 0:9e645e6ed2ce 189 #define NUCLEO_I2C_SHIELDS_SCL_SDA_AF GPIO_AF4_I2C1
Deepti 0:9e645e6ed2ce 190 #define NUCLEO_I2C_SHIELDS_SCL_SDA_GPIO_PORT GPIOB
Deepti 0:9e645e6ed2ce 191 #define NUCLEO_I2C_SHIELDS_SCL_PIN GPIO_PIN_8
Deepti 0:9e645e6ed2ce 192 #define NUCLEO_I2C_SHIELDS_SDA_PIN GPIO_PIN_9
Deepti 0:9e645e6ed2ce 193
Deepti 0:9e645e6ed2ce 194 #define NUCLEO_I2C_SHIELDS_FORCE_RESET() __I2C1_FORCE_RESET()
Deepti 0:9e645e6ed2ce 195 #define NUCLEO_I2C_SHIELDS_RELEASE_RESET() __I2C1_RELEASE_RESET()
Deepti 0:9e645e6ed2ce 196
Deepti 0:9e645e6ed2ce 197 /* I2C interrupt requests */
Deepti 0:9e645e6ed2ce 198 #define NUCLEO_I2C_SHIELDS_EV_IRQn I2C1_EV_IRQn
Deepti 0:9e645e6ed2ce 199 #define NUCLEO_I2C_SHIELDS_ER_IRQn I2C1_ER_IRQn
Deepti 0:9e645e6ed2ce 200
Deepti 0:9e645e6ed2ce 201 //#define NUCLEO_I2C_SHIELDS_MUTEX I2C1_Mutex_id
Deepti 0:9e645e6ed2ce 202 //#define NUCLEO_I2C_SHIELDS_MUTEX_TAKE() osMutexWait(NUCLEO_I2C_SHIELDS_MUTEX, 0)
Deepti 0:9e645e6ed2ce 203 //#define NUCLEO_I2C_SHIELDS_MUTEX_RELEASE() osMutexRelease(NUCLEO_I2C_SHIELDS_MUTEX)
Deepti 0:9e645e6ed2ce 204
Deepti 0:9e645e6ed2ce 205 /* Maximum Timeout values for flags waiting loops. These timeouts are not based
Deepti 0:9e645e6ed2ce 206 on accurate values, they just guarantee that the application will not remain
Deepti 0:9e645e6ed2ce 207 stuck if the SPI communication is corrupted.
Deepti 0:9e645e6ed2ce 208 You may modify these timeout values depending on CPU frequency and application
Deepti 0:9e645e6ed2ce 209 conditions (interrupts routines ...). */
Deepti 0:9e645e6ed2ce 210 #define NUCLEO_I2C_SHIELDS_TIMEOUT_MAX 0x1000 /*<! The value of the maximal timeout for BUS waiting loops */
Deepti 0:9e645e6ed2ce 211
Deepti 0:9e645e6ed2ce 212 /** @addtogroup NUCLEO_F401RE_LOW_LEVEL_COMPONENT
Deepti 0:9e645e6ed2ce 213 * @{
Deepti 0:9e645e6ed2ce 214 */
Deepti 0:9e645e6ed2ce 215
Deepti 0:9e645e6ed2ce 216 /**
Deepti 0:9e645e6ed2ce 217 * @brief SD Control Lines management
Deepti 0:9e645e6ed2ce 218 */
Deepti 0:9e645e6ed2ce 219 #define SD_CS_LOW() HAL_GPIO_WritePin(SD_CS_GPIO_PORT, SD_CS_PIN, GPIO_PIN_RESET)
Deepti 0:9e645e6ed2ce 220 #define SD_CS_HIGH() HAL_GPIO_WritePin(SD_CS_GPIO_PORT, SD_CS_PIN, GPIO_PIN_SET)
Deepti 0:9e645e6ed2ce 221
Deepti 0:9e645e6ed2ce 222 /**
Deepti 0:9e645e6ed2ce 223 * @brief LCD Control Lines management
Deepti 0:9e645e6ed2ce 224 */
Deepti 0:9e645e6ed2ce 225 #define LCD_CS_LOW() HAL_GPIO_WritePin(LCD_CS_GPIO_PORT, LCD_CS_PIN, GPIO_PIN_RESET)
Deepti 0:9e645e6ed2ce 226 #define LCD_CS_HIGH() HAL_GPIO_WritePin(LCD_CS_GPIO_PORT, LCD_CS_PIN, GPIO_PIN_SET)
Deepti 0:9e645e6ed2ce 227 #define LCD_DC_LOW() HAL_GPIO_WritePin(LCD_DC_GPIO_PORT, LCD_DC_PIN, GPIO_PIN_RESET)
Deepti 0:9e645e6ed2ce 228 #define LCD_DC_HIGH() HAL_GPIO_WritePin(LCD_DC_GPIO_PORT, LCD_DC_PIN, GPIO_PIN_SET)
Deepti 0:9e645e6ed2ce 229
Deepti 0:9e645e6ed2ce 230 /**
Deepti 0:9e645e6ed2ce 231 * @brief SD Control Interface pins
Deepti 0:9e645e6ed2ce 232 */
Deepti 0:9e645e6ed2ce 233 #define SD_CS_PIN GPIO_PIN_5
Deepti 0:9e645e6ed2ce 234 #define SD_CS_GPIO_PORT GPIOB
Deepti 0:9e645e6ed2ce 235 #define SD_CS_GPIO_CLK_ENABLE() __GPIOB_CLK_ENABLE()
Deepti 0:9e645e6ed2ce 236 #define SD_CS_GPIO_CLK_DISABLE() __GPIOB_CLK_DISABLE()
Deepti 0:9e645e6ed2ce 237
Deepti 0:9e645e6ed2ce 238 /**
Deepti 0:9e645e6ed2ce 239 * @brief LCD Control Interface pins
Deepti 0:9e645e6ed2ce 240 */
Deepti 0:9e645e6ed2ce 241 #define LCD_CS_PIN GPIO_PIN_6
Deepti 0:9e645e6ed2ce 242 #define LCD_CS_GPIO_PORT GPIOB
Deepti 0:9e645e6ed2ce 243 #define LCD_CS_GPIO_CLK_ENABLE() __GPIOB_CLK_ENABLE()
Deepti 0:9e645e6ed2ce 244 #define LCD_CS_GPIO_CLK_DISABLE() __GPIOB_CLK_DISABLE()
Deepti 0:9e645e6ed2ce 245
Deepti 0:9e645e6ed2ce 246 /**
Deepti 0:9e645e6ed2ce 247 * @brief LCD Data/Command Interface pins
Deepti 0:9e645e6ed2ce 248 */
Deepti 0:9e645e6ed2ce 249 #define LCD_DC_PIN GPIO_PIN_9
Deepti 0:9e645e6ed2ce 250 #define LCD_DC_GPIO_PORT GPIOA
Deepti 0:9e645e6ed2ce 251 #define LCD_DC_GPIO_CLK_ENABLE() __GPIOA_CLK_ENABLE()
Deepti 0:9e645e6ed2ce 252 #define LCD_DC_GPIO_CLK_DISABLE() __GPIOA_CLK_DISABLE()
Deepti 0:9e645e6ed2ce 253
Deepti 0:9e645e6ed2ce 254 /*##################### ADC1 ###################################*/
Deepti 0:9e645e6ed2ce 255 /**
Deepti 0:9e645e6ed2ce 256 * @brief ADC Interface pins
Deepti 0:9e645e6ed2ce 257 * used to detect motion of Joystick available on Adafruit 1.8" TFT shield
Deepti 0:9e645e6ed2ce 258 */
Deepti 0:9e645e6ed2ce 259 #define NUCLEO_ADCx ADC1
Deepti 0:9e645e6ed2ce 260 #define NUCLEO_ADCx_CLK_ENABLE() __ADC1_CLK_ENABLE()
Deepti 0:9e645e6ed2ce 261
Deepti 0:9e645e6ed2ce 262 #define NUCLEO_ADCx_GPIO_PORT GPIOB
Deepti 0:9e645e6ed2ce 263 #define NUCLEO_ADCx_GPIO_PIN GPIO_PIN_0
Deepti 0:9e645e6ed2ce 264 #define NUCLEO_ADCx_GPIO_CLK_ENABLE() __GPIOB_CLK_ENABLE()
Deepti 0:9e645e6ed2ce 265 #define NUCLEO_ADCx_GPIO_CLK_DISABLE() __GPIOB_CLK_ENABLE()
Deepti 0:9e645e6ed2ce 266
Deepti 0:9e645e6ed2ce 267
Deepti 0:9e645e6ed2ce 268 /* User can use this section to tailor USARTx/UARTx instance used and associated
Deepti 0:9e645e6ed2ce 269 resources */
Deepti 0:9e645e6ed2ce 270 /* Definition for USARTx clock resources */
Deepti 0:9e645e6ed2ce 271 #define USARTx USART2
Deepti 0:9e645e6ed2ce 272 #define USARTx_CLK_ENABLE() __USART2_CLK_ENABLE();
Deepti 0:9e645e6ed2ce 273 #define DMAx_CLK_ENABLE() __DMA1_CLK_ENABLE()
Deepti 0:9e645e6ed2ce 274 #define USARTx_RX_GPIO_CLK_ENABLE() __GPIOA_CLK_ENABLE()
Deepti 0:9e645e6ed2ce 275 #define USARTx_TX_GPIO_CLK_ENABLE() __GPIOA_CLK_ENABLE()
Deepti 0:9e645e6ed2ce 276
Deepti 0:9e645e6ed2ce 277 #define USARTx_FORCE_RESET() __USART2_FORCE_RESET()
Deepti 0:9e645e6ed2ce 278 #define USARTx_RELEASE_RESET() __USART2_RELEASE_RESET()
Deepti 0:9e645e6ed2ce 279
Deepti 0:9e645e6ed2ce 280 /* Definition for USARTx Pins */
Deepti 0:9e645e6ed2ce 281 #define USARTx_TX_PIN GPIO_PIN_2
Deepti 0:9e645e6ed2ce 282 #define USARTx_TX_GPIO_PORT GPIOA
Deepti 0:9e645e6ed2ce 283 #define USARTx_TX_AF GPIO_AF7_USART2
Deepti 0:9e645e6ed2ce 284 #define USARTx_RX_PIN GPIO_PIN_3
Deepti 0:9e645e6ed2ce 285 #define USARTx_RX_GPIO_PORT GPIOA
Deepti 0:9e645e6ed2ce 286 #define USARTx_RX_AF GPIO_AF7_USART2
Deepti 0:9e645e6ed2ce 287
Deepti 0:9e645e6ed2ce 288 /* Definition for USARTx's DMA */
Deepti 0:9e645e6ed2ce 289 #define USARTx_TX_DMA_CHANNEL DMA_CHANNEL_4
Deepti 0:9e645e6ed2ce 290 #define USARTx_TX_DMA_STREAM DMA1_Stream6
Deepti 0:9e645e6ed2ce 291 #define USARTx_RX_DMA_CHANNEL DMA_CHANNEL_4
Deepti 0:9e645e6ed2ce 292 #define USARTx_RX_DMA_STREAM DMA1_Stream5
Deepti 0:9e645e6ed2ce 293
Deepti 0:9e645e6ed2ce 294 /** @defgroup NUCLEO_F401RE_LOW_LEVEL_Exported_Macros
Deepti 0:9e645e6ed2ce 295 * @{
Deepti 0:9e645e6ed2ce 296 */
Deepti 0:9e645e6ed2ce 297 /**
Deepti 0:9e645e6ed2ce 298 * @}
Deepti 0:9e645e6ed2ce 299 */
Deepti 0:9e645e6ed2ce 300
Deepti 0:9e645e6ed2ce 301 /**
Deepti 0:9e645e6ed2ce 302 * @}
Deepti 0:9e645e6ed2ce 303 */
Deepti 0:9e645e6ed2ce 304
Deepti 0:9e645e6ed2ce 305 #ifdef __cplusplus
Deepti 0:9e645e6ed2ce 306 }
Deepti 0:9e645e6ed2ce 307 #endif
Deepti 0:9e645e6ed2ce 308
Deepti 0:9e645e6ed2ce 309 #endif /* __NUCLEO_F401RE_H */
Deepti 0:9e645e6ed2ce 310 /**
Deepti 0:9e645e6ed2ce 311 * @}
Deepti 0:9e645e6ed2ce 312 */
Deepti 0:9e645e6ed2ce 313
Deepti 0:9e645e6ed2ce 314 /**
Deepti 0:9e645e6ed2ce 315 * @}
Deepti 0:9e645e6ed2ce 316 */
Deepti 0:9e645e6ed2ce 317
Deepti 0:9e645e6ed2ce 318 /**
Deepti 0:9e645e6ed2ce 319 * @}
Deepti 0:9e645e6ed2ce 320 */
Deepti 0:9e645e6ed2ce 321
Deepti 0:9e645e6ed2ce 322 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
Deepti 0:9e645e6ed2ce 323
Deepti 0:9e645e6ed2ce 324