R1 code for micro:bit based train controller code, requires second micro:bit running rx code to operate - see https://meanderingpi.wordpress.com/ for more information
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TARGET_NRF51_MICROBIT/compiler_abstraction.h@0:e1a608bb55e8, 2016-04-07 (annotated)
- Committer:
- jamesadevine
- Date:
- Thu Apr 07 18:33:58 2016 +0100
- Revision:
- 0:e1a608bb55e8
Added binary version of mbed
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
jamesadevine | 0:e1a608bb55e8 | 1 | /* Copyright (c) 2013, Nordic Semiconductor ASA |
jamesadevine | 0:e1a608bb55e8 | 2 | * All rights reserved. |
jamesadevine | 0:e1a608bb55e8 | 3 | * |
jamesadevine | 0:e1a608bb55e8 | 4 | * Redistribution and use in source and binary forms, with or without |
jamesadevine | 0:e1a608bb55e8 | 5 | * modification, are permitted provided that the following conditions are met: |
jamesadevine | 0:e1a608bb55e8 | 6 | * |
jamesadevine | 0:e1a608bb55e8 | 7 | * * Redistributions of source code must retain the above copyright notice, this |
jamesadevine | 0:e1a608bb55e8 | 8 | * list of conditions and the following disclaimer. |
jamesadevine | 0:e1a608bb55e8 | 9 | * |
jamesadevine | 0:e1a608bb55e8 | 10 | * * Redistributions in binary form must reproduce the above copyright notice, |
jamesadevine | 0:e1a608bb55e8 | 11 | * this list of conditions and the following disclaimer in the documentation |
jamesadevine | 0:e1a608bb55e8 | 12 | * and/or other materials provided with the distribution. |
jamesadevine | 0:e1a608bb55e8 | 13 | * |
jamesadevine | 0:e1a608bb55e8 | 14 | * * Neither the name of Nordic Semiconductor ASA nor the names of its |
jamesadevine | 0:e1a608bb55e8 | 15 | * contributors may be used to endorse or promote products derived from |
jamesadevine | 0:e1a608bb55e8 | 16 | * this software without specific prior written permission. |
jamesadevine | 0:e1a608bb55e8 | 17 | * |
jamesadevine | 0:e1a608bb55e8 | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
jamesadevine | 0:e1a608bb55e8 | 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
jamesadevine | 0:e1a608bb55e8 | 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
jamesadevine | 0:e1a608bb55e8 | 21 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
jamesadevine | 0:e1a608bb55e8 | 22 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
jamesadevine | 0:e1a608bb55e8 | 23 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
jamesadevine | 0:e1a608bb55e8 | 24 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
jamesadevine | 0:e1a608bb55e8 | 25 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
jamesadevine | 0:e1a608bb55e8 | 26 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
jamesadevine | 0:e1a608bb55e8 | 27 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
jamesadevine | 0:e1a608bb55e8 | 28 | * |
jamesadevine | 0:e1a608bb55e8 | 29 | */ |
jamesadevine | 0:e1a608bb55e8 | 30 | #ifndef _COMPILER_ABSTRACTION_H |
jamesadevine | 0:e1a608bb55e8 | 31 | #define _COMPILER_ABSTRACTION_H |
jamesadevine | 0:e1a608bb55e8 | 32 | |
jamesadevine | 0:e1a608bb55e8 | 33 | /*lint ++flb "Enter library region" */ |
jamesadevine | 0:e1a608bb55e8 | 34 | |
jamesadevine | 0:e1a608bb55e8 | 35 | #if defined ( __CC_ARM ) |
jamesadevine | 0:e1a608bb55e8 | 36 | |
jamesadevine | 0:e1a608bb55e8 | 37 | #ifndef __ASM |
jamesadevine | 0:e1a608bb55e8 | 38 | #define __ASM __asm /*!< asm keyword for ARM Compiler */ |
jamesadevine | 0:e1a608bb55e8 | 39 | #endif |
jamesadevine | 0:e1a608bb55e8 | 40 | |
jamesadevine | 0:e1a608bb55e8 | 41 | #ifndef __INLINE |
jamesadevine | 0:e1a608bb55e8 | 42 | #define __INLINE __inline /*!< inline keyword for ARM Compiler */ |
jamesadevine | 0:e1a608bb55e8 | 43 | #endif |
jamesadevine | 0:e1a608bb55e8 | 44 | |
jamesadevine | 0:e1a608bb55e8 | 45 | #ifndef __WEAK |
jamesadevine | 0:e1a608bb55e8 | 46 | #define __WEAK __weak /*!< weak keyword for ARM Compiler */ |
jamesadevine | 0:e1a608bb55e8 | 47 | #endif |
jamesadevine | 0:e1a608bb55e8 | 48 | |
jamesadevine | 0:e1a608bb55e8 | 49 | #define GET_SP() __current_sp() /*!> read current SP function for ARM Compiler */ |
jamesadevine | 0:e1a608bb55e8 | 50 | |
jamesadevine | 0:e1a608bb55e8 | 51 | #elif defined ( __ICCARM__ ) |
jamesadevine | 0:e1a608bb55e8 | 52 | |
jamesadevine | 0:e1a608bb55e8 | 53 | #ifndef __ASM |
jamesadevine | 0:e1a608bb55e8 | 54 | #define __ASM __asm /*!< asm keyword for IAR Compiler */ |
jamesadevine | 0:e1a608bb55e8 | 55 | #endif |
jamesadevine | 0:e1a608bb55e8 | 56 | |
jamesadevine | 0:e1a608bb55e8 | 57 | #ifndef __INLINE |
jamesadevine | 0:e1a608bb55e8 | 58 | #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */ |
jamesadevine | 0:e1a608bb55e8 | 59 | #endif |
jamesadevine | 0:e1a608bb55e8 | 60 | |
jamesadevine | 0:e1a608bb55e8 | 61 | #ifndef __WEAK |
jamesadevine | 0:e1a608bb55e8 | 62 | #define __WEAK __weak /*!> define weak function for IAR Compiler */ |
jamesadevine | 0:e1a608bb55e8 | 63 | #endif |
jamesadevine | 0:e1a608bb55e8 | 64 | |
jamesadevine | 0:e1a608bb55e8 | 65 | #define GET_SP() __get_SP() /*!> read current SP function for IAR Compiler */ |
jamesadevine | 0:e1a608bb55e8 | 66 | |
jamesadevine | 0:e1a608bb55e8 | 67 | #elif defined ( __GNUC__ ) |
jamesadevine | 0:e1a608bb55e8 | 68 | |
jamesadevine | 0:e1a608bb55e8 | 69 | #ifndef __ASM |
jamesadevine | 0:e1a608bb55e8 | 70 | #define __ASM __asm /*!< asm keyword for GNU Compiler */ |
jamesadevine | 0:e1a608bb55e8 | 71 | #endif |
jamesadevine | 0:e1a608bb55e8 | 72 | |
jamesadevine | 0:e1a608bb55e8 | 73 | #ifndef __INLINE |
jamesadevine | 0:e1a608bb55e8 | 74 | #define __INLINE inline /*!< inline keyword for GNU Compiler */ |
jamesadevine | 0:e1a608bb55e8 | 75 | #endif |
jamesadevine | 0:e1a608bb55e8 | 76 | |
jamesadevine | 0:e1a608bb55e8 | 77 | #ifndef __WEAK |
jamesadevine | 0:e1a608bb55e8 | 78 | #define __WEAK __attribute__((weak)) /*!< weak keyword for GNU Compiler */ |
jamesadevine | 0:e1a608bb55e8 | 79 | #endif |
jamesadevine | 0:e1a608bb55e8 | 80 | |
jamesadevine | 0:e1a608bb55e8 | 81 | #define GET_SP() gcc_current_sp() /*!> read current SP function for GNU Compiler */ |
jamesadevine | 0:e1a608bb55e8 | 82 | |
jamesadevine | 0:e1a608bb55e8 | 83 | static inline unsigned int gcc_current_sp(void) |
jamesadevine | 0:e1a608bb55e8 | 84 | { |
jamesadevine | 0:e1a608bb55e8 | 85 | register unsigned sp asm("sp"); |
jamesadevine | 0:e1a608bb55e8 | 86 | return sp; |
jamesadevine | 0:e1a608bb55e8 | 87 | } |
jamesadevine | 0:e1a608bb55e8 | 88 | |
jamesadevine | 0:e1a608bb55e8 | 89 | #elif defined ( __TASKING__ ) |
jamesadevine | 0:e1a608bb55e8 | 90 | |
jamesadevine | 0:e1a608bb55e8 | 91 | #ifndef __ASM |
jamesadevine | 0:e1a608bb55e8 | 92 | #define __ASM __asm /*!< asm keyword for TASKING Compiler */ |
jamesadevine | 0:e1a608bb55e8 | 93 | #endif |
jamesadevine | 0:e1a608bb55e8 | 94 | |
jamesadevine | 0:e1a608bb55e8 | 95 | #ifndef __INLINE |
jamesadevine | 0:e1a608bb55e8 | 96 | #define __INLINE inline /*!< inline keyword for TASKING Compiler */ |
jamesadevine | 0:e1a608bb55e8 | 97 | #endif |
jamesadevine | 0:e1a608bb55e8 | 98 | |
jamesadevine | 0:e1a608bb55e8 | 99 | #ifndef __WEAK |
jamesadevine | 0:e1a608bb55e8 | 100 | #define __WEAK __attribute__((weak)) /*!< weak keyword for TASKING Compiler */ |
jamesadevine | 0:e1a608bb55e8 | 101 | #endif |
jamesadevine | 0:e1a608bb55e8 | 102 | |
jamesadevine | 0:e1a608bb55e8 | 103 | #define GET_SP() __get_MSP() /*!> read current SP function for TASKING Compiler */ |
jamesadevine | 0:e1a608bb55e8 | 104 | |
jamesadevine | 0:e1a608bb55e8 | 105 | #endif |
jamesadevine | 0:e1a608bb55e8 | 106 | |
jamesadevine | 0:e1a608bb55e8 | 107 | /*lint --flb "Leave library region" */ |
jamesadevine | 0:e1a608bb55e8 | 108 | |
jamesadevine | 0:e1a608bb55e8 | 109 | #endif |