R1 code for micro:bit based train controller code, requires second micro:bit running tx code to operate - see https://meanderingpi.wordpress.com/ for more information
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TARGET_NRF51_MICROBIT/cmsis_nvic.h@0:e1a608bb55e8, 2016-04-07 (annotated)
- Committer:
- jamesadevine
- Date:
- Thu Apr 07 18:33:58 2016 +0100
- Revision:
- 0:e1a608bb55e8
Added binary version of mbed
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
jamesadevine | 0:e1a608bb55e8 | 1 | /* mbed Microcontroller Library |
jamesadevine | 0:e1a608bb55e8 | 2 | * CMSIS-style functionality to support dynamic vectors |
jamesadevine | 0:e1a608bb55e8 | 3 | ******************************************************************************* |
jamesadevine | 0:e1a608bb55e8 | 4 | * Copyright (c) 2011 ARM Limited. All rights reserved. |
jamesadevine | 0:e1a608bb55e8 | 5 | * All rights reserved. |
jamesadevine | 0:e1a608bb55e8 | 6 | * |
jamesadevine | 0:e1a608bb55e8 | 7 | * Redistribution and use in source and binary forms, with or without |
jamesadevine | 0:e1a608bb55e8 | 8 | * modification, are permitted provided that the following conditions are met: |
jamesadevine | 0:e1a608bb55e8 | 9 | * |
jamesadevine | 0:e1a608bb55e8 | 10 | * 1. Redistributions of source code must retain the above copyright notice, |
jamesadevine | 0:e1a608bb55e8 | 11 | * this list of conditions and the following disclaimer. |
jamesadevine | 0:e1a608bb55e8 | 12 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
jamesadevine | 0:e1a608bb55e8 | 13 | * this list of conditions and the following disclaimer in the documentation |
jamesadevine | 0:e1a608bb55e8 | 14 | * and/or other materials provided with the distribution. |
jamesadevine | 0:e1a608bb55e8 | 15 | * 3. Neither the name of ARM Limited nor the names of its contributors |
jamesadevine | 0:e1a608bb55e8 | 16 | * may be used to endorse or promote products derived from this software |
jamesadevine | 0:e1a608bb55e8 | 17 | * without specific prior written permission. |
jamesadevine | 0:e1a608bb55e8 | 18 | * |
jamesadevine | 0:e1a608bb55e8 | 19 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
jamesadevine | 0:e1a608bb55e8 | 20 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
jamesadevine | 0:e1a608bb55e8 | 21 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
jamesadevine | 0:e1a608bb55e8 | 22 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
jamesadevine | 0:e1a608bb55e8 | 23 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
jamesadevine | 0:e1a608bb55e8 | 24 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
jamesadevine | 0:e1a608bb55e8 | 25 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
jamesadevine | 0:e1a608bb55e8 | 26 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
jamesadevine | 0:e1a608bb55e8 | 27 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
jamesadevine | 0:e1a608bb55e8 | 28 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
jamesadevine | 0:e1a608bb55e8 | 29 | ******************************************************************************* |
jamesadevine | 0:e1a608bb55e8 | 30 | */ |
jamesadevine | 0:e1a608bb55e8 | 31 | |
jamesadevine | 0:e1a608bb55e8 | 32 | #ifndef MBED_CMSIS_NVIC_H |
jamesadevine | 0:e1a608bb55e8 | 33 | #define MBED_CMSIS_NVIC_H |
jamesadevine | 0:e1a608bb55e8 | 34 | |
jamesadevine | 0:e1a608bb55e8 | 35 | #define NVIC_NUM_VECTORS (16 + 32) // CORE + MCU Peripherals |
jamesadevine | 0:e1a608bb55e8 | 36 | #define NVIC_USER_IRQ_OFFSET 16 |
jamesadevine | 0:e1a608bb55e8 | 37 | |
jamesadevine | 0:e1a608bb55e8 | 38 | #include "nrf51.h" |
jamesadevine | 0:e1a608bb55e8 | 39 | #include "cmsis.h" |
jamesadevine | 0:e1a608bb55e8 | 40 | |
jamesadevine | 0:e1a608bb55e8 | 41 | |
jamesadevine | 0:e1a608bb55e8 | 42 | #ifdef __cplusplus |
jamesadevine | 0:e1a608bb55e8 | 43 | extern "C" { |
jamesadevine | 0:e1a608bb55e8 | 44 | #endif |
jamesadevine | 0:e1a608bb55e8 | 45 | |
jamesadevine | 0:e1a608bb55e8 | 46 | void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector); |
jamesadevine | 0:e1a608bb55e8 | 47 | uint32_t NVIC_GetVector(IRQn_Type IRQn); |
jamesadevine | 0:e1a608bb55e8 | 48 | |
jamesadevine | 0:e1a608bb55e8 | 49 | #ifdef __cplusplus |
jamesadevine | 0:e1a608bb55e8 | 50 | } |
jamesadevine | 0:e1a608bb55e8 | 51 | #endif |
jamesadevine | 0:e1a608bb55e8 | 52 | |
jamesadevine | 0:e1a608bb55e8 | 53 | #endif |