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mbed official
targets/cmsis/TARGET_Atmel/TARGET_SAM_CortexM0P/utils/cmsis/TARGET_SAML21/include/component/comp_ac.h@18:da299f395b9e, 2015-11-09 (annotated)
- Committer:
- mbed_official
- Date:
- Mon Nov 09 13:30:11 2015 +0000
- Revision:
- 18:da299f395b9e
Synchronized with git revision f605825f66bb2e462ff7dbc5fb4ed2dbe979d1c3
Full URL: https://github.com/mbedmicro/mbed/commit/f605825f66bb2e462ff7dbc5fb4ed2dbe979d1c3/
Added support for SAML21
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| mbed_official | 18:da299f395b9e | 1 | /** |
| mbed_official | 18:da299f395b9e | 2 | * \file |
| mbed_official | 18:da299f395b9e | 3 | * |
| mbed_official | 18:da299f395b9e | 4 | * \brief Component description for AC |
| mbed_official | 18:da299f395b9e | 5 | * |
| mbed_official | 18:da299f395b9e | 6 | * Copyright (c) 2014-2015 Atmel Corporation. All rights reserved. |
| mbed_official | 18:da299f395b9e | 7 | * |
| mbed_official | 18:da299f395b9e | 8 | * \asf_license_start |
| mbed_official | 18:da299f395b9e | 9 | * |
| mbed_official | 18:da299f395b9e | 10 | * \page License |
| mbed_official | 18:da299f395b9e | 11 | * |
| mbed_official | 18:da299f395b9e | 12 | * Redistribution and use in source and binary forms, with or without |
| mbed_official | 18:da299f395b9e | 13 | * modification, are permitted provided that the following conditions are met: |
| mbed_official | 18:da299f395b9e | 14 | * |
| mbed_official | 18:da299f395b9e | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| mbed_official | 18:da299f395b9e | 16 | * this list of conditions and the following disclaimer. |
| mbed_official | 18:da299f395b9e | 17 | * |
| mbed_official | 18:da299f395b9e | 18 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| mbed_official | 18:da299f395b9e | 19 | * this list of conditions and the following disclaimer in the documentation |
| mbed_official | 18:da299f395b9e | 20 | * and/or other materials provided with the distribution. |
| mbed_official | 18:da299f395b9e | 21 | * |
| mbed_official | 18:da299f395b9e | 22 | * 3. The name of Atmel may not be used to endorse or promote products derived |
| mbed_official | 18:da299f395b9e | 23 | * from this software without specific prior written permission. |
| mbed_official | 18:da299f395b9e | 24 | * |
| mbed_official | 18:da299f395b9e | 25 | * 4. This software may only be redistributed and used in connection with an |
| mbed_official | 18:da299f395b9e | 26 | * Atmel microcontroller product. |
| mbed_official | 18:da299f395b9e | 27 | * |
| mbed_official | 18:da299f395b9e | 28 | * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED |
| mbed_official | 18:da299f395b9e | 29 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
| mbed_official | 18:da299f395b9e | 30 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE |
| mbed_official | 18:da299f395b9e | 31 | * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR |
| mbed_official | 18:da299f395b9e | 32 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| mbed_official | 18:da299f395b9e | 33 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
| mbed_official | 18:da299f395b9e | 34 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
| mbed_official | 18:da299f395b9e | 35 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, |
| mbed_official | 18:da299f395b9e | 36 | * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
| mbed_official | 18:da299f395b9e | 37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| mbed_official | 18:da299f395b9e | 38 | * POSSIBILITY OF SUCH DAMAGE. |
| mbed_official | 18:da299f395b9e | 39 | * |
| mbed_official | 18:da299f395b9e | 40 | * \asf_license_stop |
| mbed_official | 18:da299f395b9e | 41 | * |
| mbed_official | 18:da299f395b9e | 42 | */ |
| mbed_official | 18:da299f395b9e | 43 | /* |
| mbed_official | 18:da299f395b9e | 44 | * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a> |
| mbed_official | 18:da299f395b9e | 45 | */ |
| mbed_official | 18:da299f395b9e | 46 | |
| mbed_official | 18:da299f395b9e | 47 | #ifndef _SAML21_AC_COMPONENT_ |
| mbed_official | 18:da299f395b9e | 48 | #define _SAML21_AC_COMPONENT_ |
| mbed_official | 18:da299f395b9e | 49 | |
| mbed_official | 18:da299f395b9e | 50 | /* ========================================================================== */ |
| mbed_official | 18:da299f395b9e | 51 | /** SOFTWARE API DEFINITION FOR AC */ |
| mbed_official | 18:da299f395b9e | 52 | /* ========================================================================== */ |
| mbed_official | 18:da299f395b9e | 53 | /** \addtogroup SAML21_AC Analog Comparators */ |
| mbed_official | 18:da299f395b9e | 54 | /*@{*/ |
| mbed_official | 18:da299f395b9e | 55 | |
| mbed_official | 18:da299f395b9e | 56 | #define AC_U2245 |
| mbed_official | 18:da299f395b9e | 57 | #define REV_AC 0x100 |
| mbed_official | 18:da299f395b9e | 58 | |
| mbed_official | 18:da299f395b9e | 59 | /* -------- AC_CTRLA : (AC Offset: 0x00) (R/W 8) Control A -------- */ |
| mbed_official | 18:da299f395b9e | 60 | #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) |
| mbed_official | 18:da299f395b9e | 61 | typedef union { |
| mbed_official | 18:da299f395b9e | 62 | struct { |
| mbed_official | 18:da299f395b9e | 63 | uint8_t SWRST:1; /*!< bit: 0 Software Reset */ |
| mbed_official | 18:da299f395b9e | 64 | uint8_t ENABLE:1; /*!< bit: 1 Enable */ |
| mbed_official | 18:da299f395b9e | 65 | uint8_t :6; /*!< bit: 2.. 7 Reserved */ |
| mbed_official | 18:da299f395b9e | 66 | } bit; /*!< Structure used for bit access */ |
| mbed_official | 18:da299f395b9e | 67 | uint8_t reg; /*!< Type used for register access */ |
| mbed_official | 18:da299f395b9e | 68 | } AC_CTRLA_Type; |
| mbed_official | 18:da299f395b9e | 69 | #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ |
| mbed_official | 18:da299f395b9e | 70 | |
| mbed_official | 18:da299f395b9e | 71 | #define AC_CTRLA_OFFSET 0x00 /**< \brief (AC_CTRLA offset) Control A */ |
| mbed_official | 18:da299f395b9e | 72 | #define AC_CTRLA_RESETVALUE 0x00ul /**< \brief (AC_CTRLA reset_value) Control A */ |
| mbed_official | 18:da299f395b9e | 73 | |
| mbed_official | 18:da299f395b9e | 74 | #define AC_CTRLA_SWRST_Pos 0 /**< \brief (AC_CTRLA) Software Reset */ |
| mbed_official | 18:da299f395b9e | 75 | #define AC_CTRLA_SWRST (0x1ul << AC_CTRLA_SWRST_Pos) |
| mbed_official | 18:da299f395b9e | 76 | #define AC_CTRLA_ENABLE_Pos 1 /**< \brief (AC_CTRLA) Enable */ |
| mbed_official | 18:da299f395b9e | 77 | #define AC_CTRLA_ENABLE (0x1ul << AC_CTRLA_ENABLE_Pos) |
| mbed_official | 18:da299f395b9e | 78 | #define AC_CTRLA_MASK 0x03ul /**< \brief (AC_CTRLA) MASK Register */ |
| mbed_official | 18:da299f395b9e | 79 | |
| mbed_official | 18:da299f395b9e | 80 | /* -------- AC_CTRLB : (AC Offset: 0x01) ( /W 8) Control B -------- */ |
| mbed_official | 18:da299f395b9e | 81 | #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) |
| mbed_official | 18:da299f395b9e | 82 | typedef union { |
| mbed_official | 18:da299f395b9e | 83 | struct { |
| mbed_official | 18:da299f395b9e | 84 | uint8_t START0:1; /*!< bit: 0 Comparator 0 Start Comparison */ |
| mbed_official | 18:da299f395b9e | 85 | uint8_t START1:1; /*!< bit: 1 Comparator 1 Start Comparison */ |
| mbed_official | 18:da299f395b9e | 86 | uint8_t :6; /*!< bit: 2.. 7 Reserved */ |
| mbed_official | 18:da299f395b9e | 87 | } bit; /*!< Structure used for bit access */ |
| mbed_official | 18:da299f395b9e | 88 | struct { |
| mbed_official | 18:da299f395b9e | 89 | uint8_t START:2; /*!< bit: 0.. 1 Comparator x Start Comparison */ |
| mbed_official | 18:da299f395b9e | 90 | uint8_t :6; /*!< bit: 2.. 7 Reserved */ |
| mbed_official | 18:da299f395b9e | 91 | } vec; /*!< Structure used for vec access */ |
| mbed_official | 18:da299f395b9e | 92 | uint8_t reg; /*!< Type used for register access */ |
| mbed_official | 18:da299f395b9e | 93 | } AC_CTRLB_Type; |
| mbed_official | 18:da299f395b9e | 94 | #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ |
| mbed_official | 18:da299f395b9e | 95 | |
| mbed_official | 18:da299f395b9e | 96 | #define AC_CTRLB_OFFSET 0x01 /**< \brief (AC_CTRLB offset) Control B */ |
| mbed_official | 18:da299f395b9e | 97 | #define AC_CTRLB_RESETVALUE 0x00ul /**< \brief (AC_CTRLB reset_value) Control B */ |
| mbed_official | 18:da299f395b9e | 98 | |
| mbed_official | 18:da299f395b9e | 99 | #define AC_CTRLB_START0_Pos 0 /**< \brief (AC_CTRLB) Comparator 0 Start Comparison */ |
| mbed_official | 18:da299f395b9e | 100 | #define AC_CTRLB_START0 (1 << AC_CTRLB_START0_Pos) |
| mbed_official | 18:da299f395b9e | 101 | #define AC_CTRLB_START1_Pos 1 /**< \brief (AC_CTRLB) Comparator 1 Start Comparison */ |
| mbed_official | 18:da299f395b9e | 102 | #define AC_CTRLB_START1 (1 << AC_CTRLB_START1_Pos) |
| mbed_official | 18:da299f395b9e | 103 | #define AC_CTRLB_START_Pos 0 /**< \brief (AC_CTRLB) Comparator x Start Comparison */ |
| mbed_official | 18:da299f395b9e | 104 | #define AC_CTRLB_START_Msk (0x3ul << AC_CTRLB_START_Pos) |
| mbed_official | 18:da299f395b9e | 105 | #define AC_CTRLB_START(value) ((AC_CTRLB_START_Msk & ((value) << AC_CTRLB_START_Pos))) |
| mbed_official | 18:da299f395b9e | 106 | #define AC_CTRLB_MASK 0x03ul /**< \brief (AC_CTRLB) MASK Register */ |
| mbed_official | 18:da299f395b9e | 107 | |
| mbed_official | 18:da299f395b9e | 108 | /* -------- AC_EVCTRL : (AC Offset: 0x02) (R/W 16) Event Control -------- */ |
| mbed_official | 18:da299f395b9e | 109 | #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) |
| mbed_official | 18:da299f395b9e | 110 | typedef union { |
| mbed_official | 18:da299f395b9e | 111 | struct { |
| mbed_official | 18:da299f395b9e | 112 | uint16_t COMPEO0:1; /*!< bit: 0 Comparator 0 Event Output Enable */ |
| mbed_official | 18:da299f395b9e | 113 | uint16_t COMPEO1:1; /*!< bit: 1 Comparator 1 Event Output Enable */ |
| mbed_official | 18:da299f395b9e | 114 | uint16_t :2; /*!< bit: 2.. 3 Reserved */ |
| mbed_official | 18:da299f395b9e | 115 | uint16_t WINEO0:1; /*!< bit: 4 Window 0 Event Output Enable */ |
| mbed_official | 18:da299f395b9e | 116 | uint16_t :3; /*!< bit: 5.. 7 Reserved */ |
| mbed_official | 18:da299f395b9e | 117 | uint16_t COMPEI0:1; /*!< bit: 8 Comparator 0 Event Input Enable */ |
| mbed_official | 18:da299f395b9e | 118 | uint16_t COMPEI1:1; /*!< bit: 9 Comparator 1 Event Input Enable */ |
| mbed_official | 18:da299f395b9e | 119 | uint16_t :2; /*!< bit: 10..11 Reserved */ |
| mbed_official | 18:da299f395b9e | 120 | uint16_t INVEI0:1; /*!< bit: 12 Comparator 0 Input Event Invert Enable */ |
| mbed_official | 18:da299f395b9e | 121 | uint16_t INVEI1:1; /*!< bit: 13 Comparator 1 Input Event Invert Enable */ |
| mbed_official | 18:da299f395b9e | 122 | uint16_t :2; /*!< bit: 14..15 Reserved */ |
| mbed_official | 18:da299f395b9e | 123 | } bit; /*!< Structure used for bit access */ |
| mbed_official | 18:da299f395b9e | 124 | struct { |
| mbed_official | 18:da299f395b9e | 125 | uint16_t COMPEO:2; /*!< bit: 0.. 1 Comparator x Event Output Enable */ |
| mbed_official | 18:da299f395b9e | 126 | uint16_t :2; /*!< bit: 2.. 3 Reserved */ |
| mbed_official | 18:da299f395b9e | 127 | uint16_t WINEO:1; /*!< bit: 4 Window x Event Output Enable */ |
| mbed_official | 18:da299f395b9e | 128 | uint16_t :3; /*!< bit: 5.. 7 Reserved */ |
| mbed_official | 18:da299f395b9e | 129 | uint16_t COMPEI:2; /*!< bit: 8.. 9 Comparator x Event Input Enable */ |
| mbed_official | 18:da299f395b9e | 130 | uint16_t :2; /*!< bit: 10..11 Reserved */ |
| mbed_official | 18:da299f395b9e | 131 | uint16_t INVEI:2; /*!< bit: 12..13 Comparator x Input Event Invert Enable */ |
| mbed_official | 18:da299f395b9e | 132 | uint16_t :2; /*!< bit: 14..15 Reserved */ |
| mbed_official | 18:da299f395b9e | 133 | } vec; /*!< Structure used for vec access */ |
| mbed_official | 18:da299f395b9e | 134 | uint16_t reg; /*!< Type used for register access */ |
| mbed_official | 18:da299f395b9e | 135 | } AC_EVCTRL_Type; |
| mbed_official | 18:da299f395b9e | 136 | #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ |
| mbed_official | 18:da299f395b9e | 137 | |
| mbed_official | 18:da299f395b9e | 138 | #define AC_EVCTRL_OFFSET 0x02 /**< \brief (AC_EVCTRL offset) Event Control */ |
| mbed_official | 18:da299f395b9e | 139 | #define AC_EVCTRL_RESETVALUE 0x0000ul /**< \brief (AC_EVCTRL reset_value) Event Control */ |
| mbed_official | 18:da299f395b9e | 140 | |
| mbed_official | 18:da299f395b9e | 141 | #define AC_EVCTRL_COMPEO0_Pos 0 /**< \brief (AC_EVCTRL) Comparator 0 Event Output Enable */ |
| mbed_official | 18:da299f395b9e | 142 | #define AC_EVCTRL_COMPEO0 (1 << AC_EVCTRL_COMPEO0_Pos) |
| mbed_official | 18:da299f395b9e | 143 | #define AC_EVCTRL_COMPEO1_Pos 1 /**< \brief (AC_EVCTRL) Comparator 1 Event Output Enable */ |
| mbed_official | 18:da299f395b9e | 144 | #define AC_EVCTRL_COMPEO1 (1 << AC_EVCTRL_COMPEO1_Pos) |
| mbed_official | 18:da299f395b9e | 145 | #define AC_EVCTRL_COMPEO_Pos 0 /**< \brief (AC_EVCTRL) Comparator x Event Output Enable */ |
| mbed_official | 18:da299f395b9e | 146 | #define AC_EVCTRL_COMPEO_Msk (0x3ul << AC_EVCTRL_COMPEO_Pos) |
| mbed_official | 18:da299f395b9e | 147 | #define AC_EVCTRL_COMPEO(value) ((AC_EVCTRL_COMPEO_Msk & ((value) << AC_EVCTRL_COMPEO_Pos))) |
| mbed_official | 18:da299f395b9e | 148 | #define AC_EVCTRL_WINEO0_Pos 4 /**< \brief (AC_EVCTRL) Window 0 Event Output Enable */ |
| mbed_official | 18:da299f395b9e | 149 | #define AC_EVCTRL_WINEO0 (1 << AC_EVCTRL_WINEO0_Pos) |
| mbed_official | 18:da299f395b9e | 150 | #define AC_EVCTRL_WINEO_Pos 4 /**< \brief (AC_EVCTRL) Window x Event Output Enable */ |
| mbed_official | 18:da299f395b9e | 151 | #define AC_EVCTRL_WINEO_Msk (0x1ul << AC_EVCTRL_WINEO_Pos) |
| mbed_official | 18:da299f395b9e | 152 | #define AC_EVCTRL_WINEO(value) ((AC_EVCTRL_WINEO_Msk & ((value) << AC_EVCTRL_WINEO_Pos))) |
| mbed_official | 18:da299f395b9e | 153 | #define AC_EVCTRL_COMPEI0_Pos 8 /**< \brief (AC_EVCTRL) Comparator 0 Event Input Enable */ |
| mbed_official | 18:da299f395b9e | 154 | #define AC_EVCTRL_COMPEI0 (1 << AC_EVCTRL_COMPEI0_Pos) |
| mbed_official | 18:da299f395b9e | 155 | #define AC_EVCTRL_COMPEI1_Pos 9 /**< \brief (AC_EVCTRL) Comparator 1 Event Input Enable */ |
| mbed_official | 18:da299f395b9e | 156 | #define AC_EVCTRL_COMPEI1 (1 << AC_EVCTRL_COMPEI1_Pos) |
| mbed_official | 18:da299f395b9e | 157 | #define AC_EVCTRL_COMPEI_Pos 8 /**< \brief (AC_EVCTRL) Comparator x Event Input Enable */ |
| mbed_official | 18:da299f395b9e | 158 | #define AC_EVCTRL_COMPEI_Msk (0x3ul << AC_EVCTRL_COMPEI_Pos) |
| mbed_official | 18:da299f395b9e | 159 | #define AC_EVCTRL_COMPEI(value) ((AC_EVCTRL_COMPEI_Msk & ((value) << AC_EVCTRL_COMPEI_Pos))) |
| mbed_official | 18:da299f395b9e | 160 | #define AC_EVCTRL_INVEI0_Pos 12 /**< \brief (AC_EVCTRL) Comparator 0 Input Event Invert Enable */ |
| mbed_official | 18:da299f395b9e | 161 | #define AC_EVCTRL_INVEI0 (1 << AC_EVCTRL_INVEI0_Pos) |
| mbed_official | 18:da299f395b9e | 162 | #define AC_EVCTRL_INVEI1_Pos 13 /**< \brief (AC_EVCTRL) Comparator 1 Input Event Invert Enable */ |
| mbed_official | 18:da299f395b9e | 163 | #define AC_EVCTRL_INVEI1 (1 << AC_EVCTRL_INVEI1_Pos) |
| mbed_official | 18:da299f395b9e | 164 | #define AC_EVCTRL_INVEI_Pos 12 /**< \brief (AC_EVCTRL) Comparator x Input Event Invert Enable */ |
| mbed_official | 18:da299f395b9e | 165 | #define AC_EVCTRL_INVEI_Msk (0x3ul << AC_EVCTRL_INVEI_Pos) |
| mbed_official | 18:da299f395b9e | 166 | #define AC_EVCTRL_INVEI(value) ((AC_EVCTRL_INVEI_Msk & ((value) << AC_EVCTRL_INVEI_Pos))) |
| mbed_official | 18:da299f395b9e | 167 | #define AC_EVCTRL_MASK 0x3313ul /**< \brief (AC_EVCTRL) MASK Register */ |
| mbed_official | 18:da299f395b9e | 168 | |
| mbed_official | 18:da299f395b9e | 169 | /* -------- AC_INTENCLR : (AC Offset: 0x04) (R/W 8) Interrupt Enable Clear -------- */ |
| mbed_official | 18:da299f395b9e | 170 | #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) |
| mbed_official | 18:da299f395b9e | 171 | typedef union { |
| mbed_official | 18:da299f395b9e | 172 | struct { |
| mbed_official | 18:da299f395b9e | 173 | uint8_t COMP0:1; /*!< bit: 0 Comparator 0 Interrupt Enable */ |
| mbed_official | 18:da299f395b9e | 174 | uint8_t COMP1:1; /*!< bit: 1 Comparator 1 Interrupt Enable */ |
| mbed_official | 18:da299f395b9e | 175 | uint8_t :2; /*!< bit: 2.. 3 Reserved */ |
| mbed_official | 18:da299f395b9e | 176 | uint8_t WIN0:1; /*!< bit: 4 Window 0 Interrupt Enable */ |
| mbed_official | 18:da299f395b9e | 177 | uint8_t :3; /*!< bit: 5.. 7 Reserved */ |
| mbed_official | 18:da299f395b9e | 178 | } bit; /*!< Structure used for bit access */ |
| mbed_official | 18:da299f395b9e | 179 | struct { |
| mbed_official | 18:da299f395b9e | 180 | uint8_t COMP:2; /*!< bit: 0.. 1 Comparator x Interrupt Enable */ |
| mbed_official | 18:da299f395b9e | 181 | uint8_t :2; /*!< bit: 2.. 3 Reserved */ |
| mbed_official | 18:da299f395b9e | 182 | uint8_t WIN:1; /*!< bit: 4 Window x Interrupt Enable */ |
| mbed_official | 18:da299f395b9e | 183 | uint8_t :3; /*!< bit: 5.. 7 Reserved */ |
| mbed_official | 18:da299f395b9e | 184 | } vec; /*!< Structure used for vec access */ |
| mbed_official | 18:da299f395b9e | 185 | uint8_t reg; /*!< Type used for register access */ |
| mbed_official | 18:da299f395b9e | 186 | } AC_INTENCLR_Type; |
| mbed_official | 18:da299f395b9e | 187 | #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ |
| mbed_official | 18:da299f395b9e | 188 | |
| mbed_official | 18:da299f395b9e | 189 | #define AC_INTENCLR_OFFSET 0x04 /**< \brief (AC_INTENCLR offset) Interrupt Enable Clear */ |
| mbed_official | 18:da299f395b9e | 190 | #define AC_INTENCLR_RESETVALUE 0x00ul /**< \brief (AC_INTENCLR reset_value) Interrupt Enable Clear */ |
| mbed_official | 18:da299f395b9e | 191 | |
| mbed_official | 18:da299f395b9e | 192 | #define AC_INTENCLR_COMP0_Pos 0 /**< \brief (AC_INTENCLR) Comparator 0 Interrupt Enable */ |
| mbed_official | 18:da299f395b9e | 193 | #define AC_INTENCLR_COMP0 (1 << AC_INTENCLR_COMP0_Pos) |
| mbed_official | 18:da299f395b9e | 194 | #define AC_INTENCLR_COMP1_Pos 1 /**< \brief (AC_INTENCLR) Comparator 1 Interrupt Enable */ |
| mbed_official | 18:da299f395b9e | 195 | #define AC_INTENCLR_COMP1 (1 << AC_INTENCLR_COMP1_Pos) |
| mbed_official | 18:da299f395b9e | 196 | #define AC_INTENCLR_COMP_Pos 0 /**< \brief (AC_INTENCLR) Comparator x Interrupt Enable */ |
| mbed_official | 18:da299f395b9e | 197 | #define AC_INTENCLR_COMP_Msk (0x3ul << AC_INTENCLR_COMP_Pos) |
| mbed_official | 18:da299f395b9e | 198 | #define AC_INTENCLR_COMP(value) ((AC_INTENCLR_COMP_Msk & ((value) << AC_INTENCLR_COMP_Pos))) |
| mbed_official | 18:da299f395b9e | 199 | #define AC_INTENCLR_WIN0_Pos 4 /**< \brief (AC_INTENCLR) Window 0 Interrupt Enable */ |
| mbed_official | 18:da299f395b9e | 200 | #define AC_INTENCLR_WIN0 (1 << AC_INTENCLR_WIN0_Pos) |
| mbed_official | 18:da299f395b9e | 201 | #define AC_INTENCLR_WIN_Pos 4 /**< \brief (AC_INTENCLR) Window x Interrupt Enable */ |
| mbed_official | 18:da299f395b9e | 202 | #define AC_INTENCLR_WIN_Msk (0x1ul << AC_INTENCLR_WIN_Pos) |
| mbed_official | 18:da299f395b9e | 203 | #define AC_INTENCLR_WIN(value) ((AC_INTENCLR_WIN_Msk & ((value) << AC_INTENCLR_WIN_Pos))) |
| mbed_official | 18:da299f395b9e | 204 | #define AC_INTENCLR_MASK 0x13ul /**< \brief (AC_INTENCLR) MASK Register */ |
| mbed_official | 18:da299f395b9e | 205 | |
| mbed_official | 18:da299f395b9e | 206 | /* -------- AC_INTENSET : (AC Offset: 0x05) (R/W 8) Interrupt Enable Set -------- */ |
| mbed_official | 18:da299f395b9e | 207 | #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) |
| mbed_official | 18:da299f395b9e | 208 | typedef union { |
| mbed_official | 18:da299f395b9e | 209 | struct { |
| mbed_official | 18:da299f395b9e | 210 | uint8_t COMP0:1; /*!< bit: 0 Comparator 0 Interrupt Enable */ |
| mbed_official | 18:da299f395b9e | 211 | uint8_t COMP1:1; /*!< bit: 1 Comparator 1 Interrupt Enable */ |
| mbed_official | 18:da299f395b9e | 212 | uint8_t :2; /*!< bit: 2.. 3 Reserved */ |
| mbed_official | 18:da299f395b9e | 213 | uint8_t WIN0:1; /*!< bit: 4 Window 0 Interrupt Enable */ |
| mbed_official | 18:da299f395b9e | 214 | uint8_t :3; /*!< bit: 5.. 7 Reserved */ |
| mbed_official | 18:da299f395b9e | 215 | } bit; /*!< Structure used for bit access */ |
| mbed_official | 18:da299f395b9e | 216 | struct { |
| mbed_official | 18:da299f395b9e | 217 | uint8_t COMP:2; /*!< bit: 0.. 1 Comparator x Interrupt Enable */ |
| mbed_official | 18:da299f395b9e | 218 | uint8_t :2; /*!< bit: 2.. 3 Reserved */ |
| mbed_official | 18:da299f395b9e | 219 | uint8_t WIN:1; /*!< bit: 4 Window x Interrupt Enable */ |
| mbed_official | 18:da299f395b9e | 220 | uint8_t :3; /*!< bit: 5.. 7 Reserved */ |
| mbed_official | 18:da299f395b9e | 221 | } vec; /*!< Structure used for vec access */ |
| mbed_official | 18:da299f395b9e | 222 | uint8_t reg; /*!< Type used for register access */ |
| mbed_official | 18:da299f395b9e | 223 | } AC_INTENSET_Type; |
| mbed_official | 18:da299f395b9e | 224 | #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ |
| mbed_official | 18:da299f395b9e | 225 | |
| mbed_official | 18:da299f395b9e | 226 | #define AC_INTENSET_OFFSET 0x05 /**< \brief (AC_INTENSET offset) Interrupt Enable Set */ |
| mbed_official | 18:da299f395b9e | 227 | #define AC_INTENSET_RESETVALUE 0x00ul /**< \brief (AC_INTENSET reset_value) Interrupt Enable Set */ |
| mbed_official | 18:da299f395b9e | 228 | |
| mbed_official | 18:da299f395b9e | 229 | #define AC_INTENSET_COMP0_Pos 0 /**< \brief (AC_INTENSET) Comparator 0 Interrupt Enable */ |
| mbed_official | 18:da299f395b9e | 230 | #define AC_INTENSET_COMP0 (1 << AC_INTENSET_COMP0_Pos) |
| mbed_official | 18:da299f395b9e | 231 | #define AC_INTENSET_COMP1_Pos 1 /**< \brief (AC_INTENSET) Comparator 1 Interrupt Enable */ |
| mbed_official | 18:da299f395b9e | 232 | #define AC_INTENSET_COMP1 (1 << AC_INTENSET_COMP1_Pos) |
| mbed_official | 18:da299f395b9e | 233 | #define AC_INTENSET_COMP_Pos 0 /**< \brief (AC_INTENSET) Comparator x Interrupt Enable */ |
| mbed_official | 18:da299f395b9e | 234 | #define AC_INTENSET_COMP_Msk (0x3ul << AC_INTENSET_COMP_Pos) |
| mbed_official | 18:da299f395b9e | 235 | #define AC_INTENSET_COMP(value) ((AC_INTENSET_COMP_Msk & ((value) << AC_INTENSET_COMP_Pos))) |
| mbed_official | 18:da299f395b9e | 236 | #define AC_INTENSET_WIN0_Pos 4 /**< \brief (AC_INTENSET) Window 0 Interrupt Enable */ |
| mbed_official | 18:da299f395b9e | 237 | #define AC_INTENSET_WIN0 (1 << AC_INTENSET_WIN0_Pos) |
| mbed_official | 18:da299f395b9e | 238 | #define AC_INTENSET_WIN_Pos 4 /**< \brief (AC_INTENSET) Window x Interrupt Enable */ |
| mbed_official | 18:da299f395b9e | 239 | #define AC_INTENSET_WIN_Msk (0x1ul << AC_INTENSET_WIN_Pos) |
| mbed_official | 18:da299f395b9e | 240 | #define AC_INTENSET_WIN(value) ((AC_INTENSET_WIN_Msk & ((value) << AC_INTENSET_WIN_Pos))) |
| mbed_official | 18:da299f395b9e | 241 | #define AC_INTENSET_MASK 0x13ul /**< \brief (AC_INTENSET) MASK Register */ |
| mbed_official | 18:da299f395b9e | 242 | |
| mbed_official | 18:da299f395b9e | 243 | /* -------- AC_INTFLAG : (AC Offset: 0x06) (R/W 8) Interrupt Flag Status and Clear -------- */ |
| mbed_official | 18:da299f395b9e | 244 | #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) |
| mbed_official | 18:da299f395b9e | 245 | typedef union { |
| mbed_official | 18:da299f395b9e | 246 | struct { |
| mbed_official | 18:da299f395b9e | 247 | uint8_t COMP0:1; /*!< bit: 0 Comparator 0 */ |
| mbed_official | 18:da299f395b9e | 248 | uint8_t COMP1:1; /*!< bit: 1 Comparator 1 */ |
| mbed_official | 18:da299f395b9e | 249 | uint8_t :2; /*!< bit: 2.. 3 Reserved */ |
| mbed_official | 18:da299f395b9e | 250 | uint8_t WIN0:1; /*!< bit: 4 Window 0 */ |
| mbed_official | 18:da299f395b9e | 251 | uint8_t :3; /*!< bit: 5.. 7 Reserved */ |
| mbed_official | 18:da299f395b9e | 252 | } bit; /*!< Structure used for bit access */ |
| mbed_official | 18:da299f395b9e | 253 | struct { |
| mbed_official | 18:da299f395b9e | 254 | uint8_t COMP:2; /*!< bit: 0.. 1 Comparator x */ |
| mbed_official | 18:da299f395b9e | 255 | uint8_t :2; /*!< bit: 2.. 3 Reserved */ |
| mbed_official | 18:da299f395b9e | 256 | uint8_t WIN:1; /*!< bit: 4 Window x */ |
| mbed_official | 18:da299f395b9e | 257 | uint8_t :3; /*!< bit: 5.. 7 Reserved */ |
| mbed_official | 18:da299f395b9e | 258 | } vec; /*!< Structure used for vec access */ |
| mbed_official | 18:da299f395b9e | 259 | uint8_t reg; /*!< Type used for register access */ |
| mbed_official | 18:da299f395b9e | 260 | } AC_INTFLAG_Type; |
| mbed_official | 18:da299f395b9e | 261 | #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ |
| mbed_official | 18:da299f395b9e | 262 | |
| mbed_official | 18:da299f395b9e | 263 | #define AC_INTFLAG_OFFSET 0x06 /**< \brief (AC_INTFLAG offset) Interrupt Flag Status and Clear */ |
| mbed_official | 18:da299f395b9e | 264 | #define AC_INTFLAG_RESETVALUE 0x00ul /**< \brief (AC_INTFLAG reset_value) Interrupt Flag Status and Clear */ |
| mbed_official | 18:da299f395b9e | 265 | |
| mbed_official | 18:da299f395b9e | 266 | #define AC_INTFLAG_COMP0_Pos 0 /**< \brief (AC_INTFLAG) Comparator 0 */ |
| mbed_official | 18:da299f395b9e | 267 | #define AC_INTFLAG_COMP0 (1 << AC_INTFLAG_COMP0_Pos) |
| mbed_official | 18:da299f395b9e | 268 | #define AC_INTFLAG_COMP1_Pos 1 /**< \brief (AC_INTFLAG) Comparator 1 */ |
| mbed_official | 18:da299f395b9e | 269 | #define AC_INTFLAG_COMP1 (1 << AC_INTFLAG_COMP1_Pos) |
| mbed_official | 18:da299f395b9e | 270 | #define AC_INTFLAG_COMP_Pos 0 /**< \brief (AC_INTFLAG) Comparator x */ |
| mbed_official | 18:da299f395b9e | 271 | #define AC_INTFLAG_COMP_Msk (0x3ul << AC_INTFLAG_COMP_Pos) |
| mbed_official | 18:da299f395b9e | 272 | #define AC_INTFLAG_COMP(value) ((AC_INTFLAG_COMP_Msk & ((value) << AC_INTFLAG_COMP_Pos))) |
| mbed_official | 18:da299f395b9e | 273 | #define AC_INTFLAG_WIN0_Pos 4 /**< \brief (AC_INTFLAG) Window 0 */ |
| mbed_official | 18:da299f395b9e | 274 | #define AC_INTFLAG_WIN0 (1 << AC_INTFLAG_WIN0_Pos) |
| mbed_official | 18:da299f395b9e | 275 | #define AC_INTFLAG_WIN_Pos 4 /**< \brief (AC_INTFLAG) Window x */ |
| mbed_official | 18:da299f395b9e | 276 | #define AC_INTFLAG_WIN_Msk (0x1ul << AC_INTFLAG_WIN_Pos) |
| mbed_official | 18:da299f395b9e | 277 | #define AC_INTFLAG_WIN(value) ((AC_INTFLAG_WIN_Msk & ((value) << AC_INTFLAG_WIN_Pos))) |
| mbed_official | 18:da299f395b9e | 278 | #define AC_INTFLAG_MASK 0x13ul /**< \brief (AC_INTFLAG) MASK Register */ |
| mbed_official | 18:da299f395b9e | 279 | |
| mbed_official | 18:da299f395b9e | 280 | /* -------- AC_STATUSA : (AC Offset: 0x07) (R/ 8) Status A -------- */ |
| mbed_official | 18:da299f395b9e | 281 | #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) |
| mbed_official | 18:da299f395b9e | 282 | typedef union { |
| mbed_official | 18:da299f395b9e | 283 | struct { |
| mbed_official | 18:da299f395b9e | 284 | uint8_t STATE0:1; /*!< bit: 0 Comparator 0 Current State */ |
| mbed_official | 18:da299f395b9e | 285 | uint8_t STATE1:1; /*!< bit: 1 Comparator 1 Current State */ |
| mbed_official | 18:da299f395b9e | 286 | uint8_t :2; /*!< bit: 2.. 3 Reserved */ |
| mbed_official | 18:da299f395b9e | 287 | uint8_t WSTATE0:2; /*!< bit: 4.. 5 Window 0 Current State */ |
| mbed_official | 18:da299f395b9e | 288 | uint8_t :2; /*!< bit: 6.. 7 Reserved */ |
| mbed_official | 18:da299f395b9e | 289 | } bit; /*!< Structure used for bit access */ |
| mbed_official | 18:da299f395b9e | 290 | struct { |
| mbed_official | 18:da299f395b9e | 291 | uint8_t STATE:2; /*!< bit: 0.. 1 Comparator x Current State */ |
| mbed_official | 18:da299f395b9e | 292 | uint8_t :6; /*!< bit: 2.. 7 Reserved */ |
| mbed_official | 18:da299f395b9e | 293 | } vec; /*!< Structure used for vec access */ |
| mbed_official | 18:da299f395b9e | 294 | uint8_t reg; /*!< Type used for register access */ |
| mbed_official | 18:da299f395b9e | 295 | } AC_STATUSA_Type; |
| mbed_official | 18:da299f395b9e | 296 | #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ |
| mbed_official | 18:da299f395b9e | 297 | |
| mbed_official | 18:da299f395b9e | 298 | #define AC_STATUSA_OFFSET 0x07 /**< \brief (AC_STATUSA offset) Status A */ |
| mbed_official | 18:da299f395b9e | 299 | #define AC_STATUSA_RESETVALUE 0x00ul /**< \brief (AC_STATUSA reset_value) Status A */ |
| mbed_official | 18:da299f395b9e | 300 | |
| mbed_official | 18:da299f395b9e | 301 | #define AC_STATUSA_STATE0_Pos 0 /**< \brief (AC_STATUSA) Comparator 0 Current State */ |
| mbed_official | 18:da299f395b9e | 302 | #define AC_STATUSA_STATE0 (1 << AC_STATUSA_STATE0_Pos) |
| mbed_official | 18:da299f395b9e | 303 | #define AC_STATUSA_STATE1_Pos 1 /**< \brief (AC_STATUSA) Comparator 1 Current State */ |
| mbed_official | 18:da299f395b9e | 304 | #define AC_STATUSA_STATE1 (1 << AC_STATUSA_STATE1_Pos) |
| mbed_official | 18:da299f395b9e | 305 | #define AC_STATUSA_STATE_Pos 0 /**< \brief (AC_STATUSA) Comparator x Current State */ |
| mbed_official | 18:da299f395b9e | 306 | #define AC_STATUSA_STATE_Msk (0x3ul << AC_STATUSA_STATE_Pos) |
| mbed_official | 18:da299f395b9e | 307 | #define AC_STATUSA_STATE(value) ((AC_STATUSA_STATE_Msk & ((value) << AC_STATUSA_STATE_Pos))) |
| mbed_official | 18:da299f395b9e | 308 | #define AC_STATUSA_WSTATE0_Pos 4 /**< \brief (AC_STATUSA) Window 0 Current State */ |
| mbed_official | 18:da299f395b9e | 309 | #define AC_STATUSA_WSTATE0_Msk (0x3ul << AC_STATUSA_WSTATE0_Pos) |
| mbed_official | 18:da299f395b9e | 310 | #define AC_STATUSA_WSTATE0(value) ((AC_STATUSA_WSTATE0_Msk & ((value) << AC_STATUSA_WSTATE0_Pos))) |
| mbed_official | 18:da299f395b9e | 311 | #define AC_STATUSA_WSTATE0_ABOVE_Val 0x0ul /**< \brief (AC_STATUSA) Signal is above window */ |
| mbed_official | 18:da299f395b9e | 312 | #define AC_STATUSA_WSTATE0_INSIDE_Val 0x1ul /**< \brief (AC_STATUSA) Signal is inside window */ |
| mbed_official | 18:da299f395b9e | 313 | #define AC_STATUSA_WSTATE0_BELOW_Val 0x2ul /**< \brief (AC_STATUSA) Signal is below window */ |
| mbed_official | 18:da299f395b9e | 314 | #define AC_STATUSA_WSTATE0_ABOVE (AC_STATUSA_WSTATE0_ABOVE_Val << AC_STATUSA_WSTATE0_Pos) |
| mbed_official | 18:da299f395b9e | 315 | #define AC_STATUSA_WSTATE0_INSIDE (AC_STATUSA_WSTATE0_INSIDE_Val << AC_STATUSA_WSTATE0_Pos) |
| mbed_official | 18:da299f395b9e | 316 | #define AC_STATUSA_WSTATE0_BELOW (AC_STATUSA_WSTATE0_BELOW_Val << AC_STATUSA_WSTATE0_Pos) |
| mbed_official | 18:da299f395b9e | 317 | #define AC_STATUSA_MASK 0x33ul /**< \brief (AC_STATUSA) MASK Register */ |
| mbed_official | 18:da299f395b9e | 318 | |
| mbed_official | 18:da299f395b9e | 319 | /* -------- AC_STATUSB : (AC Offset: 0x08) (R/ 8) Status B -------- */ |
| mbed_official | 18:da299f395b9e | 320 | #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) |
| mbed_official | 18:da299f395b9e | 321 | typedef union { |
| mbed_official | 18:da299f395b9e | 322 | struct { |
| mbed_official | 18:da299f395b9e | 323 | uint8_t READY0:1; /*!< bit: 0 Comparator 0 Ready */ |
| mbed_official | 18:da299f395b9e | 324 | uint8_t READY1:1; /*!< bit: 1 Comparator 1 Ready */ |
| mbed_official | 18:da299f395b9e | 325 | uint8_t :6; /*!< bit: 2.. 7 Reserved */ |
| mbed_official | 18:da299f395b9e | 326 | } bit; /*!< Structure used for bit access */ |
| mbed_official | 18:da299f395b9e | 327 | struct { |
| mbed_official | 18:da299f395b9e | 328 | uint8_t READY:2; /*!< bit: 0.. 1 Comparator x Ready */ |
| mbed_official | 18:da299f395b9e | 329 | uint8_t :6; /*!< bit: 2.. 7 Reserved */ |
| mbed_official | 18:da299f395b9e | 330 | } vec; /*!< Structure used for vec access */ |
| mbed_official | 18:da299f395b9e | 331 | uint8_t reg; /*!< Type used for register access */ |
| mbed_official | 18:da299f395b9e | 332 | } AC_STATUSB_Type; |
| mbed_official | 18:da299f395b9e | 333 | #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ |
| mbed_official | 18:da299f395b9e | 334 | |
| mbed_official | 18:da299f395b9e | 335 | #define AC_STATUSB_OFFSET 0x08 /**< \brief (AC_STATUSB offset) Status B */ |
| mbed_official | 18:da299f395b9e | 336 | #define AC_STATUSB_RESETVALUE 0x00ul /**< \brief (AC_STATUSB reset_value) Status B */ |
| mbed_official | 18:da299f395b9e | 337 | |
| mbed_official | 18:da299f395b9e | 338 | #define AC_STATUSB_READY0_Pos 0 /**< \brief (AC_STATUSB) Comparator 0 Ready */ |
| mbed_official | 18:da299f395b9e | 339 | #define AC_STATUSB_READY0 (1 << AC_STATUSB_READY0_Pos) |
| mbed_official | 18:da299f395b9e | 340 | #define AC_STATUSB_READY1_Pos 1 /**< \brief (AC_STATUSB) Comparator 1 Ready */ |
| mbed_official | 18:da299f395b9e | 341 | #define AC_STATUSB_READY1 (1 << AC_STATUSB_READY1_Pos) |
| mbed_official | 18:da299f395b9e | 342 | #define AC_STATUSB_READY_Pos 0 /**< \brief (AC_STATUSB) Comparator x Ready */ |
| mbed_official | 18:da299f395b9e | 343 | #define AC_STATUSB_READY_Msk (0x3ul << AC_STATUSB_READY_Pos) |
| mbed_official | 18:da299f395b9e | 344 | #define AC_STATUSB_READY(value) ((AC_STATUSB_READY_Msk & ((value) << AC_STATUSB_READY_Pos))) |
| mbed_official | 18:da299f395b9e | 345 | #define AC_STATUSB_MASK 0x03ul /**< \brief (AC_STATUSB) MASK Register */ |
| mbed_official | 18:da299f395b9e | 346 | |
| mbed_official | 18:da299f395b9e | 347 | /* -------- AC_DBGCTRL : (AC Offset: 0x09) (R/W 8) Debug Control -------- */ |
| mbed_official | 18:da299f395b9e | 348 | #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) |
| mbed_official | 18:da299f395b9e | 349 | typedef union { |
| mbed_official | 18:da299f395b9e | 350 | struct { |
| mbed_official | 18:da299f395b9e | 351 | uint8_t DBGRUN:1; /*!< bit: 0 Debug Run */ |
| mbed_official | 18:da299f395b9e | 352 | uint8_t :7; /*!< bit: 1.. 7 Reserved */ |
| mbed_official | 18:da299f395b9e | 353 | } bit; /*!< Structure used for bit access */ |
| mbed_official | 18:da299f395b9e | 354 | uint8_t reg; /*!< Type used for register access */ |
| mbed_official | 18:da299f395b9e | 355 | } AC_DBGCTRL_Type; |
| mbed_official | 18:da299f395b9e | 356 | #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ |
| mbed_official | 18:da299f395b9e | 357 | |
| mbed_official | 18:da299f395b9e | 358 | #define AC_DBGCTRL_OFFSET 0x09 /**< \brief (AC_DBGCTRL offset) Debug Control */ |
| mbed_official | 18:da299f395b9e | 359 | #define AC_DBGCTRL_RESETVALUE 0x00ul /**< \brief (AC_DBGCTRL reset_value) Debug Control */ |
| mbed_official | 18:da299f395b9e | 360 | |
| mbed_official | 18:da299f395b9e | 361 | #define AC_DBGCTRL_DBGRUN_Pos 0 /**< \brief (AC_DBGCTRL) Debug Run */ |
| mbed_official | 18:da299f395b9e | 362 | #define AC_DBGCTRL_DBGRUN (0x1ul << AC_DBGCTRL_DBGRUN_Pos) |
| mbed_official | 18:da299f395b9e | 363 | #define AC_DBGCTRL_MASK 0x01ul /**< \brief (AC_DBGCTRL) MASK Register */ |
| mbed_official | 18:da299f395b9e | 364 | |
| mbed_official | 18:da299f395b9e | 365 | /* -------- AC_WINCTRL : (AC Offset: 0x0A) (R/W 8) Window Control -------- */ |
| mbed_official | 18:da299f395b9e | 366 | #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) |
| mbed_official | 18:da299f395b9e | 367 | typedef union { |
| mbed_official | 18:da299f395b9e | 368 | struct { |
| mbed_official | 18:da299f395b9e | 369 | uint8_t WEN0:1; /*!< bit: 0 Window 0 Mode Enable */ |
| mbed_official | 18:da299f395b9e | 370 | uint8_t WINTSEL0:2; /*!< bit: 1.. 2 Window 0 Interrupt Selection */ |
| mbed_official | 18:da299f395b9e | 371 | uint8_t :5; /*!< bit: 3.. 7 Reserved */ |
| mbed_official | 18:da299f395b9e | 372 | } bit; /*!< Structure used for bit access */ |
| mbed_official | 18:da299f395b9e | 373 | uint8_t reg; /*!< Type used for register access */ |
| mbed_official | 18:da299f395b9e | 374 | } AC_WINCTRL_Type; |
| mbed_official | 18:da299f395b9e | 375 | #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ |
| mbed_official | 18:da299f395b9e | 376 | |
| mbed_official | 18:da299f395b9e | 377 | #define AC_WINCTRL_OFFSET 0x0A /**< \brief (AC_WINCTRL offset) Window Control */ |
| mbed_official | 18:da299f395b9e | 378 | #define AC_WINCTRL_RESETVALUE 0x00ul /**< \brief (AC_WINCTRL reset_value) Window Control */ |
| mbed_official | 18:da299f395b9e | 379 | |
| mbed_official | 18:da299f395b9e | 380 | #define AC_WINCTRL_WEN0_Pos 0 /**< \brief (AC_WINCTRL) Window 0 Mode Enable */ |
| mbed_official | 18:da299f395b9e | 381 | #define AC_WINCTRL_WEN0 (0x1ul << AC_WINCTRL_WEN0_Pos) |
| mbed_official | 18:da299f395b9e | 382 | #define AC_WINCTRL_WINTSEL0_Pos 1 /**< \brief (AC_WINCTRL) Window 0 Interrupt Selection */ |
| mbed_official | 18:da299f395b9e | 383 | #define AC_WINCTRL_WINTSEL0_Msk (0x3ul << AC_WINCTRL_WINTSEL0_Pos) |
| mbed_official | 18:da299f395b9e | 384 | #define AC_WINCTRL_WINTSEL0(value) ((AC_WINCTRL_WINTSEL0_Msk & ((value) << AC_WINCTRL_WINTSEL0_Pos))) |
| mbed_official | 18:da299f395b9e | 385 | #define AC_WINCTRL_WINTSEL0_ABOVE_Val 0x0ul /**< \brief (AC_WINCTRL) Interrupt on signal above window */ |
| mbed_official | 18:da299f395b9e | 386 | #define AC_WINCTRL_WINTSEL0_INSIDE_Val 0x1ul /**< \brief (AC_WINCTRL) Interrupt on signal inside window */ |
| mbed_official | 18:da299f395b9e | 387 | #define AC_WINCTRL_WINTSEL0_BELOW_Val 0x2ul /**< \brief (AC_WINCTRL) Interrupt on signal below window */ |
| mbed_official | 18:da299f395b9e | 388 | #define AC_WINCTRL_WINTSEL0_OUTSIDE_Val 0x3ul /**< \brief (AC_WINCTRL) Interrupt on signal outside window */ |
| mbed_official | 18:da299f395b9e | 389 | #define AC_WINCTRL_WINTSEL0_ABOVE (AC_WINCTRL_WINTSEL0_ABOVE_Val << AC_WINCTRL_WINTSEL0_Pos) |
| mbed_official | 18:da299f395b9e | 390 | #define AC_WINCTRL_WINTSEL0_INSIDE (AC_WINCTRL_WINTSEL0_INSIDE_Val << AC_WINCTRL_WINTSEL0_Pos) |
| mbed_official | 18:da299f395b9e | 391 | #define AC_WINCTRL_WINTSEL0_BELOW (AC_WINCTRL_WINTSEL0_BELOW_Val << AC_WINCTRL_WINTSEL0_Pos) |
| mbed_official | 18:da299f395b9e | 392 | #define AC_WINCTRL_WINTSEL0_OUTSIDE (AC_WINCTRL_WINTSEL0_OUTSIDE_Val << AC_WINCTRL_WINTSEL0_Pos) |
| mbed_official | 18:da299f395b9e | 393 | #define AC_WINCTRL_MASK 0x07ul /**< \brief (AC_WINCTRL) MASK Register */ |
| mbed_official | 18:da299f395b9e | 394 | |
| mbed_official | 18:da299f395b9e | 395 | /* -------- AC_SCALER : (AC Offset: 0x0C) (R/W 8) Scaler n -------- */ |
| mbed_official | 18:da299f395b9e | 396 | #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) |
| mbed_official | 18:da299f395b9e | 397 | typedef union { |
| mbed_official | 18:da299f395b9e | 398 | struct { |
| mbed_official | 18:da299f395b9e | 399 | uint8_t VALUE:6; /*!< bit: 0.. 5 Scaler Value */ |
| mbed_official | 18:da299f395b9e | 400 | uint8_t :2; /*!< bit: 6.. 7 Reserved */ |
| mbed_official | 18:da299f395b9e | 401 | } bit; /*!< Structure used for bit access */ |
| mbed_official | 18:da299f395b9e | 402 | uint8_t reg; /*!< Type used for register access */ |
| mbed_official | 18:da299f395b9e | 403 | } AC_SCALER_Type; |
| mbed_official | 18:da299f395b9e | 404 | #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ |
| mbed_official | 18:da299f395b9e | 405 | |
| mbed_official | 18:da299f395b9e | 406 | #define AC_SCALER_OFFSET 0x0C /**< \brief (AC_SCALER offset) Scaler n */ |
| mbed_official | 18:da299f395b9e | 407 | #define AC_SCALER_RESETVALUE 0x00ul /**< \brief (AC_SCALER reset_value) Scaler n */ |
| mbed_official | 18:da299f395b9e | 408 | |
| mbed_official | 18:da299f395b9e | 409 | #define AC_SCALER_VALUE_Pos 0 /**< \brief (AC_SCALER) Scaler Value */ |
| mbed_official | 18:da299f395b9e | 410 | #define AC_SCALER_VALUE_Msk (0x3Ful << AC_SCALER_VALUE_Pos) |
| mbed_official | 18:da299f395b9e | 411 | #define AC_SCALER_VALUE(value) ((AC_SCALER_VALUE_Msk & ((value) << AC_SCALER_VALUE_Pos))) |
| mbed_official | 18:da299f395b9e | 412 | #define AC_SCALER_MASK 0x3Ful /**< \brief (AC_SCALER) MASK Register */ |
| mbed_official | 18:da299f395b9e | 413 | |
| mbed_official | 18:da299f395b9e | 414 | /* -------- AC_COMPCTRL : (AC Offset: 0x10) (R/W 32) Comparator Control n -------- */ |
| mbed_official | 18:da299f395b9e | 415 | #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) |
| mbed_official | 18:da299f395b9e | 416 | typedef union { |
| mbed_official | 18:da299f395b9e | 417 | struct { |
| mbed_official | 18:da299f395b9e | 418 | uint32_t :1; /*!< bit: 0 Reserved */ |
| mbed_official | 18:da299f395b9e | 419 | uint32_t ENABLE:1; /*!< bit: 1 Enable */ |
| mbed_official | 18:da299f395b9e | 420 | uint32_t SINGLE:1; /*!< bit: 2 Single-Shot Mode */ |
| mbed_official | 18:da299f395b9e | 421 | uint32_t INTSEL:2; /*!< bit: 3.. 4 Interrupt Selection */ |
| mbed_official | 18:da299f395b9e | 422 | uint32_t :1; /*!< bit: 5 Reserved */ |
| mbed_official | 18:da299f395b9e | 423 | uint32_t RUNSTDBY:1; /*!< bit: 6 Run in Standby */ |
| mbed_official | 18:da299f395b9e | 424 | uint32_t :1; /*!< bit: 7 Reserved */ |
| mbed_official | 18:da299f395b9e | 425 | uint32_t MUXNEG:3; /*!< bit: 8..10 Negative Input Mux Selection */ |
| mbed_official | 18:da299f395b9e | 426 | uint32_t :1; /*!< bit: 11 Reserved */ |
| mbed_official | 18:da299f395b9e | 427 | uint32_t MUXPOS:3; /*!< bit: 12..14 Positive Input Mux Selection */ |
| mbed_official | 18:da299f395b9e | 428 | uint32_t SWAP:1; /*!< bit: 15 Swap Inputs and Invert */ |
| mbed_official | 18:da299f395b9e | 429 | uint32_t SPEED:2; /*!< bit: 16..17 Speed Selection */ |
| mbed_official | 18:da299f395b9e | 430 | uint32_t :1; /*!< bit: 18 Reserved */ |
| mbed_official | 18:da299f395b9e | 431 | uint32_t HYSTEN:1; /*!< bit: 19 Hysteresis Enable */ |
| mbed_official | 18:da299f395b9e | 432 | uint32_t HYST:2; /*!< bit: 20..21 Hysteresis Level */ |
| mbed_official | 18:da299f395b9e | 433 | uint32_t :2; /*!< bit: 22..23 Reserved */ |
| mbed_official | 18:da299f395b9e | 434 | uint32_t FLEN:3; /*!< bit: 24..26 Filter Length */ |
| mbed_official | 18:da299f395b9e | 435 | uint32_t :1; /*!< bit: 27 Reserved */ |
| mbed_official | 18:da299f395b9e | 436 | uint32_t OUT:2; /*!< bit: 28..29 Output */ |
| mbed_official | 18:da299f395b9e | 437 | uint32_t :2; /*!< bit: 30..31 Reserved */ |
| mbed_official | 18:da299f395b9e | 438 | } bit; /*!< Structure used for bit access */ |
| mbed_official | 18:da299f395b9e | 439 | uint32_t reg; /*!< Type used for register access */ |
| mbed_official | 18:da299f395b9e | 440 | } AC_COMPCTRL_Type; |
| mbed_official | 18:da299f395b9e | 441 | #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ |
| mbed_official | 18:da299f395b9e | 442 | |
| mbed_official | 18:da299f395b9e | 443 | #define AC_COMPCTRL_OFFSET 0x10 /**< \brief (AC_COMPCTRL offset) Comparator Control n */ |
| mbed_official | 18:da299f395b9e | 444 | #define AC_COMPCTRL_RESETVALUE 0x00000000ul /**< \brief (AC_COMPCTRL reset_value) Comparator Control n */ |
| mbed_official | 18:da299f395b9e | 445 | |
| mbed_official | 18:da299f395b9e | 446 | #define AC_COMPCTRL_ENABLE_Pos 1 /**< \brief (AC_COMPCTRL) Enable */ |
| mbed_official | 18:da299f395b9e | 447 | #define AC_COMPCTRL_ENABLE (0x1ul << AC_COMPCTRL_ENABLE_Pos) |
| mbed_official | 18:da299f395b9e | 448 | #define AC_COMPCTRL_SINGLE_Pos 2 /**< \brief (AC_COMPCTRL) Single-Shot Mode */ |
| mbed_official | 18:da299f395b9e | 449 | #define AC_COMPCTRL_SINGLE (0x1ul << AC_COMPCTRL_SINGLE_Pos) |
| mbed_official | 18:da299f395b9e | 450 | #define AC_COMPCTRL_INTSEL_Pos 3 /**< \brief (AC_COMPCTRL) Interrupt Selection */ |
| mbed_official | 18:da299f395b9e | 451 | #define AC_COMPCTRL_INTSEL_Msk (0x3ul << AC_COMPCTRL_INTSEL_Pos) |
| mbed_official | 18:da299f395b9e | 452 | #define AC_COMPCTRL_INTSEL(value) ((AC_COMPCTRL_INTSEL_Msk & ((value) << AC_COMPCTRL_INTSEL_Pos))) |
| mbed_official | 18:da299f395b9e | 453 | #define AC_COMPCTRL_INTSEL_TOGGLE_Val 0x0ul /**< \brief (AC_COMPCTRL) Interrupt on comparator output toggle */ |
| mbed_official | 18:da299f395b9e | 454 | #define AC_COMPCTRL_INTSEL_RISING_Val 0x1ul /**< \brief (AC_COMPCTRL) Interrupt on comparator output rising */ |
| mbed_official | 18:da299f395b9e | 455 | #define AC_COMPCTRL_INTSEL_FALLING_Val 0x2ul /**< \brief (AC_COMPCTRL) Interrupt on comparator output falling */ |
| mbed_official | 18:da299f395b9e | 456 | #define AC_COMPCTRL_INTSEL_EOC_Val 0x3ul /**< \brief (AC_COMPCTRL) Interrupt on end of comparison (single-shot mode only) */ |
| mbed_official | 18:da299f395b9e | 457 | #define AC_COMPCTRL_INTSEL_TOGGLE (AC_COMPCTRL_INTSEL_TOGGLE_Val << AC_COMPCTRL_INTSEL_Pos) |
| mbed_official | 18:da299f395b9e | 458 | #define AC_COMPCTRL_INTSEL_RISING (AC_COMPCTRL_INTSEL_RISING_Val << AC_COMPCTRL_INTSEL_Pos) |
| mbed_official | 18:da299f395b9e | 459 | #define AC_COMPCTRL_INTSEL_FALLING (AC_COMPCTRL_INTSEL_FALLING_Val << AC_COMPCTRL_INTSEL_Pos) |
| mbed_official | 18:da299f395b9e | 460 | #define AC_COMPCTRL_INTSEL_EOC (AC_COMPCTRL_INTSEL_EOC_Val << AC_COMPCTRL_INTSEL_Pos) |
| mbed_official | 18:da299f395b9e | 461 | #define AC_COMPCTRL_RUNSTDBY_Pos 6 /**< \brief (AC_COMPCTRL) Run in Standby */ |
| mbed_official | 18:da299f395b9e | 462 | #define AC_COMPCTRL_RUNSTDBY (0x1ul << AC_COMPCTRL_RUNSTDBY_Pos) |
| mbed_official | 18:da299f395b9e | 463 | #define AC_COMPCTRL_MUXNEG_Pos 8 /**< \brief (AC_COMPCTRL) Negative Input Mux Selection */ |
| mbed_official | 18:da299f395b9e | 464 | #define AC_COMPCTRL_MUXNEG_Msk (0x7ul << AC_COMPCTRL_MUXNEG_Pos) |
| mbed_official | 18:da299f395b9e | 465 | #define AC_COMPCTRL_MUXNEG(value) ((AC_COMPCTRL_MUXNEG_Msk & ((value) << AC_COMPCTRL_MUXNEG_Pos))) |
| mbed_official | 18:da299f395b9e | 466 | #define AC_COMPCTRL_MUXNEG_PIN0_Val 0x0ul /**< \brief (AC_COMPCTRL) I/O pin 0 */ |
| mbed_official | 18:da299f395b9e | 467 | #define AC_COMPCTRL_MUXNEG_PIN1_Val 0x1ul /**< \brief (AC_COMPCTRL) I/O pin 1 */ |
| mbed_official | 18:da299f395b9e | 468 | #define AC_COMPCTRL_MUXNEG_PIN2_Val 0x2ul /**< \brief (AC_COMPCTRL) I/O pin 2 */ |
| mbed_official | 18:da299f395b9e | 469 | #define AC_COMPCTRL_MUXNEG_PIN3_Val 0x3ul /**< \brief (AC_COMPCTRL) I/O pin 3 */ |
| mbed_official | 18:da299f395b9e | 470 | #define AC_COMPCTRL_MUXNEG_GND_Val 0x4ul /**< \brief (AC_COMPCTRL) Ground */ |
| mbed_official | 18:da299f395b9e | 471 | #define AC_COMPCTRL_MUXNEG_VSCALE_Val 0x5ul /**< \brief (AC_COMPCTRL) VDD scaler */ |
| mbed_official | 18:da299f395b9e | 472 | #define AC_COMPCTRL_MUXNEG_BANDGAP_Val 0x6ul /**< \brief (AC_COMPCTRL) Internal bandgap voltage */ |
| mbed_official | 18:da299f395b9e | 473 | #define AC_COMPCTRL_MUXNEG_DAC_Val 0x7ul /**< \brief (AC_COMPCTRL) DAC output */ |
| mbed_official | 18:da299f395b9e | 474 | #define AC_COMPCTRL_MUXNEG_PIN0 (AC_COMPCTRL_MUXNEG_PIN0_Val << AC_COMPCTRL_MUXNEG_Pos) |
| mbed_official | 18:da299f395b9e | 475 | #define AC_COMPCTRL_MUXNEG_PIN1 (AC_COMPCTRL_MUXNEG_PIN1_Val << AC_COMPCTRL_MUXNEG_Pos) |
| mbed_official | 18:da299f395b9e | 476 | #define AC_COMPCTRL_MUXNEG_PIN2 (AC_COMPCTRL_MUXNEG_PIN2_Val << AC_COMPCTRL_MUXNEG_Pos) |
| mbed_official | 18:da299f395b9e | 477 | #define AC_COMPCTRL_MUXNEG_PIN3 (AC_COMPCTRL_MUXNEG_PIN3_Val << AC_COMPCTRL_MUXNEG_Pos) |
| mbed_official | 18:da299f395b9e | 478 | #define AC_COMPCTRL_MUXNEG_GND (AC_COMPCTRL_MUXNEG_GND_Val << AC_COMPCTRL_MUXNEG_Pos) |
| mbed_official | 18:da299f395b9e | 479 | #define AC_COMPCTRL_MUXNEG_VSCALE (AC_COMPCTRL_MUXNEG_VSCALE_Val << AC_COMPCTRL_MUXNEG_Pos) |
| mbed_official | 18:da299f395b9e | 480 | #define AC_COMPCTRL_MUXNEG_BANDGAP (AC_COMPCTRL_MUXNEG_BANDGAP_Val << AC_COMPCTRL_MUXNEG_Pos) |
| mbed_official | 18:da299f395b9e | 481 | #define AC_COMPCTRL_MUXNEG_DAC (AC_COMPCTRL_MUXNEG_DAC_Val << AC_COMPCTRL_MUXNEG_Pos) |
| mbed_official | 18:da299f395b9e | 482 | #define AC_COMPCTRL_MUXPOS_Pos 12 /**< \brief (AC_COMPCTRL) Positive Input Mux Selection */ |
| mbed_official | 18:da299f395b9e | 483 | #define AC_COMPCTRL_MUXPOS_Msk (0x7ul << AC_COMPCTRL_MUXPOS_Pos) |
| mbed_official | 18:da299f395b9e | 484 | #define AC_COMPCTRL_MUXPOS(value) ((AC_COMPCTRL_MUXPOS_Msk & ((value) << AC_COMPCTRL_MUXPOS_Pos))) |
| mbed_official | 18:da299f395b9e | 485 | #define AC_COMPCTRL_MUXPOS_PIN0_Val 0x0ul /**< \brief (AC_COMPCTRL) I/O pin 0 */ |
| mbed_official | 18:da299f395b9e | 486 | #define AC_COMPCTRL_MUXPOS_PIN1_Val 0x1ul /**< \brief (AC_COMPCTRL) I/O pin 1 */ |
| mbed_official | 18:da299f395b9e | 487 | #define AC_COMPCTRL_MUXPOS_PIN2_Val 0x2ul /**< \brief (AC_COMPCTRL) I/O pin 2 */ |
| mbed_official | 18:da299f395b9e | 488 | #define AC_COMPCTRL_MUXPOS_PIN3_Val 0x3ul /**< \brief (AC_COMPCTRL) I/O pin 3 */ |
| mbed_official | 18:da299f395b9e | 489 | #define AC_COMPCTRL_MUXPOS_VSCALE_Val 0x4ul /**< \brief (AC_COMPCTRL) VDD Scaler */ |
| mbed_official | 18:da299f395b9e | 490 | #define AC_COMPCTRL_MUXPOS_PIN0 (AC_COMPCTRL_MUXPOS_PIN0_Val << AC_COMPCTRL_MUXPOS_Pos) |
| mbed_official | 18:da299f395b9e | 491 | #define AC_COMPCTRL_MUXPOS_PIN1 (AC_COMPCTRL_MUXPOS_PIN1_Val << AC_COMPCTRL_MUXPOS_Pos) |
| mbed_official | 18:da299f395b9e | 492 | #define AC_COMPCTRL_MUXPOS_PIN2 (AC_COMPCTRL_MUXPOS_PIN2_Val << AC_COMPCTRL_MUXPOS_Pos) |
| mbed_official | 18:da299f395b9e | 493 | #define AC_COMPCTRL_MUXPOS_PIN3 (AC_COMPCTRL_MUXPOS_PIN3_Val << AC_COMPCTRL_MUXPOS_Pos) |
| mbed_official | 18:da299f395b9e | 494 | #define AC_COMPCTRL_MUXPOS_VSCALE (AC_COMPCTRL_MUXPOS_VSCALE_Val << AC_COMPCTRL_MUXPOS_Pos) |
| mbed_official | 18:da299f395b9e | 495 | #define AC_COMPCTRL_SWAP_Pos 15 /**< \brief (AC_COMPCTRL) Swap Inputs and Invert */ |
| mbed_official | 18:da299f395b9e | 496 | #define AC_COMPCTRL_SWAP (0x1ul << AC_COMPCTRL_SWAP_Pos) |
| mbed_official | 18:da299f395b9e | 497 | #define AC_COMPCTRL_SPEED_Pos 16 /**< \brief (AC_COMPCTRL) Speed Selection */ |
| mbed_official | 18:da299f395b9e | 498 | #define AC_COMPCTRL_SPEED_Msk (0x3ul << AC_COMPCTRL_SPEED_Pos) |
| mbed_official | 18:da299f395b9e | 499 | #define AC_COMPCTRL_SPEED(value) ((AC_COMPCTRL_SPEED_Msk & ((value) << AC_COMPCTRL_SPEED_Pos))) |
| mbed_official | 18:da299f395b9e | 500 | #define AC_COMPCTRL_SPEED_LOW_Val 0x0ul /**< \brief (AC_COMPCTRL) Low speed */ |
| mbed_official | 18:da299f395b9e | 501 | #define AC_COMPCTRL_SPEED_MEDLOW_Val 0x1ul /**< \brief (AC_COMPCTRL) Medium low speed */ |
| mbed_official | 18:da299f395b9e | 502 | #define AC_COMPCTRL_SPEED_MEDHIGH_Val 0x2ul /**< \brief (AC_COMPCTRL) Medium high speed */ |
| mbed_official | 18:da299f395b9e | 503 | #define AC_COMPCTRL_SPEED_HIGH_Val 0x3ul /**< \brief (AC_COMPCTRL) High speed */ |
| mbed_official | 18:da299f395b9e | 504 | #define AC_COMPCTRL_SPEED_LOW (AC_COMPCTRL_SPEED_LOW_Val << AC_COMPCTRL_SPEED_Pos) |
| mbed_official | 18:da299f395b9e | 505 | #define AC_COMPCTRL_SPEED_MEDLOW (AC_COMPCTRL_SPEED_MEDLOW_Val << AC_COMPCTRL_SPEED_Pos) |
| mbed_official | 18:da299f395b9e | 506 | #define AC_COMPCTRL_SPEED_MEDHIGH (AC_COMPCTRL_SPEED_MEDHIGH_Val << AC_COMPCTRL_SPEED_Pos) |
| mbed_official | 18:da299f395b9e | 507 | #define AC_COMPCTRL_SPEED_HIGH (AC_COMPCTRL_SPEED_HIGH_Val << AC_COMPCTRL_SPEED_Pos) |
| mbed_official | 18:da299f395b9e | 508 | #define AC_COMPCTRL_HYSTEN_Pos 19 /**< \brief (AC_COMPCTRL) Hysteresis Enable */ |
| mbed_official | 18:da299f395b9e | 509 | #define AC_COMPCTRL_HYSTEN (0x1ul << AC_COMPCTRL_HYSTEN_Pos) |
| mbed_official | 18:da299f395b9e | 510 | #define AC_COMPCTRL_HYST_Pos 20 /**< \brief (AC_COMPCTRL) Hysteresis Level */ |
| mbed_official | 18:da299f395b9e | 511 | #define AC_COMPCTRL_HYST_Msk (0x3ul << AC_COMPCTRL_HYST_Pos) |
| mbed_official | 18:da299f395b9e | 512 | #define AC_COMPCTRL_HYST(value) ((AC_COMPCTRL_HYST_Msk & ((value) << AC_COMPCTRL_HYST_Pos))) |
| mbed_official | 18:da299f395b9e | 513 | #define AC_COMPCTRL_HYST_HYST50_Val 0x0ul /**< \brief (AC_COMPCTRL) 50mV */ |
| mbed_official | 18:da299f395b9e | 514 | #define AC_COMPCTRL_HYST_HYST70_Val 0x1ul /**< \brief (AC_COMPCTRL) 70mV */ |
| mbed_official | 18:da299f395b9e | 515 | #define AC_COMPCTRL_HYST_HYST90_Val 0x2ul /**< \brief (AC_COMPCTRL) 90mV */ |
| mbed_official | 18:da299f395b9e | 516 | #define AC_COMPCTRL_HYST_HYST110_Val 0x3ul /**< \brief (AC_COMPCTRL) 110mV */ |
| mbed_official | 18:da299f395b9e | 517 | #define AC_COMPCTRL_HYST_HYST50 (AC_COMPCTRL_HYST_HYST50_Val << AC_COMPCTRL_HYST_Pos) |
| mbed_official | 18:da299f395b9e | 518 | #define AC_COMPCTRL_HYST_HYST70 (AC_COMPCTRL_HYST_HYST70_Val << AC_COMPCTRL_HYST_Pos) |
| mbed_official | 18:da299f395b9e | 519 | #define AC_COMPCTRL_HYST_HYST90 (AC_COMPCTRL_HYST_HYST90_Val << AC_COMPCTRL_HYST_Pos) |
| mbed_official | 18:da299f395b9e | 520 | #define AC_COMPCTRL_HYST_HYST110 (AC_COMPCTRL_HYST_HYST110_Val << AC_COMPCTRL_HYST_Pos) |
| mbed_official | 18:da299f395b9e | 521 | #define AC_COMPCTRL_FLEN_Pos 24 /**< \brief (AC_COMPCTRL) Filter Length */ |
| mbed_official | 18:da299f395b9e | 522 | #define AC_COMPCTRL_FLEN_Msk (0x7ul << AC_COMPCTRL_FLEN_Pos) |
| mbed_official | 18:da299f395b9e | 523 | #define AC_COMPCTRL_FLEN(value) ((AC_COMPCTRL_FLEN_Msk & ((value) << AC_COMPCTRL_FLEN_Pos))) |
| mbed_official | 18:da299f395b9e | 524 | #define AC_COMPCTRL_FLEN_OFF_Val 0x0ul /**< \brief (AC_COMPCTRL) No filtering */ |
| mbed_official | 18:da299f395b9e | 525 | #define AC_COMPCTRL_FLEN_MAJ3_Val 0x1ul /**< \brief (AC_COMPCTRL) 3-bit majority function (2 of 3) */ |
| mbed_official | 18:da299f395b9e | 526 | #define AC_COMPCTRL_FLEN_MAJ5_Val 0x2ul /**< \brief (AC_COMPCTRL) 5-bit majority function (3 of 5) */ |
| mbed_official | 18:da299f395b9e | 527 | #define AC_COMPCTRL_FLEN_OFF (AC_COMPCTRL_FLEN_OFF_Val << AC_COMPCTRL_FLEN_Pos) |
| mbed_official | 18:da299f395b9e | 528 | #define AC_COMPCTRL_FLEN_MAJ3 (AC_COMPCTRL_FLEN_MAJ3_Val << AC_COMPCTRL_FLEN_Pos) |
| mbed_official | 18:da299f395b9e | 529 | #define AC_COMPCTRL_FLEN_MAJ5 (AC_COMPCTRL_FLEN_MAJ5_Val << AC_COMPCTRL_FLEN_Pos) |
| mbed_official | 18:da299f395b9e | 530 | #define AC_COMPCTRL_OUT_Pos 28 /**< \brief (AC_COMPCTRL) Output */ |
| mbed_official | 18:da299f395b9e | 531 | #define AC_COMPCTRL_OUT_Msk (0x3ul << AC_COMPCTRL_OUT_Pos) |
| mbed_official | 18:da299f395b9e | 532 | #define AC_COMPCTRL_OUT(value) ((AC_COMPCTRL_OUT_Msk & ((value) << AC_COMPCTRL_OUT_Pos))) |
| mbed_official | 18:da299f395b9e | 533 | #define AC_COMPCTRL_OUT_OFF_Val 0x0ul /**< \brief (AC_COMPCTRL) The output of COMPn is not routed to the COMPn I/O port */ |
| mbed_official | 18:da299f395b9e | 534 | #define AC_COMPCTRL_OUT_ASYNC_Val 0x1ul /**< \brief (AC_COMPCTRL) The asynchronous output of COMPn is routed to the COMPn I/O port */ |
| mbed_official | 18:da299f395b9e | 535 | #define AC_COMPCTRL_OUT_SYNC_Val 0x2ul /**< \brief (AC_COMPCTRL) The synchronous output (including filtering) of COMPn is routed to the COMPn I/O port */ |
| mbed_official | 18:da299f395b9e | 536 | #define AC_COMPCTRL_OUT_OFF (AC_COMPCTRL_OUT_OFF_Val << AC_COMPCTRL_OUT_Pos) |
| mbed_official | 18:da299f395b9e | 537 | #define AC_COMPCTRL_OUT_ASYNC (AC_COMPCTRL_OUT_ASYNC_Val << AC_COMPCTRL_OUT_Pos) |
| mbed_official | 18:da299f395b9e | 538 | #define AC_COMPCTRL_OUT_SYNC (AC_COMPCTRL_OUT_SYNC_Val << AC_COMPCTRL_OUT_Pos) |
| mbed_official | 18:da299f395b9e | 539 | #define AC_COMPCTRL_MASK 0x373BF75Eul /**< \brief (AC_COMPCTRL) MASK Register */ |
| mbed_official | 18:da299f395b9e | 540 | |
| mbed_official | 18:da299f395b9e | 541 | /* -------- AC_SYNCBUSY : (AC Offset: 0x20) (R/ 32) Synchronization Busy -------- */ |
| mbed_official | 18:da299f395b9e | 542 | #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) |
| mbed_official | 18:da299f395b9e | 543 | typedef union { |
| mbed_official | 18:da299f395b9e | 544 | struct { |
| mbed_official | 18:da299f395b9e | 545 | uint32_t SWRST:1; /*!< bit: 0 Software Reset Synchronization Busy */ |
| mbed_official | 18:da299f395b9e | 546 | uint32_t ENABLE:1; /*!< bit: 1 Enable Synchronization Busy */ |
| mbed_official | 18:da299f395b9e | 547 | uint32_t WINCTRL:1; /*!< bit: 2 WINCTRL Synchronization Busy */ |
| mbed_official | 18:da299f395b9e | 548 | uint32_t COMPCTRL0:1; /*!< bit: 3 COMPCTRL 0 Synchronization Busy */ |
| mbed_official | 18:da299f395b9e | 549 | uint32_t COMPCTRL1:1; /*!< bit: 4 COMPCTRL 1 Synchronization Busy */ |
| mbed_official | 18:da299f395b9e | 550 | uint32_t :27; /*!< bit: 5..31 Reserved */ |
| mbed_official | 18:da299f395b9e | 551 | } bit; /*!< Structure used for bit access */ |
| mbed_official | 18:da299f395b9e | 552 | struct { |
| mbed_official | 18:da299f395b9e | 553 | uint32_t :3; /*!< bit: 0.. 2 Reserved */ |
| mbed_official | 18:da299f395b9e | 554 | uint32_t COMPCTRL:2; /*!< bit: 3.. 4 COMPCTRL x Synchronization Busy */ |
| mbed_official | 18:da299f395b9e | 555 | uint32_t :27; /*!< bit: 5..31 Reserved */ |
| mbed_official | 18:da299f395b9e | 556 | } vec; /*!< Structure used for vec access */ |
| mbed_official | 18:da299f395b9e | 557 | uint32_t reg; /*!< Type used for register access */ |
| mbed_official | 18:da299f395b9e | 558 | } AC_SYNCBUSY_Type; |
| mbed_official | 18:da299f395b9e | 559 | #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ |
| mbed_official | 18:da299f395b9e | 560 | |
| mbed_official | 18:da299f395b9e | 561 | #define AC_SYNCBUSY_OFFSET 0x20 /**< \brief (AC_SYNCBUSY offset) Synchronization Busy */ |
| mbed_official | 18:da299f395b9e | 562 | #define AC_SYNCBUSY_RESETVALUE 0x00000000ul /**< \brief (AC_SYNCBUSY reset_value) Synchronization Busy */ |
| mbed_official | 18:da299f395b9e | 563 | |
| mbed_official | 18:da299f395b9e | 564 | #define AC_SYNCBUSY_SWRST_Pos 0 /**< \brief (AC_SYNCBUSY) Software Reset Synchronization Busy */ |
| mbed_official | 18:da299f395b9e | 565 | #define AC_SYNCBUSY_SWRST (0x1ul << AC_SYNCBUSY_SWRST_Pos) |
| mbed_official | 18:da299f395b9e | 566 | #define AC_SYNCBUSY_ENABLE_Pos 1 /**< \brief (AC_SYNCBUSY) Enable Synchronization Busy */ |
| mbed_official | 18:da299f395b9e | 567 | #define AC_SYNCBUSY_ENABLE (0x1ul << AC_SYNCBUSY_ENABLE_Pos) |
| mbed_official | 18:da299f395b9e | 568 | #define AC_SYNCBUSY_WINCTRL_Pos 2 /**< \brief (AC_SYNCBUSY) WINCTRL Synchronization Busy */ |
| mbed_official | 18:da299f395b9e | 569 | #define AC_SYNCBUSY_WINCTRL (0x1ul << AC_SYNCBUSY_WINCTRL_Pos) |
| mbed_official | 18:da299f395b9e | 570 | #define AC_SYNCBUSY_COMPCTRL0_Pos 3 /**< \brief (AC_SYNCBUSY) COMPCTRL 0 Synchronization Busy */ |
| mbed_official | 18:da299f395b9e | 571 | #define AC_SYNCBUSY_COMPCTRL0 (1 << AC_SYNCBUSY_COMPCTRL0_Pos) |
| mbed_official | 18:da299f395b9e | 572 | #define AC_SYNCBUSY_COMPCTRL1_Pos 4 /**< \brief (AC_SYNCBUSY) COMPCTRL 1 Synchronization Busy */ |
| mbed_official | 18:da299f395b9e | 573 | #define AC_SYNCBUSY_COMPCTRL1 (1 << AC_SYNCBUSY_COMPCTRL1_Pos) |
| mbed_official | 18:da299f395b9e | 574 | #define AC_SYNCBUSY_COMPCTRL_Pos 3 /**< \brief (AC_SYNCBUSY) COMPCTRL x Synchronization Busy */ |
| mbed_official | 18:da299f395b9e | 575 | #define AC_SYNCBUSY_COMPCTRL_Msk (0x3ul << AC_SYNCBUSY_COMPCTRL_Pos) |
| mbed_official | 18:da299f395b9e | 576 | #define AC_SYNCBUSY_COMPCTRL(value) ((AC_SYNCBUSY_COMPCTRL_Msk & ((value) << AC_SYNCBUSY_COMPCTRL_Pos))) |
| mbed_official | 18:da299f395b9e | 577 | #define AC_SYNCBUSY_MASK 0x0000001Ful /**< \brief (AC_SYNCBUSY) MASK Register */ |
| mbed_official | 18:da299f395b9e | 578 | |
| mbed_official | 18:da299f395b9e | 579 | /** \brief AC hardware registers */ |
| mbed_official | 18:da299f395b9e | 580 | #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) |
| mbed_official | 18:da299f395b9e | 581 | typedef struct { |
| mbed_official | 18:da299f395b9e | 582 | __IO AC_CTRLA_Type CTRLA; /**< \brief Offset: 0x00 (R/W 8) Control A */ |
| mbed_official | 18:da299f395b9e | 583 | __O AC_CTRLB_Type CTRLB; /**< \brief Offset: 0x01 ( /W 8) Control B */ |
| mbed_official | 18:da299f395b9e | 584 | __IO AC_EVCTRL_Type EVCTRL; /**< \brief Offset: 0x02 (R/W 16) Event Control */ |
| mbed_official | 18:da299f395b9e | 585 | __IO AC_INTENCLR_Type INTENCLR; /**< \brief Offset: 0x04 (R/W 8) Interrupt Enable Clear */ |
| mbed_official | 18:da299f395b9e | 586 | __IO AC_INTENSET_Type INTENSET; /**< \brief Offset: 0x05 (R/W 8) Interrupt Enable Set */ |
| mbed_official | 18:da299f395b9e | 587 | __IO AC_INTFLAG_Type INTFLAG; /**< \brief Offset: 0x06 (R/W 8) Interrupt Flag Status and Clear */ |
| mbed_official | 18:da299f395b9e | 588 | __I AC_STATUSA_Type STATUSA; /**< \brief Offset: 0x07 (R/ 8) Status A */ |
| mbed_official | 18:da299f395b9e | 589 | __I AC_STATUSB_Type STATUSB; /**< \brief Offset: 0x08 (R/ 8) Status B */ |
| mbed_official | 18:da299f395b9e | 590 | __IO AC_DBGCTRL_Type DBGCTRL; /**< \brief Offset: 0x09 (R/W 8) Debug Control */ |
| mbed_official | 18:da299f395b9e | 591 | __IO AC_WINCTRL_Type WINCTRL; /**< \brief Offset: 0x0A (R/W 8) Window Control */ |
| mbed_official | 18:da299f395b9e | 592 | RoReg8 Reserved1[0x1]; |
| mbed_official | 18:da299f395b9e | 593 | __IO AC_SCALER_Type SCALER[2]; /**< \brief Offset: 0x0C (R/W 8) Scaler n */ |
| mbed_official | 18:da299f395b9e | 594 | RoReg8 Reserved2[0x2]; |
| mbed_official | 18:da299f395b9e | 595 | __IO AC_COMPCTRL_Type COMPCTRL[2]; /**< \brief Offset: 0x10 (R/W 32) Comparator Control n */ |
| mbed_official | 18:da299f395b9e | 596 | RoReg8 Reserved3[0x8]; |
| mbed_official | 18:da299f395b9e | 597 | __I AC_SYNCBUSY_Type SYNCBUSY; /**< \brief Offset: 0x20 (R/ 32) Synchronization Busy */ |
| mbed_official | 18:da299f395b9e | 598 | } Ac; |
| mbed_official | 18:da299f395b9e | 599 | #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ |
| mbed_official | 18:da299f395b9e | 600 | |
| mbed_official | 18:da299f395b9e | 601 | /*@}*/ |
| mbed_official | 18:da299f395b9e | 602 | |
| mbed_official | 18:da299f395b9e | 603 | #endif /* _SAML21_AC_COMPONENT_ */ |