b luo / mbed-dev

mbed library sources. With a patch for the can_api

Fork of mbed-dev by mbed official

targets/TARGET_ONSEMI/TARGET_NCS36510/clock.h@151:91825d030f9b, 2016-11-14 (annotated)

Committer:
DangerousElectrician
Date:
Mon Nov 14 04:39:23 2016 +0000
Revision:
151:91825d030f9b
Parent:
150:02e0a0aed4ec 
stuff changed?

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 149:156823d33999 1 /**
<> 149:156823d33999 2 ******************************************************************************
<> 149:156823d33999 3 * @file clock.h
<> 149:156823d33999 4 * @brief Header of clock hw module functions
<> 149:156823d33999 5 * @internal
<> 149:156823d33999 6 * @author ON Semiconductor
<> 149:156823d33999 7 * $Rev: 3414 $
<> 149:156823d33999 8 * $Date: 2015-06-05 13:27:04 +0530 (Fri, 05 Jun 2015) $
<> 149:156823d33999 9 ******************************************************************************
<> 149:156823d33999 10 * Copyright 2016 Semiconductor Components Industries LLC (d/b/a “ON Semiconductor”).
<> 149:156823d33999 11 * All rights reserved. This software and/or documentation is licensed by ON Semiconductor
<> 149:156823d33999 12 * under limited terms and conditions. The terms and conditions pertaining to the software
<> 149:156823d33999 13 * and/or documentation are available at http://www.onsemi.com/site/pdf/ONSEMI_T&C.pdf
<> 149:156823d33999 14 * (“ON Semiconductor Standard Terms and Conditions of Sale, Section 8 Software”) and
<> 149:156823d33999 15 * if applicable the software license agreement. Do not use this software and/or
<> 149:156823d33999 16 * documentation unless you have carefully read and you agree to the limited terms and
<> 149:156823d33999 17 * conditions. By using this software and/or documentation, you agree to the limited
<> 149:156823d33999 18 * terms and conditions.
<> 149:156823d33999 19 *
<> 149:156823d33999 20 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
<> 149:156823d33999 21 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
<> 149:156823d33999 22 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
<> 149:156823d33999 23 * ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL,
<> 149:156823d33999 24 * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
<> 149:156823d33999 25 * @endinternal
<> 149:156823d33999 26 *
<> 149:156823d33999 27 * @ingroup clock
<> 149:156823d33999 28 */
<> 149:156823d33999 29
<> 149:156823d33999 30 #ifndef CLOCK_H_
<> 149:156823d33999 31 #define CLOCK_H_
<> 149:156823d33999 32
<> 149:156823d33999 33 /*************************************************************************************************
<> 149:156823d33999 34 * *
<> 149:156823d33999 35 * Header files *
<> 149:156823d33999 36 * *
<> 149:156823d33999 37 *************************************************************************************************/
<> 149:156823d33999 38
<> 149:156823d33999 39 #include "types.h"
<> 149:156823d33999 40
<> 149:156823d33999 41 /*************************************************************************************************
<> 149:156823d33999 42 * *
<> 149:156823d33999 43 * Symbolic Constants *
<> 149:156823d33999 44 * *
<> 149:156823d33999 45 *************************************************************************************************/
<> 149:156823d33999 46
<> 149:156823d33999 47 /** Peripherals clock disable defines /
<> 149:156823d33999 48 * @details
<> 149:156823d33999 49 */
<> 149:156823d33999 50 #define CLOCK_TIMER0 (0x0) /**< <b> Timer 0 clock enable offset </b>*/
<> 149:156823d33999 51 #define CLOCK_TIMER1 (0x1) /**< <b> Timer 1 clock enable offset </b>: */
<> 149:156823d33999 52 #define CLOCK_TIMER2 (0x2) /**< <b> Timer 2 clock enable offset </b>: */
<> 149:156823d33999 53 #define CLOCK_PAD0_0 (0x3) /**< <b> Unused offset </b> */
<> 149:156823d33999 54 #define CLOCK_PAD0_1 (0x4) /**< <b> Unused offset </b> */
<> 149:156823d33999 55 #define CLOCK_UART1 (0x5) /**< <b> UART 1 clock enable offset </b> */
<> 149:156823d33999 56 #define CLOCK_SPI (0x6) /**< <b> SPI clock enable offset </b> */
<> 149:156823d33999 57 #define CLOCK_I2C (0x7) /**< <b> I2C clock enable offset </b> */
<> 149:156823d33999 58 #define CLOCK_UART2 (0x8) /**< <b> UART 2 clock enable offset </b> */
<> 149:156823d33999 59 #define CLOCK_SPI2 (0x9) /**< <b> Unused offset </b>: */
<> 149:156823d33999 60 #define CLOCK_WDOG (0xA) /**< <b> Watchdog clock enable offset </b> */
<> 149:156823d33999 61 #define CLOCK_PWM (0xB) /**< <b> PWM clock enable offset </b> */
<> 149:156823d33999 62 #define CLOCK_GPIO (0xC) /**< <b> GPIO clock enable offset </b> */
<> 149:156823d33999 63 #define CLOCK_I2C2 (0xD) /**< <b> Unused offset </b> */
<> 149:156823d33999 64 #define CLOCK_PAD2_1 (0xE) /**< <b> Unused offset </b> */
<> 149:156823d33999 65 #define CLOCK_RTC (0xF) /**< <b> RTC clock enable offset </b> */
<> 149:156823d33999 66 #define CLOCK_CROSSB (0x10) /**< <b> Crossbar clock enable offset </b> */
<> 149:156823d33999 67 #define CLOCK_RAND (0x11) /**< <b> Randomizer clock enable offset </b> */
<> 149:156823d33999 68 #define CLOCK_PAD3_0 (0x12) /**< <b> Unused offset </b> */
<> 149:156823d33999 69 #define CLOCK_PAD3_1 (0x13) /**< <b> Unused offset </b> */
<> 149:156823d33999 70 #define CLOCK_MACHW (0x14) /**< <b> macHw clock enable offset </b> */
<> 149:156823d33999 71 #define CLOCK_ADC (0x15) /**< <b> ADC clock enable offset </b> */
<> 149:156823d33999 72 #define CLOCK_AES (0x16) /**< <b> AES clock enable offset </b> */
<> 149:156823d33999 73 #define CLOCK_FLASH (0x17) /**< <b> Flash controller clock enable offset</b> */
<> 149:156823d33999 74 #define CLOCK_PAD4_0 (0x18) /**< <b> Unused offset </b> */
<> 149:156823d33999 75 #define CLOCK_RFANA (0x19) /**< <b> rfAna clock enable offset </b> */
<> 149:156823d33999 76 #define CLOCK_IO (0x1A) /**< <b> IO clock enable offset </b> */
<> 149:156823d33999 77 #define CLOCK_PAD5_0 (0x1B) /**< <b> Unused offset </b> */
<> 149:156823d33999 78 #define CLOCK_PAD (0x1C) /**< <b> Pad clock enable offset </b> */
<> 149:156823d33999 79 #define CLOCK_PMU (0x1D) /**< <b> Pmu clock enable offset </b> */
<> 149:156823d33999 80 #define CLOCK_DMA (0x1E) /**< <b> DMA clock enable offset </b> */
<> 149:156823d33999 81 #define CLOCK_TEST (0x1F) /**< <b> Test controller clock enable offset </b> */
<> 149:156823d33999 82
<> 149:156823d33999 83 #define CLOCK_ENABLE(a) CLOCKREG->PDIS.WORD &= ~(1 << a)
<> 149:156823d33999 84 #define CLOCK_DISABLE(a) CLOCKREG->PDIS.WORD |= (uint32_t)(1 << a)
<> 150:02e0a0aed4ec 85 #define CLOCK_IS_ENABLED(a) (((CLOCKREG->PDIS.WORD >> a) & 1)?0:1)
<> 149:156823d33999 86
<> 149:156823d33999 87 /*************************************************************************************************
<> 149:156823d33999 88 * *
<> 149:156823d33999 89 * Functions *
<> 149:156823d33999 90 * *
<> 149:156823d33999 91 *************************************************************************************************/
<> 149:156823d33999 92
<> 149:156823d33999 93 /** Function to initialize clocks
<> 149:156823d33999 94 * @details
<> 149:156823d33999 95 * The function initializes clocks.
<> 149:156823d33999 96 * This initialization includes:
<> 149:156823d33999 97 * - Enable of external 32mHz oscillator
<> 149:156823d33999 98 * - Disable of all peripheral clocks (to be turned on selectively when used later in the application)
<> 149:156823d33999 99 * - Setting core frequency
<> 149:156823d33999 100 */
<> 149:156823d33999 101 void fClockInit(void);
<> 149:156823d33999 102
<> 149:156823d33999 103 /** Function to get peripheral clock frequency
<> 149:156823d33999 104 * @details
<> 149:156823d33999 105 * The function checks and returns peripheral clock frequency
<> 149:156823d33999 106 * @return Peripheral clock frequency
<> 149:156823d33999 107 */
<> 149:156823d33999 108 uint32_t fClockGetPeriphClockfrequency();
<> 149:156823d33999 109
<> 149:156823d33999 110 /** Function to get peripheral clock frequency
<> 149:156823d33999 111 * @details
<> 149:156823d33999 112 * The function checks which input clock is sourcing 32kHz clock domain.
<> 149:156823d33999 113 * This domain can be either sourced by:
<> 149:156823d33999 114 * - Internal 32kHz oscillator
<> 149:156823d33999 115 * - External 32.768kHz oscillator
<> 149:156823d33999 116 * @return 32kHz clock domain frequency
<> 149:156823d33999 117 */
<> 149:156823d33999 118 uint16_t fClockGet32kClockfrequency();
<> 149:156823d33999 119
<> 149:156823d33999 120 /** Function to enable peripheral clock
<> 149:156823d33999 121 * @details
<> 149:156823d33999 122 * The function enables clock of peripheral indicated by parameter
<> 149:156823d33999 123 * @param deviceId Peripheral ID whose clock must be enabled.
<> 149:156823d33999 124 */
<> 149:156823d33999 125 void fClockEnablePeriph(uint8_t deviceId);
<> 149:156823d33999 126
<> 149:156823d33999 127 /** Function to disable peripheral clock
<> 149:156823d33999 128 * @details
<> 149:156823d33999 129 * The function disables clock of peripheral indicated by parameter
<> 149:156823d33999 130 * @param deviceId ID Peripheral whose clock must be disabled.
<> 149:156823d33999 131 */
<> 149:156823d33999 132 void fClockDisablePeriph(uint8_t deviceId);
<> 149:156823d33999 133
<> 149:156823d33999 134 #endif /* CLOCK_H_ */