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targets/TARGET_ARM_SSG/TARGET_MPS2/PeripheralNames.h@149:156823d33999, 2016-10-28 (annotated)

Committer:
<>
Date:
Fri Oct 28 11:17:30 2016 +0100
Revision:
149:156823d33999
Parent:
targets/hal/TARGET_ARM_SSG/TARGET_MPS2/PeripheralNames.h@144:ef7eb2e8f9f7 
This updates the lib to the mbed lib v128



NOTE: This release includes a restructuring of the file and directory locations and thus some

include paths in your code may need updating accordingly.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /* mbed Microcontroller Library
<> 144:ef7eb2e8f9f7 2 * Copyright (c) 2006-2015 ARM Limited
<> 144:ef7eb2e8f9f7 3 *
<> 144:ef7eb2e8f9f7 4 * Licensed under the Apache License, Version 2.0 (the "License");
<> 144:ef7eb2e8f9f7 5 * you may not use this file except in compliance with the License.
<> 144:ef7eb2e8f9f7 6 * You may obtain a copy of the License at
<> 144:ef7eb2e8f9f7 7 *
<> 144:ef7eb2e8f9f7 8 * http://www.apache.org/licenses/LICENSE-2.0
<> 144:ef7eb2e8f9f7 9 *
<> 144:ef7eb2e8f9f7 10 * Unless required by applicable law or agreed to in writing, software
<> 144:ef7eb2e8f9f7 11 * distributed under the License is distributed on an "AS IS" BASIS,
<> 144:ef7eb2e8f9f7 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
<> 144:ef7eb2e8f9f7 13 * See the License for the specific language governing permissions and
<> 144:ef7eb2e8f9f7 14 * limitations under the License.
<> 144:ef7eb2e8f9f7 15 */
<> 144:ef7eb2e8f9f7 16 #ifndef MBED_PERIPHERALNAMES_H
<> 144:ef7eb2e8f9f7 17 #define MBED_PERIPHERALNAMES_H
<> 144:ef7eb2e8f9f7 18
<> 144:ef7eb2e8f9f7 19 #include "cmsis.h"
<> 144:ef7eb2e8f9f7 20
<> 144:ef7eb2e8f9f7 21 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 22 extern "C" {
<> 144:ef7eb2e8f9f7 23 #endif
<> 144:ef7eb2e8f9f7 24
<> 144:ef7eb2e8f9f7 25 typedef enum {
<> 144:ef7eb2e8f9f7 26 UART_0 = (int)CMSDK_UART0_BASE,
<> 144:ef7eb2e8f9f7 27 UART_1 = (int)CMSDK_UART1_BASE,
<> 144:ef7eb2e8f9f7 28 UART_2 = (int)CMSDK_UART3_BASE,
<> 144:ef7eb2e8f9f7 29 UART_3 = (int)CMSDK_UART4_BASE
<> 144:ef7eb2e8f9f7 30 } UARTName;
<> 144:ef7eb2e8f9f7 31
<> 144:ef7eb2e8f9f7 32 typedef enum {
<> 144:ef7eb2e8f9f7 33 I2C_0 = (int)MPS2_TSC_I2C_BASE,
<> 144:ef7eb2e8f9f7 34 I2C_1 = (int)MPS2_AAIC_I2C_BASE,
<> 144:ef7eb2e8f9f7 35 I2C_2 = (int)MPS2_SHIELD0_I2C_BASE,
<> 144:ef7eb2e8f9f7 36 I2C_3 = (int)MPS2_SHIELD1_I2C_BASE
<> 144:ef7eb2e8f9f7 37
<> 144:ef7eb2e8f9f7 38 } I2CName;
<> 144:ef7eb2e8f9f7 39
<> 144:ef7eb2e8f9f7 40 typedef enum {
<> 144:ef7eb2e8f9f7 41 ADC0_0 = 0,
<> 144:ef7eb2e8f9f7 42 ADC0_1,
<> 144:ef7eb2e8f9f7 43 ADC0_2,
<> 144:ef7eb2e8f9f7 44 ADC0_3,
<> 144:ef7eb2e8f9f7 45 ADC0_4,
<> 144:ef7eb2e8f9f7 46 ADC0_5,
<> 144:ef7eb2e8f9f7 47 ADC0_6,
<> 144:ef7eb2e8f9f7 48 ADC0_7,
<> 144:ef7eb2e8f9f7 49 ADC0_8,
<> 144:ef7eb2e8f9f7 50 ADC0_9,
<> 144:ef7eb2e8f9f7 51 ADC0_10,
<> 144:ef7eb2e8f9f7 52 ADC0_11
<> 144:ef7eb2e8f9f7 53 } ADCName;
<> 144:ef7eb2e8f9f7 54
<> 144:ef7eb2e8f9f7 55 typedef enum {
<> 144:ef7eb2e8f9f7 56 SPI_0 = (int)MPS2_SSP1_BASE,
<> 144:ef7eb2e8f9f7 57 SPI_1 = (int)MPS2_SSP0_BASE,
<> 144:ef7eb2e8f9f7 58 SPI_2 = (int)MPS2_SSP2_BASE,
<> 144:ef7eb2e8f9f7 59 SPI_3 = (int)MPS2_SSP3_BASE,
<> 144:ef7eb2e8f9f7 60 SPI_4 = (int)MPS2_SSP4_BASE
<> 144:ef7eb2e8f9f7 61 } SPIName;
<> 144:ef7eb2e8f9f7 62
<> 144:ef7eb2e8f9f7 63 typedef enum {
<> 144:ef7eb2e8f9f7 64 PWM_1 = 0,
<> 144:ef7eb2e8f9f7 65 PWM_2,
<> 144:ef7eb2e8f9f7 66 PWM_3,
<> 144:ef7eb2e8f9f7 67 PWM_4,
<> 144:ef7eb2e8f9f7 68 PWM_5,
<> 144:ef7eb2e8f9f7 69 PWM_6,
<> 144:ef7eb2e8f9f7 70 PWM_7,
<> 144:ef7eb2e8f9f7 71 PWM_8,
<> 144:ef7eb2e8f9f7 72 PWM_9,
<> 144:ef7eb2e8f9f7 73 PWM_10,
<> 144:ef7eb2e8f9f7 74 PWM_11
<> 144:ef7eb2e8f9f7 75 } PWMName;
<> 144:ef7eb2e8f9f7 76
<> 144:ef7eb2e8f9f7 77 #define STDIO_UART_TX USBTX
<> 144:ef7eb2e8f9f7 78 #define STDIO_UART_RX USBRX
<> 144:ef7eb2e8f9f7 79 #define STDIO_UART UART_0
<> 144:ef7eb2e8f9f7 80
<> 144:ef7eb2e8f9f7 81 #define MBED_UART0 USBTX, USBRX
<> 144:ef7eb2e8f9f7 82 #define MBED_UART1 XB_TX, XB_RX
<> 144:ef7eb2e8f9f7 83 #define MBED_UART2 SH0_TX, SH0_RX
<> 144:ef7eb2e8f9f7 84 #define MBED_UART3 SH1_TX, SH1_RX
<> 144:ef7eb2e8f9f7 85 #define MBED_UARTUSB USBTX, USBRX
<> 144:ef7eb2e8f9f7 86
<> 144:ef7eb2e8f9f7 87 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 88 }
<> 144:ef7eb2e8f9f7 89 #endif
<> 144:ef7eb2e8f9f7 90
<> 144:ef7eb2e8f9f7 91 #endif