Darrel Weng / MMA8451Q

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Fork of MMA8451Q by Antonio Quevedo

MMA8451Q.cpp@0:7c9ab58f6af3, 2014-06-04 (annotated)

Committer:
quevedo
Date:
Wed Jun 04 19:16:47 2014 +0000
Revision:
0:7c9ab58f6af3
Child:
1:9c229882cd2b
My version of MMA8451 library

Who changed what in which revision?

UserRevisionLine numberNew contents of line
quevedo 0:7c9ab58f6af3 1 /* Copyright (c) 2010-2011 mbed.org, MIT License
quevedo 0:7c9ab58f6af3 2 * Copyright (c) 2014 Antonio Quevedo, UNICAMP
quevedo 0:7c9ab58f6af3 3 *
quevedo 0:7c9ab58f6af3 4 * Permission is hereby granted, free of charge, to any person obtaining a copy of this software
quevedo 0:7c9ab58f6af3 5 * and associated documentation files (the "Software"), to deal in the Software without
quevedo 0:7c9ab58f6af3 6 * restriction, including without limitation the rights to use, copy, modify, merge, publish,
quevedo 0:7c9ab58f6af3 7 * distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the
quevedo 0:7c9ab58f6af3 8 * Software is furnished to do so, subject to the following conditions:
quevedo 0:7c9ab58f6af3 9 *
quevedo 0:7c9ab58f6af3 10 * The above copyright notice and this permission notice shall be included in all copies or
quevedo 0:7c9ab58f6af3 11 * substantial portions of the Software.
quevedo 0:7c9ab58f6af3 12 *
quevedo 0:7c9ab58f6af3 13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
quevedo 0:7c9ab58f6af3 14 * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
quevedo 0:7c9ab58f6af3 15 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
quevedo 0:7c9ab58f6af3 16 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
quevedo 0:7c9ab58f6af3 17 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
quevedo 0:7c9ab58f6af3 18 */
quevedo 0:7c9ab58f6af3 19
quevedo 0:7c9ab58f6af3 20 #include "MMA8451Q.h"
quevedo 0:7c9ab58f6af3 21
quevedo 0:7c9ab58f6af3 22 #define ACCEL_I2C_ADDRESS 0x1D<<1
quevedo 0:7c9ab58f6af3 23 #define REG_STATUS 0x00
quevedo 0:7c9ab58f6af3 24 #define REG_XYZ_DATA_CFG 0x0E
quevedo 0:7c9ab58f6af3 25 #define REG_WHO_AM_I 0x0D
quevedo 0:7c9ab58f6af3 26 #define REG_CTRL_REG1 0x2A
quevedo 0:7c9ab58f6af3 27 #define REG_CTRL_REG2 0x2B
quevedo 0:7c9ab58f6af3 28 #define REG_CTRL_REG3 0x2C
quevedo 0:7c9ab58f6af3 29 #define REG_CTRL_REG4 0x2D
quevedo 0:7c9ab58f6af3 30 #define REG_CTRL_REG5 0x2E
quevedo 0:7c9ab58f6af3 31 #define REG_OUT_X_MSB 0x01
quevedo 0:7c9ab58f6af3 32 #define REG_OUT_Y_MSB 0x03
quevedo 0:7c9ab58f6af3 33 #define REG_OUT_Z_MSB 0x05
quevedo 0:7c9ab58f6af3 34
quevedo 0:7c9ab58f6af3 35 MMA8451Q::MMA8451Q(PinName sda, PinName scl) : m_i2c(sda, scl) {
quevedo 0:7c9ab58f6af3 36 uint8_t data[2] = {REG_CTRL_REG1, 0x00}; // Puts acc in standby for configuring
quevedo 0:7c9ab58f6af3 37 writeRegs(data, 2);
quevedo 0:7c9ab58f6af3 38 data[0] = REG_XYZ_DATA_CFG; // Writing 00 turns off high-pass filter and sets full scale range to 2g
quevedo 0:7c9ab58f6af3 39 // data[1] = 0x01; for 4g
quevedo 0:7c9ab58f6af3 40 // data[1] = 0x02; for 8g
quevedo 0:7c9ab58f6af3 41 writeRegs(data, 2);
quevedo 0:7c9ab58f6af3 42 data[0] = REG_CTRL_REG2;
quevedo 0:7c9ab58f6af3 43 data[1] = 0x00; // Disable self-test, software reset and auto-sleep; operates in normal mode
quevedo 0:7c9ab58f6af3 44 writeRegs(data, 2);
quevedo 0:7c9ab58f6af3 45 data[0] = REG_CTRL_REG3; // Interrupt polarity low, push-pull output
quevedo 0:7c9ab58f6af3 46 writeRegs(data, 2);
quevedo 0:7c9ab58f6af3 47 data[0] = REG_CTRL_REG4;
quevedo 0:7c9ab58f6af3 48 data[1] = 0x01; // Enables interrupt for data Ready
quevedo 0:7c9ab58f6af3 49 writeRegs(data, 2);
quevedo 0:7c9ab58f6af3 50 data[0] = REG_CTRL_REG5;
quevedo 0:7c9ab58f6af3 51 writeRegs(data, 2); // Routes Data Ready interrupt to INT1
quevedo 0:7c9ab58f6af3 52 data[0] = REG_CTRL_REG1;
quevedo 0:7c9ab58f6af3 53 data[1] = 0x09; // Data rate is 800Hz
quevedo 0:7c9ab58f6af3 54 writeRegs(data, 2);
quevedo 0:7c9ab58f6af3 55 }
quevedo 0:7c9ab58f6af3 56
quevedo 0:7c9ab58f6af3 57 MMA8451Q::~MMA8451Q() { }
quevedo 0:7c9ab58f6af3 58
quevedo 0:7c9ab58f6af3 59 void MMA8451Q::getAccAllAxis(int16_t * res) {
quevedo 0:7c9ab58f6af3 60 uint8_t temp[6];
quevedo 0:7c9ab58f6af3 61 readRegs(REG_OUT_X_MSB, temp, 6);
quevedo 0:7c9ab58f6af3 62 res[0] = (temp[0] * 256) + temp[1];
quevedo 0:7c9ab58f6af3 63 res[1] = (temp[2] * 256) + temp[3];
quevedo 0:7c9ab58f6af3 64 res[2] = (temp[4] * 256) + temp[5];
quevedo 0:7c9ab58f6af3 65 }
quevedo 0:7c9ab58f6af3 66
quevedo 0:7c9ab58f6af3 67 void MMA8451Q::readRegs(int addr, uint8_t * data, int len) {
quevedo 0:7c9ab58f6af3 68 char t[1] = {addr};
quevedo 0:7c9ab58f6af3 69 m_i2c.write(ACCEL_I2C_ADDRESS, t, 1, true);
quevedo 0:7c9ab58f6af3 70 m_i2c.read(ACCEL_I2C_ADDRESS, (char *)data, len);
quevedo 0:7c9ab58f6af3 71 }
quevedo 0:7c9ab58f6af3 72
quevedo 0:7c9ab58f6af3 73 void MMA8451Q::writeRegs(uint8_t * data, int len) {
quevedo 0:7c9ab58f6af3 74 m_i2c.write(ACCEL_I2C_ADDRESS, (char *)data, len);
quevedo 0:7c9ab58f6af3 75 }