Claes Ekengren / Mbed 2 deprecated Measurement_system

Dependencies:   mbed

Committer:
CE
Date:
Thu Jan 06 19:01:44 2011 +0000
Revision:
0:0732b16d9a92
R1A

Who changed what in which revision?

UserRevisionLine numberNew contents of line
CE 0:0732b16d9a92 1 /*
CE 0:0732b16d9a92 2 **************************************************************************************************************
CE 0:0732b16d9a92 3 * NXP USB Host Stack
CE 0:0732b16d9a92 4 *
CE 0:0732b16d9a92 5 * (c) Copyright 2008, NXP SemiConductors
CE 0:0732b16d9a92 6 * (c) Copyright 2008, OnChip Technologies LLC
CE 0:0732b16d9a92 7 * All Rights Reserved
CE 0:0732b16d9a92 8 *
CE 0:0732b16d9a92 9 * www.nxp.com
CE 0:0732b16d9a92 10 * www.onchiptech.com
CE 0:0732b16d9a92 11 *
CE 0:0732b16d9a92 12 * File : usbhost_lpc17xx.c
CE 0:0732b16d9a92 13 * Programmer(s) : Ravikanth.P
CE 0:0732b16d9a92 14 * Version :
CE 0:0732b16d9a92 15 *
CE 0:0732b16d9a92 16 **************************************************************************************************************
CE 0:0732b16d9a92 17 */
CE 0:0732b16d9a92 18
CE 0:0732b16d9a92 19 /*
CE 0:0732b16d9a92 20 **************************************************************************************************************
CE 0:0732b16d9a92 21 * INCLUDE HEADER FILES
CE 0:0732b16d9a92 22 **************************************************************************************************************
CE 0:0732b16d9a92 23 */
CE 0:0732b16d9a92 24
CE 0:0732b16d9a92 25 #include "usbhost_lpc17xx.h"
CE 0:0732b16d9a92 26
CE 0:0732b16d9a92 27 /*
CE 0:0732b16d9a92 28 **************************************************************************************************************
CE 0:0732b16d9a92 29 * GLOBAL VARIABLES
CE 0:0732b16d9a92 30 **************************************************************************************************************
CE 0:0732b16d9a92 31 */
CE 0:0732b16d9a92 32 int gUSBConnected;
CE 0:0732b16d9a92 33
CE 0:0732b16d9a92 34 volatile USB_INT32U HOST_RhscIntr = 0; /* Root Hub Status Change interrupt */
CE 0:0732b16d9a92 35 volatile USB_INT32U HOST_WdhIntr = 0; /* Semaphore to wait until the TD is submitted */
CE 0:0732b16d9a92 36 volatile USB_INT08U HOST_TDControlStatus = 0;
CE 0:0732b16d9a92 37 volatile HCED *EDCtrl; /* Control endpoint descriptor structure */
CE 0:0732b16d9a92 38 volatile HCED *EDBulkIn; /* BulkIn endpoint descriptor structure */
CE 0:0732b16d9a92 39 volatile HCED *EDBulkOut; /* BulkOut endpoint descriptor structure */
CE 0:0732b16d9a92 40 volatile HCTD *TDHead; /* Head transfer descriptor structure */
CE 0:0732b16d9a92 41 volatile HCTD *TDTail; /* Tail transfer descriptor structure */
CE 0:0732b16d9a92 42 volatile HCCA *Hcca; /* Host Controller Communications Area structure */
CE 0:0732b16d9a92 43 USB_INT16U *TDBufNonVol; /* Identical to TDBuffer just to reduce compiler warnings */
CE 0:0732b16d9a92 44 volatile USB_INT08U *TDBuffer; /* Current Buffer Pointer of transfer descriptor */
CE 0:0732b16d9a92 45
CE 0:0732b16d9a92 46 // USB host structures
CE 0:0732b16d9a92 47 // AHB SRAM block 1
CE 0:0732b16d9a92 48 #define HOSTBASEADDR 0x2007C000
CE 0:0732b16d9a92 49 // reserve memory for the linker
CE 0:0732b16d9a92 50 static USB_INT08U HostBuf[0x200] __attribute__((at(HOSTBASEADDR)));
CE 0:0732b16d9a92 51 /*
CE 0:0732b16d9a92 52 **************************************************************************************************************
CE 0:0732b16d9a92 53 * DELAY IN MILLI SECONDS
CE 0:0732b16d9a92 54 *
CE 0:0732b16d9a92 55 * Description: This function provides a delay in milli seconds
CE 0:0732b16d9a92 56 *
CE 0:0732b16d9a92 57 * Arguments : delay The delay required
CE 0:0732b16d9a92 58 *
CE 0:0732b16d9a92 59 * Returns : None
CE 0:0732b16d9a92 60 *
CE 0:0732b16d9a92 61 **************************************************************************************************************
CE 0:0732b16d9a92 62 */
CE 0:0732b16d9a92 63
CE 0:0732b16d9a92 64 void Host_DelayMS (USB_INT32U delay)
CE 0:0732b16d9a92 65 {
CE 0:0732b16d9a92 66 volatile USB_INT32U i;
CE 0:0732b16d9a92 67
CE 0:0732b16d9a92 68
CE 0:0732b16d9a92 69 for (i = 0; i < delay; i++) {
CE 0:0732b16d9a92 70 Host_DelayUS(1000);
CE 0:0732b16d9a92 71 }
CE 0:0732b16d9a92 72 }
CE 0:0732b16d9a92 73
CE 0:0732b16d9a92 74 /*
CE 0:0732b16d9a92 75 **************************************************************************************************************
CE 0:0732b16d9a92 76 * DELAY IN MICRO SECONDS
CE 0:0732b16d9a92 77 *
CE 0:0732b16d9a92 78 * Description: This function provides a delay in micro seconds
CE 0:0732b16d9a92 79 *
CE 0:0732b16d9a92 80 * Arguments : delay The delay required
CE 0:0732b16d9a92 81 *
CE 0:0732b16d9a92 82 * Returns : None
CE 0:0732b16d9a92 83 *
CE 0:0732b16d9a92 84 **************************************************************************************************************
CE 0:0732b16d9a92 85 */
CE 0:0732b16d9a92 86
CE 0:0732b16d9a92 87 void Host_DelayUS (USB_INT32U delay)
CE 0:0732b16d9a92 88 {
CE 0:0732b16d9a92 89 volatile USB_INT32U i;
CE 0:0732b16d9a92 90
CE 0:0732b16d9a92 91
CE 0:0732b16d9a92 92 for (i = 0; i < (4 * delay); i++) { /* This logic was tested. It gives app. 1 micro sec delay */
CE 0:0732b16d9a92 93 ;
CE 0:0732b16d9a92 94 }
CE 0:0732b16d9a92 95 }
CE 0:0732b16d9a92 96
CE 0:0732b16d9a92 97 // bits of the USB/OTG clock control register
CE 0:0732b16d9a92 98 #define HOST_CLK_EN (1<<0)
CE 0:0732b16d9a92 99 #define DEV_CLK_EN (1<<1)
CE 0:0732b16d9a92 100 #define PORTSEL_CLK_EN (1<<3)
CE 0:0732b16d9a92 101 #define AHB_CLK_EN (1<<4)
CE 0:0732b16d9a92 102
CE 0:0732b16d9a92 103 // bits of the USB/OTG clock status register
CE 0:0732b16d9a92 104 #define HOST_CLK_ON (1<<0)
CE 0:0732b16d9a92 105 #define DEV_CLK_ON (1<<1)
CE 0:0732b16d9a92 106 #define PORTSEL_CLK_ON (1<<3)
CE 0:0732b16d9a92 107 #define AHB_CLK_ON (1<<4)
CE 0:0732b16d9a92 108
CE 0:0732b16d9a92 109 // we need host clock, OTG/portsel clock and AHB clock
CE 0:0732b16d9a92 110 #define CLOCK_MASK (HOST_CLK_EN | PORTSEL_CLK_EN | AHB_CLK_EN)
CE 0:0732b16d9a92 111
CE 0:0732b16d9a92 112 /*
CE 0:0732b16d9a92 113 **************************************************************************************************************
CE 0:0732b16d9a92 114 * INITIALIZE THE HOST CONTROLLER
CE 0:0732b16d9a92 115 *
CE 0:0732b16d9a92 116 * Description: This function initializes lpc17xx host controller
CE 0:0732b16d9a92 117 *
CE 0:0732b16d9a92 118 * Arguments : None
CE 0:0732b16d9a92 119 *
CE 0:0732b16d9a92 120 * Returns :
CE 0:0732b16d9a92 121 *
CE 0:0732b16d9a92 122 **************************************************************************************************************
CE 0:0732b16d9a92 123 */
CE 0:0732b16d9a92 124 void Host_Init (void)
CE 0:0732b16d9a92 125 {
CE 0:0732b16d9a92 126 PRINT_Log("In Host_Init\n");
CE 0:0732b16d9a92 127 NVIC_DisableIRQ(USB_IRQn); /* Disable the USB interrupt source */
CE 0:0732b16d9a92 128
CE 0:0732b16d9a92 129 // turn on power for USB
CE 0:0732b16d9a92 130 LPC_SC->PCONP |= (1UL<<31);
CE 0:0732b16d9a92 131 // Enable USB host clock, port selection and AHB clock
CE 0:0732b16d9a92 132 LPC_USB->USBClkCtrl |= CLOCK_MASK;
CE 0:0732b16d9a92 133 // Wait for clocks to become available
CE 0:0732b16d9a92 134 while ((LPC_USB->USBClkSt & CLOCK_MASK) != CLOCK_MASK)
CE 0:0732b16d9a92 135 ;
CE 0:0732b16d9a92 136
CE 0:0732b16d9a92 137 // it seems the bits[0:1] mean the following
CE 0:0732b16d9a92 138 // 0: U1=device, U2=host
CE 0:0732b16d9a92 139 // 1: U1=host, U2=host
CE 0:0732b16d9a92 140 // 2: reserved
CE 0:0732b16d9a92 141 // 3: U1=host, U2=device
CE 0:0732b16d9a92 142 // NB: this register is only available if OTG clock (aka "port select") is enabled!!
CE 0:0732b16d9a92 143 // since we don't care about port 2, set just bit 0 to 1 (U1=host)
CE 0:0732b16d9a92 144 LPC_USB->OTGStCtrl |= 1;
CE 0:0732b16d9a92 145
CE 0:0732b16d9a92 146 // now that we've configured the ports, we can turn off the portsel clock
CE 0:0732b16d9a92 147 LPC_USB->USBClkCtrl &= ~PORTSEL_CLK_EN;
CE 0:0732b16d9a92 148
CE 0:0732b16d9a92 149 // power pins are not connected on mbed, so we can skip them
CE 0:0732b16d9a92 150 /* P1[18] = USB_UP_LED, 01 */
CE 0:0732b16d9a92 151 /* P1[19] = /USB_PPWR, 10 */
CE 0:0732b16d9a92 152 /* P1[22] = USB_PWRD, 10 */
CE 0:0732b16d9a92 153 /* P1[27] = /USB_OVRCR, 10 */
CE 0:0732b16d9a92 154 /*LPC_PINCON->PINSEL3 &= ~((3<<4) | (3<<6) | (3<<12) | (3<<22));
CE 0:0732b16d9a92 155 LPC_PINCON->PINSEL3 |= ((1<<4)|(2<<6) | (2<<12) | (2<<22)); // 0x00802080
CE 0:0732b16d9a92 156 */
CE 0:0732b16d9a92 157
CE 0:0732b16d9a92 158 // configure USB D+/D- pins
CE 0:0732b16d9a92 159 /* P0[29] = USB_D+, 01 */
CE 0:0732b16d9a92 160 /* P0[30] = USB_D-, 01 */
CE 0:0732b16d9a92 161 LPC_PINCON->PINSEL1 &= ~((3<<26) | (3<<28));
CE 0:0732b16d9a92 162 LPC_PINCON->PINSEL1 |= ((1<<26)|(1<<28)); // 0x14000000
CE 0:0732b16d9a92 163
CE 0:0732b16d9a92 164 PRINT_Log("Initializing Host Stack\n");
CE 0:0732b16d9a92 165
CE 0:0732b16d9a92 166 Hcca = (volatile HCCA *)(HostBuf+0x000);
CE 0:0732b16d9a92 167 TDHead = (volatile HCTD *)(HostBuf+0x100);
CE 0:0732b16d9a92 168 TDTail = (volatile HCTD *)(HostBuf+0x110);
CE 0:0732b16d9a92 169 EDCtrl = (volatile HCED *)(HostBuf+0x120);
CE 0:0732b16d9a92 170 EDBulkIn = (volatile HCED *)(HostBuf+0x130);
CE 0:0732b16d9a92 171 EDBulkOut = (volatile HCED *)(HostBuf+0x140);
CE 0:0732b16d9a92 172 TDBuffer = (volatile USB_INT08U *)(HostBuf+0x150);
CE 0:0732b16d9a92 173
CE 0:0732b16d9a92 174 /* Initialize all the TDs, EDs and HCCA to 0 */
CE 0:0732b16d9a92 175 Host_EDInit(EDCtrl);
CE 0:0732b16d9a92 176 Host_EDInit(EDBulkIn);
CE 0:0732b16d9a92 177 Host_EDInit(EDBulkOut);
CE 0:0732b16d9a92 178 Host_TDInit(TDHead);
CE 0:0732b16d9a92 179 Host_TDInit(TDTail);
CE 0:0732b16d9a92 180 Host_HCCAInit(Hcca);
CE 0:0732b16d9a92 181
CE 0:0732b16d9a92 182 Host_DelayMS(50); /* Wait 50 ms before apply reset */
CE 0:0732b16d9a92 183 LPC_USB->HcControl = 0; /* HARDWARE RESET */
CE 0:0732b16d9a92 184 LPC_USB->HcControlHeadED = 0; /* Initialize Control list head to Zero */
CE 0:0732b16d9a92 185 LPC_USB->HcBulkHeadED = 0; /* Initialize Bulk list head to Zero */
CE 0:0732b16d9a92 186
CE 0:0732b16d9a92 187 /* SOFTWARE RESET */
CE 0:0732b16d9a92 188 LPC_USB->HcCommandStatus = OR_CMD_STATUS_HCR;
CE 0:0732b16d9a92 189 LPC_USB->HcFmInterval = DEFAULT_FMINTERVAL; /* Write Fm Interval and Largest Data Packet Counter */
CE 0:0732b16d9a92 190
CE 0:0732b16d9a92 191 /* Put HC in operational state */
CE 0:0732b16d9a92 192 LPC_USB->HcControl = (LPC_USB->HcControl & (~OR_CONTROL_HCFS)) | OR_CONTROL_HC_OPER;
CE 0:0732b16d9a92 193 LPC_USB->HcRhStatus = OR_RH_STATUS_LPSC; /* Set Global Power */
CE 0:0732b16d9a92 194
CE 0:0732b16d9a92 195 LPC_USB->HcHCCA = (USB_INT32U)Hcca;
CE 0:0732b16d9a92 196 LPC_USB->HcInterruptStatus |= LPC_USB->HcInterruptStatus; /* Clear Interrrupt Status */
CE 0:0732b16d9a92 197
CE 0:0732b16d9a92 198
CE 0:0732b16d9a92 199 LPC_USB->HcInterruptEnable = OR_INTR_ENABLE_MIE |
CE 0:0732b16d9a92 200 OR_INTR_ENABLE_WDH |
CE 0:0732b16d9a92 201 OR_INTR_ENABLE_RHSC;
CE 0:0732b16d9a92 202
CE 0:0732b16d9a92 203 NVIC_SetPriority(USB_IRQn, 0); /* highest priority */
CE 0:0732b16d9a92 204 /* Enable the USB Interrupt */
CE 0:0732b16d9a92 205 NVIC_EnableIRQ(USB_IRQn);
CE 0:0732b16d9a92 206 PRINT_Log("Host Initialized\n");
CE 0:0732b16d9a92 207 }
CE 0:0732b16d9a92 208
CE 0:0732b16d9a92 209 /*
CE 0:0732b16d9a92 210 **************************************************************************************************************
CE 0:0732b16d9a92 211 * INTERRUPT SERVICE ROUTINE
CE 0:0732b16d9a92 212 *
CE 0:0732b16d9a92 213 * Description: This function services the interrupt caused by host controller
CE 0:0732b16d9a92 214 *
CE 0:0732b16d9a92 215 * Arguments : None
CE 0:0732b16d9a92 216 *
CE 0:0732b16d9a92 217 * Returns : None
CE 0:0732b16d9a92 218 *
CE 0:0732b16d9a92 219 **************************************************************************************************************
CE 0:0732b16d9a92 220 */
CE 0:0732b16d9a92 221
CE 0:0732b16d9a92 222 void USB_IRQHandler (void) __irq
CE 0:0732b16d9a92 223 {
CE 0:0732b16d9a92 224 USB_INT32U int_status;
CE 0:0732b16d9a92 225 USB_INT32U ie_status;
CE 0:0732b16d9a92 226
CE 0:0732b16d9a92 227 int_status = LPC_USB->HcInterruptStatus; /* Read Interrupt Status */
CE 0:0732b16d9a92 228 ie_status = LPC_USB->HcInterruptEnable; /* Read Interrupt enable status */
CE 0:0732b16d9a92 229
CE 0:0732b16d9a92 230 if (!(int_status & ie_status)) {
CE 0:0732b16d9a92 231 return;
CE 0:0732b16d9a92 232 } else {
CE 0:0732b16d9a92 233
CE 0:0732b16d9a92 234 int_status = int_status & ie_status;
CE 0:0732b16d9a92 235 if (int_status & OR_INTR_STATUS_RHSC) { /* Root hub status change interrupt */
CE 0:0732b16d9a92 236 if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_CSC) {
CE 0:0732b16d9a92 237 if (LPC_USB->HcRhStatus & OR_RH_STATUS_DRWE) {
CE 0:0732b16d9a92 238 /*
CE 0:0732b16d9a92 239 * When DRWE is on, Connect Status Change
CE 0:0732b16d9a92 240 * means a remote wakeup event.
CE 0:0732b16d9a92 241 */
CE 0:0732b16d9a92 242 HOST_RhscIntr = 1;// JUST SOMETHING FOR A BREAKPOINT
CE 0:0732b16d9a92 243 }
CE 0:0732b16d9a92 244 else {
CE 0:0732b16d9a92 245 /*
CE 0:0732b16d9a92 246 * When DRWE is off, Connect Status Change
CE 0:0732b16d9a92 247 * is NOT a remote wakeup event
CE 0:0732b16d9a92 248 */
CE 0:0732b16d9a92 249 if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_CCS) {
CE 0:0732b16d9a92 250 if (!gUSBConnected) {
CE 0:0732b16d9a92 251 HOST_TDControlStatus = 0;
CE 0:0732b16d9a92 252 HOST_WdhIntr = 0;
CE 0:0732b16d9a92 253 HOST_RhscIntr = 1;
CE 0:0732b16d9a92 254 gUSBConnected = 1;
CE 0:0732b16d9a92 255 }
CE 0:0732b16d9a92 256 else
CE 0:0732b16d9a92 257 PRINT_Log("Spurious status change (connected)?\n");
CE 0:0732b16d9a92 258 } else {
CE 0:0732b16d9a92 259 if (gUSBConnected) {
CE 0:0732b16d9a92 260 LPC_USB->HcInterruptEnable = 0; // why do we get multiple disc. rupts???
CE 0:0732b16d9a92 261 HOST_RhscIntr = 0;
CE 0:0732b16d9a92 262 gUSBConnected = 0;
CE 0:0732b16d9a92 263 }
CE 0:0732b16d9a92 264 else
CE 0:0732b16d9a92 265 PRINT_Log("Spurious status change (disconnected)?\n");
CE 0:0732b16d9a92 266 }
CE 0:0732b16d9a92 267 }
CE 0:0732b16d9a92 268 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_CSC;
CE 0:0732b16d9a92 269 }
CE 0:0732b16d9a92 270 if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_PRSC) {
CE 0:0732b16d9a92 271 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRSC;
CE 0:0732b16d9a92 272 }
CE 0:0732b16d9a92 273 }
CE 0:0732b16d9a92 274 if (int_status & OR_INTR_STATUS_WDH) { /* Writeback Done Head interrupt */
CE 0:0732b16d9a92 275 HOST_WdhIntr = 1;
CE 0:0732b16d9a92 276 HOST_TDControlStatus = (TDHead->Control >> 28) & 0xf;
CE 0:0732b16d9a92 277 }
CE 0:0732b16d9a92 278 LPC_USB->HcInterruptStatus = int_status; /* Clear interrupt status register */
CE 0:0732b16d9a92 279 }
CE 0:0732b16d9a92 280 return;
CE 0:0732b16d9a92 281 }
CE 0:0732b16d9a92 282
CE 0:0732b16d9a92 283 /*
CE 0:0732b16d9a92 284 **************************************************************************************************************
CE 0:0732b16d9a92 285 * PROCESS TRANSFER DESCRIPTOR
CE 0:0732b16d9a92 286 *
CE 0:0732b16d9a92 287 * Description: This function processes the transfer descriptor
CE 0:0732b16d9a92 288 *
CE 0:0732b16d9a92 289 * Arguments : ed Endpoint descriptor that contains this transfer descriptor
CE 0:0732b16d9a92 290 * token SETUP, IN, OUT
CE 0:0732b16d9a92 291 * buffer Current Buffer Pointer of the transfer descriptor
CE 0:0732b16d9a92 292 * buffer_len Length of the buffer
CE 0:0732b16d9a92 293 *
CE 0:0732b16d9a92 294 * Returns : OK if TD submission is successful
CE 0:0732b16d9a92 295 * ERROR if TD submission fails
CE 0:0732b16d9a92 296 *
CE 0:0732b16d9a92 297 **************************************************************************************************************
CE 0:0732b16d9a92 298 */
CE 0:0732b16d9a92 299
CE 0:0732b16d9a92 300 USB_INT32S Host_ProcessTD (volatile HCED *ed,
CE 0:0732b16d9a92 301 volatile USB_INT32U token,
CE 0:0732b16d9a92 302 volatile USB_INT08U *buffer,
CE 0:0732b16d9a92 303 USB_INT32U buffer_len)
CE 0:0732b16d9a92 304 {
CE 0:0732b16d9a92 305 volatile USB_INT32U td_toggle;
CE 0:0732b16d9a92 306
CE 0:0732b16d9a92 307
CE 0:0732b16d9a92 308 if (ed == EDCtrl) {
CE 0:0732b16d9a92 309 if (token == TD_SETUP) {
CE 0:0732b16d9a92 310 td_toggle = TD_TOGGLE_0;
CE 0:0732b16d9a92 311 } else {
CE 0:0732b16d9a92 312 td_toggle = TD_TOGGLE_1;
CE 0:0732b16d9a92 313 }
CE 0:0732b16d9a92 314 } else {
CE 0:0732b16d9a92 315 td_toggle = 0;
CE 0:0732b16d9a92 316 }
CE 0:0732b16d9a92 317 TDHead->Control = (TD_ROUNDING |
CE 0:0732b16d9a92 318 token |
CE 0:0732b16d9a92 319 TD_DELAY_INT(0) |
CE 0:0732b16d9a92 320 td_toggle |
CE 0:0732b16d9a92 321 TD_CC);
CE 0:0732b16d9a92 322 TDTail->Control = 0;
CE 0:0732b16d9a92 323 TDHead->CurrBufPtr = (USB_INT32U) buffer;
CE 0:0732b16d9a92 324 TDTail->CurrBufPtr = 0;
CE 0:0732b16d9a92 325 TDHead->Next = (USB_INT32U) TDTail;
CE 0:0732b16d9a92 326 TDTail->Next = 0;
CE 0:0732b16d9a92 327 TDHead->BufEnd = (USB_INT32U)(buffer + (buffer_len - 1));
CE 0:0732b16d9a92 328 TDTail->BufEnd = 0;
CE 0:0732b16d9a92 329
CE 0:0732b16d9a92 330 ed->HeadTd = (USB_INT32U)TDHead | ((ed->HeadTd) & 0x00000002);
CE 0:0732b16d9a92 331 ed->TailTd = (USB_INT32U)TDTail;
CE 0:0732b16d9a92 332 ed->Next = 0;
CE 0:0732b16d9a92 333
CE 0:0732b16d9a92 334 if (ed == EDCtrl) {
CE 0:0732b16d9a92 335 LPC_USB->HcControlHeadED = (USB_INT32U)ed;
CE 0:0732b16d9a92 336 LPC_USB->HcCommandStatus = LPC_USB->HcCommandStatus | OR_CMD_STATUS_CLF;
CE 0:0732b16d9a92 337 LPC_USB->HcControl = LPC_USB->HcControl | OR_CONTROL_CLE;
CE 0:0732b16d9a92 338 } else {
CE 0:0732b16d9a92 339 LPC_USB->HcBulkHeadED = (USB_INT32U)ed;
CE 0:0732b16d9a92 340 LPC_USB->HcCommandStatus = LPC_USB->HcCommandStatus | OR_CMD_STATUS_BLF;
CE 0:0732b16d9a92 341 LPC_USB->HcControl = LPC_USB->HcControl | OR_CONTROL_BLE;
CE 0:0732b16d9a92 342 }
CE 0:0732b16d9a92 343
CE 0:0732b16d9a92 344 Host_WDHWait();
CE 0:0732b16d9a92 345
CE 0:0732b16d9a92 346 // if (!(TDHead->Control & 0xF0000000)) {
CE 0:0732b16d9a92 347 if (!HOST_TDControlStatus) {
CE 0:0732b16d9a92 348 return (OK);
CE 0:0732b16d9a92 349 } else {
CE 0:0732b16d9a92 350 return (ERR_TD_FAIL);
CE 0:0732b16d9a92 351 }
CE 0:0732b16d9a92 352 }
CE 0:0732b16d9a92 353
CE 0:0732b16d9a92 354 /*
CE 0:0732b16d9a92 355 **************************************************************************************************************
CE 0:0732b16d9a92 356 * ENUMERATE THE DEVICE
CE 0:0732b16d9a92 357 *
CE 0:0732b16d9a92 358 * Description: This function is used to enumerate the device connected
CE 0:0732b16d9a92 359 *
CE 0:0732b16d9a92 360 * Arguments : None
CE 0:0732b16d9a92 361 *
CE 0:0732b16d9a92 362 * Returns : None
CE 0:0732b16d9a92 363 *
CE 0:0732b16d9a92 364 **************************************************************************************************************
CE 0:0732b16d9a92 365 */
CE 0:0732b16d9a92 366
CE 0:0732b16d9a92 367 USB_INT32S Host_EnumDev (void)
CE 0:0732b16d9a92 368 {
CE 0:0732b16d9a92 369 USB_INT32S rc;
CE 0:0732b16d9a92 370
CE 0:0732b16d9a92 371 PRINT_Log("Connect a Mass Storage device\n");
CE 0:0732b16d9a92 372 while (!HOST_RhscIntr)
CE 0:0732b16d9a92 373 __WFI();
CE 0:0732b16d9a92 374 Host_DelayMS(100); /* USB 2.0 spec says atleast 50ms delay beore port reset */
CE 0:0732b16d9a92 375 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRS; // Initiate port reset
CE 0:0732b16d9a92 376 while (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_PRS)
CE 0:0732b16d9a92 377 __WFI(); // Wait for port reset to complete...
CE 0:0732b16d9a92 378 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRSC; // ...and clear port reset signal
CE 0:0732b16d9a92 379 Host_DelayMS(200); /* Wait for 100 MS after port reset */
CE 0:0732b16d9a92 380
CE 0:0732b16d9a92 381 EDCtrl->Control = 8 << 16; /* Put max pkt size = 8 */
CE 0:0732b16d9a92 382 /* Read first 8 bytes of device desc */
CE 0:0732b16d9a92 383 rc = HOST_GET_DESCRIPTOR(USB_DESCRIPTOR_TYPE_DEVICE, 0, TDBuffer, 8);
CE 0:0732b16d9a92 384 if (rc != OK) {
CE 0:0732b16d9a92 385 PRINT_Err(rc);
CE 0:0732b16d9a92 386 return (rc);
CE 0:0732b16d9a92 387 }
CE 0:0732b16d9a92 388 EDCtrl->Control = TDBuffer[7] << 16; /* Get max pkt size of endpoint 0 */
CE 0:0732b16d9a92 389 rc = HOST_SET_ADDRESS(1); /* Set the device address to 1 */
CE 0:0732b16d9a92 390 if (rc != OK) {
CE 0:0732b16d9a92 391 PRINT_Err(rc);
CE 0:0732b16d9a92 392 return (rc);
CE 0:0732b16d9a92 393 }
CE 0:0732b16d9a92 394 Host_DelayMS(2);
CE 0:0732b16d9a92 395 EDCtrl->Control = (EDCtrl->Control) | 1; /* Modify control pipe with address 1 */
CE 0:0732b16d9a92 396 /* Get the configuration descriptor */
CE 0:0732b16d9a92 397 rc = HOST_GET_DESCRIPTOR(USB_DESCRIPTOR_TYPE_CONFIGURATION, 0, TDBuffer, 9);
CE 0:0732b16d9a92 398 if (rc != OK) {
CE 0:0732b16d9a92 399 PRINT_Err(rc);
CE 0:0732b16d9a92 400 return (rc);
CE 0:0732b16d9a92 401 }
CE 0:0732b16d9a92 402 /* Get the first configuration data */
CE 0:0732b16d9a92 403 rc = HOST_GET_DESCRIPTOR(USB_DESCRIPTOR_TYPE_CONFIGURATION, 0, TDBuffer, ReadLE16U(&TDBuffer[2]));
CE 0:0732b16d9a92 404 if (rc != OK) {
CE 0:0732b16d9a92 405 PRINT_Err(rc);
CE 0:0732b16d9a92 406 return (rc);
CE 0:0732b16d9a92 407 }
CE 0:0732b16d9a92 408 rc = MS_ParseConfiguration(); /* Parse the configuration */
CE 0:0732b16d9a92 409 if (rc != OK) {
CE 0:0732b16d9a92 410 PRINT_Err(rc);
CE 0:0732b16d9a92 411 return (rc);
CE 0:0732b16d9a92 412 }
CE 0:0732b16d9a92 413 rc = USBH_SET_CONFIGURATION(1); /* Select device configuration 1 */
CE 0:0732b16d9a92 414 if (rc != OK) {
CE 0:0732b16d9a92 415 PRINT_Err(rc);
CE 0:0732b16d9a92 416 }
CE 0:0732b16d9a92 417 Host_DelayMS(100); /* Some devices may require this delay */
CE 0:0732b16d9a92 418 return (rc);
CE 0:0732b16d9a92 419 }
CE 0:0732b16d9a92 420
CE 0:0732b16d9a92 421 /*
CE 0:0732b16d9a92 422 **************************************************************************************************************
CE 0:0732b16d9a92 423 * RECEIVE THE CONTROL INFORMATION
CE 0:0732b16d9a92 424 *
CE 0:0732b16d9a92 425 * Description: This function is used to receive the control information
CE 0:0732b16d9a92 426 *
CE 0:0732b16d9a92 427 * Arguments : bm_request_type
CE 0:0732b16d9a92 428 * b_request
CE 0:0732b16d9a92 429 * w_value
CE 0:0732b16d9a92 430 * w_index
CE 0:0732b16d9a92 431 * w_length
CE 0:0732b16d9a92 432 * buffer
CE 0:0732b16d9a92 433 *
CE 0:0732b16d9a92 434 * Returns : OK if Success
CE 0:0732b16d9a92 435 * ERROR if Failed
CE 0:0732b16d9a92 436 *
CE 0:0732b16d9a92 437 **************************************************************************************************************
CE 0:0732b16d9a92 438 */
CE 0:0732b16d9a92 439
CE 0:0732b16d9a92 440 USB_INT32S Host_CtrlRecv ( USB_INT08U bm_request_type,
CE 0:0732b16d9a92 441 USB_INT08U b_request,
CE 0:0732b16d9a92 442 USB_INT16U w_value,
CE 0:0732b16d9a92 443 USB_INT16U w_index,
CE 0:0732b16d9a92 444 USB_INT16U w_length,
CE 0:0732b16d9a92 445 volatile USB_INT08U *buffer)
CE 0:0732b16d9a92 446 {
CE 0:0732b16d9a92 447 USB_INT32S rc;
CE 0:0732b16d9a92 448
CE 0:0732b16d9a92 449
CE 0:0732b16d9a92 450 Host_FillSetup(bm_request_type, b_request, w_value, w_index, w_length);
CE 0:0732b16d9a92 451 rc = Host_ProcessTD(EDCtrl, TD_SETUP, TDBuffer, 8);
CE 0:0732b16d9a92 452 if (rc == OK) {
CE 0:0732b16d9a92 453 if (w_length) {
CE 0:0732b16d9a92 454 rc = Host_ProcessTD(EDCtrl, TD_IN, TDBuffer, w_length);
CE 0:0732b16d9a92 455 }
CE 0:0732b16d9a92 456 if (rc == OK) {
CE 0:0732b16d9a92 457 rc = Host_ProcessTD(EDCtrl, TD_OUT, NULL, 0);
CE 0:0732b16d9a92 458 }
CE 0:0732b16d9a92 459 }
CE 0:0732b16d9a92 460 return (rc);
CE 0:0732b16d9a92 461 }
CE 0:0732b16d9a92 462
CE 0:0732b16d9a92 463 /*
CE 0:0732b16d9a92 464 **************************************************************************************************************
CE 0:0732b16d9a92 465 * SEND THE CONTROL INFORMATION
CE 0:0732b16d9a92 466 *
CE 0:0732b16d9a92 467 * Description: This function is used to send the control information
CE 0:0732b16d9a92 468 *
CE 0:0732b16d9a92 469 * Arguments : None
CE 0:0732b16d9a92 470 *
CE 0:0732b16d9a92 471 * Returns : OK if Success
CE 0:0732b16d9a92 472 * ERR_INVALID_BOOTSIG if Failed
CE 0:0732b16d9a92 473 *
CE 0:0732b16d9a92 474 **************************************************************************************************************
CE 0:0732b16d9a92 475 */
CE 0:0732b16d9a92 476
CE 0:0732b16d9a92 477 USB_INT32S Host_CtrlSend ( USB_INT08U bm_request_type,
CE 0:0732b16d9a92 478 USB_INT08U b_request,
CE 0:0732b16d9a92 479 USB_INT16U w_value,
CE 0:0732b16d9a92 480 USB_INT16U w_index,
CE 0:0732b16d9a92 481 USB_INT16U w_length,
CE 0:0732b16d9a92 482 volatile USB_INT08U *buffer)
CE 0:0732b16d9a92 483 {
CE 0:0732b16d9a92 484 USB_INT32S rc;
CE 0:0732b16d9a92 485
CE 0:0732b16d9a92 486
CE 0:0732b16d9a92 487 Host_FillSetup(bm_request_type, b_request, w_value, w_index, w_length);
CE 0:0732b16d9a92 488
CE 0:0732b16d9a92 489 rc = Host_ProcessTD(EDCtrl, TD_SETUP, TDBuffer, 8);
CE 0:0732b16d9a92 490 if (rc == OK) {
CE 0:0732b16d9a92 491 if (w_length) {
CE 0:0732b16d9a92 492 rc = Host_ProcessTD(EDCtrl, TD_OUT, TDBuffer, w_length);
CE 0:0732b16d9a92 493 }
CE 0:0732b16d9a92 494 if (rc == OK) {
CE 0:0732b16d9a92 495 rc = Host_ProcessTD(EDCtrl, TD_IN, NULL, 0);
CE 0:0732b16d9a92 496 }
CE 0:0732b16d9a92 497 }
CE 0:0732b16d9a92 498 return (rc);
CE 0:0732b16d9a92 499 }
CE 0:0732b16d9a92 500
CE 0:0732b16d9a92 501 /*
CE 0:0732b16d9a92 502 **************************************************************************************************************
CE 0:0732b16d9a92 503 * FILL SETUP PACKET
CE 0:0732b16d9a92 504 *
CE 0:0732b16d9a92 505 * Description: This function is used to fill the setup packet
CE 0:0732b16d9a92 506 *
CE 0:0732b16d9a92 507 * Arguments : None
CE 0:0732b16d9a92 508 *
CE 0:0732b16d9a92 509 * Returns : OK if Success
CE 0:0732b16d9a92 510 * ERR_INVALID_BOOTSIG if Failed
CE 0:0732b16d9a92 511 *
CE 0:0732b16d9a92 512 **************************************************************************************************************
CE 0:0732b16d9a92 513 */
CE 0:0732b16d9a92 514
CE 0:0732b16d9a92 515 void Host_FillSetup (USB_INT08U bm_request_type,
CE 0:0732b16d9a92 516 USB_INT08U b_request,
CE 0:0732b16d9a92 517 USB_INT16U w_value,
CE 0:0732b16d9a92 518 USB_INT16U w_index,
CE 0:0732b16d9a92 519 USB_INT16U w_length)
CE 0:0732b16d9a92 520 {
CE 0:0732b16d9a92 521 int i;
CE 0:0732b16d9a92 522 for (i=0;i<w_length;i++)
CE 0:0732b16d9a92 523 TDBuffer[i] = 0;
CE 0:0732b16d9a92 524
CE 0:0732b16d9a92 525 TDBuffer[0] = bm_request_type;
CE 0:0732b16d9a92 526 TDBuffer[1] = b_request;
CE 0:0732b16d9a92 527 WriteLE16U(&TDBuffer[2], w_value);
CE 0:0732b16d9a92 528 WriteLE16U(&TDBuffer[4], w_index);
CE 0:0732b16d9a92 529 WriteLE16U(&TDBuffer[6], w_length);
CE 0:0732b16d9a92 530 }
CE 0:0732b16d9a92 531
CE 0:0732b16d9a92 532
CE 0:0732b16d9a92 533
CE 0:0732b16d9a92 534 /*
CE 0:0732b16d9a92 535 **************************************************************************************************************
CE 0:0732b16d9a92 536 * INITIALIZE THE TRANSFER DESCRIPTOR
CE 0:0732b16d9a92 537 *
CE 0:0732b16d9a92 538 * Description: This function initializes transfer descriptor
CE 0:0732b16d9a92 539 *
CE 0:0732b16d9a92 540 * Arguments : Pointer to TD structure
CE 0:0732b16d9a92 541 *
CE 0:0732b16d9a92 542 * Returns : None
CE 0:0732b16d9a92 543 *
CE 0:0732b16d9a92 544 **************************************************************************************************************
CE 0:0732b16d9a92 545 */
CE 0:0732b16d9a92 546
CE 0:0732b16d9a92 547 void Host_TDInit (volatile HCTD *td)
CE 0:0732b16d9a92 548 {
CE 0:0732b16d9a92 549
CE 0:0732b16d9a92 550 td->Control = 0;
CE 0:0732b16d9a92 551 td->CurrBufPtr = 0;
CE 0:0732b16d9a92 552 td->Next = 0;
CE 0:0732b16d9a92 553 td->BufEnd = 0;
CE 0:0732b16d9a92 554 }
CE 0:0732b16d9a92 555
CE 0:0732b16d9a92 556 /*
CE 0:0732b16d9a92 557 **************************************************************************************************************
CE 0:0732b16d9a92 558 * INITIALIZE THE ENDPOINT DESCRIPTOR
CE 0:0732b16d9a92 559 *
CE 0:0732b16d9a92 560 * Description: This function initializes endpoint descriptor
CE 0:0732b16d9a92 561 *
CE 0:0732b16d9a92 562 * Arguments : Pointer to ED strcuture
CE 0:0732b16d9a92 563 *
CE 0:0732b16d9a92 564 * Returns : None
CE 0:0732b16d9a92 565 *
CE 0:0732b16d9a92 566 **************************************************************************************************************
CE 0:0732b16d9a92 567 */
CE 0:0732b16d9a92 568
CE 0:0732b16d9a92 569 void Host_EDInit (volatile HCED *ed)
CE 0:0732b16d9a92 570 {
CE 0:0732b16d9a92 571
CE 0:0732b16d9a92 572 ed->Control = 0;
CE 0:0732b16d9a92 573 ed->TailTd = 0;
CE 0:0732b16d9a92 574 ed->HeadTd = 0;
CE 0:0732b16d9a92 575 ed->Next = 0;
CE 0:0732b16d9a92 576 }
CE 0:0732b16d9a92 577
CE 0:0732b16d9a92 578 /*
CE 0:0732b16d9a92 579 **************************************************************************************************************
CE 0:0732b16d9a92 580 * INITIALIZE HOST CONTROLLER COMMUNICATIONS AREA
CE 0:0732b16d9a92 581 *
CE 0:0732b16d9a92 582 * Description: This function initializes host controller communications area
CE 0:0732b16d9a92 583 *
CE 0:0732b16d9a92 584 * Arguments : Pointer to HCCA
CE 0:0732b16d9a92 585 *
CE 0:0732b16d9a92 586 * Returns :
CE 0:0732b16d9a92 587 *
CE 0:0732b16d9a92 588 **************************************************************************************************************
CE 0:0732b16d9a92 589 */
CE 0:0732b16d9a92 590
CE 0:0732b16d9a92 591 void Host_HCCAInit (volatile HCCA *hcca)
CE 0:0732b16d9a92 592 {
CE 0:0732b16d9a92 593 USB_INT32U i;
CE 0:0732b16d9a92 594
CE 0:0732b16d9a92 595
CE 0:0732b16d9a92 596 for (i = 0; i < 32; i++) {
CE 0:0732b16d9a92 597
CE 0:0732b16d9a92 598 hcca->IntTable[i] = 0;
CE 0:0732b16d9a92 599 hcca->FrameNumber = 0;
CE 0:0732b16d9a92 600 hcca->DoneHead = 0;
CE 0:0732b16d9a92 601 }
CE 0:0732b16d9a92 602
CE 0:0732b16d9a92 603 }
CE 0:0732b16d9a92 604
CE 0:0732b16d9a92 605 /*
CE 0:0732b16d9a92 606 **************************************************************************************************************
CE 0:0732b16d9a92 607 * WAIT FOR WDH INTERRUPT
CE 0:0732b16d9a92 608 *
CE 0:0732b16d9a92 609 * Description: This function is infinite loop which breaks when ever a WDH interrupt rises
CE 0:0732b16d9a92 610 *
CE 0:0732b16d9a92 611 * Arguments : None
CE 0:0732b16d9a92 612 *
CE 0:0732b16d9a92 613 * Returns : None
CE 0:0732b16d9a92 614 *
CE 0:0732b16d9a92 615 **************************************************************************************************************
CE 0:0732b16d9a92 616 */
CE 0:0732b16d9a92 617
CE 0:0732b16d9a92 618 void Host_WDHWait (void)
CE 0:0732b16d9a92 619 {
CE 0:0732b16d9a92 620 while (!HOST_WdhIntr)
CE 0:0732b16d9a92 621 __WFI();
CE 0:0732b16d9a92 622
CE 0:0732b16d9a92 623 HOST_WdhIntr = 0;
CE 0:0732b16d9a92 624 }
CE 0:0732b16d9a92 625
CE 0:0732b16d9a92 626 /*
CE 0:0732b16d9a92 627 **************************************************************************************************************
CE 0:0732b16d9a92 628 * READ LE 32U
CE 0:0732b16d9a92 629 *
CE 0:0732b16d9a92 630 * Description: This function is used to read an unsigned integer from a character buffer in the platform
CE 0:0732b16d9a92 631 * containing little endian processor
CE 0:0732b16d9a92 632 *
CE 0:0732b16d9a92 633 * Arguments : pmem Pointer to the character buffer
CE 0:0732b16d9a92 634 *
CE 0:0732b16d9a92 635 * Returns : val Unsigned integer
CE 0:0732b16d9a92 636 *
CE 0:0732b16d9a92 637 **************************************************************************************************************
CE 0:0732b16d9a92 638 */
CE 0:0732b16d9a92 639
CE 0:0732b16d9a92 640 USB_INT32U ReadLE32U (volatile USB_INT08U *pmem)
CE 0:0732b16d9a92 641 {
CE 0:0732b16d9a92 642 USB_INT32U val = *(USB_INT32U*)pmem;
CE 0:0732b16d9a92 643 #ifdef __BIG_ENDIAN
CE 0:0732b16d9a92 644 return __REV(val);
CE 0:0732b16d9a92 645 #else
CE 0:0732b16d9a92 646 return val;
CE 0:0732b16d9a92 647 #endif
CE 0:0732b16d9a92 648 }
CE 0:0732b16d9a92 649
CE 0:0732b16d9a92 650 /*
CE 0:0732b16d9a92 651 **************************************************************************************************************
CE 0:0732b16d9a92 652 * WRITE LE 32U
CE 0:0732b16d9a92 653 *
CE 0:0732b16d9a92 654 * Description: This function is used to write an unsigned integer into a charecter buffer in the platform
CE 0:0732b16d9a92 655 * containing little endian processor.
CE 0:0732b16d9a92 656 *
CE 0:0732b16d9a92 657 * Arguments : pmem Pointer to the charecter buffer
CE 0:0732b16d9a92 658 * val Integer value to be placed in the charecter buffer
CE 0:0732b16d9a92 659 *
CE 0:0732b16d9a92 660 * Returns : None
CE 0:0732b16d9a92 661 *
CE 0:0732b16d9a92 662 **************************************************************************************************************
CE 0:0732b16d9a92 663 */
CE 0:0732b16d9a92 664
CE 0:0732b16d9a92 665 void WriteLE32U (volatile USB_INT08U *pmem,
CE 0:0732b16d9a92 666 USB_INT32U val)
CE 0:0732b16d9a92 667 {
CE 0:0732b16d9a92 668 #ifdef __BIG_ENDIAN
CE 0:0732b16d9a92 669 *(USB_INT32U*)pmem = __REV(val);
CE 0:0732b16d9a92 670 #else
CE 0:0732b16d9a92 671 *(USB_INT32U*)pmem = val;
CE 0:0732b16d9a92 672 #endif
CE 0:0732b16d9a92 673 }
CE 0:0732b16d9a92 674
CE 0:0732b16d9a92 675 /*
CE 0:0732b16d9a92 676 **************************************************************************************************************
CE 0:0732b16d9a92 677 * READ LE 16U
CE 0:0732b16d9a92 678 *
CE 0:0732b16d9a92 679 * Description: This function is used to read an unsigned short integer from a charecter buffer in the platform
CE 0:0732b16d9a92 680 * containing little endian processor
CE 0:0732b16d9a92 681 *
CE 0:0732b16d9a92 682 * Arguments : pmem Pointer to the charecter buffer
CE 0:0732b16d9a92 683 *
CE 0:0732b16d9a92 684 * Returns : val Unsigned short integer
CE 0:0732b16d9a92 685 *
CE 0:0732b16d9a92 686 **************************************************************************************************************
CE 0:0732b16d9a92 687 */
CE 0:0732b16d9a92 688
CE 0:0732b16d9a92 689 USB_INT16U ReadLE16U (volatile USB_INT08U *pmem)
CE 0:0732b16d9a92 690 {
CE 0:0732b16d9a92 691 USB_INT16U val = *(USB_INT16U*)pmem;
CE 0:0732b16d9a92 692 #ifdef __BIG_ENDIAN
CE 0:0732b16d9a92 693 return __REV16(val);
CE 0:0732b16d9a92 694 #else
CE 0:0732b16d9a92 695 return val;
CE 0:0732b16d9a92 696 #endif
CE 0:0732b16d9a92 697 }
CE 0:0732b16d9a92 698
CE 0:0732b16d9a92 699 /*
CE 0:0732b16d9a92 700 **************************************************************************************************************
CE 0:0732b16d9a92 701 * WRITE LE 16U
CE 0:0732b16d9a92 702 *
CE 0:0732b16d9a92 703 * Description: This function is used to write an unsigned short integer into a charecter buffer in the
CE 0:0732b16d9a92 704 * platform containing little endian processor
CE 0:0732b16d9a92 705 *
CE 0:0732b16d9a92 706 * Arguments : pmem Pointer to the charecter buffer
CE 0:0732b16d9a92 707 * val Value to be placed in the charecter buffer
CE 0:0732b16d9a92 708 *
CE 0:0732b16d9a92 709 * Returns : None
CE 0:0732b16d9a92 710 *
CE 0:0732b16d9a92 711 **************************************************************************************************************
CE 0:0732b16d9a92 712 */
CE 0:0732b16d9a92 713
CE 0:0732b16d9a92 714 void WriteLE16U (volatile USB_INT08U *pmem,
CE 0:0732b16d9a92 715 USB_INT16U val)
CE 0:0732b16d9a92 716 {
CE 0:0732b16d9a92 717 #ifdef __BIG_ENDIAN
CE 0:0732b16d9a92 718 *(USB_INT16U*)pmem = (__REV16(val) & 0xFFFF);
CE 0:0732b16d9a92 719 #else
CE 0:0732b16d9a92 720 *(USB_INT16U*)pmem = val;
CE 0:0732b16d9a92 721 #endif
CE 0:0732b16d9a92 722 }
CE 0:0732b16d9a92 723
CE 0:0732b16d9a92 724 /*
CE 0:0732b16d9a92 725 **************************************************************************************************************
CE 0:0732b16d9a92 726 * READ BE 32U
CE 0:0732b16d9a92 727 *
CE 0:0732b16d9a92 728 * Description: This function is used to read an unsigned integer from a charecter buffer in the platform
CE 0:0732b16d9a92 729 * containing big endian processor
CE 0:0732b16d9a92 730 *
CE 0:0732b16d9a92 731 * Arguments : pmem Pointer to the charecter buffer
CE 0:0732b16d9a92 732 *
CE 0:0732b16d9a92 733 * Returns : val Unsigned integer
CE 0:0732b16d9a92 734 *
CE 0:0732b16d9a92 735 **************************************************************************************************************
CE 0:0732b16d9a92 736 */
CE 0:0732b16d9a92 737
CE 0:0732b16d9a92 738 USB_INT32U ReadBE32U (volatile USB_INT08U *pmem)
CE 0:0732b16d9a92 739 {
CE 0:0732b16d9a92 740 USB_INT32U val = *(USB_INT32U*)pmem;
CE 0:0732b16d9a92 741 #ifdef __BIG_ENDIAN
CE 0:0732b16d9a92 742 return val;
CE 0:0732b16d9a92 743 #else
CE 0:0732b16d9a92 744 return __REV(val);
CE 0:0732b16d9a92 745 #endif
CE 0:0732b16d9a92 746 }
CE 0:0732b16d9a92 747
CE 0:0732b16d9a92 748 /*
CE 0:0732b16d9a92 749 **************************************************************************************************************
CE 0:0732b16d9a92 750 * WRITE BE 32U
CE 0:0732b16d9a92 751 *
CE 0:0732b16d9a92 752 * Description: This function is used to write an unsigned integer into a charecter buffer in the platform
CE 0:0732b16d9a92 753 * containing big endian processor
CE 0:0732b16d9a92 754 *
CE 0:0732b16d9a92 755 * Arguments : pmem Pointer to the charecter buffer
CE 0:0732b16d9a92 756 * val Value to be placed in the charecter buffer
CE 0:0732b16d9a92 757 *
CE 0:0732b16d9a92 758 * Returns : None
CE 0:0732b16d9a92 759 *
CE 0:0732b16d9a92 760 **************************************************************************************************************
CE 0:0732b16d9a92 761 */
CE 0:0732b16d9a92 762
CE 0:0732b16d9a92 763 void WriteBE32U (volatile USB_INT08U *pmem,
CE 0:0732b16d9a92 764 USB_INT32U val)
CE 0:0732b16d9a92 765 {
CE 0:0732b16d9a92 766 #ifdef __BIG_ENDIAN
CE 0:0732b16d9a92 767 *(USB_INT32U*)pmem = val;
CE 0:0732b16d9a92 768 #else
CE 0:0732b16d9a92 769 *(USB_INT32U*)pmem = __REV(val);
CE 0:0732b16d9a92 770 #endif
CE 0:0732b16d9a92 771 }
CE 0:0732b16d9a92 772
CE 0:0732b16d9a92 773 /*
CE 0:0732b16d9a92 774 **************************************************************************************************************
CE 0:0732b16d9a92 775 * READ BE 16U
CE 0:0732b16d9a92 776 *
CE 0:0732b16d9a92 777 * Description: This function is used to read an unsigned short integer from a charecter buffer in the platform
CE 0:0732b16d9a92 778 * containing big endian processor
CE 0:0732b16d9a92 779 *
CE 0:0732b16d9a92 780 * Arguments : pmem Pointer to the charecter buffer
CE 0:0732b16d9a92 781 *
CE 0:0732b16d9a92 782 * Returns : val Unsigned short integer
CE 0:0732b16d9a92 783 *
CE 0:0732b16d9a92 784 **************************************************************************************************************
CE 0:0732b16d9a92 785 */
CE 0:0732b16d9a92 786
CE 0:0732b16d9a92 787 USB_INT16U ReadBE16U (volatile USB_INT08U *pmem)
CE 0:0732b16d9a92 788 {
CE 0:0732b16d9a92 789 USB_INT16U val = *(USB_INT16U*)pmem;
CE 0:0732b16d9a92 790 #ifdef __BIG_ENDIAN
CE 0:0732b16d9a92 791 return val;
CE 0:0732b16d9a92 792 #else
CE 0:0732b16d9a92 793 return __REV16(val);
CE 0:0732b16d9a92 794 #endif
CE 0:0732b16d9a92 795 }
CE 0:0732b16d9a92 796
CE 0:0732b16d9a92 797 /*
CE 0:0732b16d9a92 798 **************************************************************************************************************
CE 0:0732b16d9a92 799 * WRITE BE 16U
CE 0:0732b16d9a92 800 *
CE 0:0732b16d9a92 801 * Description: This function is used to write an unsigned short integer into the charecter buffer in the
CE 0:0732b16d9a92 802 * platform containing big endian processor
CE 0:0732b16d9a92 803 *
CE 0:0732b16d9a92 804 * Arguments : pmem Pointer to the charecter buffer
CE 0:0732b16d9a92 805 * val Value to be placed in the charecter buffer
CE 0:0732b16d9a92 806 *
CE 0:0732b16d9a92 807 * Returns : None
CE 0:0732b16d9a92 808 *
CE 0:0732b16d9a92 809 **************************************************************************************************************
CE 0:0732b16d9a92 810 */
CE 0:0732b16d9a92 811
CE 0:0732b16d9a92 812 void WriteBE16U (volatile USB_INT08U *pmem,
CE 0:0732b16d9a92 813 USB_INT16U val)
CE 0:0732b16d9a92 814 {
CE 0:0732b16d9a92 815 #ifdef __BIG_ENDIAN
CE 0:0732b16d9a92 816 *(USB_INT16U*)pmem = val;
CE 0:0732b16d9a92 817 #else
CE 0:0732b16d9a92 818 *(USB_INT16U*)pmem = (__REV16(val) & 0xFFFF);
CE 0:0732b16d9a92 819 #endif
CE 0:0732b16d9a92 820 }