Michael Spencer / Smoothie

Fork of Smoothie to port to mbed non-LPC targets.

Dependencies:   mbed

Fork of Smoothie by Stéphane Cachat

libs/LPC17xx/LPC17xxLib/inc/lpc17xx_timer.h@2:1df0b61d3b5a, 2014-02-28 (annotated)

Committer:
Michael J. Spencer
Date:
Fri Feb 28 18:52:52 2014 -0800
Revision:
2:1df0b61d3b5a
Update to latest Smoothie.

Who changed what in which revision?

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Michael J. Spencer 2:1df0b61d3b5a 1 /**********************************************************************
Michael J. Spencer 2:1df0b61d3b5a 2 * $Id$ lpc17xx_timer.h 2010-05-21
Michael J. Spencer 2:1df0b61d3b5a 3 *//**
Michael J. Spencer 2:1df0b61d3b5a 4 * @file lpc17xx_timer.h
Michael J. Spencer 2:1df0b61d3b5a 5 * @brief Contains all macro definitions and function prototypes
Michael J. Spencer 2:1df0b61d3b5a 6 * support for Timer firmware library on LPC17xx
Michael J. Spencer 2:1df0b61d3b5a 7 * @version 2.0
Michael J. Spencer 2:1df0b61d3b5a 8 * @date 21. May. 2010
Michael J. Spencer 2:1df0b61d3b5a 9 * @author NXP MCU SW Application Team
Michael J. Spencer 2:1df0b61d3b5a 10 *
Michael J. Spencer 2:1df0b61d3b5a 11 * Copyright(C) 2010, NXP Semiconductor
Michael J. Spencer 2:1df0b61d3b5a 12 * All rights reserved.
Michael J. Spencer 2:1df0b61d3b5a 13 *
Michael J. Spencer 2:1df0b61d3b5a 14 ***********************************************************************
Michael J. Spencer 2:1df0b61d3b5a 15 * Software that is described herein is for illustrative purposes only
Michael J. Spencer 2:1df0b61d3b5a 16 * which provides customers with programming information regarding the
Michael J. Spencer 2:1df0b61d3b5a 17 * products. This software is supplied "AS IS" without any warranties.
Michael J. Spencer 2:1df0b61d3b5a 18 * NXP Semiconductors assumes no responsibility or liability for the
Michael J. Spencer 2:1df0b61d3b5a 19 * use of the software, conveys no license or title under any patent,
Michael J. Spencer 2:1df0b61d3b5a 20 * copyright, or mask work right to the product. NXP Semiconductors
Michael J. Spencer 2:1df0b61d3b5a 21 * reserves the right to make changes in the software without
Michael J. Spencer 2:1df0b61d3b5a 22 * notification. NXP Semiconductors also make no representation or
Michael J. Spencer 2:1df0b61d3b5a 23 * warranty that such application will be suitable for the specified
Michael J. Spencer 2:1df0b61d3b5a 24 * use without further testing or modification.
Michael J. Spencer 2:1df0b61d3b5a 25 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 26
Michael J. Spencer 2:1df0b61d3b5a 27 /* Peripheral group ----------------------------------------------------------- */
Michael J. Spencer 2:1df0b61d3b5a 28 /** @defgroup TIM TIM (Timer)
Michael J. Spencer 2:1df0b61d3b5a 29 * @ingroup LPC1700CMSIS_FwLib_Drivers
Michael J. Spencer 2:1df0b61d3b5a 30 * @{
Michael J. Spencer 2:1df0b61d3b5a 31 */
Michael J. Spencer 2:1df0b61d3b5a 32
Michael J. Spencer 2:1df0b61d3b5a 33 #ifndef __LPC17XX_TIMER_H_
Michael J. Spencer 2:1df0b61d3b5a 34 #define __LPC17XX_TIMER_H_
Michael J. Spencer 2:1df0b61d3b5a 35
Michael J. Spencer 2:1df0b61d3b5a 36 /* Includes ------------------------------------------------------------------- */
Michael J. Spencer 2:1df0b61d3b5a 37 #include "LPC17xx.h"
Michael J. Spencer 2:1df0b61d3b5a 38 #include "lpc_types.h"
Michael J. Spencer 2:1df0b61d3b5a 39
Michael J. Spencer 2:1df0b61d3b5a 40 #ifdef __cplusplus
Michael J. Spencer 2:1df0b61d3b5a 41 extern "C"
Michael J. Spencer 2:1df0b61d3b5a 42 {
Michael J. Spencer 2:1df0b61d3b5a 43 #endif
Michael J. Spencer 2:1df0b61d3b5a 44
Michael J. Spencer 2:1df0b61d3b5a 45 /* Private Macros ------------------------------------------------------------- */
Michael J. Spencer 2:1df0b61d3b5a 46 /** @defgroup TIM_Private_Macros TIM Private Macros
Michael J. Spencer 2:1df0b61d3b5a 47 * @{
Michael J. Spencer 2:1df0b61d3b5a 48 */
Michael J. Spencer 2:1df0b61d3b5a 49
Michael J. Spencer 2:1df0b61d3b5a 50 /* --------------------- BIT DEFINITIONS -------------------------------------- */
Michael J. Spencer 2:1df0b61d3b5a 51 /**********************************************************************
Michael J. Spencer 2:1df0b61d3b5a 52 ** Interrupt information
Michael J. Spencer 2:1df0b61d3b5a 53 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 54 /** Macro to clean interrupt pending */
Michael J. Spencer 2:1df0b61d3b5a 55 #define TIM_IR_CLR(n) _BIT(n)
Michael J. Spencer 2:1df0b61d3b5a 56
Michael J. Spencer 2:1df0b61d3b5a 57 /**********************************************************************
Michael J. Spencer 2:1df0b61d3b5a 58 ** Timer interrupt register definitions
Michael J. Spencer 2:1df0b61d3b5a 59 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 60 /** Macro for getting a timer match interrupt bit */
Michael J. Spencer 2:1df0b61d3b5a 61 #define TIM_MATCH_INT(n) (_BIT(n & 0x0F))
Michael J. Spencer 2:1df0b61d3b5a 62 /** Macro for getting a capture event interrupt bit */
Michael J. Spencer 2:1df0b61d3b5a 63 #define TIM_CAP_INT(n) (_BIT(((n & 0x0F) + 4)))
Michael J. Spencer 2:1df0b61d3b5a 64
Michael J. Spencer 2:1df0b61d3b5a 65 /**********************************************************************
Michael J. Spencer 2:1df0b61d3b5a 66 * Timer control register definitions
Michael J. Spencer 2:1df0b61d3b5a 67 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 68 /** Timer/counter enable bit */
Michael J. Spencer 2:1df0b61d3b5a 69 #define TIM_ENABLE ((uint32_t)(1<<0))
Michael J. Spencer 2:1df0b61d3b5a 70 /** Timer/counter reset bit */
Michael J. Spencer 2:1df0b61d3b5a 71 #define TIM_RESET ((uint32_t)(1<<1))
Michael J. Spencer 2:1df0b61d3b5a 72 /** Timer control bit mask */
Michael J. Spencer 2:1df0b61d3b5a 73 #define TIM_TCR_MASKBIT ((uint32_t)(3))
Michael J. Spencer 2:1df0b61d3b5a 74
Michael J. Spencer 2:1df0b61d3b5a 75 /**********************************************************************
Michael J. Spencer 2:1df0b61d3b5a 76 * Timer match control register definitions
Michael J. Spencer 2:1df0b61d3b5a 77 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 78 /** Bit location for interrupt on MRx match, n = 0 to 3 */
Michael J. Spencer 2:1df0b61d3b5a 79 #define TIM_INT_ON_MATCH(n) (_BIT((n * 3)))
Michael J. Spencer 2:1df0b61d3b5a 80 /** Bit location for reset on MRx match, n = 0 to 3 */
Michael J. Spencer 2:1df0b61d3b5a 81 #define TIM_RESET_ON_MATCH(n) (_BIT(((n * 3) + 1)))
Michael J. Spencer 2:1df0b61d3b5a 82 /** Bit location for stop on MRx match, n = 0 to 3 */
Michael J. Spencer 2:1df0b61d3b5a 83 #define TIM_STOP_ON_MATCH(n) (_BIT(((n * 3) + 2)))
Michael J. Spencer 2:1df0b61d3b5a 84 /** Timer Match control bit mask */
Michael J. Spencer 2:1df0b61d3b5a 85 #define TIM_MCR_MASKBIT ((uint32_t)(0x0FFF))
Michael J. Spencer 2:1df0b61d3b5a 86 /** Timer Match control bit mask for specific channel*/
Michael J. Spencer 2:1df0b61d3b5a 87 #define TIM_MCR_CHANNEL_MASKBIT(n) ((uint32_t)(7<<(n*3)))
Michael J. Spencer 2:1df0b61d3b5a 88
Michael J. Spencer 2:1df0b61d3b5a 89 /**********************************************************************
Michael J. Spencer 2:1df0b61d3b5a 90 * Timer capture control register definitions
Michael J. Spencer 2:1df0b61d3b5a 91 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 92 /** Bit location for CAP.n on CRx rising edge, n = 0 to 3 */
Michael J. Spencer 2:1df0b61d3b5a 93 #define TIM_CAP_RISING(n) (_BIT((n * 3)))
Michael J. Spencer 2:1df0b61d3b5a 94 /** Bit location for CAP.n on CRx falling edge, n = 0 to 3 */
Michael J. Spencer 2:1df0b61d3b5a 95 #define TIM_CAP_FALLING(n) (_BIT(((n * 3) + 1)))
Michael J. Spencer 2:1df0b61d3b5a 96 /** Bit location for CAP.n on CRx interrupt enable, n = 0 to 3 */
Michael J. Spencer 2:1df0b61d3b5a 97 #define TIM_INT_ON_CAP(n) (_BIT(((n * 3) + 2)))
Michael J. Spencer 2:1df0b61d3b5a 98 /** Mask bit for rising and falling edge bit */
Michael J. Spencer 2:1df0b61d3b5a 99 #define TIM_EDGE_MASK(n) (_SBF((n * 3), 0x03))
Michael J. Spencer 2:1df0b61d3b5a 100 /** Timer capture control bit mask */
Michael J. Spencer 2:1df0b61d3b5a 101 #define TIM_CCR_MASKBIT ((uint32_t)(0x3F))
Michael J. Spencer 2:1df0b61d3b5a 102 /** Timer Capture control bit mask for specific channel*/
Michael J. Spencer 2:1df0b61d3b5a 103 #define TIM_CCR_CHANNEL_MASKBIT(n) ((uint32_t)(7<<(n*3)))
Michael J. Spencer 2:1df0b61d3b5a 104
Michael J. Spencer 2:1df0b61d3b5a 105 /**********************************************************************
Michael J. Spencer 2:1df0b61d3b5a 106 * Timer external match register definitions
Michael J. Spencer 2:1df0b61d3b5a 107 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 108 /** Bit location for output state change of MAT.n when external match
Michael J. Spencer 2:1df0b61d3b5a 109 happens, n = 0 to 3 */
Michael J. Spencer 2:1df0b61d3b5a 110 #define TIM_EM(n) _BIT(n)
Michael J. Spencer 2:1df0b61d3b5a 111 /** Output state change of MAT.n when external match happens: no change */
Michael J. Spencer 2:1df0b61d3b5a 112 #define TIM_EM_NOTHING ((uint8_t)(0x0))
Michael J. Spencer 2:1df0b61d3b5a 113 /** Output state change of MAT.n when external match happens: low */
Michael J. Spencer 2:1df0b61d3b5a 114 #define TIM_EM_LOW ((uint8_t)(0x1))
Michael J. Spencer 2:1df0b61d3b5a 115 /** Output state change of MAT.n when external match happens: high */
Michael J. Spencer 2:1df0b61d3b5a 116 #define TIM_EM_HIGH ((uint8_t)(0x2))
Michael J. Spencer 2:1df0b61d3b5a 117 /** Output state change of MAT.n when external match happens: toggle */
Michael J. Spencer 2:1df0b61d3b5a 118 #define TIM_EM_TOGGLE ((uint8_t)(0x3))
Michael J. Spencer 2:1df0b61d3b5a 119 /** Macro for setting for the MAT.n change state bits */
Michael J. Spencer 2:1df0b61d3b5a 120 #define TIM_EM_SET(n,s) (_SBF(((n << 1) + 4), (s & 0x03)))
Michael J. Spencer 2:1df0b61d3b5a 121 /** Mask for the MAT.n change state bits */
Michael J. Spencer 2:1df0b61d3b5a 122 #define TIM_EM_MASK(n) (_SBF(((n << 1) + 4), 0x03))
Michael J. Spencer 2:1df0b61d3b5a 123 /** Timer external match bit mask */
Michael J. Spencer 2:1df0b61d3b5a 124 #define TIM_EMR_MASKBIT 0x0FFF
Michael J. Spencer 2:1df0b61d3b5a 125
Michael J. Spencer 2:1df0b61d3b5a 126 /**********************************************************************
Michael J. Spencer 2:1df0b61d3b5a 127 * Timer Count Control Register definitions
Michael J. Spencer 2:1df0b61d3b5a 128 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 129 /** Mask to get the Counter/timer mode bits */
Michael J. Spencer 2:1df0b61d3b5a 130 #define TIM_CTCR_MODE_MASK 0x3
Michael J. Spencer 2:1df0b61d3b5a 131 /** Mask to get the count input select bits */
Michael J. Spencer 2:1df0b61d3b5a 132 #define TIM_CTCR_INPUT_MASK 0xC
Michael J. Spencer 2:1df0b61d3b5a 133 /** Timer Count control bit mask */
Michael J. Spencer 2:1df0b61d3b5a 134 #define TIM_CTCR_MASKBIT 0xF
Michael J. Spencer 2:1df0b61d3b5a 135 #define TIM_COUNTER_MODE ((uint8_t)(1))
Michael J. Spencer 2:1df0b61d3b5a 136
Michael J. Spencer 2:1df0b61d3b5a 137
Michael J. Spencer 2:1df0b61d3b5a 138 /* ---------------- CHECK PARAMETER DEFINITIONS ---------------------------- */
Michael J. Spencer 2:1df0b61d3b5a 139 /** Macro to determine if it is valid TIMER peripheral */
Michael J. Spencer 2:1df0b61d3b5a 140 #define PARAM_TIMx(n) ((((uint32_t *)n)==((uint32_t *)LPC_TIM0)) || (((uint32_t *)n)==((uint32_t *)LPC_TIM1)) \
Michael J. Spencer 2:1df0b61d3b5a 141 || (((uint32_t *)n)==((uint32_t *)LPC_TIM2)) || (((uint32_t *)n)==((uint32_t *)LPC_TIM3)))
Michael J. Spencer 2:1df0b61d3b5a 142
Michael J. Spencer 2:1df0b61d3b5a 143 /* Macro check interrupt type */
Michael J. Spencer 2:1df0b61d3b5a 144 #define PARAM_TIM_INT_TYPE(TYPE) ((TYPE ==TIM_MR0_INT)||(TYPE ==TIM_MR1_INT)\
Michael J. Spencer 2:1df0b61d3b5a 145 ||(TYPE ==TIM_MR2_INT)||(TYPE ==TIM_MR3_INT)\
Michael J. Spencer 2:1df0b61d3b5a 146 ||(TYPE ==TIM_CR0_INT)||(TYPE ==TIM_CR1_INT))
Michael J. Spencer 2:1df0b61d3b5a 147
Michael J. Spencer 2:1df0b61d3b5a 148 /* Macro check TIMER mode */
Michael J. Spencer 2:1df0b61d3b5a 149 #define PARAM_TIM_MODE_OPT(MODE) ((MODE == TIM_TIMER_MODE)||(MODE == TIM_COUNTER_RISING_MODE)\
Michael J. Spencer 2:1df0b61d3b5a 150 || (MODE == TIM_COUNTER_RISING_MODE)||(MODE == TIM_COUNTER_RISING_MODE))
Michael J. Spencer 2:1df0b61d3b5a 151
Michael J. Spencer 2:1df0b61d3b5a 152 /* Macro check TIMER prescale value */
Michael J. Spencer 2:1df0b61d3b5a 153 #define PARAM_TIM_PRESCALE_OPT(OPT) ((OPT == TIM_PRESCALE_TICKVAL)||(OPT == TIM_PRESCALE_USVAL))
Michael J. Spencer 2:1df0b61d3b5a 154
Michael J. Spencer 2:1df0b61d3b5a 155 /* Macro check TIMER counter intput mode */
Michael J. Spencer 2:1df0b61d3b5a 156 #define PARAM_TIM_COUNTER_INPUT_OPT(OPT) ((OPT == TIM_COUNTER_INCAP0)||(OPT == TIM_COUNTER_INCAP1))
Michael J. Spencer 2:1df0b61d3b5a 157
Michael J. Spencer 2:1df0b61d3b5a 158 /* Macro check TIMER external match mode */
Michael J. Spencer 2:1df0b61d3b5a 159 #define PARAM_TIM_EXTMATCH_OPT(OPT) ((OPT == TIM_EXTMATCH_NOTHING)||(OPT == TIM_EXTMATCH_LOW)\
Michael J. Spencer 2:1df0b61d3b5a 160 ||(OPT == TIM_EXTMATCH_HIGH)||(OPT == TIM_EXTMATCH_TOGGLE))
Michael J. Spencer 2:1df0b61d3b5a 161
Michael J. Spencer 2:1df0b61d3b5a 162 /* Macro check TIMER external match mode */
Michael J. Spencer 2:1df0b61d3b5a 163 #define PARAM_TIM_CAP_MODE_OPT(OPT) ((OPT == TIM_CAPTURE_NONE)||(OPT == TIM_CAPTURE_RISING) \
Michael J. Spencer 2:1df0b61d3b5a 164 ||(OPT == TIM_CAPTURE_FALLING)||(OPT == TIM_CAPTURE_ANY))
Michael J. Spencer 2:1df0b61d3b5a 165
Michael J. Spencer 2:1df0b61d3b5a 166 /**
Michael J. Spencer 2:1df0b61d3b5a 167 * @}
Michael J. Spencer 2:1df0b61d3b5a 168 */
Michael J. Spencer 2:1df0b61d3b5a 169
Michael J. Spencer 2:1df0b61d3b5a 170
Michael J. Spencer 2:1df0b61d3b5a 171 /* Public Types --------------------------------------------------------------- */
Michael J. Spencer 2:1df0b61d3b5a 172 /** @defgroup TIM_Public_Types TIM Public Types
Michael J. Spencer 2:1df0b61d3b5a 173 * @{
Michael J. Spencer 2:1df0b61d3b5a 174 */
Michael J. Spencer 2:1df0b61d3b5a 175
Michael J. Spencer 2:1df0b61d3b5a 176 /***********************************************************************
Michael J. Spencer 2:1df0b61d3b5a 177 * Timer device enumeration
Michael J. Spencer 2:1df0b61d3b5a 178 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 179 /** @brief interrupt type */
Michael J. Spencer 2:1df0b61d3b5a 180 typedef enum
Michael J. Spencer 2:1df0b61d3b5a 181 {
Michael J. Spencer 2:1df0b61d3b5a 182 TIM_MR0_INT =0, /*!< interrupt for Match channel 0*/
Michael J. Spencer 2:1df0b61d3b5a 183 TIM_MR1_INT =1, /*!< interrupt for Match channel 1*/
Michael J. Spencer 2:1df0b61d3b5a 184 TIM_MR2_INT =2, /*!< interrupt for Match channel 2*/
Michael J. Spencer 2:1df0b61d3b5a 185 TIM_MR3_INT =3, /*!< interrupt for Match channel 3*/
Michael J. Spencer 2:1df0b61d3b5a 186 TIM_CR0_INT =4, /*!< interrupt for Capture channel 0*/
Michael J. Spencer 2:1df0b61d3b5a 187 TIM_CR1_INT =5 /*!< interrupt for Capture channel 1*/
Michael J. Spencer 2:1df0b61d3b5a 188 }TIM_INT_TYPE;
Michael J. Spencer 2:1df0b61d3b5a 189
Michael J. Spencer 2:1df0b61d3b5a 190 /** @brief Timer/counter operating mode */
Michael J. Spencer 2:1df0b61d3b5a 191 typedef enum
Michael J. Spencer 2:1df0b61d3b5a 192 {
Michael J. Spencer 2:1df0b61d3b5a 193 TIM_TIMER_MODE = 0, /*!< Timer mode */
Michael J. Spencer 2:1df0b61d3b5a 194 TIM_COUNTER_RISING_MODE, /*!< Counter rising mode */
Michael J. Spencer 2:1df0b61d3b5a 195 TIM_COUNTER_FALLING_MODE, /*!< Counter falling mode */
Michael J. Spencer 2:1df0b61d3b5a 196 TIM_COUNTER_ANY_MODE /*!< Counter on both edges */
Michael J. Spencer 2:1df0b61d3b5a 197 } TIM_MODE_OPT;
Michael J. Spencer 2:1df0b61d3b5a 198
Michael J. Spencer 2:1df0b61d3b5a 199 /** @brief Timer/Counter prescale option */
Michael J. Spencer 2:1df0b61d3b5a 200 typedef enum
Michael J. Spencer 2:1df0b61d3b5a 201 {
Michael J. Spencer 2:1df0b61d3b5a 202 TIM_PRESCALE_TICKVAL = 0, /*!< Prescale in absolute value */
Michael J. Spencer 2:1df0b61d3b5a 203 TIM_PRESCALE_USVAL /*!< Prescale in microsecond value */
Michael J. Spencer 2:1df0b61d3b5a 204 } TIM_PRESCALE_OPT;
Michael J. Spencer 2:1df0b61d3b5a 205
Michael J. Spencer 2:1df0b61d3b5a 206 /** @brief Counter input option */
Michael J. Spencer 2:1df0b61d3b5a 207 typedef enum
Michael J. Spencer 2:1df0b61d3b5a 208 {
Michael J. Spencer 2:1df0b61d3b5a 209 TIM_COUNTER_INCAP0 = 0, /*!< CAPn.0 input pin for TIMERn */
Michael J. Spencer 2:1df0b61d3b5a 210 TIM_COUNTER_INCAP1, /*!< CAPn.1 input pin for TIMERn */
Michael J. Spencer 2:1df0b61d3b5a 211 } TIM_COUNTER_INPUT_OPT;
Michael J. Spencer 2:1df0b61d3b5a 212
Michael J. Spencer 2:1df0b61d3b5a 213 /** @brief Timer/Counter external match option */
Michael J. Spencer 2:1df0b61d3b5a 214 typedef enum
Michael J. Spencer 2:1df0b61d3b5a 215 {
Michael J. Spencer 2:1df0b61d3b5a 216 TIM_EXTMATCH_NOTHING = 0, /*!< Do nothing for external output pin if match */
Michael J. Spencer 2:1df0b61d3b5a 217 TIM_EXTMATCH_LOW, /*!< Force external output pin to low if match */
Michael J. Spencer 2:1df0b61d3b5a 218 TIM_EXTMATCH_HIGH, /*!< Force external output pin to high if match */
Michael J. Spencer 2:1df0b61d3b5a 219 TIM_EXTMATCH_TOGGLE /*!< Toggle external output pin if match */
Michael J. Spencer 2:1df0b61d3b5a 220 }TIM_EXTMATCH_OPT;
Michael J. Spencer 2:1df0b61d3b5a 221
Michael J. Spencer 2:1df0b61d3b5a 222 /** @brief Timer/counter capture mode options */
Michael J. Spencer 2:1df0b61d3b5a 223 typedef enum {
Michael J. Spencer 2:1df0b61d3b5a 224 TIM_CAPTURE_NONE = 0, /*!< No Capture */
Michael J. Spencer 2:1df0b61d3b5a 225 TIM_CAPTURE_RISING, /*!< Rising capture mode */
Michael J. Spencer 2:1df0b61d3b5a 226 TIM_CAPTURE_FALLING, /*!< Falling capture mode */
Michael J. Spencer 2:1df0b61d3b5a 227 TIM_CAPTURE_ANY /*!< On both edges */
Michael J. Spencer 2:1df0b61d3b5a 228 } TIM_CAP_MODE_OPT;
Michael J. Spencer 2:1df0b61d3b5a 229
Michael J. Spencer 2:1df0b61d3b5a 230 /** @brief Configuration structure in TIMER mode */
Michael J. Spencer 2:1df0b61d3b5a 231 typedef struct
Michael J. Spencer 2:1df0b61d3b5a 232 {
Michael J. Spencer 2:1df0b61d3b5a 233
Michael J. Spencer 2:1df0b61d3b5a 234 uint8_t PrescaleOption; /**< Timer Prescale option, should be:
Michael J. Spencer 2:1df0b61d3b5a 235 - TIM_PRESCALE_TICKVAL: Prescale in absolute value
Michael J. Spencer 2:1df0b61d3b5a 236 - TIM_PRESCALE_USVAL: Prescale in microsecond value
Michael J. Spencer 2:1df0b61d3b5a 237 */
Michael J. Spencer 2:1df0b61d3b5a 238 uint8_t Reserved[3]; /**< Reserved */
Michael J. Spencer 2:1df0b61d3b5a 239 uint32_t PrescaleValue; /**< Prescale value */
Michael J. Spencer 2:1df0b61d3b5a 240 } TIM_TIMERCFG_Type;
Michael J. Spencer 2:1df0b61d3b5a 241
Michael J. Spencer 2:1df0b61d3b5a 242 /** @brief Configuration structure in COUNTER mode */
Michael J. Spencer 2:1df0b61d3b5a 243 typedef struct {
Michael J. Spencer 2:1df0b61d3b5a 244
Michael J. Spencer 2:1df0b61d3b5a 245 uint8_t CounterOption; /**< Counter Option, should be:
Michael J. Spencer 2:1df0b61d3b5a 246 - TIM_COUNTER_INCAP0: CAPn.0 input pin for TIMERn
Michael J. Spencer 2:1df0b61d3b5a 247 - TIM_COUNTER_INCAP1: CAPn.1 input pin for TIMERn
Michael J. Spencer 2:1df0b61d3b5a 248 */
Michael J. Spencer 2:1df0b61d3b5a 249 uint8_t CountInputSelect;
Michael J. Spencer 2:1df0b61d3b5a 250 uint8_t Reserved[2];
Michael J. Spencer 2:1df0b61d3b5a 251 } TIM_COUNTERCFG_Type;
Michael J. Spencer 2:1df0b61d3b5a 252
Michael J. Spencer 2:1df0b61d3b5a 253 /** @brief Match channel configuration structure */
Michael J. Spencer 2:1df0b61d3b5a 254 typedef struct {
Michael J. Spencer 2:1df0b61d3b5a 255 uint8_t MatchChannel; /**< Match channel, should be in range
Michael J. Spencer 2:1df0b61d3b5a 256 from 0..3 */
Michael J. Spencer 2:1df0b61d3b5a 257 uint8_t IntOnMatch; /**< Interrupt On match, should be:
Michael J. Spencer 2:1df0b61d3b5a 258 - ENABLE: Enable this function.
Michael J. Spencer 2:1df0b61d3b5a 259 - DISABLE: Disable this function.
Michael J. Spencer 2:1df0b61d3b5a 260 */
Michael J. Spencer 2:1df0b61d3b5a 261 uint8_t StopOnMatch; /**< Stop On match, should be:
Michael J. Spencer 2:1df0b61d3b5a 262 - ENABLE: Enable this function.
Michael J. Spencer 2:1df0b61d3b5a 263 - DISABLE: Disable this function.
Michael J. Spencer 2:1df0b61d3b5a 264 */
Michael J. Spencer 2:1df0b61d3b5a 265 uint8_t ResetOnMatch; /**< Reset On match, should be:
Michael J. Spencer 2:1df0b61d3b5a 266 - ENABLE: Enable this function.
Michael J. Spencer 2:1df0b61d3b5a 267 - DISABLE: Disable this function.
Michael J. Spencer 2:1df0b61d3b5a 268 */
Michael J. Spencer 2:1df0b61d3b5a 269
Michael J. Spencer 2:1df0b61d3b5a 270 uint8_t ExtMatchOutputType; /**< External Match Output type, should be:
Michael J. Spencer 2:1df0b61d3b5a 271 - TIM_EXTMATCH_NOTHING: Do nothing for external output pin if match
Michael J. Spencer 2:1df0b61d3b5a 272 - TIM_EXTMATCH_LOW: Force external output pin to low if match
Michael J. Spencer 2:1df0b61d3b5a 273 - TIM_EXTMATCH_HIGH: Force external output pin to high if match
Michael J. Spencer 2:1df0b61d3b5a 274 - TIM_EXTMATCH_TOGGLE: Toggle external output pin if match.
Michael J. Spencer 2:1df0b61d3b5a 275 */
Michael J. Spencer 2:1df0b61d3b5a 276 uint8_t Reserved[3]; /** Reserved */
Michael J. Spencer 2:1df0b61d3b5a 277 uint32_t MatchValue; /** Match value */
Michael J. Spencer 2:1df0b61d3b5a 278 } TIM_MATCHCFG_Type;
Michael J. Spencer 2:1df0b61d3b5a 279
Michael J. Spencer 2:1df0b61d3b5a 280 /** @brief Capture Input configuration structure */
Michael J. Spencer 2:1df0b61d3b5a 281 typedef struct {
Michael J. Spencer 2:1df0b61d3b5a 282 uint8_t CaptureChannel; /**< Capture channel, should be in range
Michael J. Spencer 2:1df0b61d3b5a 283 from 0..1 */
Michael J. Spencer 2:1df0b61d3b5a 284 uint8_t RisingEdge; /**< caption rising edge, should be:
Michael J. Spencer 2:1df0b61d3b5a 285 - ENABLE: Enable rising edge.
Michael J. Spencer 2:1df0b61d3b5a 286 - DISABLE: Disable this function.
Michael J. Spencer 2:1df0b61d3b5a 287 */
Michael J. Spencer 2:1df0b61d3b5a 288 uint8_t FallingEdge; /**< caption falling edge, should be:
Michael J. Spencer 2:1df0b61d3b5a 289 - ENABLE: Enable falling edge.
Michael J. Spencer 2:1df0b61d3b5a 290 - DISABLE: Disable this function.
Michael J. Spencer 2:1df0b61d3b5a 291 */
Michael J. Spencer 2:1df0b61d3b5a 292 uint8_t IntOnCaption; /**< Interrupt On caption, should be:
Michael J. Spencer 2:1df0b61d3b5a 293 - ENABLE: Enable interrupt function.
Michael J. Spencer 2:1df0b61d3b5a 294 - DISABLE: Disable this function.
Michael J. Spencer 2:1df0b61d3b5a 295 */
Michael J. Spencer 2:1df0b61d3b5a 296
Michael J. Spencer 2:1df0b61d3b5a 297 } TIM_CAPTURECFG_Type;
Michael J. Spencer 2:1df0b61d3b5a 298
Michael J. Spencer 2:1df0b61d3b5a 299 /**
Michael J. Spencer 2:1df0b61d3b5a 300 * @}
Michael J. Spencer 2:1df0b61d3b5a 301 */
Michael J. Spencer 2:1df0b61d3b5a 302
Michael J. Spencer 2:1df0b61d3b5a 303
Michael J. Spencer 2:1df0b61d3b5a 304 /* Public Functions ----------------------------------------------------------- */
Michael J. Spencer 2:1df0b61d3b5a 305 /** @defgroup TIM_Public_Functions TIM Public Functions
Michael J. Spencer 2:1df0b61d3b5a 306 * @{
Michael J. Spencer 2:1df0b61d3b5a 307 */
Michael J. Spencer 2:1df0b61d3b5a 308 /* Init/DeInit TIM functions -----------*/
Michael J. Spencer 2:1df0b61d3b5a 309 void TIM_Init(LPC_TIM_TypeDef *TIMx, TIM_MODE_OPT TimerCounterMode, void *TIM_ConfigStruct);
Michael J. Spencer 2:1df0b61d3b5a 310 void TIM_DeInit(LPC_TIM_TypeDef *TIMx);
Michael J. Spencer 2:1df0b61d3b5a 311
Michael J. Spencer 2:1df0b61d3b5a 312 /* TIM interrupt functions -------------*/
Michael J. Spencer 2:1df0b61d3b5a 313 void TIM_ClearIntPending(LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag);
Michael J. Spencer 2:1df0b61d3b5a 314 void TIM_ClearIntCapturePending(LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag);
Michael J. Spencer 2:1df0b61d3b5a 315 FlagStatus TIM_GetIntStatus(LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag);
Michael J. Spencer 2:1df0b61d3b5a 316 FlagStatus TIM_GetIntCaptureStatus(LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag);
Michael J. Spencer 2:1df0b61d3b5a 317
Michael J. Spencer 2:1df0b61d3b5a 318 /* TIM configuration functions --------*/
Michael J. Spencer 2:1df0b61d3b5a 319 void TIM_ConfigStructInit(TIM_MODE_OPT TimerCounterMode, void *TIM_ConfigStruct);
Michael J. Spencer 2:1df0b61d3b5a 320 void TIM_ConfigMatch(LPC_TIM_TypeDef *TIMx, TIM_MATCHCFG_Type *TIM_MatchConfigStruct);
Michael J. Spencer 2:1df0b61d3b5a 321 void TIM_UpdateMatchValue(LPC_TIM_TypeDef *TIMx,uint8_t MatchChannel, uint32_t MatchValue);
Michael J. Spencer 2:1df0b61d3b5a 322 void TIM_SetMatchExt(LPC_TIM_TypeDef *TIMx,TIM_EXTMATCH_OPT ext_match );
Michael J. Spencer 2:1df0b61d3b5a 323 void TIM_ConfigCapture(LPC_TIM_TypeDef *TIMx, TIM_CAPTURECFG_Type *TIM_CaptureConfigStruct);
Michael J. Spencer 2:1df0b61d3b5a 324 void TIM_Cmd(LPC_TIM_TypeDef *TIMx, FunctionalState NewState);
Michael J. Spencer 2:1df0b61d3b5a 325
Michael J. Spencer 2:1df0b61d3b5a 326 uint32_t TIM_GetCaptureValue(LPC_TIM_TypeDef *TIMx, TIM_COUNTER_INPUT_OPT CaptureChannel);
Michael J. Spencer 2:1df0b61d3b5a 327 void TIM_ResetCounter(LPC_TIM_TypeDef *TIMx);
Michael J. Spencer 2:1df0b61d3b5a 328
Michael J. Spencer 2:1df0b61d3b5a 329 /**
Michael J. Spencer 2:1df0b61d3b5a 330 * @}
Michael J. Spencer 2:1df0b61d3b5a 331 */
Michael J. Spencer 2:1df0b61d3b5a 332 #ifdef __cplusplus
Michael J. Spencer 2:1df0b61d3b5a 333 }
Michael J. Spencer 2:1df0b61d3b5a 334 #endif
Michael J. Spencer 2:1df0b61d3b5a 335
Michael J. Spencer 2:1df0b61d3b5a 336 #endif /* __LPC17XX_TIMER_H_ */
Michael J. Spencer 2:1df0b61d3b5a 337
Michael J. Spencer 2:1df0b61d3b5a 338 /**
Michael J. Spencer 2:1df0b61d3b5a 339 * @}
Michael J. Spencer 2:1df0b61d3b5a 340 */
Michael J. Spencer 2:1df0b61d3b5a 341
Michael J. Spencer 2:1df0b61d3b5a 342 /* --------------------------------- End Of File ------------------------------ */