Michael Spencer / Smoothie

Fork of Smoothie to port to mbed non-LPC targets.

Dependencies:   mbed

Fork of Smoothie by Stéphane Cachat

libs/LPC17xx/LPC17xxLib/src/lpc17xx_uart.c@2:1df0b61d3b5a, 2014-02-28 (annotated)

Committer:
Michael J. Spencer
Date:
Fri Feb 28 18:52:52 2014 -0800
Revision:
2:1df0b61d3b5a
Update to latest Smoothie.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Michael J. Spencer 2:1df0b61d3b5a 1 #ifdef __LPC17XX__
Michael J. Spencer 2:1df0b61d3b5a 2
Michael J. Spencer 2:1df0b61d3b5a 3 /**********************************************************************
Michael J. Spencer 2:1df0b61d3b5a 4 * $Id$ lpc17xx_uart.c 2011-06-06
Michael J. Spencer 2:1df0b61d3b5a 5 *//**
Michael J. Spencer 2:1df0b61d3b5a 6 * @file lpc17xx_uart.c
Michael J. Spencer 2:1df0b61d3b5a 7 * @brief Contains all functions support for UART firmware library
Michael J. Spencer 2:1df0b61d3b5a 8 * on LPC17xx
Michael J. Spencer 2:1df0b61d3b5a 9 * @version 3.2
Michael J. Spencer 2:1df0b61d3b5a 10 * @date 25. July. 2011
Michael J. Spencer 2:1df0b61d3b5a 11 * @author NXP MCU SW Application Team
Michael J. Spencer 2:1df0b61d3b5a 12 *
Michael J. Spencer 2:1df0b61d3b5a 13 * Copyright(C) 2011, NXP Semiconductor
Michael J. Spencer 2:1df0b61d3b5a 14 * All rights reserved.
Michael J. Spencer 2:1df0b61d3b5a 15 *
Michael J. Spencer 2:1df0b61d3b5a 16 ***********************************************************************
Michael J. Spencer 2:1df0b61d3b5a 17 * Software that is described herein is for illustrative purposes only
Michael J. Spencer 2:1df0b61d3b5a 18 * which provides customers with programming information regarding the
Michael J. Spencer 2:1df0b61d3b5a 19 * products. This software is supplied "AS IS" without any warranties.
Michael J. Spencer 2:1df0b61d3b5a 20 * NXP Semiconductors assumes no responsibility or liability for the
Michael J. Spencer 2:1df0b61d3b5a 21 * use of the software, conveys no license or title under any patent,
Michael J. Spencer 2:1df0b61d3b5a 22 * copyright, or mask work right to the product. NXP Semiconductors
Michael J. Spencer 2:1df0b61d3b5a 23 * reserves the right to make changes in the software without
Michael J. Spencer 2:1df0b61d3b5a 24 * notification. NXP Semiconductors also make no representation or
Michael J. Spencer 2:1df0b61d3b5a 25 * warranty that such application will be suitable for the specified
Michael J. Spencer 2:1df0b61d3b5a 26 * use without further testing or modification.
Michael J. Spencer 2:1df0b61d3b5a 27 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 28
Michael J. Spencer 2:1df0b61d3b5a 29 /* Peripheral group ----------------------------------------------------------- */
Michael J. Spencer 2:1df0b61d3b5a 30 /** @addtogroup UART
Michael J. Spencer 2:1df0b61d3b5a 31 * @{
Michael J. Spencer 2:1df0b61d3b5a 32 */
Michael J. Spencer 2:1df0b61d3b5a 33
Michael J. Spencer 2:1df0b61d3b5a 34 /* Includes ------------------------------------------------------------------- */
Michael J. Spencer 2:1df0b61d3b5a 35 #include "lpc17xx_uart.h"
Michael J. Spencer 2:1df0b61d3b5a 36 #include "lpc17xx_clkpwr.h"
Michael J. Spencer 2:1df0b61d3b5a 37
Michael J. Spencer 2:1df0b61d3b5a 38 /* If this source file built with example, the LPC17xx FW library configuration
Michael J. Spencer 2:1df0b61d3b5a 39 * file in each example directory ("lpc17xx_libcfg.h") must be included,
Michael J. Spencer 2:1df0b61d3b5a 40 * otherwise the default FW library configuration file must be included instead
Michael J. Spencer 2:1df0b61d3b5a 41 */
Michael J. Spencer 2:1df0b61d3b5a 42 #ifdef __BUILD_WITH_EXAMPLE__
Michael J. Spencer 2:1df0b61d3b5a 43 #include "lpc17xx_libcfg.h"
Michael J. Spencer 2:1df0b61d3b5a 44 #else
Michael J. Spencer 2:1df0b61d3b5a 45 #include "lpc17xx_libcfg_default.h"
Michael J. Spencer 2:1df0b61d3b5a 46 #endif /* __BUILD_WITH_EXAMPLE__ */
Michael J. Spencer 2:1df0b61d3b5a 47
Michael J. Spencer 2:1df0b61d3b5a 48
Michael J. Spencer 2:1df0b61d3b5a 49 #ifdef _UART
Michael J. Spencer 2:1df0b61d3b5a 50
Michael J. Spencer 2:1df0b61d3b5a 51 /* Private Functions ---------------------------------------------------------- */
Michael J. Spencer 2:1df0b61d3b5a 52
Michael J. Spencer 2:1df0b61d3b5a 53 static Status uart_set_divisors(LPC_UART_TypeDef *UARTx, uint32_t baudrate);
Michael J. Spencer 2:1df0b61d3b5a 54
Michael J. Spencer 2:1df0b61d3b5a 55
Michael J. Spencer 2:1df0b61d3b5a 56 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 57 * @brief Determines best dividers to get a target clock rate
Michael J. Spencer 2:1df0b61d3b5a 58 * @param[in] UARTx Pointer to selected UART peripheral, should be:
Michael J. Spencer 2:1df0b61d3b5a 59 * - LPC_UART0: UART0 peripheral
Michael J. Spencer 2:1df0b61d3b5a 60 * - LPC_UART1: UART1 peripheral
Michael J. Spencer 2:1df0b61d3b5a 61 * - LPC_UART2: UART2 peripheral
Michael J. Spencer 2:1df0b61d3b5a 62 * - LPC_UART3: UART3 peripheral
Michael J. Spencer 2:1df0b61d3b5a 63 * @param[in] baudrate Desired UART baud rate.
Michael J. Spencer 2:1df0b61d3b5a 64 * @return Error status, could be:
Michael J. Spencer 2:1df0b61d3b5a 65 * - SUCCESS
Michael J. Spencer 2:1df0b61d3b5a 66 * - ERROR
Michael J. Spencer 2:1df0b61d3b5a 67 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 68 static Status uart_set_divisors(LPC_UART_TypeDef *UARTx, uint32_t baudrate)
Michael J. Spencer 2:1df0b61d3b5a 69 {
Michael J. Spencer 2:1df0b61d3b5a 70 Status errorStatus = ERROR;
Michael J. Spencer 2:1df0b61d3b5a 71
Michael J. Spencer 2:1df0b61d3b5a 72 uint32_t uClk = 0;
Michael J. Spencer 2:1df0b61d3b5a 73 uint32_t d, m, bestd, bestm, tmp;
Michael J. Spencer 2:1df0b61d3b5a 74 uint64_t best_divisor, divisor;
Michael J. Spencer 2:1df0b61d3b5a 75 uint32_t current_error, best_error;
Michael J. Spencer 2:1df0b61d3b5a 76 uint32_t recalcbaud;
Michael J. Spencer 2:1df0b61d3b5a 77
Michael J. Spencer 2:1df0b61d3b5a 78 /* get UART block clock */
Michael J. Spencer 2:1df0b61d3b5a 79 if (UARTx == (LPC_UART_TypeDef *) LPC_UART0)
Michael J. Spencer 2:1df0b61d3b5a 80 {
Michael J. Spencer 2:1df0b61d3b5a 81 uClk = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_UART0);
Michael J. Spencer 2:1df0b61d3b5a 82 }
Michael J. Spencer 2:1df0b61d3b5a 83 else if (UARTx == (LPC_UART_TypeDef *)LPC_UART1)
Michael J. Spencer 2:1df0b61d3b5a 84 {
Michael J. Spencer 2:1df0b61d3b5a 85 uClk = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_UART1);
Michael J. Spencer 2:1df0b61d3b5a 86 }
Michael J. Spencer 2:1df0b61d3b5a 87 else if (UARTx == LPC_UART2)
Michael J. Spencer 2:1df0b61d3b5a 88 {
Michael J. Spencer 2:1df0b61d3b5a 89 uClk = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_UART2);
Michael J. Spencer 2:1df0b61d3b5a 90 }
Michael J. Spencer 2:1df0b61d3b5a 91 else if (UARTx == LPC_UART3)
Michael J. Spencer 2:1df0b61d3b5a 92 {
Michael J. Spencer 2:1df0b61d3b5a 93 uClk = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_UART3);
Michael J. Spencer 2:1df0b61d3b5a 94 }
Michael J. Spencer 2:1df0b61d3b5a 95
Michael J. Spencer 2:1df0b61d3b5a 96
Michael J. Spencer 2:1df0b61d3b5a 97 /* In the Uart IP block, baud rate is calculated using FDR and DLL-DLM registers
Michael J. Spencer 2:1df0b61d3b5a 98 * The formula is :
Michael J. Spencer 2:1df0b61d3b5a 99 * BaudRate= uClk * (mulFracDiv/(mulFracDiv+dividerAddFracDiv) / (16 * (DLL)
Michael J. Spencer 2:1df0b61d3b5a 100 * It involves floating point calculations. That's the reason the formulae are adjusted with
Michael J. Spencer 2:1df0b61d3b5a 101 * Multiply and divide method.*/
Michael J. Spencer 2:1df0b61d3b5a 102 /* The value of mulFracDiv and dividerAddFracDiv should comply to the following expressions:
Michael J. Spencer 2:1df0b61d3b5a 103 * 0 < mulFracDiv <= 15, 0 <= dividerAddFracDiv <= 15 */
Michael J. Spencer 2:1df0b61d3b5a 104 best_error = 0xFFFFFFFF; /* Worst case */
Michael J. Spencer 2:1df0b61d3b5a 105 bestd = 0;
Michael J. Spencer 2:1df0b61d3b5a 106 bestm = 0;
Michael J. Spencer 2:1df0b61d3b5a 107 best_divisor = 0;
Michael J. Spencer 2:1df0b61d3b5a 108 for (m = 1 ; m <= 15 ;m++)
Michael J. Spencer 2:1df0b61d3b5a 109 {
Michael J. Spencer 2:1df0b61d3b5a 110 for (d = 0 ; d < m ; d++)
Michael J. Spencer 2:1df0b61d3b5a 111 {
Michael J. Spencer 2:1df0b61d3b5a 112 divisor = ((uint64_t)uClk<<28)*m/(baudrate*(m+d));
Michael J. Spencer 2:1df0b61d3b5a 113 current_error = divisor & 0xFFFFFFFF;
Michael J. Spencer 2:1df0b61d3b5a 114
Michael J. Spencer 2:1df0b61d3b5a 115 tmp = divisor>>32;
Michael J. Spencer 2:1df0b61d3b5a 116
Michael J. Spencer 2:1df0b61d3b5a 117 /* Adjust error */
Michael J. Spencer 2:1df0b61d3b5a 118 if(current_error > ((uint32_t)1<<31)){
Michael J. Spencer 2:1df0b61d3b5a 119 current_error = -current_error;
Michael J. Spencer 2:1df0b61d3b5a 120 tmp++;
Michael J. Spencer 2:1df0b61d3b5a 121 }
Michael J. Spencer 2:1df0b61d3b5a 122
Michael J. Spencer 2:1df0b61d3b5a 123 if(tmp<1 || tmp>65536) /* Out of range */
Michael J. Spencer 2:1df0b61d3b5a 124 continue;
Michael J. Spencer 2:1df0b61d3b5a 125
Michael J. Spencer 2:1df0b61d3b5a 126 if( current_error < best_error){
Michael J. Spencer 2:1df0b61d3b5a 127 best_error = current_error;
Michael J. Spencer 2:1df0b61d3b5a 128 best_divisor = tmp;
Michael J. Spencer 2:1df0b61d3b5a 129 bestd = d;
Michael J. Spencer 2:1df0b61d3b5a 130 bestm = m;
Michael J. Spencer 2:1df0b61d3b5a 131 if(best_error == 0) break;
Michael J. Spencer 2:1df0b61d3b5a 132 }
Michael J. Spencer 2:1df0b61d3b5a 133 } /* end of inner for loop */
Michael J. Spencer 2:1df0b61d3b5a 134
Michael J. Spencer 2:1df0b61d3b5a 135 if (best_error == 0)
Michael J. Spencer 2:1df0b61d3b5a 136 break;
Michael J. Spencer 2:1df0b61d3b5a 137 } /* end of outer for loop */
Michael J. Spencer 2:1df0b61d3b5a 138
Michael J. Spencer 2:1df0b61d3b5a 139 if(best_divisor == 0) return ERROR; /* can not find best match */
Michael J. Spencer 2:1df0b61d3b5a 140
Michael J. Spencer 2:1df0b61d3b5a 141 recalcbaud = (uClk>>4) * bestm/(best_divisor * (bestm + bestd));
Michael J. Spencer 2:1df0b61d3b5a 142
Michael J. Spencer 2:1df0b61d3b5a 143 /* reuse best_error to evaluate baud error*/
Michael J. Spencer 2:1df0b61d3b5a 144 if(baudrate>recalcbaud) best_error = baudrate - recalcbaud;
Michael J. Spencer 2:1df0b61d3b5a 145 else best_error = recalcbaud -baudrate;
Michael J. Spencer 2:1df0b61d3b5a 146
Michael J. Spencer 2:1df0b61d3b5a 147 best_error = best_error * 100 / baudrate;
Michael J. Spencer 2:1df0b61d3b5a 148
Michael J. Spencer 2:1df0b61d3b5a 149 if (best_error < UART_ACCEPTED_BAUDRATE_ERROR)
Michael J. Spencer 2:1df0b61d3b5a 150 {
Michael J. Spencer 2:1df0b61d3b5a 151 if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
Michael J. Spencer 2:1df0b61d3b5a 152 {
Michael J. Spencer 2:1df0b61d3b5a 153 ((LPC_UART1_TypeDef *)UARTx)->LCR |= UART_LCR_DLAB_EN;
Michael J. Spencer 2:1df0b61d3b5a 154 ((LPC_UART1_TypeDef *)UARTx)->/*DLIER.*/DLM = UART_LOAD_DLM(best_divisor);
Michael J. Spencer 2:1df0b61d3b5a 155 ((LPC_UART1_TypeDef *)UARTx)->/*RBTHDLR.*/DLL = UART_LOAD_DLL(best_divisor);
Michael J. Spencer 2:1df0b61d3b5a 156 /* Then reset DLAB bit */
Michael J. Spencer 2:1df0b61d3b5a 157 ((LPC_UART1_TypeDef *)UARTx)->LCR &= (~UART_LCR_DLAB_EN) & UART_LCR_BITMASK;
Michael J. Spencer 2:1df0b61d3b5a 158 ((LPC_UART1_TypeDef *)UARTx)->FDR = (UART_FDR_MULVAL(bestm) \
Michael J. Spencer 2:1df0b61d3b5a 159 | UART_FDR_DIVADDVAL(bestd)) & UART_FDR_BITMASK;
Michael J. Spencer 2:1df0b61d3b5a 160 }
Michael J. Spencer 2:1df0b61d3b5a 161 else
Michael J. Spencer 2:1df0b61d3b5a 162 {
Michael J. Spencer 2:1df0b61d3b5a 163 UARTx->LCR |= UART_LCR_DLAB_EN;
Michael J. Spencer 2:1df0b61d3b5a 164 UARTx->/*DLIER.*/DLM = UART_LOAD_DLM(best_divisor);
Michael J. Spencer 2:1df0b61d3b5a 165 UARTx->/*RBTHDLR.*/DLL = UART_LOAD_DLL(best_divisor);
Michael J. Spencer 2:1df0b61d3b5a 166 /* Then reset DLAB bit */
Michael J. Spencer 2:1df0b61d3b5a 167 UARTx->LCR &= (~UART_LCR_DLAB_EN) & UART_LCR_BITMASK;
Michael J. Spencer 2:1df0b61d3b5a 168 UARTx->FDR = (UART_FDR_MULVAL(bestm) \
Michael J. Spencer 2:1df0b61d3b5a 169 | UART_FDR_DIVADDVAL(bestd)) & UART_FDR_BITMASK;
Michael J. Spencer 2:1df0b61d3b5a 170 }
Michael J. Spencer 2:1df0b61d3b5a 171 errorStatus = SUCCESS;
Michael J. Spencer 2:1df0b61d3b5a 172 }
Michael J. Spencer 2:1df0b61d3b5a 173
Michael J. Spencer 2:1df0b61d3b5a 174 return errorStatus;
Michael J. Spencer 2:1df0b61d3b5a 175 }
Michael J. Spencer 2:1df0b61d3b5a 176
Michael J. Spencer 2:1df0b61d3b5a 177 /* End of Private Functions ---------------------------------------------------- */
Michael J. Spencer 2:1df0b61d3b5a 178
Michael J. Spencer 2:1df0b61d3b5a 179
Michael J. Spencer 2:1df0b61d3b5a 180 /* Public Functions ----------------------------------------------------------- */
Michael J. Spencer 2:1df0b61d3b5a 181 /** @addtogroup UART_Public_Functions
Michael J. Spencer 2:1df0b61d3b5a 182 * @{
Michael J. Spencer 2:1df0b61d3b5a 183 */
Michael J. Spencer 2:1df0b61d3b5a 184 /* UART Init/DeInit functions -------------------------------------------------*/
Michael J. Spencer 2:1df0b61d3b5a 185 /********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 186 * @brief Initializes the UARTx peripheral according to the specified
Michael J. Spencer 2:1df0b61d3b5a 187 * parameters in the UART_ConfigStruct.
Michael J. Spencer 2:1df0b61d3b5a 188 * @param[in] UARTx UART peripheral selected, should be:
Michael J. Spencer 2:1df0b61d3b5a 189 * - LPC_UART0: UART0 peripheral
Michael J. Spencer 2:1df0b61d3b5a 190 * - LPC_UART1: UART1 peripheral
Michael J. Spencer 2:1df0b61d3b5a 191 * - LPC_UART2: UART2 peripheral
Michael J. Spencer 2:1df0b61d3b5a 192 * - LPC_UART3: UART3 peripheral
Michael J. Spencer 2:1df0b61d3b5a 193 * @param[in] UART_ConfigStruct Pointer to a UART_CFG_Type structure
Michael J. Spencer 2:1df0b61d3b5a 194 * that contains the configuration information for the
Michael J. Spencer 2:1df0b61d3b5a 195 * specified UART peripheral.
Michael J. Spencer 2:1df0b61d3b5a 196 * @return None
Michael J. Spencer 2:1df0b61d3b5a 197 *********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 198 void UART_Init(LPC_UART_TypeDef *UARTx, UART_CFG_Type *UART_ConfigStruct)
Michael J. Spencer 2:1df0b61d3b5a 199 {
Michael J. Spencer 2:1df0b61d3b5a 200 uint32_t tmp;
Michael J. Spencer 2:1df0b61d3b5a 201
Michael J. Spencer 2:1df0b61d3b5a 202 // For debug mode
Michael J. Spencer 2:1df0b61d3b5a 203 CHECK_PARAM(PARAM_UARTx(UARTx));
Michael J. Spencer 2:1df0b61d3b5a 204 CHECK_PARAM(PARAM_UART_DATABIT(UART_ConfigStruct->Databits));
Michael J. Spencer 2:1df0b61d3b5a 205 CHECK_PARAM(PARAM_UART_STOPBIT(UART_ConfigStruct->Stopbits));
Michael J. Spencer 2:1df0b61d3b5a 206 CHECK_PARAM(PARAM_UART_PARITY(UART_ConfigStruct->Parity));
Michael J. Spencer 2:1df0b61d3b5a 207
Michael J. Spencer 2:1df0b61d3b5a 208 #ifdef _UART0
Michael J. Spencer 2:1df0b61d3b5a 209 if(UARTx == (LPC_UART_TypeDef *) LPC_UART0)
Michael J. Spencer 2:1df0b61d3b5a 210 {
Michael J. Spencer 2:1df0b61d3b5a 211 /* Set up clock and power for UART module */
Michael J. Spencer 2:1df0b61d3b5a 212 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART0, ENABLE);
Michael J. Spencer 2:1df0b61d3b5a 213 }
Michael J. Spencer 2:1df0b61d3b5a 214 #endif
Michael J. Spencer 2:1df0b61d3b5a 215
Michael J. Spencer 2:1df0b61d3b5a 216 #ifdef _UART1
Michael J. Spencer 2:1df0b61d3b5a 217 if(((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
Michael J. Spencer 2:1df0b61d3b5a 218 {
Michael J. Spencer 2:1df0b61d3b5a 219 /* Set up clock and power for UART module */
Michael J. Spencer 2:1df0b61d3b5a 220 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART1, ENABLE);
Michael J. Spencer 2:1df0b61d3b5a 221 }
Michael J. Spencer 2:1df0b61d3b5a 222 #endif
Michael J. Spencer 2:1df0b61d3b5a 223
Michael J. Spencer 2:1df0b61d3b5a 224 #ifdef _UART2
Michael J. Spencer 2:1df0b61d3b5a 225 if(UARTx == LPC_UART2)
Michael J. Spencer 2:1df0b61d3b5a 226 {
Michael J. Spencer 2:1df0b61d3b5a 227 /* Set up clock and power for UART module */
Michael J. Spencer 2:1df0b61d3b5a 228 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART2, ENABLE);
Michael J. Spencer 2:1df0b61d3b5a 229 }
Michael J. Spencer 2:1df0b61d3b5a 230 #endif
Michael J. Spencer 2:1df0b61d3b5a 231
Michael J. Spencer 2:1df0b61d3b5a 232 #ifdef _UART3
Michael J. Spencer 2:1df0b61d3b5a 233 if(UARTx == LPC_UART3)
Michael J. Spencer 2:1df0b61d3b5a 234 {
Michael J. Spencer 2:1df0b61d3b5a 235 /* Set up clock and power for UART module */
Michael J. Spencer 2:1df0b61d3b5a 236 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART3, ENABLE);
Michael J. Spencer 2:1df0b61d3b5a 237 }
Michael J. Spencer 2:1df0b61d3b5a 238 #endif
Michael J. Spencer 2:1df0b61d3b5a 239
Michael J. Spencer 2:1df0b61d3b5a 240 if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
Michael J. Spencer 2:1df0b61d3b5a 241 {
Michael J. Spencer 2:1df0b61d3b5a 242 /* FIFOs are empty */
Michael J. Spencer 2:1df0b61d3b5a 243 ((LPC_UART1_TypeDef *)UARTx)->/*IIFCR.*/FCR = ( UART_FCR_FIFO_EN \
Michael J. Spencer 2:1df0b61d3b5a 244 | UART_FCR_RX_RS | UART_FCR_TX_RS);
Michael J. Spencer 2:1df0b61d3b5a 245 // Disable FIFO
Michael J. Spencer 2:1df0b61d3b5a 246 ((LPC_UART1_TypeDef *)UARTx)->/*IIFCR.*/FCR = 0;
Michael J. Spencer 2:1df0b61d3b5a 247
Michael J. Spencer 2:1df0b61d3b5a 248 // Dummy reading
Michael J. Spencer 2:1df0b61d3b5a 249 while (((LPC_UART1_TypeDef *)UARTx)->LSR & UART_LSR_RDR)
Michael J. Spencer 2:1df0b61d3b5a 250 {
Michael J. Spencer 2:1df0b61d3b5a 251 tmp = ((LPC_UART1_TypeDef *)UARTx)->/*RBTHDLR.*/RBR;
Michael J. Spencer 2:1df0b61d3b5a 252 }
Michael J. Spencer 2:1df0b61d3b5a 253
Michael J. Spencer 2:1df0b61d3b5a 254 ((LPC_UART1_TypeDef *)UARTx)->TER = UART_TER_TXEN;
Michael J. Spencer 2:1df0b61d3b5a 255 // Wait for current transmit complete
Michael J. Spencer 2:1df0b61d3b5a 256 while (!(((LPC_UART1_TypeDef *)UARTx)->LSR & UART_LSR_THRE));
Michael J. Spencer 2:1df0b61d3b5a 257 // Disable Tx
Michael J. Spencer 2:1df0b61d3b5a 258 ((LPC_UART1_TypeDef *)UARTx)->TER = 0;
Michael J. Spencer 2:1df0b61d3b5a 259
Michael J. Spencer 2:1df0b61d3b5a 260 // Disable interrupt
Michael J. Spencer 2:1df0b61d3b5a 261 ((LPC_UART1_TypeDef *)UARTx)->/*DLIER.*/IER = 0;
Michael J. Spencer 2:1df0b61d3b5a 262 // Set LCR to default state
Michael J. Spencer 2:1df0b61d3b5a 263 ((LPC_UART1_TypeDef *)UARTx)->LCR = 0;
Michael J. Spencer 2:1df0b61d3b5a 264 // Set ACR to default state
Michael J. Spencer 2:1df0b61d3b5a 265 ((LPC_UART1_TypeDef *)UARTx)->ACR = 0;
Michael J. Spencer 2:1df0b61d3b5a 266 // Set Modem Control to default state
Michael J. Spencer 2:1df0b61d3b5a 267 ((LPC_UART1_TypeDef *)UARTx)->MCR = 0;
Michael J. Spencer 2:1df0b61d3b5a 268 // Set RS485 control to default state
Michael J. Spencer 2:1df0b61d3b5a 269 ((LPC_UART1_TypeDef *)UARTx)->RS485CTRL = 0;
Michael J. Spencer 2:1df0b61d3b5a 270 // Set RS485 delay timer to default state
Michael J. Spencer 2:1df0b61d3b5a 271 ((LPC_UART1_TypeDef *)UARTx)->RS485DLY = 0;
Michael J. Spencer 2:1df0b61d3b5a 272 // Set RS485 addr match to default state
Michael J. Spencer 2:1df0b61d3b5a 273 ((LPC_UART1_TypeDef *)UARTx)->ADRMATCH = 0;
Michael J. Spencer 2:1df0b61d3b5a 274 //Dummy Reading to Clear Status
Michael J. Spencer 2:1df0b61d3b5a 275 tmp = ((LPC_UART1_TypeDef *)UARTx)->MSR;
Michael J. Spencer 2:1df0b61d3b5a 276 tmp = ((LPC_UART1_TypeDef *)UARTx)->LSR;
Michael J. Spencer 2:1df0b61d3b5a 277 }
Michael J. Spencer 2:1df0b61d3b5a 278 else
Michael J. Spencer 2:1df0b61d3b5a 279 {
Michael J. Spencer 2:1df0b61d3b5a 280 /* FIFOs are empty */
Michael J. Spencer 2:1df0b61d3b5a 281 UARTx->/*IIFCR.*/FCR = ( UART_FCR_FIFO_EN | UART_FCR_RX_RS | UART_FCR_TX_RS);
Michael J. Spencer 2:1df0b61d3b5a 282 // Disable FIFO
Michael J. Spencer 2:1df0b61d3b5a 283 UARTx->/*IIFCR.*/FCR = 0;
Michael J. Spencer 2:1df0b61d3b5a 284
Michael J. Spencer 2:1df0b61d3b5a 285 // Dummy reading
Michael J. Spencer 2:1df0b61d3b5a 286 while (UARTx->LSR & UART_LSR_RDR)
Michael J. Spencer 2:1df0b61d3b5a 287 {
Michael J. Spencer 2:1df0b61d3b5a 288 tmp = UARTx->/*RBTHDLR.*/RBR;
Michael J. Spencer 2:1df0b61d3b5a 289 }
Michael J. Spencer 2:1df0b61d3b5a 290
Michael J. Spencer 2:1df0b61d3b5a 291 UARTx->TER = UART_TER_TXEN;
Michael J. Spencer 2:1df0b61d3b5a 292 // Wait for current transmit complete
Michael J. Spencer 2:1df0b61d3b5a 293 while (!(UARTx->LSR & UART_LSR_THRE));
Michael J. Spencer 2:1df0b61d3b5a 294 // Disable Tx
Michael J. Spencer 2:1df0b61d3b5a 295 UARTx->TER = 0;
Michael J. Spencer 2:1df0b61d3b5a 296
Michael J. Spencer 2:1df0b61d3b5a 297 // Disable interrupt
Michael J. Spencer 2:1df0b61d3b5a 298 UARTx->/*DLIER.*/IER = 0;
Michael J. Spencer 2:1df0b61d3b5a 299 // Set LCR to default state
Michael J. Spencer 2:1df0b61d3b5a 300 UARTx->LCR = 0;
Michael J. Spencer 2:1df0b61d3b5a 301 // Set ACR to default state
Michael J. Spencer 2:1df0b61d3b5a 302 UARTx->ACR = 0;
Michael J. Spencer 2:1df0b61d3b5a 303 // Dummy reading
Michael J. Spencer 2:1df0b61d3b5a 304 tmp = UARTx->LSR;
Michael J. Spencer 2:1df0b61d3b5a 305 }
Michael J. Spencer 2:1df0b61d3b5a 306
Michael J. Spencer 2:1df0b61d3b5a 307 if (UARTx == LPC_UART3)
Michael J. Spencer 2:1df0b61d3b5a 308 {
Michael J. Spencer 2:1df0b61d3b5a 309 // Set IrDA to default state
Michael J. Spencer 2:1df0b61d3b5a 310 UARTx->ICR = 0;
Michael J. Spencer 2:1df0b61d3b5a 311 }
Michael J. Spencer 2:1df0b61d3b5a 312
Michael J. Spencer 2:1df0b61d3b5a 313 // Set Line Control register ----------------------------
Michael J. Spencer 2:1df0b61d3b5a 314
Michael J. Spencer 2:1df0b61d3b5a 315 uart_set_divisors(UARTx, (UART_ConfigStruct->Baud_rate));
Michael J. Spencer 2:1df0b61d3b5a 316
Michael J. Spencer 2:1df0b61d3b5a 317 if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
Michael J. Spencer 2:1df0b61d3b5a 318 {
Michael J. Spencer 2:1df0b61d3b5a 319 tmp = (((LPC_UART1_TypeDef *)UARTx)->LCR & (UART_LCR_DLAB_EN | UART_LCR_BREAK_EN)) \
Michael J. Spencer 2:1df0b61d3b5a 320 & UART_LCR_BITMASK;
Michael J. Spencer 2:1df0b61d3b5a 321 }
Michael J. Spencer 2:1df0b61d3b5a 322 else
Michael J. Spencer 2:1df0b61d3b5a 323 {
Michael J. Spencer 2:1df0b61d3b5a 324 tmp = (UARTx->LCR & (UART_LCR_DLAB_EN | UART_LCR_BREAK_EN)) & UART_LCR_BITMASK;
Michael J. Spencer 2:1df0b61d3b5a 325 }
Michael J. Spencer 2:1df0b61d3b5a 326
Michael J. Spencer 2:1df0b61d3b5a 327 switch (UART_ConfigStruct->Databits){
Michael J. Spencer 2:1df0b61d3b5a 328 case UART_DATABIT_5:
Michael J. Spencer 2:1df0b61d3b5a 329 tmp |= UART_LCR_WLEN5;
Michael J. Spencer 2:1df0b61d3b5a 330 break;
Michael J. Spencer 2:1df0b61d3b5a 331 case UART_DATABIT_6:
Michael J. Spencer 2:1df0b61d3b5a 332 tmp |= UART_LCR_WLEN6;
Michael J. Spencer 2:1df0b61d3b5a 333 break;
Michael J. Spencer 2:1df0b61d3b5a 334 case UART_DATABIT_7:
Michael J. Spencer 2:1df0b61d3b5a 335 tmp |= UART_LCR_WLEN7;
Michael J. Spencer 2:1df0b61d3b5a 336 break;
Michael J. Spencer 2:1df0b61d3b5a 337 case UART_DATABIT_8:
Michael J. Spencer 2:1df0b61d3b5a 338 default:
Michael J. Spencer 2:1df0b61d3b5a 339 tmp |= UART_LCR_WLEN8;
Michael J. Spencer 2:1df0b61d3b5a 340 break;
Michael J. Spencer 2:1df0b61d3b5a 341 }
Michael J. Spencer 2:1df0b61d3b5a 342
Michael J. Spencer 2:1df0b61d3b5a 343 if (UART_ConfigStruct->Parity == UART_PARITY_NONE)
Michael J. Spencer 2:1df0b61d3b5a 344 {
Michael J. Spencer 2:1df0b61d3b5a 345 // Do nothing...
Michael J. Spencer 2:1df0b61d3b5a 346 }
Michael J. Spencer 2:1df0b61d3b5a 347 else
Michael J. Spencer 2:1df0b61d3b5a 348 {
Michael J. Spencer 2:1df0b61d3b5a 349 tmp |= UART_LCR_PARITY_EN;
Michael J. Spencer 2:1df0b61d3b5a 350 switch (UART_ConfigStruct->Parity)
Michael J. Spencer 2:1df0b61d3b5a 351 {
Michael J. Spencer 2:1df0b61d3b5a 352 case UART_PARITY_ODD:
Michael J. Spencer 2:1df0b61d3b5a 353 tmp |= UART_LCR_PARITY_ODD;
Michael J. Spencer 2:1df0b61d3b5a 354 break;
Michael J. Spencer 2:1df0b61d3b5a 355
Michael J. Spencer 2:1df0b61d3b5a 356 case UART_PARITY_EVEN:
Michael J. Spencer 2:1df0b61d3b5a 357 tmp |= UART_LCR_PARITY_EVEN;
Michael J. Spencer 2:1df0b61d3b5a 358 break;
Michael J. Spencer 2:1df0b61d3b5a 359
Michael J. Spencer 2:1df0b61d3b5a 360 case UART_PARITY_SP_1:
Michael J. Spencer 2:1df0b61d3b5a 361 tmp |= UART_LCR_PARITY_F_1;
Michael J. Spencer 2:1df0b61d3b5a 362 break;
Michael J. Spencer 2:1df0b61d3b5a 363
Michael J. Spencer 2:1df0b61d3b5a 364 case UART_PARITY_SP_0:
Michael J. Spencer 2:1df0b61d3b5a 365 tmp |= UART_LCR_PARITY_F_0;
Michael J. Spencer 2:1df0b61d3b5a 366 break;
Michael J. Spencer 2:1df0b61d3b5a 367 default:
Michael J. Spencer 2:1df0b61d3b5a 368 break;
Michael J. Spencer 2:1df0b61d3b5a 369 }
Michael J. Spencer 2:1df0b61d3b5a 370 }
Michael J. Spencer 2:1df0b61d3b5a 371
Michael J. Spencer 2:1df0b61d3b5a 372 switch (UART_ConfigStruct->Stopbits){
Michael J. Spencer 2:1df0b61d3b5a 373 case UART_STOPBIT_2:
Michael J. Spencer 2:1df0b61d3b5a 374 tmp |= UART_LCR_STOPBIT_SEL;
Michael J. Spencer 2:1df0b61d3b5a 375 break;
Michael J. Spencer 2:1df0b61d3b5a 376 case UART_STOPBIT_1:
Michael J. Spencer 2:1df0b61d3b5a 377 default:
Michael J. Spencer 2:1df0b61d3b5a 378 // Do no thing
Michael J. Spencer 2:1df0b61d3b5a 379 break;
Michael J. Spencer 2:1df0b61d3b5a 380 }
Michael J. Spencer 2:1df0b61d3b5a 381
Michael J. Spencer 2:1df0b61d3b5a 382
Michael J. Spencer 2:1df0b61d3b5a 383 // Write back to LCR, configure FIFO and Disable Tx
Michael J. Spencer 2:1df0b61d3b5a 384 if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
Michael J. Spencer 2:1df0b61d3b5a 385 {
Michael J. Spencer 2:1df0b61d3b5a 386 ((LPC_UART1_TypeDef *)UARTx)->LCR = (uint8_t)(tmp & UART_LCR_BITMASK);
Michael J. Spencer 2:1df0b61d3b5a 387 }
Michael J. Spencer 2:1df0b61d3b5a 388 else
Michael J. Spencer 2:1df0b61d3b5a 389 {
Michael J. Spencer 2:1df0b61d3b5a 390 UARTx->LCR = (uint8_t)(tmp & UART_LCR_BITMASK);
Michael J. Spencer 2:1df0b61d3b5a 391 }
Michael J. Spencer 2:1df0b61d3b5a 392 }
Michael J. Spencer 2:1df0b61d3b5a 393
Michael J. Spencer 2:1df0b61d3b5a 394 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 395 * @brief De-initializes the UARTx peripheral registers to their
Michael J. Spencer 2:1df0b61d3b5a 396 * default reset values.
Michael J. Spencer 2:1df0b61d3b5a 397 * @param[in] UARTx UART peripheral selected, should be:
Michael J. Spencer 2:1df0b61d3b5a 398 * - LPC_UART0: UART0 peripheral
Michael J. Spencer 2:1df0b61d3b5a 399 * - LPC_UART1: UART1 peripheral
Michael J. Spencer 2:1df0b61d3b5a 400 * - LPC_UART2: UART2 peripheral
Michael J. Spencer 2:1df0b61d3b5a 401 * - LPC_UART3: UART3 peripheral
Michael J. Spencer 2:1df0b61d3b5a 402 * @return None
Michael J. Spencer 2:1df0b61d3b5a 403 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 404 void UART_DeInit(LPC_UART_TypeDef* UARTx)
Michael J. Spencer 2:1df0b61d3b5a 405 {
Michael J. Spencer 2:1df0b61d3b5a 406 // For debug mode
Michael J. Spencer 2:1df0b61d3b5a 407 CHECK_PARAM(PARAM_UARTx(UARTx));
Michael J. Spencer 2:1df0b61d3b5a 408
Michael J. Spencer 2:1df0b61d3b5a 409 UART_TxCmd(UARTx, DISABLE);
Michael J. Spencer 2:1df0b61d3b5a 410
Michael J. Spencer 2:1df0b61d3b5a 411 #ifdef _UART0
Michael J. Spencer 2:1df0b61d3b5a 412 if (UARTx == (LPC_UART_TypeDef *) LPC_UART0)
Michael J. Spencer 2:1df0b61d3b5a 413 {
Michael J. Spencer 2:1df0b61d3b5a 414 /* Set up clock and power for UART module */
Michael J. Spencer 2:1df0b61d3b5a 415 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART0, DISABLE);
Michael J. Spencer 2:1df0b61d3b5a 416 }
Michael J. Spencer 2:1df0b61d3b5a 417 #endif
Michael J. Spencer 2:1df0b61d3b5a 418
Michael J. Spencer 2:1df0b61d3b5a 419 #ifdef _UART1
Michael J. Spencer 2:1df0b61d3b5a 420 if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
Michael J. Spencer 2:1df0b61d3b5a 421 {
Michael J. Spencer 2:1df0b61d3b5a 422 /* Set up clock and power for UART module */
Michael J. Spencer 2:1df0b61d3b5a 423 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART1, DISABLE);
Michael J. Spencer 2:1df0b61d3b5a 424 }
Michael J. Spencer 2:1df0b61d3b5a 425 #endif
Michael J. Spencer 2:1df0b61d3b5a 426
Michael J. Spencer 2:1df0b61d3b5a 427 #ifdef _UART2
Michael J. Spencer 2:1df0b61d3b5a 428 if (UARTx == LPC_UART2)
Michael J. Spencer 2:1df0b61d3b5a 429 {
Michael J. Spencer 2:1df0b61d3b5a 430 /* Set up clock and power for UART module */
Michael J. Spencer 2:1df0b61d3b5a 431 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART2, DISABLE);
Michael J. Spencer 2:1df0b61d3b5a 432 }
Michael J. Spencer 2:1df0b61d3b5a 433 #endif
Michael J. Spencer 2:1df0b61d3b5a 434
Michael J. Spencer 2:1df0b61d3b5a 435 #ifdef _UART3
Michael J. Spencer 2:1df0b61d3b5a 436 if (UARTx == LPC_UART3)
Michael J. Spencer 2:1df0b61d3b5a 437 {
Michael J. Spencer 2:1df0b61d3b5a 438 /* Set up clock and power for UART module */
Michael J. Spencer 2:1df0b61d3b5a 439 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART3, DISABLE);
Michael J. Spencer 2:1df0b61d3b5a 440 }
Michael J. Spencer 2:1df0b61d3b5a 441 #endif
Michael J. Spencer 2:1df0b61d3b5a 442 }
Michael J. Spencer 2:1df0b61d3b5a 443
Michael J. Spencer 2:1df0b61d3b5a 444 /*****************************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 445 * @brief Fills each UART_InitStruct member with its default value:
Michael J. Spencer 2:1df0b61d3b5a 446 * - 9600 bps
Michael J. Spencer 2:1df0b61d3b5a 447 * - 8-bit data
Michael J. Spencer 2:1df0b61d3b5a 448 * - 1 Stopbit
Michael J. Spencer 2:1df0b61d3b5a 449 * - None Parity
Michael J. Spencer 2:1df0b61d3b5a 450 * @param[in] UART_InitStruct Pointer to a UART_CFG_Type structure
Michael J. Spencer 2:1df0b61d3b5a 451 * which will be initialized.
Michael J. Spencer 2:1df0b61d3b5a 452 * @return None
Michael J. Spencer 2:1df0b61d3b5a 453 *******************************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 454 void UART_ConfigStructInit(UART_CFG_Type *UART_InitStruct)
Michael J. Spencer 2:1df0b61d3b5a 455 {
Michael J. Spencer 2:1df0b61d3b5a 456 UART_InitStruct->Baud_rate = 9600;
Michael J. Spencer 2:1df0b61d3b5a 457 UART_InitStruct->Databits = UART_DATABIT_8;
Michael J. Spencer 2:1df0b61d3b5a 458 UART_InitStruct->Parity = UART_PARITY_NONE;
Michael J. Spencer 2:1df0b61d3b5a 459 UART_InitStruct->Stopbits = UART_STOPBIT_1;
Michael J. Spencer 2:1df0b61d3b5a 460 }
Michael J. Spencer 2:1df0b61d3b5a 461
Michael J. Spencer 2:1df0b61d3b5a 462 /* UART Send/Recieve functions -------------------------------------------------*/
Michael J. Spencer 2:1df0b61d3b5a 463 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 464 * @brief Transmit a single data through UART peripheral
Michael J. Spencer 2:1df0b61d3b5a 465 * @param[in] UARTx UART peripheral selected, should be:
Michael J. Spencer 2:1df0b61d3b5a 466 * - LPC_UART0: UART0 peripheral
Michael J. Spencer 2:1df0b61d3b5a 467 * - LPC_UART1: UART1 peripheral
Michael J. Spencer 2:1df0b61d3b5a 468 * - LPC_UART2: UART2 peripheral
Michael J. Spencer 2:1df0b61d3b5a 469 * - LPC_UART3: UART3 peripheral
Michael J. Spencer 2:1df0b61d3b5a 470 * @param[in] Data Data to transmit (must be 8-bit long)
Michael J. Spencer 2:1df0b61d3b5a 471 * @return None
Michael J. Spencer 2:1df0b61d3b5a 472 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 473 void UART_SendByte(LPC_UART_TypeDef* UARTx, uint8_t Data)
Michael J. Spencer 2:1df0b61d3b5a 474 {
Michael J. Spencer 2:1df0b61d3b5a 475 CHECK_PARAM(PARAM_UARTx(UARTx));
Michael J. Spencer 2:1df0b61d3b5a 476
Michael J. Spencer 2:1df0b61d3b5a 477 if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
Michael J. Spencer 2:1df0b61d3b5a 478 {
Michael J. Spencer 2:1df0b61d3b5a 479 ((LPC_UART1_TypeDef *)UARTx)->/*RBTHDLR.*/THR = Data & UART_THR_MASKBIT;
Michael J. Spencer 2:1df0b61d3b5a 480 }
Michael J. Spencer 2:1df0b61d3b5a 481 else
Michael J. Spencer 2:1df0b61d3b5a 482 {
Michael J. Spencer 2:1df0b61d3b5a 483 UARTx->/*RBTHDLR.*/THR = Data & UART_THR_MASKBIT;
Michael J. Spencer 2:1df0b61d3b5a 484 }
Michael J. Spencer 2:1df0b61d3b5a 485
Michael J. Spencer 2:1df0b61d3b5a 486 }
Michael J. Spencer 2:1df0b61d3b5a 487
Michael J. Spencer 2:1df0b61d3b5a 488
Michael J. Spencer 2:1df0b61d3b5a 489 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 490 * @brief Receive a single data from UART peripheral
Michael J. Spencer 2:1df0b61d3b5a 491 * @param[in] UARTx UART peripheral selected, should be:
Michael J. Spencer 2:1df0b61d3b5a 492 * - LPC_UART0: UART0 peripheral
Michael J. Spencer 2:1df0b61d3b5a 493 * - LPC_UART1: UART1 peripheral
Michael J. Spencer 2:1df0b61d3b5a 494 * - LPC_UART2: UART2 peripheral
Michael J. Spencer 2:1df0b61d3b5a 495 * - LPC_UART3: UART3 peripheral
Michael J. Spencer 2:1df0b61d3b5a 496 * @return Data received
Michael J. Spencer 2:1df0b61d3b5a 497 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 498 uint8_t UART_ReceiveByte(LPC_UART_TypeDef* UARTx)
Michael J. Spencer 2:1df0b61d3b5a 499 {
Michael J. Spencer 2:1df0b61d3b5a 500 CHECK_PARAM(PARAM_UARTx(UARTx));
Michael J. Spencer 2:1df0b61d3b5a 501
Michael J. Spencer 2:1df0b61d3b5a 502 if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
Michael J. Spencer 2:1df0b61d3b5a 503 {
Michael J. Spencer 2:1df0b61d3b5a 504 return (((LPC_UART1_TypeDef *)UARTx)->/*RBTHDLR.*/RBR & UART_RBR_MASKBIT);
Michael J. Spencer 2:1df0b61d3b5a 505 }
Michael J. Spencer 2:1df0b61d3b5a 506 else
Michael J. Spencer 2:1df0b61d3b5a 507 {
Michael J. Spencer 2:1df0b61d3b5a 508 return (UARTx->/*RBTHDLR.*/RBR & UART_RBR_MASKBIT);
Michael J. Spencer 2:1df0b61d3b5a 509 }
Michael J. Spencer 2:1df0b61d3b5a 510 }
Michael J. Spencer 2:1df0b61d3b5a 511
Michael J. Spencer 2:1df0b61d3b5a 512 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 513 * @brief Send a block of data via UART peripheral
Michael J. Spencer 2:1df0b61d3b5a 514 * @param[in] UARTx Selected UART peripheral used to send data, should be:
Michael J. Spencer 2:1df0b61d3b5a 515 * - LPC_UART0: UART0 peripheral
Michael J. Spencer 2:1df0b61d3b5a 516 * - LPC_UART1: UART1 peripheral
Michael J. Spencer 2:1df0b61d3b5a 517 * - LPC_UART2: UART2 peripheral
Michael J. Spencer 2:1df0b61d3b5a 518 * - LPC_UART3: UART3 peripheral
Michael J. Spencer 2:1df0b61d3b5a 519 * @param[in] txbuf Pointer to Transmit buffer
Michael J. Spencer 2:1df0b61d3b5a 520 * @param[in] buflen Length of Transmit buffer
Michael J. Spencer 2:1df0b61d3b5a 521 * @param[in] flag Flag used in UART transfer, should be
Michael J. Spencer 2:1df0b61d3b5a 522 * NONE_BLOCKING or BLOCKING
Michael J. Spencer 2:1df0b61d3b5a 523 * @return Number of bytes sent.
Michael J. Spencer 2:1df0b61d3b5a 524 *
Michael J. Spencer 2:1df0b61d3b5a 525 * Note: when using UART in BLOCKING mode, a time-out condition is used
Michael J. Spencer 2:1df0b61d3b5a 526 * via defined symbol UART_BLOCKING_TIMEOUT.
Michael J. Spencer 2:1df0b61d3b5a 527 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 528 uint32_t UART_Send(LPC_UART_TypeDef *UARTx, uint8_t *txbuf,
Michael J. Spencer 2:1df0b61d3b5a 529 uint32_t buflen, TRANSFER_BLOCK_Type flag)
Michael J. Spencer 2:1df0b61d3b5a 530 {
Michael J. Spencer 2:1df0b61d3b5a 531 uint32_t bToSend, bSent, timeOut, fifo_cnt;
Michael J. Spencer 2:1df0b61d3b5a 532 uint8_t *pChar = txbuf;
Michael J. Spencer 2:1df0b61d3b5a 533
Michael J. Spencer 2:1df0b61d3b5a 534 bToSend = buflen;
Michael J. Spencer 2:1df0b61d3b5a 535
Michael J. Spencer 2:1df0b61d3b5a 536 // blocking mode
Michael J. Spencer 2:1df0b61d3b5a 537 if (flag == BLOCKING) {
Michael J. Spencer 2:1df0b61d3b5a 538 bSent = 0;
Michael J. Spencer 2:1df0b61d3b5a 539 while (bToSend){
Michael J. Spencer 2:1df0b61d3b5a 540 timeOut = UART_BLOCKING_TIMEOUT;
Michael J. Spencer 2:1df0b61d3b5a 541 // Wait for THR empty with timeout
Michael J. Spencer 2:1df0b61d3b5a 542 while (!(UARTx->LSR & UART_LSR_THRE)) {
Michael J. Spencer 2:1df0b61d3b5a 543 if (timeOut == 0) break;
Michael J. Spencer 2:1df0b61d3b5a 544 timeOut--;
Michael J. Spencer 2:1df0b61d3b5a 545 }
Michael J. Spencer 2:1df0b61d3b5a 546 // Time out!
Michael J. Spencer 2:1df0b61d3b5a 547 if(timeOut == 0) break;
Michael J. Spencer 2:1df0b61d3b5a 548 fifo_cnt = UART_TX_FIFO_SIZE;
Michael J. Spencer 2:1df0b61d3b5a 549 while (fifo_cnt && bToSend){
Michael J. Spencer 2:1df0b61d3b5a 550 UART_SendByte(UARTx, (*pChar++));
Michael J. Spencer 2:1df0b61d3b5a 551 fifo_cnt--;
Michael J. Spencer 2:1df0b61d3b5a 552 bToSend--;
Michael J. Spencer 2:1df0b61d3b5a 553 bSent++;
Michael J. Spencer 2:1df0b61d3b5a 554 }
Michael J. Spencer 2:1df0b61d3b5a 555 }
Michael J. Spencer 2:1df0b61d3b5a 556 }
Michael J. Spencer 2:1df0b61d3b5a 557 // None blocking mode
Michael J. Spencer 2:1df0b61d3b5a 558 else {
Michael J. Spencer 2:1df0b61d3b5a 559 bSent = 0;
Michael J. Spencer 2:1df0b61d3b5a 560 while (bToSend) {
Michael J. Spencer 2:1df0b61d3b5a 561 if (!(UARTx->LSR & UART_LSR_THRE)){
Michael J. Spencer 2:1df0b61d3b5a 562 break;
Michael J. Spencer 2:1df0b61d3b5a 563 }
Michael J. Spencer 2:1df0b61d3b5a 564 fifo_cnt = UART_TX_FIFO_SIZE;
Michael J. Spencer 2:1df0b61d3b5a 565 while (fifo_cnt && bToSend) {
Michael J. Spencer 2:1df0b61d3b5a 566 UART_SendByte(UARTx, (*pChar++));
Michael J. Spencer 2:1df0b61d3b5a 567 bToSend--;
Michael J. Spencer 2:1df0b61d3b5a 568 fifo_cnt--;
Michael J. Spencer 2:1df0b61d3b5a 569 bSent++;
Michael J. Spencer 2:1df0b61d3b5a 570 }
Michael J. Spencer 2:1df0b61d3b5a 571 }
Michael J. Spencer 2:1df0b61d3b5a 572 }
Michael J. Spencer 2:1df0b61d3b5a 573 return bSent;
Michael J. Spencer 2:1df0b61d3b5a 574 }
Michael J. Spencer 2:1df0b61d3b5a 575
Michael J. Spencer 2:1df0b61d3b5a 576 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 577 * @brief Receive a block of data via UART peripheral
Michael J. Spencer 2:1df0b61d3b5a 578 * @param[in] UARTx Selected UART peripheral used to send data,
Michael J. Spencer 2:1df0b61d3b5a 579 * should be:
Michael J. Spencer 2:1df0b61d3b5a 580 * - LPC_UART0: UART0 peripheral
Michael J. Spencer 2:1df0b61d3b5a 581 * - LPC_UART1: UART1 peripheral
Michael J. Spencer 2:1df0b61d3b5a 582 * - LPC_UART2: UART2 peripheral
Michael J. Spencer 2:1df0b61d3b5a 583 * - LPC_UART3: UART3 peripheral
Michael J. Spencer 2:1df0b61d3b5a 584 * @param[out] rxbuf Pointer to Received buffer
Michael J. Spencer 2:1df0b61d3b5a 585 * @param[in] buflen Length of Received buffer
Michael J. Spencer 2:1df0b61d3b5a 586 * @param[in] flag Flag mode, should be NONE_BLOCKING or BLOCKING
Michael J. Spencer 2:1df0b61d3b5a 587
Michael J. Spencer 2:1df0b61d3b5a 588 * @return Number of bytes received
Michael J. Spencer 2:1df0b61d3b5a 589 *
Michael J. Spencer 2:1df0b61d3b5a 590 * Note: when using UART in BLOCKING mode, a time-out condition is used
Michael J. Spencer 2:1df0b61d3b5a 591 * via defined symbol UART_BLOCKING_TIMEOUT.
Michael J. Spencer 2:1df0b61d3b5a 592 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 593 uint32_t UART_Receive(LPC_UART_TypeDef *UARTx, uint8_t *rxbuf, \
Michael J. Spencer 2:1df0b61d3b5a 594 uint32_t buflen, TRANSFER_BLOCK_Type flag)
Michael J. Spencer 2:1df0b61d3b5a 595 {
Michael J. Spencer 2:1df0b61d3b5a 596 uint32_t bToRecv, bRecv, timeOut;
Michael J. Spencer 2:1df0b61d3b5a 597 uint8_t *pChar = rxbuf;
Michael J. Spencer 2:1df0b61d3b5a 598
Michael J. Spencer 2:1df0b61d3b5a 599 bToRecv = buflen;
Michael J. Spencer 2:1df0b61d3b5a 600
Michael J. Spencer 2:1df0b61d3b5a 601 // Blocking mode
Michael J. Spencer 2:1df0b61d3b5a 602 if (flag == BLOCKING) {
Michael J. Spencer 2:1df0b61d3b5a 603 bRecv = 0;
Michael J. Spencer 2:1df0b61d3b5a 604 while (bToRecv){
Michael J. Spencer 2:1df0b61d3b5a 605 timeOut = UART_BLOCKING_TIMEOUT;
Michael J. Spencer 2:1df0b61d3b5a 606 while (!(UARTx->LSR & UART_LSR_RDR)){
Michael J. Spencer 2:1df0b61d3b5a 607 if (timeOut == 0) break;
Michael J. Spencer 2:1df0b61d3b5a 608 timeOut--;
Michael J. Spencer 2:1df0b61d3b5a 609 }
Michael J. Spencer 2:1df0b61d3b5a 610 // Time out!
Michael J. Spencer 2:1df0b61d3b5a 611 if(timeOut == 0) break;
Michael J. Spencer 2:1df0b61d3b5a 612 // Get data from the buffer
Michael J. Spencer 2:1df0b61d3b5a 613 (*pChar++) = UART_ReceiveByte(UARTx);
Michael J. Spencer 2:1df0b61d3b5a 614 bToRecv--;
Michael J. Spencer 2:1df0b61d3b5a 615 bRecv++;
Michael J. Spencer 2:1df0b61d3b5a 616 }
Michael J. Spencer 2:1df0b61d3b5a 617 }
Michael J. Spencer 2:1df0b61d3b5a 618 // None blocking mode
Michael J. Spencer 2:1df0b61d3b5a 619 else {
Michael J. Spencer 2:1df0b61d3b5a 620 bRecv = 0;
Michael J. Spencer 2:1df0b61d3b5a 621 while (bToRecv) {
Michael J. Spencer 2:1df0b61d3b5a 622 if (!(UARTx->LSR & UART_LSR_RDR)) {
Michael J. Spencer 2:1df0b61d3b5a 623 break;
Michael J. Spencer 2:1df0b61d3b5a 624 } else {
Michael J. Spencer 2:1df0b61d3b5a 625 (*pChar++) = UART_ReceiveByte(UARTx);
Michael J. Spencer 2:1df0b61d3b5a 626 bRecv++;
Michael J. Spencer 2:1df0b61d3b5a 627 bToRecv--;
Michael J. Spencer 2:1df0b61d3b5a 628 }
Michael J. Spencer 2:1df0b61d3b5a 629 }
Michael J. Spencer 2:1df0b61d3b5a 630 }
Michael J. Spencer 2:1df0b61d3b5a 631 return bRecv;
Michael J. Spencer 2:1df0b61d3b5a 632 }
Michael J. Spencer 2:1df0b61d3b5a 633
Michael J. Spencer 2:1df0b61d3b5a 634 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 635 * @brief Force BREAK character on UART line, output pin UARTx TXD is
Michael J. Spencer 2:1df0b61d3b5a 636 forced to logic 0.
Michael J. Spencer 2:1df0b61d3b5a 637 * @param[in] UARTx UART peripheral selected, should be:
Michael J. Spencer 2:1df0b61d3b5a 638 * - LPC_UART0: UART0 peripheral
Michael J. Spencer 2:1df0b61d3b5a 639 * - LPC_UART1: UART1 peripheral
Michael J. Spencer 2:1df0b61d3b5a 640 * - LPC_UART2: UART2 peripheral
Michael J. Spencer 2:1df0b61d3b5a 641 * - LPC_UART3: UART3 peripheral
Michael J. Spencer 2:1df0b61d3b5a 642 * @return None
Michael J. Spencer 2:1df0b61d3b5a 643 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 644 void UART_ForceBreak(LPC_UART_TypeDef* UARTx)
Michael J. Spencer 2:1df0b61d3b5a 645 {
Michael J. Spencer 2:1df0b61d3b5a 646 CHECK_PARAM(PARAM_UARTx(UARTx));
Michael J. Spencer 2:1df0b61d3b5a 647
Michael J. Spencer 2:1df0b61d3b5a 648 if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
Michael J. Spencer 2:1df0b61d3b5a 649 {
Michael J. Spencer 2:1df0b61d3b5a 650 ((LPC_UART1_TypeDef *)UARTx)->LCR |= UART_LCR_BREAK_EN;
Michael J. Spencer 2:1df0b61d3b5a 651 }
Michael J. Spencer 2:1df0b61d3b5a 652 else
Michael J. Spencer 2:1df0b61d3b5a 653 {
Michael J. Spencer 2:1df0b61d3b5a 654 UARTx->LCR |= UART_LCR_BREAK_EN;
Michael J. Spencer 2:1df0b61d3b5a 655 }
Michael J. Spencer 2:1df0b61d3b5a 656 }
Michael J. Spencer 2:1df0b61d3b5a 657
Michael J. Spencer 2:1df0b61d3b5a 658
Michael J. Spencer 2:1df0b61d3b5a 659 /********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 660 * @brief Enable or disable specified UART interrupt.
Michael J. Spencer 2:1df0b61d3b5a 661 * @param[in] UARTx UART peripheral selected, should be
Michael J. Spencer 2:1df0b61d3b5a 662 * - LPC_UART0: UART0 peripheral
Michael J. Spencer 2:1df0b61d3b5a 663 * - LPC_UART1: UART1 peripheral
Michael J. Spencer 2:1df0b61d3b5a 664 * - LPC_UART2: UART2 peripheral
Michael J. Spencer 2:1df0b61d3b5a 665 * - LPC_UART3: UART3 peripheral
Michael J. Spencer 2:1df0b61d3b5a 666 * @param[in] UARTIntCfg Specifies the interrupt flag,
Michael J. Spencer 2:1df0b61d3b5a 667 * should be one of the following:
Michael J. Spencer 2:1df0b61d3b5a 668 - UART_INTCFG_RBR : RBR Interrupt enable
Michael J. Spencer 2:1df0b61d3b5a 669 - UART_INTCFG_THRE : THR Interrupt enable
Michael J. Spencer 2:1df0b61d3b5a 670 - UART_INTCFG_RLS : RX line status interrupt enable
Michael J. Spencer 2:1df0b61d3b5a 671 - UART1_INTCFG_MS : Modem status interrupt enable (UART1 only)
Michael J. Spencer 2:1df0b61d3b5a 672 - UART1_INTCFG_CTS : CTS1 signal transition interrupt enable (UART1 only)
Michael J. Spencer 2:1df0b61d3b5a 673 - UART_INTCFG_ABEO : Enables the end of auto-baud interrupt
Michael J. Spencer 2:1df0b61d3b5a 674 - UART_INTCFG_ABTO : Enables the auto-baud time-out interrupt
Michael J. Spencer 2:1df0b61d3b5a 675 * @param[in] NewState New state of specified UART interrupt type,
Michael J. Spencer 2:1df0b61d3b5a 676 * should be:
Michael J. Spencer 2:1df0b61d3b5a 677 * - ENALBE: Enable this UART interrupt type.
Michael J. Spencer 2:1df0b61d3b5a 678 * - DISALBE: Disable this UART interrupt type.
Michael J. Spencer 2:1df0b61d3b5a 679 * @return None
Michael J. Spencer 2:1df0b61d3b5a 680 *********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 681 void UART_IntConfig(LPC_UART_TypeDef *UARTx, UART_INT_Type UARTIntCfg, FunctionalState NewState)
Michael J. Spencer 2:1df0b61d3b5a 682 {
Michael J. Spencer 2:1df0b61d3b5a 683 uint32_t tmp = 0;
Michael J. Spencer 2:1df0b61d3b5a 684
Michael J. Spencer 2:1df0b61d3b5a 685 CHECK_PARAM(PARAM_UARTx(UARTx));
Michael J. Spencer 2:1df0b61d3b5a 686 CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
Michael J. Spencer 2:1df0b61d3b5a 687
Michael J. Spencer 2:1df0b61d3b5a 688 switch(UARTIntCfg){
Michael J. Spencer 2:1df0b61d3b5a 689 case UART_INTCFG_RBR:
Michael J. Spencer 2:1df0b61d3b5a 690 tmp = UART_IER_RBRINT_EN;
Michael J. Spencer 2:1df0b61d3b5a 691 break;
Michael J. Spencer 2:1df0b61d3b5a 692 case UART_INTCFG_THRE:
Michael J. Spencer 2:1df0b61d3b5a 693 tmp = UART_IER_THREINT_EN;
Michael J. Spencer 2:1df0b61d3b5a 694 break;
Michael J. Spencer 2:1df0b61d3b5a 695 case UART_INTCFG_RLS:
Michael J. Spencer 2:1df0b61d3b5a 696 tmp = UART_IER_RLSINT_EN;
Michael J. Spencer 2:1df0b61d3b5a 697 break;
Michael J. Spencer 2:1df0b61d3b5a 698 case UART1_INTCFG_MS:
Michael J. Spencer 2:1df0b61d3b5a 699 tmp = UART1_IER_MSINT_EN;
Michael J. Spencer 2:1df0b61d3b5a 700 break;
Michael J. Spencer 2:1df0b61d3b5a 701 case UART1_INTCFG_CTS:
Michael J. Spencer 2:1df0b61d3b5a 702 tmp = UART1_IER_CTSINT_EN;
Michael J. Spencer 2:1df0b61d3b5a 703 break;
Michael J. Spencer 2:1df0b61d3b5a 704 case UART_INTCFG_ABEO:
Michael J. Spencer 2:1df0b61d3b5a 705 tmp = UART_IER_ABEOINT_EN;
Michael J. Spencer 2:1df0b61d3b5a 706 break;
Michael J. Spencer 2:1df0b61d3b5a 707 case UART_INTCFG_ABTO:
Michael J. Spencer 2:1df0b61d3b5a 708 tmp = UART_IER_ABTOINT_EN;
Michael J. Spencer 2:1df0b61d3b5a 709 break;
Michael J. Spencer 2:1df0b61d3b5a 710 }
Michael J. Spencer 2:1df0b61d3b5a 711
Michael J. Spencer 2:1df0b61d3b5a 712 if ((LPC_UART1_TypeDef *) UARTx == LPC_UART1)
Michael J. Spencer 2:1df0b61d3b5a 713 {
Michael J. Spencer 2:1df0b61d3b5a 714 CHECK_PARAM((PARAM_UART_INTCFG(UARTIntCfg)) || (PARAM_UART1_INTCFG(UARTIntCfg)));
Michael J. Spencer 2:1df0b61d3b5a 715 }
Michael J. Spencer 2:1df0b61d3b5a 716 else
Michael J. Spencer 2:1df0b61d3b5a 717 {
Michael J. Spencer 2:1df0b61d3b5a 718 CHECK_PARAM(PARAM_UART_INTCFG(UARTIntCfg));
Michael J. Spencer 2:1df0b61d3b5a 719 }
Michael J. Spencer 2:1df0b61d3b5a 720
Michael J. Spencer 2:1df0b61d3b5a 721 if (NewState == ENABLE)
Michael J. Spencer 2:1df0b61d3b5a 722 {
Michael J. Spencer 2:1df0b61d3b5a 723 if ((LPC_UART1_TypeDef *) UARTx == LPC_UART1)
Michael J. Spencer 2:1df0b61d3b5a 724 {
Michael J. Spencer 2:1df0b61d3b5a 725 ((LPC_UART1_TypeDef *)UARTx)->/*DLIER.*/IER |= tmp;
Michael J. Spencer 2:1df0b61d3b5a 726 }
Michael J. Spencer 2:1df0b61d3b5a 727 else
Michael J. Spencer 2:1df0b61d3b5a 728 {
Michael J. Spencer 2:1df0b61d3b5a 729 UARTx->/*DLIER.*/IER |= tmp;
Michael J. Spencer 2:1df0b61d3b5a 730 }
Michael J. Spencer 2:1df0b61d3b5a 731 }
Michael J. Spencer 2:1df0b61d3b5a 732 else
Michael J. Spencer 2:1df0b61d3b5a 733 {
Michael J. Spencer 2:1df0b61d3b5a 734 if ((LPC_UART1_TypeDef *) UARTx == LPC_UART1)
Michael J. Spencer 2:1df0b61d3b5a 735 {
Michael J. Spencer 2:1df0b61d3b5a 736 ((LPC_UART1_TypeDef *)UARTx)->/*DLIER.*/IER &= (~tmp) & UART1_IER_BITMASK;
Michael J. Spencer 2:1df0b61d3b5a 737 }
Michael J. Spencer 2:1df0b61d3b5a 738 else
Michael J. Spencer 2:1df0b61d3b5a 739 {
Michael J. Spencer 2:1df0b61d3b5a 740 UARTx->/*DLIER.*/IER &= (~tmp) & UART_IER_BITMASK;
Michael J. Spencer 2:1df0b61d3b5a 741 }
Michael J. Spencer 2:1df0b61d3b5a 742 }
Michael J. Spencer 2:1df0b61d3b5a 743 }
Michael J. Spencer 2:1df0b61d3b5a 744
Michael J. Spencer 2:1df0b61d3b5a 745
Michael J. Spencer 2:1df0b61d3b5a 746 /********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 747 * @brief Get current value of Line Status register in UART peripheral.
Michael J. Spencer 2:1df0b61d3b5a 748 * @param[in] UARTx UART peripheral selected, should be:
Michael J. Spencer 2:1df0b61d3b5a 749 * - LPC_UART0: UART0 peripheral
Michael J. Spencer 2:1df0b61d3b5a 750 * - LPC_UART1: UART1 peripheral
Michael J. Spencer 2:1df0b61d3b5a 751 * - LPC_UART2: UART2 peripheral
Michael J. Spencer 2:1df0b61d3b5a 752 * - LPC_UART3: UART3 peripheral
Michael J. Spencer 2:1df0b61d3b5a 753 * @return Current value of Line Status register in UART peripheral.
Michael J. Spencer 2:1df0b61d3b5a 754 * Note: The return value of this function must be ANDed with each member in
Michael J. Spencer 2:1df0b61d3b5a 755 * UART_LS_Type enumeration to determine current flag status
Michael J. Spencer 2:1df0b61d3b5a 756 * corresponding to each Line status type. Because some flags in
Michael J. Spencer 2:1df0b61d3b5a 757 * Line Status register will be cleared after reading, the next reading
Michael J. Spencer 2:1df0b61d3b5a 758 * Line Status register could not be correct. So this function used to
Michael J. Spencer 2:1df0b61d3b5a 759 * read Line status register in one time only, then the return value
Michael J. Spencer 2:1df0b61d3b5a 760 * used to check all flags.
Michael J. Spencer 2:1df0b61d3b5a 761 *********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 762 uint8_t UART_GetLineStatus(LPC_UART_TypeDef* UARTx)
Michael J. Spencer 2:1df0b61d3b5a 763 {
Michael J. Spencer 2:1df0b61d3b5a 764 CHECK_PARAM(PARAM_UARTx(UARTx));
Michael J. Spencer 2:1df0b61d3b5a 765
Michael J. Spencer 2:1df0b61d3b5a 766 if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
Michael J. Spencer 2:1df0b61d3b5a 767 {
Michael J. Spencer 2:1df0b61d3b5a 768 return ((((LPC_UART1_TypeDef *)LPC_UART1)->LSR) & UART_LSR_BITMASK);
Michael J. Spencer 2:1df0b61d3b5a 769 }
Michael J. Spencer 2:1df0b61d3b5a 770 else
Michael J. Spencer 2:1df0b61d3b5a 771 {
Michael J. Spencer 2:1df0b61d3b5a 772 return ((UARTx->LSR) & UART_LSR_BITMASK);
Michael J. Spencer 2:1df0b61d3b5a 773 }
Michael J. Spencer 2:1df0b61d3b5a 774 }
Michael J. Spencer 2:1df0b61d3b5a 775
Michael J. Spencer 2:1df0b61d3b5a 776 /********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 777 * @brief Get Interrupt Identification value
Michael J. Spencer 2:1df0b61d3b5a 778 * @param[in] UARTx UART peripheral selected, should be:
Michael J. Spencer 2:1df0b61d3b5a 779 * - LPC_UART0: UART0 peripheral
Michael J. Spencer 2:1df0b61d3b5a 780 * - LPC_UART1: UART1 peripheral
Michael J. Spencer 2:1df0b61d3b5a 781 * - LPC_UART2: UART2 peripheral
Michael J. Spencer 2:1df0b61d3b5a 782 * - LPC_UART3: UART3 peripheral
Michael J. Spencer 2:1df0b61d3b5a 783 * @return Current value of UART UIIR register in UART peripheral.
Michael J. Spencer 2:1df0b61d3b5a 784 *********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 785 uint32_t UART_GetIntId(LPC_UART_TypeDef* UARTx)
Michael J. Spencer 2:1df0b61d3b5a 786 {
Michael J. Spencer 2:1df0b61d3b5a 787 CHECK_PARAM(PARAM_UARTx(UARTx));
Michael J. Spencer 2:1df0b61d3b5a 788 return (UARTx->IIR & 0x03CF);
Michael J. Spencer 2:1df0b61d3b5a 789 }
Michael J. Spencer 2:1df0b61d3b5a 790
Michael J. Spencer 2:1df0b61d3b5a 791 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 792 * @brief Check whether if UART is busy or not
Michael J. Spencer 2:1df0b61d3b5a 793 * @param[in] UARTx UART peripheral selected, should be:
Michael J. Spencer 2:1df0b61d3b5a 794 * - LPC_UART0: UART0 peripheral
Michael J. Spencer 2:1df0b61d3b5a 795 * - LPC_UART1: UART1 peripheral
Michael J. Spencer 2:1df0b61d3b5a 796 * - LPC_UART2: UART2 peripheral
Michael J. Spencer 2:1df0b61d3b5a 797 * - LPC_UART3: UART3 peripheral
Michael J. Spencer 2:1df0b61d3b5a 798 * @return RESET if UART is not busy, otherwise return SET.
Michael J. Spencer 2:1df0b61d3b5a 799 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 800 FlagStatus UART_CheckBusy(LPC_UART_TypeDef *UARTx)
Michael J. Spencer 2:1df0b61d3b5a 801 {
Michael J. Spencer 2:1df0b61d3b5a 802 if (UARTx->LSR & UART_LSR_TEMT){
Michael J. Spencer 2:1df0b61d3b5a 803 return RESET;
Michael J. Spencer 2:1df0b61d3b5a 804 } else {
Michael J. Spencer 2:1df0b61d3b5a 805 return SET;
Michael J. Spencer 2:1df0b61d3b5a 806 }
Michael J. Spencer 2:1df0b61d3b5a 807 }
Michael J. Spencer 2:1df0b61d3b5a 808
Michael J. Spencer 2:1df0b61d3b5a 809
Michael J. Spencer 2:1df0b61d3b5a 810 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 811 * @brief Configure FIFO function on selected UART peripheral
Michael J. Spencer 2:1df0b61d3b5a 812 * @param[in] UARTx UART peripheral selected, should be:
Michael J. Spencer 2:1df0b61d3b5a 813 * - LPC_UART0: UART0 peripheral
Michael J. Spencer 2:1df0b61d3b5a 814 * - LPC_UART1: UART1 peripheral
Michael J. Spencer 2:1df0b61d3b5a 815 * - LPC_UART2: UART2 peripheral
Michael J. Spencer 2:1df0b61d3b5a 816 * - LPC_UART3: UART3 peripheral
Michael J. Spencer 2:1df0b61d3b5a 817 * @param[in] FIFOCfg Pointer to a UART_FIFO_CFG_Type Structure that
Michael J. Spencer 2:1df0b61d3b5a 818 * contains specified information about FIFO configuration
Michael J. Spencer 2:1df0b61d3b5a 819 * @return none
Michael J. Spencer 2:1df0b61d3b5a 820 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 821 void UART_FIFOConfig(LPC_UART_TypeDef *UARTx, UART_FIFO_CFG_Type *FIFOCfg)
Michael J. Spencer 2:1df0b61d3b5a 822 {
Michael J. Spencer 2:1df0b61d3b5a 823 uint8_t tmp = 0;
Michael J. Spencer 2:1df0b61d3b5a 824
Michael J. Spencer 2:1df0b61d3b5a 825 CHECK_PARAM(PARAM_UARTx(UARTx));
Michael J. Spencer 2:1df0b61d3b5a 826 CHECK_PARAM(PARAM_UART_FIFO_LEVEL(FIFOCfg->FIFO_Level));
Michael J. Spencer 2:1df0b61d3b5a 827 CHECK_PARAM(PARAM_FUNCTIONALSTATE(FIFOCfg->FIFO_DMAMode));
Michael J. Spencer 2:1df0b61d3b5a 828 CHECK_PARAM(PARAM_FUNCTIONALSTATE(FIFOCfg->FIFO_ResetRxBuf));
Michael J. Spencer 2:1df0b61d3b5a 829 CHECK_PARAM(PARAM_FUNCTIONALSTATE(FIFOCfg->FIFO_ResetTxBuf));
Michael J. Spencer 2:1df0b61d3b5a 830
Michael J. Spencer 2:1df0b61d3b5a 831 tmp |= UART_FCR_FIFO_EN;
Michael J. Spencer 2:1df0b61d3b5a 832 switch (FIFOCfg->FIFO_Level){
Michael J. Spencer 2:1df0b61d3b5a 833 case UART_FIFO_TRGLEV0:
Michael J. Spencer 2:1df0b61d3b5a 834 tmp |= UART_FCR_TRG_LEV0;
Michael J. Spencer 2:1df0b61d3b5a 835 break;
Michael J. Spencer 2:1df0b61d3b5a 836 case UART_FIFO_TRGLEV1:
Michael J. Spencer 2:1df0b61d3b5a 837 tmp |= UART_FCR_TRG_LEV1;
Michael J. Spencer 2:1df0b61d3b5a 838 break;
Michael J. Spencer 2:1df0b61d3b5a 839 case UART_FIFO_TRGLEV2:
Michael J. Spencer 2:1df0b61d3b5a 840 tmp |= UART_FCR_TRG_LEV2;
Michael J. Spencer 2:1df0b61d3b5a 841 break;
Michael J. Spencer 2:1df0b61d3b5a 842 case UART_FIFO_TRGLEV3:
Michael J. Spencer 2:1df0b61d3b5a 843 default:
Michael J. Spencer 2:1df0b61d3b5a 844 tmp |= UART_FCR_TRG_LEV3;
Michael J. Spencer 2:1df0b61d3b5a 845 break;
Michael J. Spencer 2:1df0b61d3b5a 846 }
Michael J. Spencer 2:1df0b61d3b5a 847
Michael J. Spencer 2:1df0b61d3b5a 848 if (FIFOCfg->FIFO_ResetTxBuf == ENABLE)
Michael J. Spencer 2:1df0b61d3b5a 849 {
Michael J. Spencer 2:1df0b61d3b5a 850 tmp |= UART_FCR_TX_RS;
Michael J. Spencer 2:1df0b61d3b5a 851 }
Michael J. Spencer 2:1df0b61d3b5a 852 if (FIFOCfg->FIFO_ResetRxBuf == ENABLE)
Michael J. Spencer 2:1df0b61d3b5a 853 {
Michael J. Spencer 2:1df0b61d3b5a 854 tmp |= UART_FCR_RX_RS;
Michael J. Spencer 2:1df0b61d3b5a 855 }
Michael J. Spencer 2:1df0b61d3b5a 856 if (FIFOCfg->FIFO_DMAMode == ENABLE)
Michael J. Spencer 2:1df0b61d3b5a 857 {
Michael J. Spencer 2:1df0b61d3b5a 858 tmp |= UART_FCR_DMAMODE_SEL;
Michael J. Spencer 2:1df0b61d3b5a 859 }
Michael J. Spencer 2:1df0b61d3b5a 860
Michael J. Spencer 2:1df0b61d3b5a 861
Michael J. Spencer 2:1df0b61d3b5a 862 //write to FIFO control register
Michael J. Spencer 2:1df0b61d3b5a 863 if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
Michael J. Spencer 2:1df0b61d3b5a 864 {
Michael J. Spencer 2:1df0b61d3b5a 865 ((LPC_UART1_TypeDef *)UARTx)->/*IIFCR.*/FCR = tmp & UART_FCR_BITMASK;
Michael J. Spencer 2:1df0b61d3b5a 866 }
Michael J. Spencer 2:1df0b61d3b5a 867 else
Michael J. Spencer 2:1df0b61d3b5a 868 {
Michael J. Spencer 2:1df0b61d3b5a 869 UARTx->/*IIFCR.*/FCR = tmp & UART_FCR_BITMASK;
Michael J. Spencer 2:1df0b61d3b5a 870 }
Michael J. Spencer 2:1df0b61d3b5a 871 }
Michael J. Spencer 2:1df0b61d3b5a 872
Michael J. Spencer 2:1df0b61d3b5a 873 /*****************************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 874 * @brief Fills each UART_FIFOInitStruct member with its default value:
Michael J. Spencer 2:1df0b61d3b5a 875 * - FIFO_DMAMode = DISABLE
Michael J. Spencer 2:1df0b61d3b5a 876 * - FIFO_Level = UART_FIFO_TRGLEV0
Michael J. Spencer 2:1df0b61d3b5a 877 * - FIFO_ResetRxBuf = ENABLE
Michael J. Spencer 2:1df0b61d3b5a 878 * - FIFO_ResetTxBuf = ENABLE
Michael J. Spencer 2:1df0b61d3b5a 879 * - FIFO_State = ENABLE
Michael J. Spencer 2:1df0b61d3b5a 880
Michael J. Spencer 2:1df0b61d3b5a 881 * @param[in] UART_FIFOInitStruct Pointer to a UART_FIFO_CFG_Type structure
Michael J. Spencer 2:1df0b61d3b5a 882 * which will be initialized.
Michael J. Spencer 2:1df0b61d3b5a 883 * @return None
Michael J. Spencer 2:1df0b61d3b5a 884 *******************************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 885 void UART_FIFOConfigStructInit(UART_FIFO_CFG_Type *UART_FIFOInitStruct)
Michael J. Spencer 2:1df0b61d3b5a 886 {
Michael J. Spencer 2:1df0b61d3b5a 887 UART_FIFOInitStruct->FIFO_DMAMode = DISABLE;
Michael J. Spencer 2:1df0b61d3b5a 888 UART_FIFOInitStruct->FIFO_Level = UART_FIFO_TRGLEV0;
Michael J. Spencer 2:1df0b61d3b5a 889 UART_FIFOInitStruct->FIFO_ResetRxBuf = ENABLE;
Michael J. Spencer 2:1df0b61d3b5a 890 UART_FIFOInitStruct->FIFO_ResetTxBuf = ENABLE;
Michael J. Spencer 2:1df0b61d3b5a 891 }
Michael J. Spencer 2:1df0b61d3b5a 892
Michael J. Spencer 2:1df0b61d3b5a 893
Michael J. Spencer 2:1df0b61d3b5a 894 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 895 * @brief Start/Stop Auto Baudrate activity
Michael J. Spencer 2:1df0b61d3b5a 896 * @param[in] UARTx UART peripheral selected, should be
Michael J. Spencer 2:1df0b61d3b5a 897 * - LPC_UART0: UART0 peripheral
Michael J. Spencer 2:1df0b61d3b5a 898 * - LPC_UART1: UART1 peripheral
Michael J. Spencer 2:1df0b61d3b5a 899 * - LPC_UART2: UART2 peripheral
Michael J. Spencer 2:1df0b61d3b5a 900 * - LPC_UART3: UART3 peripheral
Michael J. Spencer 2:1df0b61d3b5a 901 * @param[in] ABConfigStruct A pointer to UART_AB_CFG_Type structure that
Michael J. Spencer 2:1df0b61d3b5a 902 * contains specified information about UART
Michael J. Spencer 2:1df0b61d3b5a 903 * auto baudrate configuration
Michael J. Spencer 2:1df0b61d3b5a 904 * @param[in] NewState New State of Auto baudrate activity, should be:
Michael J. Spencer 2:1df0b61d3b5a 905 * - ENABLE: Start this activity
Michael J. Spencer 2:1df0b61d3b5a 906 * - DISABLE: Stop this activity
Michael J. Spencer 2:1df0b61d3b5a 907 * Note: Auto-baudrate mode enable bit will be cleared once this mode
Michael J. Spencer 2:1df0b61d3b5a 908 * completed.
Michael J. Spencer 2:1df0b61d3b5a 909 * @return none
Michael J. Spencer 2:1df0b61d3b5a 910 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 911 void UART_ABCmd(LPC_UART_TypeDef *UARTx, UART_AB_CFG_Type *ABConfigStruct, \
Michael J. Spencer 2:1df0b61d3b5a 912 FunctionalState NewState)
Michael J. Spencer 2:1df0b61d3b5a 913 {
Michael J. Spencer 2:1df0b61d3b5a 914 uint32_t tmp;
Michael J. Spencer 2:1df0b61d3b5a 915
Michael J. Spencer 2:1df0b61d3b5a 916 CHECK_PARAM(PARAM_UARTx(UARTx));
Michael J. Spencer 2:1df0b61d3b5a 917 CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
Michael J. Spencer 2:1df0b61d3b5a 918
Michael J. Spencer 2:1df0b61d3b5a 919 tmp = 0;
Michael J. Spencer 2:1df0b61d3b5a 920 if (NewState == ENABLE) {
Michael J. Spencer 2:1df0b61d3b5a 921 if (ABConfigStruct->ABMode == UART_AUTOBAUD_MODE1){
Michael J. Spencer 2:1df0b61d3b5a 922 tmp |= UART_ACR_MODE;
Michael J. Spencer 2:1df0b61d3b5a 923 }
Michael J. Spencer 2:1df0b61d3b5a 924 if (ABConfigStruct->AutoRestart == ENABLE){
Michael J. Spencer 2:1df0b61d3b5a 925 tmp |= UART_ACR_AUTO_RESTART;
Michael J. Spencer 2:1df0b61d3b5a 926 }
Michael J. Spencer 2:1df0b61d3b5a 927 }
Michael J. Spencer 2:1df0b61d3b5a 928
Michael J. Spencer 2:1df0b61d3b5a 929 if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
Michael J. Spencer 2:1df0b61d3b5a 930 {
Michael J. Spencer 2:1df0b61d3b5a 931 if (NewState == ENABLE)
Michael J. Spencer 2:1df0b61d3b5a 932 {
Michael J. Spencer 2:1df0b61d3b5a 933 // Clear DLL and DLM value
Michael J. Spencer 2:1df0b61d3b5a 934 ((LPC_UART1_TypeDef *)UARTx)->LCR |= UART_LCR_DLAB_EN;
Michael J. Spencer 2:1df0b61d3b5a 935 ((LPC_UART1_TypeDef *)UARTx)->DLL = 0;
Michael J. Spencer 2:1df0b61d3b5a 936 ((LPC_UART1_TypeDef *)UARTx)->DLM = 0;
Michael J. Spencer 2:1df0b61d3b5a 937 ((LPC_UART1_TypeDef *)UARTx)->LCR &= ~UART_LCR_DLAB_EN;
Michael J. Spencer 2:1df0b61d3b5a 938 // FDR value must be reset to default value
Michael J. Spencer 2:1df0b61d3b5a 939 ((LPC_UART1_TypeDef *)UARTx)->FDR = 0x10;
Michael J. Spencer 2:1df0b61d3b5a 940 ((LPC_UART1_TypeDef *)UARTx)->ACR = UART_ACR_START | tmp;
Michael J. Spencer 2:1df0b61d3b5a 941 }
Michael J. Spencer 2:1df0b61d3b5a 942 else
Michael J. Spencer 2:1df0b61d3b5a 943 {
Michael J. Spencer 2:1df0b61d3b5a 944 ((LPC_UART1_TypeDef *)UARTx)->ACR = 0;
Michael J. Spencer 2:1df0b61d3b5a 945 }
Michael J. Spencer 2:1df0b61d3b5a 946 }
Michael J. Spencer 2:1df0b61d3b5a 947 else
Michael J. Spencer 2:1df0b61d3b5a 948 {
Michael J. Spencer 2:1df0b61d3b5a 949 if (NewState == ENABLE)
Michael J. Spencer 2:1df0b61d3b5a 950 {
Michael J. Spencer 2:1df0b61d3b5a 951 // Clear DLL and DLM value
Michael J. Spencer 2:1df0b61d3b5a 952 UARTx->LCR |= UART_LCR_DLAB_EN;
Michael J. Spencer 2:1df0b61d3b5a 953 UARTx->DLL = 0;
Michael J. Spencer 2:1df0b61d3b5a 954 UARTx->DLM = 0;
Michael J. Spencer 2:1df0b61d3b5a 955 UARTx->LCR &= ~UART_LCR_DLAB_EN;
Michael J. Spencer 2:1df0b61d3b5a 956 // FDR value must be reset to default value
Michael J. Spencer 2:1df0b61d3b5a 957 UARTx->FDR = 0x10;
Michael J. Spencer 2:1df0b61d3b5a 958 UARTx->ACR = UART_ACR_START | tmp;
Michael J. Spencer 2:1df0b61d3b5a 959 }
Michael J. Spencer 2:1df0b61d3b5a 960 else
Michael J. Spencer 2:1df0b61d3b5a 961 {
Michael J. Spencer 2:1df0b61d3b5a 962 UARTx->ACR = 0;
Michael J. Spencer 2:1df0b61d3b5a 963 }
Michael J. Spencer 2:1df0b61d3b5a 964 }
Michael J. Spencer 2:1df0b61d3b5a 965 }
Michael J. Spencer 2:1df0b61d3b5a 966
Michael J. Spencer 2:1df0b61d3b5a 967 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 968 * @brief Clear Autobaud Interrupt Pending
Michael J. Spencer 2:1df0b61d3b5a 969 * @param[in] UARTx UART peripheral selected, should be
Michael J. Spencer 2:1df0b61d3b5a 970 * - LPC_UART0: UART0 peripheral
Michael J. Spencer 2:1df0b61d3b5a 971 * - LPC_UART1: UART1 peripheral
Michael J. Spencer 2:1df0b61d3b5a 972 * - LPC_UART2: UART2 peripheral
Michael J. Spencer 2:1df0b61d3b5a 973 * - LPC_UART3: UART3 peripheral
Michael J. Spencer 2:1df0b61d3b5a 974 * @param[in] ABIntType type of auto-baud interrupt, should be:
Michael J. Spencer 2:1df0b61d3b5a 975 * - UART_AUTOBAUD_INTSTAT_ABEO: End of Auto-baud interrupt
Michael J. Spencer 2:1df0b61d3b5a 976 * - UART_AUTOBAUD_INTSTAT_ABTO: Auto-baud time out interrupt
Michael J. Spencer 2:1df0b61d3b5a 977 * @return none
Michael J. Spencer 2:1df0b61d3b5a 978 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 979 void UART_ABClearIntPending(LPC_UART_TypeDef *UARTx, UART_ABEO_Type ABIntType)
Michael J. Spencer 2:1df0b61d3b5a 980 {
Michael J. Spencer 2:1df0b61d3b5a 981 CHECK_PARAM(PARAM_UARTx(UARTx));
Michael J. Spencer 2:1df0b61d3b5a 982 if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
Michael J. Spencer 2:1df0b61d3b5a 983 {
Michael J. Spencer 2:1df0b61d3b5a 984 UARTx->ACR |= ABIntType;
Michael J. Spencer 2:1df0b61d3b5a 985 }
Michael J. Spencer 2:1df0b61d3b5a 986 else
Michael J. Spencer 2:1df0b61d3b5a 987 UARTx->ACR |= ABIntType;
Michael J. Spencer 2:1df0b61d3b5a 988 }
Michael J. Spencer 2:1df0b61d3b5a 989
Michael J. Spencer 2:1df0b61d3b5a 990 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 991 * @brief Enable/Disable transmission on UART TxD pin
Michael J. Spencer 2:1df0b61d3b5a 992 * @param[in] UARTx UART peripheral selected, should be:
Michael J. Spencer 2:1df0b61d3b5a 993 * - LPC_UART0: UART0 peripheral
Michael J. Spencer 2:1df0b61d3b5a 994 * - LPC_UART1: UART1 peripheral
Michael J. Spencer 2:1df0b61d3b5a 995 * - LPC_UART2: UART2 peripheral
Michael J. Spencer 2:1df0b61d3b5a 996 * - LPC_UART3: UART3 peripheral
Michael J. Spencer 2:1df0b61d3b5a 997 * @param[in] NewState New State of Tx transmission function, should be:
Michael J. Spencer 2:1df0b61d3b5a 998 * - ENABLE: Enable this function
Michael J. Spencer 2:1df0b61d3b5a 999 - DISABLE: Disable this function
Michael J. Spencer 2:1df0b61d3b5a 1000 * @return none
Michael J. Spencer 2:1df0b61d3b5a 1001 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 1002 void UART_TxCmd(LPC_UART_TypeDef *UARTx, FunctionalState NewState)
Michael J. Spencer 2:1df0b61d3b5a 1003 {
Michael J. Spencer 2:1df0b61d3b5a 1004 CHECK_PARAM(PARAM_UARTx(UARTx));
Michael J. Spencer 2:1df0b61d3b5a 1005 CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
Michael J. Spencer 2:1df0b61d3b5a 1006
Michael J. Spencer 2:1df0b61d3b5a 1007 if (NewState == ENABLE)
Michael J. Spencer 2:1df0b61d3b5a 1008 {
Michael J. Spencer 2:1df0b61d3b5a 1009 if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
Michael J. Spencer 2:1df0b61d3b5a 1010 {
Michael J. Spencer 2:1df0b61d3b5a 1011 ((LPC_UART1_TypeDef *)UARTx)->TER |= UART_TER_TXEN;
Michael J. Spencer 2:1df0b61d3b5a 1012 }
Michael J. Spencer 2:1df0b61d3b5a 1013 else
Michael J. Spencer 2:1df0b61d3b5a 1014 {
Michael J. Spencer 2:1df0b61d3b5a 1015 UARTx->TER |= UART_TER_TXEN;
Michael J. Spencer 2:1df0b61d3b5a 1016 }
Michael J. Spencer 2:1df0b61d3b5a 1017 }
Michael J. Spencer 2:1df0b61d3b5a 1018 else
Michael J. Spencer 2:1df0b61d3b5a 1019 {
Michael J. Spencer 2:1df0b61d3b5a 1020 if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
Michael J. Spencer 2:1df0b61d3b5a 1021 {
Michael J. Spencer 2:1df0b61d3b5a 1022 ((LPC_UART1_TypeDef *)UARTx)->TER &= (~UART_TER_TXEN) & UART_TER_BITMASK;
Michael J. Spencer 2:1df0b61d3b5a 1023 }
Michael J. Spencer 2:1df0b61d3b5a 1024 else
Michael J. Spencer 2:1df0b61d3b5a 1025 {
Michael J. Spencer 2:1df0b61d3b5a 1026 UARTx->TER &= (~UART_TER_TXEN) & UART_TER_BITMASK;
Michael J. Spencer 2:1df0b61d3b5a 1027 }
Michael J. Spencer 2:1df0b61d3b5a 1028 }
Michael J. Spencer 2:1df0b61d3b5a 1029 }
Michael J. Spencer 2:1df0b61d3b5a 1030
Michael J. Spencer 2:1df0b61d3b5a 1031 /* UART IrDA functions ---------------------------------------------------*/
Michael J. Spencer 2:1df0b61d3b5a 1032
Michael J. Spencer 2:1df0b61d3b5a 1033 #ifdef _UART3
Michael J. Spencer 2:1df0b61d3b5a 1034
Michael J. Spencer 2:1df0b61d3b5a 1035 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 1036 * @brief Enable or disable inverting serial input function of IrDA
Michael J. Spencer 2:1df0b61d3b5a 1037 * on UART peripheral.
Michael J. Spencer 2:1df0b61d3b5a 1038 * @param[in] UARTx UART peripheral selected, should be LPC_UART3 (only)
Michael J. Spencer 2:1df0b61d3b5a 1039 * @param[in] NewState New state of inverting serial input, should be:
Michael J. Spencer 2:1df0b61d3b5a 1040 * - ENABLE: Enable this function.
Michael J. Spencer 2:1df0b61d3b5a 1041 * - DISABLE: Disable this function.
Michael J. Spencer 2:1df0b61d3b5a 1042 * @return none
Michael J. Spencer 2:1df0b61d3b5a 1043 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 1044 void UART_IrDAInvtInputCmd(LPC_UART_TypeDef* UARTx, FunctionalState NewState)
Michael J. Spencer 2:1df0b61d3b5a 1045 {
Michael J. Spencer 2:1df0b61d3b5a 1046 CHECK_PARAM(PARAM_UART_IrDA(UARTx));
Michael J. Spencer 2:1df0b61d3b5a 1047 CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
Michael J. Spencer 2:1df0b61d3b5a 1048
Michael J. Spencer 2:1df0b61d3b5a 1049 if (NewState == ENABLE)
Michael J. Spencer 2:1df0b61d3b5a 1050 {
Michael J. Spencer 2:1df0b61d3b5a 1051 UARTx->ICR |= UART_ICR_IRDAINV;
Michael J. Spencer 2:1df0b61d3b5a 1052 }
Michael J. Spencer 2:1df0b61d3b5a 1053 else if (NewState == DISABLE)
Michael J. Spencer 2:1df0b61d3b5a 1054 {
Michael J. Spencer 2:1df0b61d3b5a 1055 UARTx->ICR &= (~UART_ICR_IRDAINV) & UART_ICR_BITMASK;
Michael J. Spencer 2:1df0b61d3b5a 1056 }
Michael J. Spencer 2:1df0b61d3b5a 1057 }
Michael J. Spencer 2:1df0b61d3b5a 1058
Michael J. Spencer 2:1df0b61d3b5a 1059
Michael J. Spencer 2:1df0b61d3b5a 1060 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 1061 * @brief Enable or disable IrDA function on UART peripheral.
Michael J. Spencer 2:1df0b61d3b5a 1062 * @param[in] UARTx UART peripheral selected, should be LPC_UART3 (only)
Michael J. Spencer 2:1df0b61d3b5a 1063 * @param[in] NewState New state of IrDA function, should be:
Michael J. Spencer 2:1df0b61d3b5a 1064 * - ENABLE: Enable this function.
Michael J. Spencer 2:1df0b61d3b5a 1065 * - DISABLE: Disable this function.
Michael J. Spencer 2:1df0b61d3b5a 1066 * @return none
Michael J. Spencer 2:1df0b61d3b5a 1067 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 1068 void UART_IrDACmd(LPC_UART_TypeDef* UARTx, FunctionalState NewState)
Michael J. Spencer 2:1df0b61d3b5a 1069 {
Michael J. Spencer 2:1df0b61d3b5a 1070 CHECK_PARAM(PARAM_UART_IrDA(UARTx));
Michael J. Spencer 2:1df0b61d3b5a 1071 CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
Michael J. Spencer 2:1df0b61d3b5a 1072
Michael J. Spencer 2:1df0b61d3b5a 1073 if (NewState == ENABLE)
Michael J. Spencer 2:1df0b61d3b5a 1074 {
Michael J. Spencer 2:1df0b61d3b5a 1075 UARTx->ICR |= UART_ICR_IRDAEN;
Michael J. Spencer 2:1df0b61d3b5a 1076 }
Michael J. Spencer 2:1df0b61d3b5a 1077 else
Michael J. Spencer 2:1df0b61d3b5a 1078 {
Michael J. Spencer 2:1df0b61d3b5a 1079 UARTx->ICR &= (~UART_ICR_IRDAEN) & UART_ICR_BITMASK;
Michael J. Spencer 2:1df0b61d3b5a 1080 }
Michael J. Spencer 2:1df0b61d3b5a 1081 }
Michael J. Spencer 2:1df0b61d3b5a 1082
Michael J. Spencer 2:1df0b61d3b5a 1083
Michael J. Spencer 2:1df0b61d3b5a 1084 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 1085 * @brief Configure Pulse divider for IrDA function on UART peripheral.
Michael J. Spencer 2:1df0b61d3b5a 1086 * @param[in] UARTx UART peripheral selected, should be LPC_UART3 (only)
Michael J. Spencer 2:1df0b61d3b5a 1087 * @param[in] PulseDiv Pulse Divider value from Peripheral clock,
Michael J. Spencer 2:1df0b61d3b5a 1088 * should be one of the following:
Michael J. Spencer 2:1df0b61d3b5a 1089 - UART_IrDA_PULSEDIV2 : Pulse width = 2 * Tpclk
Michael J. Spencer 2:1df0b61d3b5a 1090 - UART_IrDA_PULSEDIV4 : Pulse width = 4 * Tpclk
Michael J. Spencer 2:1df0b61d3b5a 1091 - UART_IrDA_PULSEDIV8 : Pulse width = 8 * Tpclk
Michael J. Spencer 2:1df0b61d3b5a 1092 - UART_IrDA_PULSEDIV16 : Pulse width = 16 * Tpclk
Michael J. Spencer 2:1df0b61d3b5a 1093 - UART_IrDA_PULSEDIV32 : Pulse width = 32 * Tpclk
Michael J. Spencer 2:1df0b61d3b5a 1094 - UART_IrDA_PULSEDIV64 : Pulse width = 64 * Tpclk
Michael J. Spencer 2:1df0b61d3b5a 1095 - UART_IrDA_PULSEDIV128 : Pulse width = 128 * Tpclk
Michael J. Spencer 2:1df0b61d3b5a 1096 - UART_IrDA_PULSEDIV256 : Pulse width = 256 * Tpclk
Michael J. Spencer 2:1df0b61d3b5a 1097
Michael J. Spencer 2:1df0b61d3b5a 1098 * @return none
Michael J. Spencer 2:1df0b61d3b5a 1099 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 1100 void UART_IrDAPulseDivConfig(LPC_UART_TypeDef *UARTx, UART_IrDA_PULSE_Type PulseDiv)
Michael J. Spencer 2:1df0b61d3b5a 1101 {
Michael J. Spencer 2:1df0b61d3b5a 1102 uint32_t tmp, tmp1;
Michael J. Spencer 2:1df0b61d3b5a 1103 CHECK_PARAM(PARAM_UART_IrDA(UARTx));
Michael J. Spencer 2:1df0b61d3b5a 1104 CHECK_PARAM(PARAM_UART_IrDA_PULSEDIV(PulseDiv));
Michael J. Spencer 2:1df0b61d3b5a 1105
Michael J. Spencer 2:1df0b61d3b5a 1106 tmp1 = UART_ICR_PULSEDIV(PulseDiv);
Michael J. Spencer 2:1df0b61d3b5a 1107 tmp = UARTx->ICR & (~UART_ICR_PULSEDIV(7));
Michael J. Spencer 2:1df0b61d3b5a 1108 tmp |= tmp1 | UART_ICR_FIXPULSE_EN;
Michael J. Spencer 2:1df0b61d3b5a 1109 UARTx->ICR = tmp & UART_ICR_BITMASK;
Michael J. Spencer 2:1df0b61d3b5a 1110 }
Michael J. Spencer 2:1df0b61d3b5a 1111
Michael J. Spencer 2:1df0b61d3b5a 1112 #endif
Michael J. Spencer 2:1df0b61d3b5a 1113
Michael J. Spencer 2:1df0b61d3b5a 1114
Michael J. Spencer 2:1df0b61d3b5a 1115 /* UART1 FullModem function ---------------------------------------------*/
Michael J. Spencer 2:1df0b61d3b5a 1116
Michael J. Spencer 2:1df0b61d3b5a 1117 #ifdef _UART1
Michael J. Spencer 2:1df0b61d3b5a 1118
Michael J. Spencer 2:1df0b61d3b5a 1119 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 1120 * @brief Force pin DTR/RTS corresponding to given state (Full modem mode)
Michael J. Spencer 2:1df0b61d3b5a 1121 * @param[in] UARTx LPC_UART1 (only)
Michael J. Spencer 2:1df0b61d3b5a 1122 * @param[in] Pin Pin that NewState will be applied to, should be:
Michael J. Spencer 2:1df0b61d3b5a 1123 * - UART1_MODEM_PIN_DTR: DTR pin.
Michael J. Spencer 2:1df0b61d3b5a 1124 * - UART1_MODEM_PIN_RTS: RTS pin.
Michael J. Spencer 2:1df0b61d3b5a 1125 * @param[in] NewState New State of DTR/RTS pin, should be:
Michael J. Spencer 2:1df0b61d3b5a 1126 * - INACTIVE: Force the pin to inactive signal.
Michael J. Spencer 2:1df0b61d3b5a 1127 - ACTIVE: Force the pin to active signal.
Michael J. Spencer 2:1df0b61d3b5a 1128 * @return none
Michael J. Spencer 2:1df0b61d3b5a 1129 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 1130 void UART_FullModemForcePinState(LPC_UART1_TypeDef *UARTx, UART_MODEM_PIN_Type Pin, \
Michael J. Spencer 2:1df0b61d3b5a 1131 UART1_SignalState NewState)
Michael J. Spencer 2:1df0b61d3b5a 1132 {
Michael J. Spencer 2:1df0b61d3b5a 1133 uint8_t tmp = 0;
Michael J. Spencer 2:1df0b61d3b5a 1134
Michael J. Spencer 2:1df0b61d3b5a 1135 CHECK_PARAM(PARAM_UART1_MODEM(UARTx));
Michael J. Spencer 2:1df0b61d3b5a 1136 CHECK_PARAM(PARAM_UART1_MODEM_PIN(Pin));
Michael J. Spencer 2:1df0b61d3b5a 1137 CHECK_PARAM(PARAM_UART1_SIGNALSTATE(NewState));
Michael J. Spencer 2:1df0b61d3b5a 1138
Michael J. Spencer 2:1df0b61d3b5a 1139 switch (Pin){
Michael J. Spencer 2:1df0b61d3b5a 1140 case UART1_MODEM_PIN_DTR:
Michael J. Spencer 2:1df0b61d3b5a 1141 tmp = UART1_MCR_DTR_CTRL;
Michael J. Spencer 2:1df0b61d3b5a 1142 break;
Michael J. Spencer 2:1df0b61d3b5a 1143 case UART1_MODEM_PIN_RTS:
Michael J. Spencer 2:1df0b61d3b5a 1144 tmp = UART1_MCR_RTS_CTRL;
Michael J. Spencer 2:1df0b61d3b5a 1145 break;
Michael J. Spencer 2:1df0b61d3b5a 1146 default:
Michael J. Spencer 2:1df0b61d3b5a 1147 break;
Michael J. Spencer 2:1df0b61d3b5a 1148 }
Michael J. Spencer 2:1df0b61d3b5a 1149
Michael J. Spencer 2:1df0b61d3b5a 1150 if (NewState == ACTIVE){
Michael J. Spencer 2:1df0b61d3b5a 1151 UARTx->MCR |= tmp;
Michael J. Spencer 2:1df0b61d3b5a 1152 } else {
Michael J. Spencer 2:1df0b61d3b5a 1153 UARTx->MCR &= (~tmp) & UART1_MCR_BITMASK;
Michael J. Spencer 2:1df0b61d3b5a 1154 }
Michael J. Spencer 2:1df0b61d3b5a 1155 }
Michael J. Spencer 2:1df0b61d3b5a 1156
Michael J. Spencer 2:1df0b61d3b5a 1157
Michael J. Spencer 2:1df0b61d3b5a 1158 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 1159 * @brief Configure Full Modem mode for UART peripheral
Michael J. Spencer 2:1df0b61d3b5a 1160 * @param[in] UARTx LPC_UART1 (only)
Michael J. Spencer 2:1df0b61d3b5a 1161 * @param[in] Mode Full Modem mode, should be:
Michael J. Spencer 2:1df0b61d3b5a 1162 * - UART1_MODEM_MODE_LOOPBACK: Loop back mode.
Michael J. Spencer 2:1df0b61d3b5a 1163 * - UART1_MODEM_MODE_AUTO_RTS: Auto-RTS mode.
Michael J. Spencer 2:1df0b61d3b5a 1164 * - UART1_MODEM_MODE_AUTO_CTS: Auto-CTS mode.
Michael J. Spencer 2:1df0b61d3b5a 1165 * @param[in] NewState New State of this mode, should be:
Michael J. Spencer 2:1df0b61d3b5a 1166 * - ENABLE: Enable this mode.
Michael J. Spencer 2:1df0b61d3b5a 1167 - DISABLE: Disable this mode.
Michael J. Spencer 2:1df0b61d3b5a 1168 * @return none
Michael J. Spencer 2:1df0b61d3b5a 1169 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 1170 void UART_FullModemConfigMode(LPC_UART1_TypeDef *UARTx, UART_MODEM_MODE_Type Mode, \
Michael J. Spencer 2:1df0b61d3b5a 1171 FunctionalState NewState)
Michael J. Spencer 2:1df0b61d3b5a 1172 {
Michael J. Spencer 2:1df0b61d3b5a 1173 uint8_t tmp = 0;
Michael J. Spencer 2:1df0b61d3b5a 1174
Michael J. Spencer 2:1df0b61d3b5a 1175 CHECK_PARAM(PARAM_UART1_MODEM(UARTx));
Michael J. Spencer 2:1df0b61d3b5a 1176 CHECK_PARAM(PARAM_UART1_MODEM_MODE(Mode));
Michael J. Spencer 2:1df0b61d3b5a 1177 CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
Michael J. Spencer 2:1df0b61d3b5a 1178
Michael J. Spencer 2:1df0b61d3b5a 1179 switch(Mode){
Michael J. Spencer 2:1df0b61d3b5a 1180 case UART1_MODEM_MODE_LOOPBACK:
Michael J. Spencer 2:1df0b61d3b5a 1181 tmp = UART1_MCR_LOOPB_EN;
Michael J. Spencer 2:1df0b61d3b5a 1182 break;
Michael J. Spencer 2:1df0b61d3b5a 1183 case UART1_MODEM_MODE_AUTO_RTS:
Michael J. Spencer 2:1df0b61d3b5a 1184 tmp = UART1_MCR_AUTO_RTS_EN;
Michael J. Spencer 2:1df0b61d3b5a 1185 break;
Michael J. Spencer 2:1df0b61d3b5a 1186 case UART1_MODEM_MODE_AUTO_CTS:
Michael J. Spencer 2:1df0b61d3b5a 1187 tmp = UART1_MCR_AUTO_CTS_EN;
Michael J. Spencer 2:1df0b61d3b5a 1188 break;
Michael J. Spencer 2:1df0b61d3b5a 1189 default:
Michael J. Spencer 2:1df0b61d3b5a 1190 break;
Michael J. Spencer 2:1df0b61d3b5a 1191 }
Michael J. Spencer 2:1df0b61d3b5a 1192
Michael J. Spencer 2:1df0b61d3b5a 1193 if (NewState == ENABLE)
Michael J. Spencer 2:1df0b61d3b5a 1194 {
Michael J. Spencer 2:1df0b61d3b5a 1195 UARTx->MCR |= tmp;
Michael J. Spencer 2:1df0b61d3b5a 1196 }
Michael J. Spencer 2:1df0b61d3b5a 1197 else
Michael J. Spencer 2:1df0b61d3b5a 1198 {
Michael J. Spencer 2:1df0b61d3b5a 1199 UARTx->MCR &= (~tmp) & UART1_MCR_BITMASK;
Michael J. Spencer 2:1df0b61d3b5a 1200 }
Michael J. Spencer 2:1df0b61d3b5a 1201 }
Michael J. Spencer 2:1df0b61d3b5a 1202
Michael J. Spencer 2:1df0b61d3b5a 1203
Michael J. Spencer 2:1df0b61d3b5a 1204 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 1205 * @brief Get current status of modem status register
Michael J. Spencer 2:1df0b61d3b5a 1206 * @param[in] UARTx LPC_UART1 (only)
Michael J. Spencer 2:1df0b61d3b5a 1207 * @return Current value of modem status register
Michael J. Spencer 2:1df0b61d3b5a 1208 * Note: The return value of this function must be ANDed with each member
Michael J. Spencer 2:1df0b61d3b5a 1209 * UART_MODEM_STAT_type enumeration to determine current flag status
Michael J. Spencer 2:1df0b61d3b5a 1210 * corresponding to each modem flag status. Because some flags in
Michael J. Spencer 2:1df0b61d3b5a 1211 * modem status register will be cleared after reading, the next reading
Michael J. Spencer 2:1df0b61d3b5a 1212 * modem register could not be correct. So this function used to
Michael J. Spencer 2:1df0b61d3b5a 1213 * read modem status register in one time only, then the return value
Michael J. Spencer 2:1df0b61d3b5a 1214 * used to check all flags.
Michael J. Spencer 2:1df0b61d3b5a 1215 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 1216 uint8_t UART_FullModemGetStatus(LPC_UART1_TypeDef *UARTx)
Michael J. Spencer 2:1df0b61d3b5a 1217 {
Michael J. Spencer 2:1df0b61d3b5a 1218 CHECK_PARAM(PARAM_UART1_MODEM(UARTx));
Michael J. Spencer 2:1df0b61d3b5a 1219 return ((UARTx->MSR) & UART1_MSR_BITMASK);
Michael J. Spencer 2:1df0b61d3b5a 1220 }
Michael J. Spencer 2:1df0b61d3b5a 1221
Michael J. Spencer 2:1df0b61d3b5a 1222
Michael J. Spencer 2:1df0b61d3b5a 1223 /* UART RS485 functions --------------------------------------------------------------*/
Michael J. Spencer 2:1df0b61d3b5a 1224
Michael J. Spencer 2:1df0b61d3b5a 1225 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 1226 * @brief Configure UART peripheral in RS485 mode according to the specified
Michael J. Spencer 2:1df0b61d3b5a 1227 * parameters in the RS485ConfigStruct.
Michael J. Spencer 2:1df0b61d3b5a 1228 * @param[in] UARTx LPC_UART1 (only)
Michael J. Spencer 2:1df0b61d3b5a 1229 * @param[in] RS485ConfigStruct Pointer to a UART1_RS485_CTRLCFG_Type structure
Michael J. Spencer 2:1df0b61d3b5a 1230 * that contains the configuration information for specified UART
Michael J. Spencer 2:1df0b61d3b5a 1231 * in RS485 mode.
Michael J. Spencer 2:1df0b61d3b5a 1232 * @return None
Michael J. Spencer 2:1df0b61d3b5a 1233 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 1234 void UART_RS485Config(LPC_UART1_TypeDef *UARTx, UART1_RS485_CTRLCFG_Type *RS485ConfigStruct)
Michael J. Spencer 2:1df0b61d3b5a 1235 {
Michael J. Spencer 2:1df0b61d3b5a 1236 uint32_t tmp;
Michael J. Spencer 2:1df0b61d3b5a 1237
Michael J. Spencer 2:1df0b61d3b5a 1238 CHECK_PARAM(PARAM_UART1_MODEM(UARTx));
Michael J. Spencer 2:1df0b61d3b5a 1239 CHECK_PARAM(PARAM_FUNCTIONALSTATE(RS485ConfigStruct->AutoAddrDetect_State));
Michael J. Spencer 2:1df0b61d3b5a 1240 CHECK_PARAM(PARAM_FUNCTIONALSTATE(RS485ConfigStruct->AutoDirCtrl_State));
Michael J. Spencer 2:1df0b61d3b5a 1241 CHECK_PARAM(PARAM_UART1_RS485_CFG_DELAYVALUE(RS485ConfigStruct->DelayValue));
Michael J. Spencer 2:1df0b61d3b5a 1242 CHECK_PARAM(PARAM_SETSTATE(RS485ConfigStruct->DirCtrlPol_Level));
Michael J. Spencer 2:1df0b61d3b5a 1243 CHECK_PARAM(PARAM_UART_RS485_DIRCTRL_PIN(RS485ConfigStruct->DirCtrlPin));
Michael J. Spencer 2:1df0b61d3b5a 1244 CHECK_PARAM(PARAM_UART1_RS485_CFG_MATCHADDRVALUE(RS485ConfigStruct->MatchAddrValue));
Michael J. Spencer 2:1df0b61d3b5a 1245 CHECK_PARAM(PARAM_FUNCTIONALSTATE(RS485ConfigStruct->NormalMultiDropMode_State));
Michael J. Spencer 2:1df0b61d3b5a 1246 CHECK_PARAM(PARAM_FUNCTIONALSTATE(RS485ConfigStruct->Rx_State));
Michael J. Spencer 2:1df0b61d3b5a 1247
Michael J. Spencer 2:1df0b61d3b5a 1248 tmp = 0;
Michael J. Spencer 2:1df0b61d3b5a 1249 // If Auto Direction Control is enabled - This function is used in Master mode
Michael J. Spencer 2:1df0b61d3b5a 1250 if (RS485ConfigStruct->AutoDirCtrl_State == ENABLE)
Michael J. Spencer 2:1df0b61d3b5a 1251 {
Michael J. Spencer 2:1df0b61d3b5a 1252 tmp |= UART1_RS485CTRL_DCTRL_EN;
Michael J. Spencer 2:1df0b61d3b5a 1253
Michael J. Spencer 2:1df0b61d3b5a 1254 // Set polar
Michael J. Spencer 2:1df0b61d3b5a 1255 if (RS485ConfigStruct->DirCtrlPol_Level == SET)
Michael J. Spencer 2:1df0b61d3b5a 1256 {
Michael J. Spencer 2:1df0b61d3b5a 1257 tmp |= UART1_RS485CTRL_OINV_1;
Michael J. Spencer 2:1df0b61d3b5a 1258 }
Michael J. Spencer 2:1df0b61d3b5a 1259
Michael J. Spencer 2:1df0b61d3b5a 1260 // Set pin according to
Michael J. Spencer 2:1df0b61d3b5a 1261 if (RS485ConfigStruct->DirCtrlPin == UART1_RS485_DIRCTRL_DTR)
Michael J. Spencer 2:1df0b61d3b5a 1262 {
Michael J. Spencer 2:1df0b61d3b5a 1263 tmp |= UART1_RS485CTRL_SEL_DTR;
Michael J. Spencer 2:1df0b61d3b5a 1264 }
Michael J. Spencer 2:1df0b61d3b5a 1265
Michael J. Spencer 2:1df0b61d3b5a 1266 // Fill delay time
Michael J. Spencer 2:1df0b61d3b5a 1267 UARTx->RS485DLY = RS485ConfigStruct->DelayValue & UART1_RS485DLY_BITMASK;
Michael J. Spencer 2:1df0b61d3b5a 1268 }
Michael J. Spencer 2:1df0b61d3b5a 1269
Michael J. Spencer 2:1df0b61d3b5a 1270 // MultiDrop mode is enable
Michael J. Spencer 2:1df0b61d3b5a 1271 if (RS485ConfigStruct->NormalMultiDropMode_State == ENABLE)
Michael J. Spencer 2:1df0b61d3b5a 1272 {
Michael J. Spencer 2:1df0b61d3b5a 1273 tmp |= UART1_RS485CTRL_NMM_EN;
Michael J. Spencer 2:1df0b61d3b5a 1274 }
Michael J. Spencer 2:1df0b61d3b5a 1275
Michael J. Spencer 2:1df0b61d3b5a 1276 // Auto Address Detect function
Michael J. Spencer 2:1df0b61d3b5a 1277 if (RS485ConfigStruct->AutoAddrDetect_State == ENABLE)
Michael J. Spencer 2:1df0b61d3b5a 1278 {
Michael J. Spencer 2:1df0b61d3b5a 1279 tmp |= UART1_RS485CTRL_AADEN;
Michael J. Spencer 2:1df0b61d3b5a 1280 // Fill Match Address
Michael J. Spencer 2:1df0b61d3b5a 1281 UARTx->ADRMATCH = RS485ConfigStruct->MatchAddrValue & UART1_RS485ADRMATCH_BITMASK;
Michael J. Spencer 2:1df0b61d3b5a 1282 }
Michael J. Spencer 2:1df0b61d3b5a 1283
Michael J. Spencer 2:1df0b61d3b5a 1284
Michael J. Spencer 2:1df0b61d3b5a 1285 // Receiver is disable
Michael J. Spencer 2:1df0b61d3b5a 1286 if (RS485ConfigStruct->Rx_State == DISABLE)
Michael J. Spencer 2:1df0b61d3b5a 1287 {
Michael J. Spencer 2:1df0b61d3b5a 1288 tmp |= UART1_RS485CTRL_RX_DIS;
Michael J. Spencer 2:1df0b61d3b5a 1289 }
Michael J. Spencer 2:1df0b61d3b5a 1290
Michael J. Spencer 2:1df0b61d3b5a 1291 // write back to RS485 control register
Michael J. Spencer 2:1df0b61d3b5a 1292 UARTx->RS485CTRL = tmp & UART1_RS485CTRL_BITMASK;
Michael J. Spencer 2:1df0b61d3b5a 1293
Michael J. Spencer 2:1df0b61d3b5a 1294 // Enable Parity function and leave parity in stick '0' parity as default
Michael J. Spencer 2:1df0b61d3b5a 1295 UARTx->LCR |= (UART_LCR_PARITY_F_0 | UART_LCR_PARITY_EN);
Michael J. Spencer 2:1df0b61d3b5a 1296 }
Michael J. Spencer 2:1df0b61d3b5a 1297
Michael J. Spencer 2:1df0b61d3b5a 1298 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 1299 * @brief Enable/Disable receiver in RS485 module in UART1
Michael J. Spencer 2:1df0b61d3b5a 1300 * @param[in] UARTx LPC_UART1 (only)
Michael J. Spencer 2:1df0b61d3b5a 1301 * @param[in] NewState New State of command, should be:
Michael J. Spencer 2:1df0b61d3b5a 1302 * - ENABLE: Enable this function.
Michael J. Spencer 2:1df0b61d3b5a 1303 * - DISABLE: Disable this function.
Michael J. Spencer 2:1df0b61d3b5a 1304 * @return None
Michael J. Spencer 2:1df0b61d3b5a 1305 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 1306 void UART_RS485ReceiverCmd(LPC_UART1_TypeDef *UARTx, FunctionalState NewState)
Michael J. Spencer 2:1df0b61d3b5a 1307 {
Michael J. Spencer 2:1df0b61d3b5a 1308 if (NewState == ENABLE){
Michael J. Spencer 2:1df0b61d3b5a 1309 UARTx->RS485CTRL &= ~UART1_RS485CTRL_RX_DIS;
Michael J. Spencer 2:1df0b61d3b5a 1310 } else {
Michael J. Spencer 2:1df0b61d3b5a 1311 UARTx->RS485CTRL |= UART1_RS485CTRL_RX_DIS;
Michael J. Spencer 2:1df0b61d3b5a 1312 }
Michael J. Spencer 2:1df0b61d3b5a 1313 }
Michael J. Spencer 2:1df0b61d3b5a 1314
Michael J. Spencer 2:1df0b61d3b5a 1315 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 1316 * @brief Send data on RS485 bus with specified parity stick value (9-bit mode).
Michael J. Spencer 2:1df0b61d3b5a 1317 * @param[in] UARTx LPC_UART1 (only)
Michael J. Spencer 2:1df0b61d3b5a 1318 * @param[in] pDatFrm Pointer to data frame.
Michael J. Spencer 2:1df0b61d3b5a 1319 * @param[in] size Size of data.
Michael J. Spencer 2:1df0b61d3b5a 1320 * @param[in] ParityStick Parity Stick value, should be 0 or 1.
Michael J. Spencer 2:1df0b61d3b5a 1321 * @return None
Michael J. Spencer 2:1df0b61d3b5a 1322 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 1323 uint32_t UART_RS485Send(LPC_UART1_TypeDef *UARTx, uint8_t *pDatFrm, \
Michael J. Spencer 2:1df0b61d3b5a 1324 uint32_t size, uint8_t ParityStick)
Michael J. Spencer 2:1df0b61d3b5a 1325 {
Michael J. Spencer 2:1df0b61d3b5a 1326 uint8_t tmp, save;
Michael J. Spencer 2:1df0b61d3b5a 1327 uint32_t cnt;
Michael J. Spencer 2:1df0b61d3b5a 1328
Michael J. Spencer 2:1df0b61d3b5a 1329 if (ParityStick){
Michael J. Spencer 2:1df0b61d3b5a 1330 save = tmp = UARTx->LCR & UART_LCR_BITMASK;
Michael J. Spencer 2:1df0b61d3b5a 1331 tmp &= ~(UART_LCR_PARITY_EVEN);
Michael J. Spencer 2:1df0b61d3b5a 1332 UARTx->LCR = tmp;
Michael J. Spencer 2:1df0b61d3b5a 1333 cnt = UART_Send((LPC_UART_TypeDef *)UARTx, pDatFrm, size, BLOCKING);
Michael J. Spencer 2:1df0b61d3b5a 1334 while (!(UARTx->LSR & UART_LSR_TEMT));
Michael J. Spencer 2:1df0b61d3b5a 1335 UARTx->LCR = save;
Michael J. Spencer 2:1df0b61d3b5a 1336 } else {
Michael J. Spencer 2:1df0b61d3b5a 1337 cnt = UART_Send((LPC_UART_TypeDef *)UARTx, pDatFrm, size, BLOCKING);
Michael J. Spencer 2:1df0b61d3b5a 1338 while (!(UARTx->LSR & UART_LSR_TEMT));
Michael J. Spencer 2:1df0b61d3b5a 1339 }
Michael J. Spencer 2:1df0b61d3b5a 1340 return cnt;
Michael J. Spencer 2:1df0b61d3b5a 1341 }
Michael J. Spencer 2:1df0b61d3b5a 1342
Michael J. Spencer 2:1df0b61d3b5a 1343 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 1344 * @brief Send Slave address frames on RS485 bus.
Michael J. Spencer 2:1df0b61d3b5a 1345 * @param[in] UARTx LPC_UART1 (only)
Michael J. Spencer 2:1df0b61d3b5a 1346 * @param[in] SlvAddr Slave Address.
Michael J. Spencer 2:1df0b61d3b5a 1347 * @return None
Michael J. Spencer 2:1df0b61d3b5a 1348 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 1349 void UART_RS485SendSlvAddr(LPC_UART1_TypeDef *UARTx, uint8_t SlvAddr)
Michael J. Spencer 2:1df0b61d3b5a 1350 {
Michael J. Spencer 2:1df0b61d3b5a 1351 UART_RS485Send(UARTx, &SlvAddr, 1, 1);
Michael J. Spencer 2:1df0b61d3b5a 1352 }
Michael J. Spencer 2:1df0b61d3b5a 1353
Michael J. Spencer 2:1df0b61d3b5a 1354 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 1355 * @brief Send Data frames on RS485 bus.
Michael J. Spencer 2:1df0b61d3b5a 1356 * @param[in] UARTx LPC_UART1 (only)
Michael J. Spencer 2:1df0b61d3b5a 1357 * @param[in] pData Pointer to data to be sent.
Michael J. Spencer 2:1df0b61d3b5a 1358 * @param[in] size Size of data frame to be sent.
Michael J. Spencer 2:1df0b61d3b5a 1359 * @return None
Michael J. Spencer 2:1df0b61d3b5a 1360 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 1361 uint32_t UART_RS485SendData(LPC_UART1_TypeDef *UARTx, uint8_t *pData, uint32_t size)
Michael J. Spencer 2:1df0b61d3b5a 1362 {
Michael J. Spencer 2:1df0b61d3b5a 1363 return (UART_RS485Send(UARTx, pData, size, 0));
Michael J. Spencer 2:1df0b61d3b5a 1364 }
Michael J. Spencer 2:1df0b61d3b5a 1365
Michael J. Spencer 2:1df0b61d3b5a 1366 #endif /* _UART1 */
Michael J. Spencer 2:1df0b61d3b5a 1367
Michael J. Spencer 2:1df0b61d3b5a 1368 #endif /* _UART */
Michael J. Spencer 2:1df0b61d3b5a 1369
Michael J. Spencer 2:1df0b61d3b5a 1370 /**
Michael J. Spencer 2:1df0b61d3b5a 1371 * @}
Michael J. Spencer 2:1df0b61d3b5a 1372 */
Michael J. Spencer 2:1df0b61d3b5a 1373
Michael J. Spencer 2:1df0b61d3b5a 1374 /**
Michael J. Spencer 2:1df0b61d3b5a 1375 * @}
Michael J. Spencer 2:1df0b61d3b5a 1376 */
Michael J. Spencer 2:1df0b61d3b5a 1377 /* --------------------------------- End Of File ------------------------------ */
Michael J. Spencer 2:1df0b61d3b5a 1378
Michael J. Spencer 2:1df0b61d3b5a 1379 #endif /* __LPC17XX__ */