Michael Spencer / Smoothie

Fork of Smoothie to port to mbed non-LPC targets.

Dependencies:   mbed

Fork of Smoothie by Stéphane Cachat

libs/LPC17xx/LPC17xxLib/src/lpc17xx_spi.c@2:1df0b61d3b5a, 2014-02-28 (annotated)

Committer:
Michael J. Spencer
Date:
Fri Feb 28 18:52:52 2014 -0800
Revision:
2:1df0b61d3b5a
Update to latest Smoothie.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Michael J. Spencer 2:1df0b61d3b5a 1 #ifdef __LPC17XX__
Michael J. Spencer 2:1df0b61d3b5a 2
Michael J. Spencer 2:1df0b61d3b5a 3 /**********************************************************************
Michael J. Spencer 2:1df0b61d3b5a 4 * $Id$ lpc17xx_spi.c 2010-05-21
Michael J. Spencer 2:1df0b61d3b5a 5 *//**
Michael J. Spencer 2:1df0b61d3b5a 6 * @file lpc17xx_spi.c
Michael J. Spencer 2:1df0b61d3b5a 7 * @brief Contains all functions support for SPI firmware library on LPC17xx
Michael J. Spencer 2:1df0b61d3b5a 8 * @version 2.0
Michael J. Spencer 2:1df0b61d3b5a 9 * @date 21. May. 2010
Michael J. Spencer 2:1df0b61d3b5a 10 * @author NXP MCU SW Application Team
Michael J. Spencer 2:1df0b61d3b5a 11 *
Michael J. Spencer 2:1df0b61d3b5a 12 * Copyright(C) 2010, NXP Semiconductor
Michael J. Spencer 2:1df0b61d3b5a 13 * All rights reserved.
Michael J. Spencer 2:1df0b61d3b5a 14 *
Michael J. Spencer 2:1df0b61d3b5a 15 ***********************************************************************
Michael J. Spencer 2:1df0b61d3b5a 16 * Software that is described herein is for illustrative purposes only
Michael J. Spencer 2:1df0b61d3b5a 17 * which provides customers with programming information regarding the
Michael J. Spencer 2:1df0b61d3b5a 18 * products. This software is supplied "AS IS" without any warranties.
Michael J. Spencer 2:1df0b61d3b5a 19 * NXP Semiconductors assumes no responsibility or liability for the
Michael J. Spencer 2:1df0b61d3b5a 20 * use of the software, conveys no license or title under any patent,
Michael J. Spencer 2:1df0b61d3b5a 21 * copyright, or mask work right to the product. NXP Semiconductors
Michael J. Spencer 2:1df0b61d3b5a 22 * reserves the right to make changes in the software without
Michael J. Spencer 2:1df0b61d3b5a 23 * notification. NXP Semiconductors also make no representation or
Michael J. Spencer 2:1df0b61d3b5a 24 * warranty that such application will be suitable for the specified
Michael J. Spencer 2:1df0b61d3b5a 25 * use without further testing or modification.
Michael J. Spencer 2:1df0b61d3b5a 26 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 27
Michael J. Spencer 2:1df0b61d3b5a 28 /* Peripheral group ----------------------------------------------------------- */
Michael J. Spencer 2:1df0b61d3b5a 29 /** @addtogroup SPI
Michael J. Spencer 2:1df0b61d3b5a 30 * @{
Michael J. Spencer 2:1df0b61d3b5a 31 */
Michael J. Spencer 2:1df0b61d3b5a 32
Michael J. Spencer 2:1df0b61d3b5a 33 /* Includes ------------------------------------------------------------------- */
Michael J. Spencer 2:1df0b61d3b5a 34 #include "lpc17xx_spi.h"
Michael J. Spencer 2:1df0b61d3b5a 35 #include "lpc17xx_clkpwr.h"
Michael J. Spencer 2:1df0b61d3b5a 36
Michael J. Spencer 2:1df0b61d3b5a 37 /* If this source file built with example, the LPC17xx FW library configuration
Michael J. Spencer 2:1df0b61d3b5a 38 * file in each example directory ("lpc17xx_libcfg.h") must be included,
Michael J. Spencer 2:1df0b61d3b5a 39 * otherwise the default FW library configuration file must be included instead
Michael J. Spencer 2:1df0b61d3b5a 40 */
Michael J. Spencer 2:1df0b61d3b5a 41 #ifdef __BUILD_WITH_EXAMPLE__
Michael J. Spencer 2:1df0b61d3b5a 42 #include "lpc17xx_libcfg.h"
Michael J. Spencer 2:1df0b61d3b5a 43 #else
Michael J. Spencer 2:1df0b61d3b5a 44 #include "lpc17xx_libcfg_default.h"
Michael J. Spencer 2:1df0b61d3b5a 45 #endif /* __BUILD_WITH_EXAMPLE__ */
Michael J. Spencer 2:1df0b61d3b5a 46
Michael J. Spencer 2:1df0b61d3b5a 47 #ifdef _SPI
Michael J. Spencer 2:1df0b61d3b5a 48
Michael J. Spencer 2:1df0b61d3b5a 49
Michael J. Spencer 2:1df0b61d3b5a 50 /* Public Functions ----------------------------------------------------------- */
Michael J. Spencer 2:1df0b61d3b5a 51 /** @addtogroup SPI_Public_Functions
Michael J. Spencer 2:1df0b61d3b5a 52 * @{
Michael J. Spencer 2:1df0b61d3b5a 53 */
Michael J. Spencer 2:1df0b61d3b5a 54
Michael J. Spencer 2:1df0b61d3b5a 55 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 56 * @brief Setup clock rate for SPI device
Michael J. Spencer 2:1df0b61d3b5a 57 * @param[in] SPIx SPI peripheral definition, should be LPC_SPI
Michael J. Spencer 2:1df0b61d3b5a 58 * @param[in] target_clock : clock of SPI (Hz)
Michael J. Spencer 2:1df0b61d3b5a 59 * @return None
Michael J. Spencer 2:1df0b61d3b5a 60 ***********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 61 void SPI_SetClock (LPC_SPI_TypeDef *SPIx, uint32_t target_clock)
Michael J. Spencer 2:1df0b61d3b5a 62 {
Michael J. Spencer 2:1df0b61d3b5a 63 uint32_t spi_pclk;
Michael J. Spencer 2:1df0b61d3b5a 64 uint32_t prescale, temp;
Michael J. Spencer 2:1df0b61d3b5a 65
Michael J. Spencer 2:1df0b61d3b5a 66 CHECK_PARAM(PARAM_SPIx(SPIx));
Michael J. Spencer 2:1df0b61d3b5a 67
Michael J. Spencer 2:1df0b61d3b5a 68 if (SPIx == LPC_SPI){
Michael J. Spencer 2:1df0b61d3b5a 69 spi_pclk = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_SPI);
Michael J. Spencer 2:1df0b61d3b5a 70 } else {
Michael J. Spencer 2:1df0b61d3b5a 71 return;
Michael J. Spencer 2:1df0b61d3b5a 72 }
Michael J. Spencer 2:1df0b61d3b5a 73
Michael J. Spencer 2:1df0b61d3b5a 74 prescale = 8;
Michael J. Spencer 2:1df0b61d3b5a 75 // Find closest clock to target clock
Michael J. Spencer 2:1df0b61d3b5a 76 while (1){
Michael J. Spencer 2:1df0b61d3b5a 77 temp = target_clock * prescale;
Michael J. Spencer 2:1df0b61d3b5a 78 if (temp >= spi_pclk){
Michael J. Spencer 2:1df0b61d3b5a 79 break;
Michael J. Spencer 2:1df0b61d3b5a 80 }
Michael J. Spencer 2:1df0b61d3b5a 81 prescale += 2;
Michael J. Spencer 2:1df0b61d3b5a 82 if(prescale >= 254){
Michael J. Spencer 2:1df0b61d3b5a 83 break;
Michael J. Spencer 2:1df0b61d3b5a 84 }
Michael J. Spencer 2:1df0b61d3b5a 85 }
Michael J. Spencer 2:1df0b61d3b5a 86
Michael J. Spencer 2:1df0b61d3b5a 87 // Write to register
Michael J. Spencer 2:1df0b61d3b5a 88 SPIx->SPCCR = SPI_SPCCR_COUNTER(prescale);
Michael J. Spencer 2:1df0b61d3b5a 89 }
Michael J. Spencer 2:1df0b61d3b5a 90
Michael J. Spencer 2:1df0b61d3b5a 91
Michael J. Spencer 2:1df0b61d3b5a 92 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 93 * @brief De-initializes the SPIx peripheral registers to their
Michael J. Spencer 2:1df0b61d3b5a 94 * default reset values.
Michael J. Spencer 2:1df0b61d3b5a 95 * @param[in] SPIx SPI peripheral selected, should be LPC_SPI
Michael J. Spencer 2:1df0b61d3b5a 96 * @return None
Michael J. Spencer 2:1df0b61d3b5a 97 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 98 void SPI_DeInit(LPC_SPI_TypeDef *SPIx)
Michael J. Spencer 2:1df0b61d3b5a 99 {
Michael J. Spencer 2:1df0b61d3b5a 100 CHECK_PARAM(PARAM_SPIx(SPIx));
Michael J. Spencer 2:1df0b61d3b5a 101
Michael J. Spencer 2:1df0b61d3b5a 102 if (SPIx == LPC_SPI){
Michael J. Spencer 2:1df0b61d3b5a 103 /* Set up clock and power for SPI module */
Michael J. Spencer 2:1df0b61d3b5a 104 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCSPI, DISABLE);
Michael J. Spencer 2:1df0b61d3b5a 105 }
Michael J. Spencer 2:1df0b61d3b5a 106 }
Michael J. Spencer 2:1df0b61d3b5a 107
Michael J. Spencer 2:1df0b61d3b5a 108 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 109 * @brief Get data bit size per transfer
Michael J. Spencer 2:1df0b61d3b5a 110 * @param[in] SPIx SPI peripheral selected, should be LPC_SPI
Michael J. Spencer 2:1df0b61d3b5a 111 * @return number of bit per transfer, could be 8-16
Michael J. Spencer 2:1df0b61d3b5a 112 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 113 uint8_t SPI_GetDataSize (LPC_SPI_TypeDef *SPIx)
Michael J. Spencer 2:1df0b61d3b5a 114 {
Michael J. Spencer 2:1df0b61d3b5a 115 CHECK_PARAM(PARAM_SPIx(SPIx));
Michael J. Spencer 2:1df0b61d3b5a 116 return ((SPIx->SPCR)>>8 & 0xF);
Michael J. Spencer 2:1df0b61d3b5a 117 }
Michael J. Spencer 2:1df0b61d3b5a 118
Michael J. Spencer 2:1df0b61d3b5a 119 /********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 120 * @brief Initializes the SPIx peripheral according to the specified
Michael J. Spencer 2:1df0b61d3b5a 121 * parameters in the UART_ConfigStruct.
Michael J. Spencer 2:1df0b61d3b5a 122 * @param[in] SPIx SPI peripheral selected, should be LPC_SPI
Michael J. Spencer 2:1df0b61d3b5a 123 * @param[in] SPI_ConfigStruct Pointer to a SPI_CFG_Type structure
Michael J. Spencer 2:1df0b61d3b5a 124 * that contains the configuration information for the
Michael J. Spencer 2:1df0b61d3b5a 125 * specified SPI peripheral.
Michael J. Spencer 2:1df0b61d3b5a 126 * @return None
Michael J. Spencer 2:1df0b61d3b5a 127 *********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 128 void SPI_Init(LPC_SPI_TypeDef *SPIx, SPI_CFG_Type *SPI_ConfigStruct)
Michael J. Spencer 2:1df0b61d3b5a 129 {
Michael J. Spencer 2:1df0b61d3b5a 130 uint32_t tmp;
Michael J. Spencer 2:1df0b61d3b5a 131
Michael J. Spencer 2:1df0b61d3b5a 132 CHECK_PARAM(PARAM_SPIx(SPIx));
Michael J. Spencer 2:1df0b61d3b5a 133
Michael J. Spencer 2:1df0b61d3b5a 134 if(SPIx == LPC_SPI){
Michael J. Spencer 2:1df0b61d3b5a 135 /* Set up clock and power for UART module */
Michael J. Spencer 2:1df0b61d3b5a 136 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCSPI, ENABLE);
Michael J. Spencer 2:1df0b61d3b5a 137 } else {
Michael J. Spencer 2:1df0b61d3b5a 138 return;
Michael J. Spencer 2:1df0b61d3b5a 139 }
Michael J. Spencer 2:1df0b61d3b5a 140
Michael J. Spencer 2:1df0b61d3b5a 141 // Configure SPI, interrupt is disable as default
Michael J. Spencer 2:1df0b61d3b5a 142 tmp = ((SPI_ConfigStruct->CPHA) | (SPI_ConfigStruct->CPOL) \
Michael J. Spencer 2:1df0b61d3b5a 143 | (SPI_ConfigStruct->DataOrder) | (SPI_ConfigStruct->Databit) \
Michael J. Spencer 2:1df0b61d3b5a 144 | (SPI_ConfigStruct->Mode) | SPI_SPCR_BIT_EN) & SPI_SPCR_BITMASK;
Michael J. Spencer 2:1df0b61d3b5a 145 // write back to SPI control register
Michael J. Spencer 2:1df0b61d3b5a 146 SPIx->SPCR = tmp;
Michael J. Spencer 2:1df0b61d3b5a 147
Michael J. Spencer 2:1df0b61d3b5a 148 // Set clock rate for SPI peripheral
Michael J. Spencer 2:1df0b61d3b5a 149 SPI_SetClock(SPIx, SPI_ConfigStruct->ClockRate);
Michael J. Spencer 2:1df0b61d3b5a 150
Michael J. Spencer 2:1df0b61d3b5a 151 // If interrupt flag is set, Write '1' to Clear interrupt flag
Michael J. Spencer 2:1df0b61d3b5a 152 if (SPIx->SPINT & SPI_SPINT_INTFLAG){
Michael J. Spencer 2:1df0b61d3b5a 153 SPIx->SPINT = SPI_SPINT_INTFLAG;
Michael J. Spencer 2:1df0b61d3b5a 154 }
Michael J. Spencer 2:1df0b61d3b5a 155 }
Michael J. Spencer 2:1df0b61d3b5a 156
Michael J. Spencer 2:1df0b61d3b5a 157
Michael J. Spencer 2:1df0b61d3b5a 158
Michael J. Spencer 2:1df0b61d3b5a 159 /*****************************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 160 * @brief Fills each SPI_InitStruct member with its default value:
Michael J. Spencer 2:1df0b61d3b5a 161 * - CPHA = SPI_CPHA_FIRST
Michael J. Spencer 2:1df0b61d3b5a 162 * - CPOL = SPI_CPOL_HI
Michael J. Spencer 2:1df0b61d3b5a 163 * - ClockRate = 1000000
Michael J. Spencer 2:1df0b61d3b5a 164 * - DataOrder = SPI_DATA_MSB_FIRST
Michael J. Spencer 2:1df0b61d3b5a 165 * - Databit = SPI_DATABIT_8
Michael J. Spencer 2:1df0b61d3b5a 166 * - Mode = SPI_MASTER_MODE
Michael J. Spencer 2:1df0b61d3b5a 167 * @param[in] SPI_InitStruct Pointer to a SPI_CFG_Type structure
Michael J. Spencer 2:1df0b61d3b5a 168 * which will be initialized.
Michael J. Spencer 2:1df0b61d3b5a 169 * @return None
Michael J. Spencer 2:1df0b61d3b5a 170 *******************************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 171 void SPI_ConfigStructInit(SPI_CFG_Type *SPI_InitStruct)
Michael J. Spencer 2:1df0b61d3b5a 172 {
Michael J. Spencer 2:1df0b61d3b5a 173 SPI_InitStruct->CPHA = SPI_CPHA_FIRST;
Michael J. Spencer 2:1df0b61d3b5a 174 SPI_InitStruct->CPOL = SPI_CPOL_HI;
Michael J. Spencer 2:1df0b61d3b5a 175 SPI_InitStruct->ClockRate = 1000000;
Michael J. Spencer 2:1df0b61d3b5a 176 SPI_InitStruct->DataOrder = SPI_DATA_MSB_FIRST;
Michael J. Spencer 2:1df0b61d3b5a 177 SPI_InitStruct->Databit = SPI_DATABIT_8;
Michael J. Spencer 2:1df0b61d3b5a 178 SPI_InitStruct->Mode = SPI_MASTER_MODE;
Michael J. Spencer 2:1df0b61d3b5a 179 }
Michael J. Spencer 2:1df0b61d3b5a 180
Michael J. Spencer 2:1df0b61d3b5a 181 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 182 * @brief Transmit a single data through SPIx peripheral
Michael J. Spencer 2:1df0b61d3b5a 183 * @param[in] SPIx SPI peripheral selected, should be LPC_SPI
Michael J. Spencer 2:1df0b61d3b5a 184 * @param[in] Data Data to transmit (must be 16 or 8-bit long,
Michael J. Spencer 2:1df0b61d3b5a 185 * this depend on SPI data bit number configured)
Michael J. Spencer 2:1df0b61d3b5a 186 * @return none
Michael J. Spencer 2:1df0b61d3b5a 187 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 188 void SPI_SendData(LPC_SPI_TypeDef* SPIx, uint16_t Data)
Michael J. Spencer 2:1df0b61d3b5a 189 {
Michael J. Spencer 2:1df0b61d3b5a 190 CHECK_PARAM(PARAM_SPIx(SPIx));
Michael J. Spencer 2:1df0b61d3b5a 191
Michael J. Spencer 2:1df0b61d3b5a 192 SPIx->SPDR = Data & SPI_SPDR_BITMASK;
Michael J. Spencer 2:1df0b61d3b5a 193 }
Michael J. Spencer 2:1df0b61d3b5a 194
Michael J. Spencer 2:1df0b61d3b5a 195
Michael J. Spencer 2:1df0b61d3b5a 196
Michael J. Spencer 2:1df0b61d3b5a 197 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 198 * @brief Receive a single data from SPIx peripheral
Michael J. Spencer 2:1df0b61d3b5a 199 * @param[in] SPIx SPI peripheral selected, should be LPC_SPI
Michael J. Spencer 2:1df0b61d3b5a 200 * @return Data received (16-bit long)
Michael J. Spencer 2:1df0b61d3b5a 201 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 202 uint16_t SPI_ReceiveData(LPC_SPI_TypeDef* SPIx)
Michael J. Spencer 2:1df0b61d3b5a 203 {
Michael J. Spencer 2:1df0b61d3b5a 204 CHECK_PARAM(PARAM_SPIx(SPIx));
Michael J. Spencer 2:1df0b61d3b5a 205
Michael J. Spencer 2:1df0b61d3b5a 206 return ((uint16_t) (SPIx->SPDR & SPI_SPDR_BITMASK));
Michael J. Spencer 2:1df0b61d3b5a 207 }
Michael J. Spencer 2:1df0b61d3b5a 208
Michael J. Spencer 2:1df0b61d3b5a 209 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 210 * @brief SPI Read write data function
Michael J. Spencer 2:1df0b61d3b5a 211 * @param[in] SPIx Pointer to SPI peripheral, should be LPC_SPI
Michael J. Spencer 2:1df0b61d3b5a 212 * @param[in] dataCfg Pointer to a SPI_DATA_SETUP_Type structure that
Michael J. Spencer 2:1df0b61d3b5a 213 * contains specified information about transmit
Michael J. Spencer 2:1df0b61d3b5a 214 * data configuration.
Michael J. Spencer 2:1df0b61d3b5a 215 * @param[in] xfType Transfer type, should be:
Michael J. Spencer 2:1df0b61d3b5a 216 * - SPI_TRANSFER_POLLING: Polling mode
Michael J. Spencer 2:1df0b61d3b5a 217 * - SPI_TRANSFER_INTERRUPT: Interrupt mode
Michael J. Spencer 2:1df0b61d3b5a 218 * @return Actual Data length has been transferred in polling mode.
Michael J. Spencer 2:1df0b61d3b5a 219 * In interrupt mode, always return (0)
Michael J. Spencer 2:1df0b61d3b5a 220 * Return (-1) if error.
Michael J. Spencer 2:1df0b61d3b5a 221 * Note: This function can be used in both master and slave mode.
Michael J. Spencer 2:1df0b61d3b5a 222 ***********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 223 int32_t SPI_ReadWrite (LPC_SPI_TypeDef *SPIx, SPI_DATA_SETUP_Type *dataCfg, \
Michael J. Spencer 2:1df0b61d3b5a 224 SPI_TRANSFER_Type xfType)
Michael J. Spencer 2:1df0b61d3b5a 225 {
Michael J. Spencer 2:1df0b61d3b5a 226 uint8_t *rdata8 = NULL;
Michael J. Spencer 2:1df0b61d3b5a 227 uint8_t *wdata8 = NULL;
Michael J. Spencer 2:1df0b61d3b5a 228 uint16_t *rdata16 = NULL;
Michael J. Spencer 2:1df0b61d3b5a 229 uint16_t *wdata16 = NULL;
Michael J. Spencer 2:1df0b61d3b5a 230 uint32_t stat = 0;
Michael J. Spencer 2:1df0b61d3b5a 231 uint32_t temp;
Michael J. Spencer 2:1df0b61d3b5a 232 uint8_t dataword;
Michael J. Spencer 2:1df0b61d3b5a 233
Michael J. Spencer 2:1df0b61d3b5a 234 //read for empty buffer
Michael J. Spencer 2:1df0b61d3b5a 235 temp = SPIx->SPDR;
Michael J. Spencer 2:1df0b61d3b5a 236 //dummy to clear status
Michael J. Spencer 2:1df0b61d3b5a 237 temp = SPIx->SPSR;
Michael J. Spencer 2:1df0b61d3b5a 238 dataCfg->counter = 0;
Michael J. Spencer 2:1df0b61d3b5a 239 dataCfg->status = 0;
Michael J. Spencer 2:1df0b61d3b5a 240
Michael J. Spencer 2:1df0b61d3b5a 241 if(SPI_GetDataSize (SPIx) == 8)
Michael J. Spencer 2:1df0b61d3b5a 242 dataword = 0;
Michael J. Spencer 2:1df0b61d3b5a 243 else dataword = 1;
Michael J. Spencer 2:1df0b61d3b5a 244 if (xfType == SPI_TRANSFER_POLLING){
Michael J. Spencer 2:1df0b61d3b5a 245
Michael J. Spencer 2:1df0b61d3b5a 246 if (dataword == 0){
Michael J. Spencer 2:1df0b61d3b5a 247 rdata8 = (uint8_t *)dataCfg->rx_data;
Michael J. Spencer 2:1df0b61d3b5a 248 wdata8 = (uint8_t *)dataCfg->tx_data;
Michael J. Spencer 2:1df0b61d3b5a 249 } else {
Michael J. Spencer 2:1df0b61d3b5a 250 rdata16 = (uint16_t *)dataCfg->rx_data;
Michael J. Spencer 2:1df0b61d3b5a 251 wdata16 = (uint16_t *)dataCfg->tx_data;
Michael J. Spencer 2:1df0b61d3b5a 252 }
Michael J. Spencer 2:1df0b61d3b5a 253
Michael J. Spencer 2:1df0b61d3b5a 254 while(dataCfg->counter < dataCfg->length)
Michael J. Spencer 2:1df0b61d3b5a 255 {
Michael J. Spencer 2:1df0b61d3b5a 256 // Write data to buffer
Michael J. Spencer 2:1df0b61d3b5a 257 if(dataCfg->tx_data == NULL){
Michael J. Spencer 2:1df0b61d3b5a 258 if (dataword == 0){
Michael J. Spencer 2:1df0b61d3b5a 259 SPI_SendData(SPIx, 0xFF);
Michael J. Spencer 2:1df0b61d3b5a 260 } else {
Michael J. Spencer 2:1df0b61d3b5a 261 SPI_SendData(SPIx, 0xFFFF);
Michael J. Spencer 2:1df0b61d3b5a 262 }
Michael J. Spencer 2:1df0b61d3b5a 263 } else {
Michael J. Spencer 2:1df0b61d3b5a 264 if (dataword == 0){
Michael J. Spencer 2:1df0b61d3b5a 265 SPI_SendData(SPIx, *wdata8);
Michael J. Spencer 2:1df0b61d3b5a 266 wdata8++;
Michael J. Spencer 2:1df0b61d3b5a 267 } else {
Michael J. Spencer 2:1df0b61d3b5a 268 SPI_SendData(SPIx, *wdata16);
Michael J. Spencer 2:1df0b61d3b5a 269 wdata16++;
Michael J. Spencer 2:1df0b61d3b5a 270 }
Michael J. Spencer 2:1df0b61d3b5a 271 }
Michael J. Spencer 2:1df0b61d3b5a 272 // Wait for transfer complete
Michael J. Spencer 2:1df0b61d3b5a 273 while (!((stat = SPIx->SPSR) & SPI_SPSR_SPIF));
Michael J. Spencer 2:1df0b61d3b5a 274 // Check for error
Michael J. Spencer 2:1df0b61d3b5a 275 if (stat & (SPI_SPSR_ABRT | SPI_SPSR_MODF | SPI_SPSR_ROVR | SPI_SPSR_WCOL)){
Michael J. Spencer 2:1df0b61d3b5a 276 // save status
Michael J. Spencer 2:1df0b61d3b5a 277 dataCfg->status = stat | SPI_STAT_ERROR;
Michael J. Spencer 2:1df0b61d3b5a 278 return (dataCfg->counter);
Michael J. Spencer 2:1df0b61d3b5a 279 }
Michael J. Spencer 2:1df0b61d3b5a 280 // Read data from SPI dat
Michael J. Spencer 2:1df0b61d3b5a 281 temp = (uint32_t) SPI_ReceiveData(SPIx);
Michael J. Spencer 2:1df0b61d3b5a 282
Michael J. Spencer 2:1df0b61d3b5a 283 // Store data to destination
Michael J. Spencer 2:1df0b61d3b5a 284 if (dataCfg->rx_data != NULL)
Michael J. Spencer 2:1df0b61d3b5a 285 {
Michael J. Spencer 2:1df0b61d3b5a 286 if (dataword == 0){
Michael J. Spencer 2:1df0b61d3b5a 287 *(rdata8) = (uint8_t) temp;
Michael J. Spencer 2:1df0b61d3b5a 288 rdata8++;
Michael J. Spencer 2:1df0b61d3b5a 289 } else {
Michael J. Spencer 2:1df0b61d3b5a 290 *(rdata16) = (uint16_t) temp;
Michael J. Spencer 2:1df0b61d3b5a 291 rdata16++;
Michael J. Spencer 2:1df0b61d3b5a 292 }
Michael J. Spencer 2:1df0b61d3b5a 293 }
Michael J. Spencer 2:1df0b61d3b5a 294 // Increase counter
Michael J. Spencer 2:1df0b61d3b5a 295 if (dataword == 0){
Michael J. Spencer 2:1df0b61d3b5a 296 dataCfg->counter++;
Michael J. Spencer 2:1df0b61d3b5a 297 } else {
Michael J. Spencer 2:1df0b61d3b5a 298 dataCfg->counter += 2;
Michael J. Spencer 2:1df0b61d3b5a 299 }
Michael J. Spencer 2:1df0b61d3b5a 300 }
Michael J. Spencer 2:1df0b61d3b5a 301
Michael J. Spencer 2:1df0b61d3b5a 302 // Return length of actual data transferred
Michael J. Spencer 2:1df0b61d3b5a 303 // save status
Michael J. Spencer 2:1df0b61d3b5a 304 dataCfg->status = stat | SPI_STAT_DONE;
Michael J. Spencer 2:1df0b61d3b5a 305 return (dataCfg->counter);
Michael J. Spencer 2:1df0b61d3b5a 306 }
Michael J. Spencer 2:1df0b61d3b5a 307 // Interrupt mode
Michael J. Spencer 2:1df0b61d3b5a 308 else {
Michael J. Spencer 2:1df0b61d3b5a 309
Michael J. Spencer 2:1df0b61d3b5a 310 // Check if interrupt flag is already set
Michael J. Spencer 2:1df0b61d3b5a 311 if(SPIx->SPINT & SPI_SPINT_INTFLAG){
Michael J. Spencer 2:1df0b61d3b5a 312 SPIx->SPINT = SPI_SPINT_INTFLAG;
Michael J. Spencer 2:1df0b61d3b5a 313 }
Michael J. Spencer 2:1df0b61d3b5a 314 if (dataCfg->counter < dataCfg->length){
Michael J. Spencer 2:1df0b61d3b5a 315 // Write data to buffer
Michael J. Spencer 2:1df0b61d3b5a 316 if(dataCfg->tx_data == NULL){
Michael J. Spencer 2:1df0b61d3b5a 317 if (dataword == 0){
Michael J. Spencer 2:1df0b61d3b5a 318 SPI_SendData(SPIx, 0xFF);
Michael J. Spencer 2:1df0b61d3b5a 319 } else {
Michael J. Spencer 2:1df0b61d3b5a 320 SPI_SendData(SPIx, 0xFFFF);
Michael J. Spencer 2:1df0b61d3b5a 321 }
Michael J. Spencer 2:1df0b61d3b5a 322 } else {
Michael J. Spencer 2:1df0b61d3b5a 323 if (dataword == 0){
Michael J. Spencer 2:1df0b61d3b5a 324 SPI_SendData(SPIx, (*(uint8_t *)dataCfg->tx_data));
Michael J. Spencer 2:1df0b61d3b5a 325 } else {
Michael J. Spencer 2:1df0b61d3b5a 326 SPI_SendData(SPIx, (*(uint16_t *)dataCfg->tx_data));
Michael J. Spencer 2:1df0b61d3b5a 327 }
Michael J. Spencer 2:1df0b61d3b5a 328 }
Michael J. Spencer 2:1df0b61d3b5a 329 SPI_IntCmd(SPIx, ENABLE);
Michael J. Spencer 2:1df0b61d3b5a 330 } else {
Michael J. Spencer 2:1df0b61d3b5a 331 // Save status
Michael J. Spencer 2:1df0b61d3b5a 332 dataCfg->status = SPI_STAT_DONE;
Michael J. Spencer 2:1df0b61d3b5a 333 }
Michael J. Spencer 2:1df0b61d3b5a 334 return (0);
Michael J. Spencer 2:1df0b61d3b5a 335 }
Michael J. Spencer 2:1df0b61d3b5a 336 }
Michael J. Spencer 2:1df0b61d3b5a 337
Michael J. Spencer 2:1df0b61d3b5a 338
Michael J. Spencer 2:1df0b61d3b5a 339 /********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 340 * @brief Enable or disable SPIx interrupt.
Michael J. Spencer 2:1df0b61d3b5a 341 * @param[in] SPIx SPI peripheral selected, should be LPC_SPI
Michael J. Spencer 2:1df0b61d3b5a 342 * @param[in] NewState New state of specified UART interrupt type,
Michael J. Spencer 2:1df0b61d3b5a 343 * should be:
Michael J. Spencer 2:1df0b61d3b5a 344 * - ENALBE: Enable this SPI interrupt.
Michael J. Spencer 2:1df0b61d3b5a 345 * - DISALBE: Disable this SPI interrupt.
Michael J. Spencer 2:1df0b61d3b5a 346 * @return None
Michael J. Spencer 2:1df0b61d3b5a 347 *********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 348 void SPI_IntCmd(LPC_SPI_TypeDef *SPIx, FunctionalState NewState)
Michael J. Spencer 2:1df0b61d3b5a 349 {
Michael J. Spencer 2:1df0b61d3b5a 350 CHECK_PARAM(PARAM_SPIx(SPIx));
Michael J. Spencer 2:1df0b61d3b5a 351 CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
Michael J. Spencer 2:1df0b61d3b5a 352
Michael J. Spencer 2:1df0b61d3b5a 353 if (NewState == ENABLE)
Michael J. Spencer 2:1df0b61d3b5a 354 {
Michael J. Spencer 2:1df0b61d3b5a 355 SPIx->SPCR |= SPI_SPCR_SPIE;
Michael J. Spencer 2:1df0b61d3b5a 356 }
Michael J. Spencer 2:1df0b61d3b5a 357 else
Michael J. Spencer 2:1df0b61d3b5a 358 {
Michael J. Spencer 2:1df0b61d3b5a 359 SPIx->SPCR &= (~SPI_SPCR_SPIE) & SPI_SPCR_BITMASK;
Michael J. Spencer 2:1df0b61d3b5a 360 }
Michael J. Spencer 2:1df0b61d3b5a 361 }
Michael J. Spencer 2:1df0b61d3b5a 362
Michael J. Spencer 2:1df0b61d3b5a 363
Michael J. Spencer 2:1df0b61d3b5a 364 /********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 365 * @brief Checks whether the SPI interrupt flag is set or not.
Michael J. Spencer 2:1df0b61d3b5a 366 * @param[in] SPIx SPI peripheral selected, should be LPC_SPI
Michael J. Spencer 2:1df0b61d3b5a 367 * @return The new state of SPI Interrupt Flag (SET or RESET)
Michael J. Spencer 2:1df0b61d3b5a 368 *********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 369 IntStatus SPI_GetIntStatus (LPC_SPI_TypeDef *SPIx)
Michael J. Spencer 2:1df0b61d3b5a 370 {
Michael J. Spencer 2:1df0b61d3b5a 371 CHECK_PARAM(PARAM_SPIx(SPIx));
Michael J. Spencer 2:1df0b61d3b5a 372
Michael J. Spencer 2:1df0b61d3b5a 373 return ((SPIx->SPINT & SPI_SPINT_INTFLAG) ? SET : RESET);
Michael J. Spencer 2:1df0b61d3b5a 374 }
Michael J. Spencer 2:1df0b61d3b5a 375
Michael J. Spencer 2:1df0b61d3b5a 376 /********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 377 * @brief Clear SPI interrupt flag.
Michael J. Spencer 2:1df0b61d3b5a 378 * @param[in] SPIx SPI peripheral selected, should be LPC_SPI
Michael J. Spencer 2:1df0b61d3b5a 379 * @return None
Michael J. Spencer 2:1df0b61d3b5a 380 *********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 381 void SPI_ClearIntPending(LPC_SPI_TypeDef *SPIx)
Michael J. Spencer 2:1df0b61d3b5a 382 {
Michael J. Spencer 2:1df0b61d3b5a 383 CHECK_PARAM(PARAM_SPIx(SPIx));
Michael J. Spencer 2:1df0b61d3b5a 384
Michael J. Spencer 2:1df0b61d3b5a 385 SPIx->SPINT = SPI_SPINT_INTFLAG;
Michael J. Spencer 2:1df0b61d3b5a 386 }
Michael J. Spencer 2:1df0b61d3b5a 387
Michael J. Spencer 2:1df0b61d3b5a 388 /********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 389 * @brief Get current value of SPI Status register in SPIx peripheral.
Michael J. Spencer 2:1df0b61d3b5a 390 * @param[in] SPIx SPI peripheral selected, should be LPC_SPI
Michael J. Spencer 2:1df0b61d3b5a 391 * @return Current value of SPI Status register in SPI peripheral.
Michael J. Spencer 2:1df0b61d3b5a 392 * Note: The return value of this function must be used with
Michael J. Spencer 2:1df0b61d3b5a 393 * SPI_CheckStatus() to determine current flag status
Michael J. Spencer 2:1df0b61d3b5a 394 * corresponding to each SPI status type. Because some flags in
Michael J. Spencer 2:1df0b61d3b5a 395 * SPI Status register will be cleared after reading, the next reading
Michael J. Spencer 2:1df0b61d3b5a 396 * SPI Status register could not be correct. So this function used to
Michael J. Spencer 2:1df0b61d3b5a 397 * read SPI status register in one time only, then the return value
Michael J. Spencer 2:1df0b61d3b5a 398 * used to check all flags.
Michael J. Spencer 2:1df0b61d3b5a 399 *********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 400 uint32_t SPI_GetStatus(LPC_SPI_TypeDef* SPIx)
Michael J. Spencer 2:1df0b61d3b5a 401 {
Michael J. Spencer 2:1df0b61d3b5a 402 CHECK_PARAM(PARAM_SPIx(SPIx));
Michael J. Spencer 2:1df0b61d3b5a 403
Michael J. Spencer 2:1df0b61d3b5a 404 return (SPIx->SPSR & SPI_SPSR_BITMASK);
Michael J. Spencer 2:1df0b61d3b5a 405 }
Michael J. Spencer 2:1df0b61d3b5a 406
Michael J. Spencer 2:1df0b61d3b5a 407 /********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 408 * @brief Checks whether the specified SPI Status flag is set or not
Michael J. Spencer 2:1df0b61d3b5a 409 * via inputSPIStatus parameter.
Michael J. Spencer 2:1df0b61d3b5a 410 * @param[in] inputSPIStatus Value to check status of each flag type.
Michael J. Spencer 2:1df0b61d3b5a 411 * This value is the return value from SPI_GetStatus().
Michael J. Spencer 2:1df0b61d3b5a 412 * @param[in] SPIStatus Specifies the SPI status flag to check,
Michael J. Spencer 2:1df0b61d3b5a 413 * should be one of the following:
Michael J. Spencer 2:1df0b61d3b5a 414 - SPI_STAT_ABRT: Slave abort.
Michael J. Spencer 2:1df0b61d3b5a 415 - SPI_STAT_MODF: Mode fault.
Michael J. Spencer 2:1df0b61d3b5a 416 - SPI_STAT_ROVR: Read overrun.
Michael J. Spencer 2:1df0b61d3b5a 417 - SPI_STAT_WCOL: Write collision.
Michael J. Spencer 2:1df0b61d3b5a 418 - SPI_STAT_SPIF: SPI transfer complete.
Michael J. Spencer 2:1df0b61d3b5a 419 * @return The new state of SPIStatus (SET or RESET)
Michael J. Spencer 2:1df0b61d3b5a 420 *********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 421 FlagStatus SPI_CheckStatus (uint32_t inputSPIStatus, uint8_t SPIStatus)
Michael J. Spencer 2:1df0b61d3b5a 422 {
Michael J. Spencer 2:1df0b61d3b5a 423 CHECK_PARAM(PARAM_SPI_STAT(SPIStatus));
Michael J. Spencer 2:1df0b61d3b5a 424
Michael J. Spencer 2:1df0b61d3b5a 425 return ((inputSPIStatus & SPIStatus) ? SET : RESET);
Michael J. Spencer 2:1df0b61d3b5a 426 }
Michael J. Spencer 2:1df0b61d3b5a 427
Michael J. Spencer 2:1df0b61d3b5a 428
Michael J. Spencer 2:1df0b61d3b5a 429 /**
Michael J. Spencer 2:1df0b61d3b5a 430 * @}
Michael J. Spencer 2:1df0b61d3b5a 431 */
Michael J. Spencer 2:1df0b61d3b5a 432
Michael J. Spencer 2:1df0b61d3b5a 433 #endif /* _SPI */
Michael J. Spencer 2:1df0b61d3b5a 434
Michael J. Spencer 2:1df0b61d3b5a 435 /**
Michael J. Spencer 2:1df0b61d3b5a 436 * @}
Michael J. Spencer 2:1df0b61d3b5a 437 */
Michael J. Spencer 2:1df0b61d3b5a 438
Michael J. Spencer 2:1df0b61d3b5a 439 /* --------------------------------- End Of File ------------------------------ */
Michael J. Spencer 2:1df0b61d3b5a 440 #endif /* __LPC17XX__ */