Fork of Smoothie to port to mbed non-LPC targets.

Dependencies:   mbed

Fork of Smoothie by Stéphane Cachat

Committer:
Michael J. Spencer
Date:
Fri Feb 28 18:52:52 2014 -0800
Revision:
2:1df0b61d3b5a
Update to latest Smoothie.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Michael J. Spencer 2:1df0b61d3b5a 1 #ifdef __LPC17XX__
Michael J. Spencer 2:1df0b61d3b5a 2
Michael J. Spencer 2:1df0b61d3b5a 3 /**********************************************************************
Michael J. Spencer 2:1df0b61d3b5a 4 * $Id$ lpc17xx_i2s.c 2010-09-23
Michael J. Spencer 2:1df0b61d3b5a 5 *//**
Michael J. Spencer 2:1df0b61d3b5a 6 * @file lpc17xx_gpio.c
Michael J. Spencer 2:1df0b61d3b5a 7 * @brief Contains all functions support for I2S firmware
Michael J. Spencer 2:1df0b61d3b5a 8 * library on LPC17xx
Michael J. Spencer 2:1df0b61d3b5a 9 * @version 3.1
Michael J. Spencer 2:1df0b61d3b5a 10 * @date 23. Sep. 2010
Michael J. Spencer 2:1df0b61d3b5a 11 * @author NXP MCU SW Application Team
Michael J. Spencer 2:1df0b61d3b5a 12 *
Michael J. Spencer 2:1df0b61d3b5a 13 * Copyright(C) 2010, NXP Semiconductor
Michael J. Spencer 2:1df0b61d3b5a 14 * All rights reserved.
Michael J. Spencer 2:1df0b61d3b5a 15 *
Michael J. Spencer 2:1df0b61d3b5a 16 ***********************************************************************
Michael J. Spencer 2:1df0b61d3b5a 17 * Software that is described herein is for illustrative purposes only
Michael J. Spencer 2:1df0b61d3b5a 18 * which provides customers with programming information regarding the
Michael J. Spencer 2:1df0b61d3b5a 19 * products. This software is supplied "AS IS" without any warranties.
Michael J. Spencer 2:1df0b61d3b5a 20 * NXP Semiconductors assumes no responsibility or liability for the
Michael J. Spencer 2:1df0b61d3b5a 21 * use of the software, conveys no license or title under any patent,
Michael J. Spencer 2:1df0b61d3b5a 22 * copyright, or mask work right to the product. NXP Semiconductors
Michael J. Spencer 2:1df0b61d3b5a 23 * reserves the right to make changes in the software without
Michael J. Spencer 2:1df0b61d3b5a 24 * notification. NXP Semiconductors also make no representation or
Michael J. Spencer 2:1df0b61d3b5a 25 * warranty that such application will be suitable for the specified
Michael J. Spencer 2:1df0b61d3b5a 26 * use without further testing or modification.
Michael J. Spencer 2:1df0b61d3b5a 27 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 28
Michael J. Spencer 2:1df0b61d3b5a 29 /* Peripheral group ----------------------------------------------------------- */
Michael J. Spencer 2:1df0b61d3b5a 30 /** @addtogroup I2S
Michael J. Spencer 2:1df0b61d3b5a 31 * @{
Michael J. Spencer 2:1df0b61d3b5a 32 */
Michael J. Spencer 2:1df0b61d3b5a 33
Michael J. Spencer 2:1df0b61d3b5a 34 /* Includes ------------------------------------------------------------------- */
Michael J. Spencer 2:1df0b61d3b5a 35 #include "lpc17xx_i2s.h"
Michael J. Spencer 2:1df0b61d3b5a 36 #include "lpc17xx_clkpwr.h"
Michael J. Spencer 2:1df0b61d3b5a 37
Michael J. Spencer 2:1df0b61d3b5a 38
Michael J. Spencer 2:1df0b61d3b5a 39 /* If this source file built with example, the LPC17xx FW library configuration
Michael J. Spencer 2:1df0b61d3b5a 40 * file in each example directory ("lpc17xx_libcfg.h") must be included,
Michael J. Spencer 2:1df0b61d3b5a 41 * otherwise the default FW library configuration file must be included instead
Michael J. Spencer 2:1df0b61d3b5a 42 */
Michael J. Spencer 2:1df0b61d3b5a 43 #ifdef __BUILD_WITH_EXAMPLE__
Michael J. Spencer 2:1df0b61d3b5a 44 #include "lpc17xx_libcfg.h"
Michael J. Spencer 2:1df0b61d3b5a 45 #else
Michael J. Spencer 2:1df0b61d3b5a 46 #include "lpc17xx_libcfg_default.h"
Michael J. Spencer 2:1df0b61d3b5a 47 #endif /* __BUILD_WITH_EXAMPLE__ */
Michael J. Spencer 2:1df0b61d3b5a 48
Michael J. Spencer 2:1df0b61d3b5a 49
Michael J. Spencer 2:1df0b61d3b5a 50 #ifdef _I2S
Michael J. Spencer 2:1df0b61d3b5a 51
Michael J. Spencer 2:1df0b61d3b5a 52 /* Private Functions ---------------------------------------------------------- */
Michael J. Spencer 2:1df0b61d3b5a 53
Michael J. Spencer 2:1df0b61d3b5a 54 static uint8_t i2s_GetWordWidth(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode);
Michael J. Spencer 2:1df0b61d3b5a 55 static uint8_t i2s_GetChannel(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode);
Michael J. Spencer 2:1df0b61d3b5a 56
Michael J. Spencer 2:1df0b61d3b5a 57 /********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 58 * @brief Get I2S wordwidth value
Michael J. Spencer 2:1df0b61d3b5a 59 * @param[in] I2Sx I2S peripheral selected, should be: LPC_I2S
Michael J. Spencer 2:1df0b61d3b5a 60 * @param[in] TRMode is the I2S mode, should be:
Michael J. Spencer 2:1df0b61d3b5a 61 * - I2S_TX_MODE = 0: transmit mode
Michael J. Spencer 2:1df0b61d3b5a 62 * - I2S_RX_MODE = 1: receive mode
Michael J. Spencer 2:1df0b61d3b5a 63 * @return The wordwidth value, should be: 8,16 or 32
Michael J. Spencer 2:1df0b61d3b5a 64 *********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 65 static uint8_t i2s_GetWordWidth(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode) {
Michael J. Spencer 2:1df0b61d3b5a 66 uint8_t value;
Michael J. Spencer 2:1df0b61d3b5a 67
Michael J. Spencer 2:1df0b61d3b5a 68 CHECK_PARAM(PARAM_I2Sx(I2Sx));
Michael J. Spencer 2:1df0b61d3b5a 69 CHECK_PARAM(PARAM_I2S_TRX(TRMode));
Michael J. Spencer 2:1df0b61d3b5a 70
Michael J. Spencer 2:1df0b61d3b5a 71 if (TRMode == I2S_TX_MODE) {
Michael J. Spencer 2:1df0b61d3b5a 72 value = (I2Sx->I2SDAO) & 0x03; /* get wordwidth bit */
Michael J. Spencer 2:1df0b61d3b5a 73 } else {
Michael J. Spencer 2:1df0b61d3b5a 74 value = (I2Sx->I2SDAI) & 0x03; /* get wordwidth bit */
Michael J. Spencer 2:1df0b61d3b5a 75 }
Michael J. Spencer 2:1df0b61d3b5a 76 switch (value) {
Michael J. Spencer 2:1df0b61d3b5a 77 case I2S_WORDWIDTH_8:
Michael J. Spencer 2:1df0b61d3b5a 78 return 8;
Michael J. Spencer 2:1df0b61d3b5a 79 case I2S_WORDWIDTH_16:
Michael J. Spencer 2:1df0b61d3b5a 80 return 16;
Michael J. Spencer 2:1df0b61d3b5a 81 default:
Michael J. Spencer 2:1df0b61d3b5a 82 return 32;
Michael J. Spencer 2:1df0b61d3b5a 83 }
Michael J. Spencer 2:1df0b61d3b5a 84 }
Michael J. Spencer 2:1df0b61d3b5a 85
Michael J. Spencer 2:1df0b61d3b5a 86 /********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 87 * @brief Get I2S channel value
Michael J. Spencer 2:1df0b61d3b5a 88 * @param[in] I2Sx I2S peripheral selected, should be: LPC_I2S
Michael J. Spencer 2:1df0b61d3b5a 89 * @param[in] TRMode is the I2S mode, should be:
Michael J. Spencer 2:1df0b61d3b5a 90 * - I2S_TX_MODE = 0: transmit mode
Michael J. Spencer 2:1df0b61d3b5a 91 * - I2S_RX_MODE = 1: receive mode
Michael J. Spencer 2:1df0b61d3b5a 92 * @return The channel value, should be: 1(mono) or 2(stereo)
Michael J. Spencer 2:1df0b61d3b5a 93 *********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 94 static uint8_t i2s_GetChannel(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode) {
Michael J. Spencer 2:1df0b61d3b5a 95 uint8_t value;
Michael J. Spencer 2:1df0b61d3b5a 96
Michael J. Spencer 2:1df0b61d3b5a 97 CHECK_PARAM(PARAM_I2Sx(I2Sx));
Michael J. Spencer 2:1df0b61d3b5a 98 CHECK_PARAM(PARAM_I2S_TRX(TRMode));
Michael J. Spencer 2:1df0b61d3b5a 99
Michael J. Spencer 2:1df0b61d3b5a 100 if (TRMode == I2S_TX_MODE) {
Michael J. Spencer 2:1df0b61d3b5a 101 value = ((I2Sx->I2SDAO) & 0x04)>>2; /* get bit[2] */
Michael J. Spencer 2:1df0b61d3b5a 102 } else {
Michael J. Spencer 2:1df0b61d3b5a 103 value = ((I2Sx->I2SDAI) & 0x04)>>2; /* get bit[2] */
Michael J. Spencer 2:1df0b61d3b5a 104 }
Michael J. Spencer 2:1df0b61d3b5a 105 if(value == I2S_MONO) return 1;
Michael J. Spencer 2:1df0b61d3b5a 106 return 2;
Michael J. Spencer 2:1df0b61d3b5a 107 }
Michael J. Spencer 2:1df0b61d3b5a 108
Michael J. Spencer 2:1df0b61d3b5a 109 /* End of Private Functions --------------------------------------------------- */
Michael J. Spencer 2:1df0b61d3b5a 110
Michael J. Spencer 2:1df0b61d3b5a 111
Michael J. Spencer 2:1df0b61d3b5a 112 /* Public Functions ----------------------------------------------------------- */
Michael J. Spencer 2:1df0b61d3b5a 113 /** @addtogroup I2S_Public_Functions
Michael J. Spencer 2:1df0b61d3b5a 114 * @{
Michael J. Spencer 2:1df0b61d3b5a 115 */
Michael J. Spencer 2:1df0b61d3b5a 116
Michael J. Spencer 2:1df0b61d3b5a 117 /********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 118 * @brief Initialize I2S
Michael J. Spencer 2:1df0b61d3b5a 119 * - Turn on power and clock
Michael J. Spencer 2:1df0b61d3b5a 120 * @param[in] I2Sx I2S peripheral selected, should be: LPC_I2S
Michael J. Spencer 2:1df0b61d3b5a 121 * @return none
Michael J. Spencer 2:1df0b61d3b5a 122 *********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 123 void I2S_Init(LPC_I2S_TypeDef *I2Sx) {
Michael J. Spencer 2:1df0b61d3b5a 124 CHECK_PARAM(PARAM_I2Sx(I2Sx));
Michael J. Spencer 2:1df0b61d3b5a 125
Michael J. Spencer 2:1df0b61d3b5a 126 // Turn on power and clock
Michael J. Spencer 2:1df0b61d3b5a 127 CLKPWR_ConfigPPWR(CLKPWR_PCONP_PCI2S, ENABLE);
Michael J. Spencer 2:1df0b61d3b5a 128 LPC_I2S->I2SDAI = LPC_I2S->I2SDAO = 0x00;
Michael J. Spencer 2:1df0b61d3b5a 129 }
Michael J. Spencer 2:1df0b61d3b5a 130
Michael J. Spencer 2:1df0b61d3b5a 131 /********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 132 * @brief Configuration I2S, setting:
Michael J. Spencer 2:1df0b61d3b5a 133 * - master/slave mode
Michael J. Spencer 2:1df0b61d3b5a 134 * - wordwidth value
Michael J. Spencer 2:1df0b61d3b5a 135 * - channel mode
Michael J. Spencer 2:1df0b61d3b5a 136 * @param[in] I2Sx I2S peripheral selected, should be: LPC_I2S
Michael J. Spencer 2:1df0b61d3b5a 137 * @param[in] TRMode transmit/receive mode, should be:
Michael J. Spencer 2:1df0b61d3b5a 138 * - I2S_TX_MODE = 0: transmit mode
Michael J. Spencer 2:1df0b61d3b5a 139 * - I2S_RX_MODE = 1: receive mode
Michael J. Spencer 2:1df0b61d3b5a 140 * @param[in] ConfigStruct pointer to I2S_CFG_Type structure
Michael J. Spencer 2:1df0b61d3b5a 141 * which will be initialized.
Michael J. Spencer 2:1df0b61d3b5a 142 * @return none
Michael J. Spencer 2:1df0b61d3b5a 143 *********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 144 void I2S_Config(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode, I2S_CFG_Type* ConfigStruct)
Michael J. Spencer 2:1df0b61d3b5a 145 {
Michael J. Spencer 2:1df0b61d3b5a 146 uint32_t bps, config;
Michael J. Spencer 2:1df0b61d3b5a 147
Michael J. Spencer 2:1df0b61d3b5a 148 CHECK_PARAM(PARAM_I2Sx(I2Sx));
Michael J. Spencer 2:1df0b61d3b5a 149
Michael J. Spencer 2:1df0b61d3b5a 150 CHECK_PARAM(PARAM_I2S_WORDWIDTH(ConfigStruct->wordwidth));
Michael J. Spencer 2:1df0b61d3b5a 151 CHECK_PARAM(PARAM_I2S_CHANNEL(ConfigStruct->mono));
Michael J. Spencer 2:1df0b61d3b5a 152 CHECK_PARAM(PARAM_I2S_STOP(ConfigStruct->stop));
Michael J. Spencer 2:1df0b61d3b5a 153 CHECK_PARAM(PARAM_I2S_RESET(ConfigStruct->reset));
Michael J. Spencer 2:1df0b61d3b5a 154 CHECK_PARAM(PARAM_I2S_WS_SEL(ConfigStruct->ws_sel));
Michael J. Spencer 2:1df0b61d3b5a 155 CHECK_PARAM(PARAM_I2S_MUTE(ConfigStruct->mute));
Michael J. Spencer 2:1df0b61d3b5a 156
Michael J. Spencer 2:1df0b61d3b5a 157 /* Setup clock */
Michael J. Spencer 2:1df0b61d3b5a 158 bps = (ConfigStruct->wordwidth +1)*8;
Michael J. Spencer 2:1df0b61d3b5a 159
Michael J. Spencer 2:1df0b61d3b5a 160 /* Calculate audio config */
Michael J. Spencer 2:1df0b61d3b5a 161 config = (bps - 1)<<6 | (ConfigStruct->ws_sel)<<5 | (ConfigStruct->reset)<<4 |
Michael J. Spencer 2:1df0b61d3b5a 162 (ConfigStruct->stop)<<3 | (ConfigStruct->mono)<<2 | (ConfigStruct->wordwidth);
Michael J. Spencer 2:1df0b61d3b5a 163
Michael J. Spencer 2:1df0b61d3b5a 164 if(TRMode == I2S_RX_MODE){
Michael J. Spencer 2:1df0b61d3b5a 165 LPC_I2S->I2SDAI = config;
Michael J. Spencer 2:1df0b61d3b5a 166 }else{
Michael J. Spencer 2:1df0b61d3b5a 167 LPC_I2S->I2SDAO = config;
Michael J. Spencer 2:1df0b61d3b5a 168 }
Michael J. Spencer 2:1df0b61d3b5a 169 }
Michael J. Spencer 2:1df0b61d3b5a 170
Michael J. Spencer 2:1df0b61d3b5a 171 /********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 172 * @brief DeInitial both I2S transmit or receive
Michael J. Spencer 2:1df0b61d3b5a 173 * @param[in] I2Sx I2S peripheral selected, should be: LPC_I2S
Michael J. Spencer 2:1df0b61d3b5a 174 * @return none
Michael J. Spencer 2:1df0b61d3b5a 175 *********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 176 void I2S_DeInit(LPC_I2S_TypeDef *I2Sx) {
Michael J. Spencer 2:1df0b61d3b5a 177 CHECK_PARAM(PARAM_I2Sx(I2Sx));
Michael J. Spencer 2:1df0b61d3b5a 178
Michael J. Spencer 2:1df0b61d3b5a 179 // Turn off power and clock
Michael J. Spencer 2:1df0b61d3b5a 180 CLKPWR_ConfigPPWR(CLKPWR_PCONP_PCI2S, DISABLE);
Michael J. Spencer 2:1df0b61d3b5a 181 }
Michael J. Spencer 2:1df0b61d3b5a 182
Michael J. Spencer 2:1df0b61d3b5a 183 /********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 184 * @brief Get I2S Buffer Level
Michael J. Spencer 2:1df0b61d3b5a 185 * @param[in] I2Sx I2S peripheral selected, should be: LPC_I2S
Michael J. Spencer 2:1df0b61d3b5a 186 * @param[in] TRMode Transmit/receive mode, should be:
Michael J. Spencer 2:1df0b61d3b5a 187 * - I2S_TX_MODE = 0: transmit mode
Michael J. Spencer 2:1df0b61d3b5a 188 * - I2S_RX_MODE = 1: receive mode
Michael J. Spencer 2:1df0b61d3b5a 189 * @return current level of Transmit/Receive Buffer
Michael J. Spencer 2:1df0b61d3b5a 190 *********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 191 uint8_t I2S_GetLevel(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode)
Michael J. Spencer 2:1df0b61d3b5a 192 {
Michael J. Spencer 2:1df0b61d3b5a 193 CHECK_PARAM(PARAM_I2Sx(I2Sx));
Michael J. Spencer 2:1df0b61d3b5a 194 CHECK_PARAM(PARAM_I2S_TRX(TRMode));
Michael J. Spencer 2:1df0b61d3b5a 195
Michael J. Spencer 2:1df0b61d3b5a 196 if(TRMode == I2S_TX_MODE)
Michael J. Spencer 2:1df0b61d3b5a 197 {
Michael J. Spencer 2:1df0b61d3b5a 198 return ((I2Sx->I2SSTATE >> 16) & 0xFF);
Michael J. Spencer 2:1df0b61d3b5a 199 }
Michael J. Spencer 2:1df0b61d3b5a 200 else
Michael J. Spencer 2:1df0b61d3b5a 201 {
Michael J. Spencer 2:1df0b61d3b5a 202 return ((I2Sx->I2SSTATE >> 8) & 0xFF);
Michael J. Spencer 2:1df0b61d3b5a 203 }
Michael J. Spencer 2:1df0b61d3b5a 204 }
Michael J. Spencer 2:1df0b61d3b5a 205
Michael J. Spencer 2:1df0b61d3b5a 206 /********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 207 * @brief I2S Start: clear all STOP,RESET and MUTE bit, ready to operate
Michael J. Spencer 2:1df0b61d3b5a 208 * @param[in] I2Sx I2S peripheral selected, should be: LPC_I2S
Michael J. Spencer 2:1df0b61d3b5a 209 * @return none
Michael J. Spencer 2:1df0b61d3b5a 210 *********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 211 void I2S_Start(LPC_I2S_TypeDef *I2Sx)
Michael J. Spencer 2:1df0b61d3b5a 212 {
Michael J. Spencer 2:1df0b61d3b5a 213 //Clear STOP,RESET and MUTE bit
Michael J. Spencer 2:1df0b61d3b5a 214 I2Sx->I2SDAO &= ~I2S_DAI_RESET;
Michael J. Spencer 2:1df0b61d3b5a 215 I2Sx->I2SDAI &= ~I2S_DAI_RESET;
Michael J. Spencer 2:1df0b61d3b5a 216 I2Sx->I2SDAO &= ~I2S_DAI_STOP;
Michael J. Spencer 2:1df0b61d3b5a 217 I2Sx->I2SDAI &= ~I2S_DAI_STOP;
Michael J. Spencer 2:1df0b61d3b5a 218 I2Sx->I2SDAO &= ~I2S_DAI_MUTE;
Michael J. Spencer 2:1df0b61d3b5a 219 }
Michael J. Spencer 2:1df0b61d3b5a 220
Michael J. Spencer 2:1df0b61d3b5a 221 /********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 222 * @brief I2S Send data
Michael J. Spencer 2:1df0b61d3b5a 223 * @param[in] I2Sx I2S peripheral selected, should be: LPC_I2S
Michael J. Spencer 2:1df0b61d3b5a 224 * @param[in] BufferData pointer to uint32_t is the data will be send
Michael J. Spencer 2:1df0b61d3b5a 225 * @return none
Michael J. Spencer 2:1df0b61d3b5a 226 *********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 227 void I2S_Send(LPC_I2S_TypeDef *I2Sx, uint32_t BufferData) {
Michael J. Spencer 2:1df0b61d3b5a 228 CHECK_PARAM(PARAM_I2Sx(I2Sx));
Michael J. Spencer 2:1df0b61d3b5a 229
Michael J. Spencer 2:1df0b61d3b5a 230 I2Sx->I2STXFIFO = BufferData;
Michael J. Spencer 2:1df0b61d3b5a 231 }
Michael J. Spencer 2:1df0b61d3b5a 232
Michael J. Spencer 2:1df0b61d3b5a 233 /********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 234 * @brief I2S Receive Data
Michael J. Spencer 2:1df0b61d3b5a 235 * @param[in] I2Sx pointer to LPC_I2S_TypeDef
Michael J. Spencer 2:1df0b61d3b5a 236 * @return received value
Michael J. Spencer 2:1df0b61d3b5a 237 *********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 238 uint32_t I2S_Receive(LPC_I2S_TypeDef* I2Sx) {
Michael J. Spencer 2:1df0b61d3b5a 239 CHECK_PARAM(PARAM_I2Sx(I2Sx));
Michael J. Spencer 2:1df0b61d3b5a 240
Michael J. Spencer 2:1df0b61d3b5a 241 return (I2Sx->I2SRXFIFO);
Michael J. Spencer 2:1df0b61d3b5a 242
Michael J. Spencer 2:1df0b61d3b5a 243 }
Michael J. Spencer 2:1df0b61d3b5a 244
Michael J. Spencer 2:1df0b61d3b5a 245 /********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 246 * @brief I2S Pause
Michael J. Spencer 2:1df0b61d3b5a 247 * @param[in] I2Sx I2S peripheral selected, should be: LPC_I2S
Michael J. Spencer 2:1df0b61d3b5a 248 * @param[in] TRMode is transmit/receive mode, should be:
Michael J. Spencer 2:1df0b61d3b5a 249 * - I2S_TX_MODE = 0: transmit mode
Michael J. Spencer 2:1df0b61d3b5a 250 * - I2S_RX_MODE = 1: receive mode
Michael J. Spencer 2:1df0b61d3b5a 251 * @return none
Michael J. Spencer 2:1df0b61d3b5a 252 *********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 253 void I2S_Pause(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode) {
Michael J. Spencer 2:1df0b61d3b5a 254 CHECK_PARAM(PARAM_I2Sx(I2Sx));
Michael J. Spencer 2:1df0b61d3b5a 255 CHECK_PARAM(PARAM_I2S_TRX(TRMode));
Michael J. Spencer 2:1df0b61d3b5a 256
Michael J. Spencer 2:1df0b61d3b5a 257 if (TRMode == I2S_TX_MODE) //Transmit mode
Michael J. Spencer 2:1df0b61d3b5a 258 {
Michael J. Spencer 2:1df0b61d3b5a 259 I2Sx->I2SDAO |= I2S_DAO_STOP;
Michael J. Spencer 2:1df0b61d3b5a 260 } else //Receive mode
Michael J. Spencer 2:1df0b61d3b5a 261 {
Michael J. Spencer 2:1df0b61d3b5a 262 I2Sx->I2SDAI |= I2S_DAI_STOP;
Michael J. Spencer 2:1df0b61d3b5a 263 }
Michael J. Spencer 2:1df0b61d3b5a 264 }
Michael J. Spencer 2:1df0b61d3b5a 265
Michael J. Spencer 2:1df0b61d3b5a 266 /********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 267 * @brief I2S Mute
Michael J. Spencer 2:1df0b61d3b5a 268 * @param[in] I2Sx I2S peripheral selected, should be: LPC_I2S
Michael J. Spencer 2:1df0b61d3b5a 269 * @param[in] TRMode is transmit/receive mode, should be:
Michael J. Spencer 2:1df0b61d3b5a 270 * - I2S_TX_MODE = 0: transmit mode
Michael J. Spencer 2:1df0b61d3b5a 271 * - I2S_RX_MODE = 1: receive mode
Michael J. Spencer 2:1df0b61d3b5a 272 * @return none
Michael J. Spencer 2:1df0b61d3b5a 273 *********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 274 void I2S_Mute(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode) {
Michael J. Spencer 2:1df0b61d3b5a 275 CHECK_PARAM(PARAM_I2Sx(I2Sx));
Michael J. Spencer 2:1df0b61d3b5a 276 CHECK_PARAM(PARAM_I2S_TRX(TRMode));
Michael J. Spencer 2:1df0b61d3b5a 277
Michael J. Spencer 2:1df0b61d3b5a 278 if (TRMode == I2S_TX_MODE) //Transmit mode
Michael J. Spencer 2:1df0b61d3b5a 279 {
Michael J. Spencer 2:1df0b61d3b5a 280 I2Sx->I2SDAO |= I2S_DAO_MUTE;
Michael J. Spencer 2:1df0b61d3b5a 281 } else //Receive mode
Michael J. Spencer 2:1df0b61d3b5a 282 {
Michael J. Spencer 2:1df0b61d3b5a 283 I2Sx->I2SDAI |= I2S_DAI_MUTE;
Michael J. Spencer 2:1df0b61d3b5a 284 }
Michael J. Spencer 2:1df0b61d3b5a 285 }
Michael J. Spencer 2:1df0b61d3b5a 286
Michael J. Spencer 2:1df0b61d3b5a 287 /********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 288 * @brief I2S Stop
Michael J. Spencer 2:1df0b61d3b5a 289 * @param[in] I2Sx I2S peripheral selected, should be: LPC_I2S
Michael J. Spencer 2:1df0b61d3b5a 290 * @param[in] TRMode is transmit/receive mode, should be:
Michael J. Spencer 2:1df0b61d3b5a 291 * - I2S_TX_MODE = 0: transmit mode
Michael J. Spencer 2:1df0b61d3b5a 292 * - I2S_RX_MODE = 1: receive mode
Michael J. Spencer 2:1df0b61d3b5a 293 * @return none
Michael J. Spencer 2:1df0b61d3b5a 294 *********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 295 void I2S_Stop(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode) {
Michael J. Spencer 2:1df0b61d3b5a 296 CHECK_PARAM(PARAM_I2Sx(I2Sx));
Michael J. Spencer 2:1df0b61d3b5a 297 CHECK_PARAM(PARAM_I2S_TRX(TRMode));
Michael J. Spencer 2:1df0b61d3b5a 298
Michael J. Spencer 2:1df0b61d3b5a 299 if (TRMode == I2S_TX_MODE) //Transmit mode
Michael J. Spencer 2:1df0b61d3b5a 300 {
Michael J. Spencer 2:1df0b61d3b5a 301 I2Sx->I2SDAO &= ~I2S_DAO_MUTE;
Michael J. Spencer 2:1df0b61d3b5a 302 I2Sx->I2SDAO |= I2S_DAO_STOP;
Michael J. Spencer 2:1df0b61d3b5a 303 I2Sx->I2SDAO |= I2S_DAO_RESET;
Michael J. Spencer 2:1df0b61d3b5a 304 } else //Receive mode
Michael J. Spencer 2:1df0b61d3b5a 305 {
Michael J. Spencer 2:1df0b61d3b5a 306 I2Sx->I2SDAI |= I2S_DAI_STOP;
Michael J. Spencer 2:1df0b61d3b5a 307 I2Sx->I2SDAI |= I2S_DAI_RESET;
Michael J. Spencer 2:1df0b61d3b5a 308 }
Michael J. Spencer 2:1df0b61d3b5a 309 }
Michael J. Spencer 2:1df0b61d3b5a 310
Michael J. Spencer 2:1df0b61d3b5a 311 /********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 312 * @brief Set frequency for I2S
Michael J. Spencer 2:1df0b61d3b5a 313 * @param[in] I2Sx I2S peripheral selected, should be: LPC_I2S
Michael J. Spencer 2:1df0b61d3b5a 314 * @param[in] Freq is the frequency for I2S will be set. It can range
Michael J. Spencer 2:1df0b61d3b5a 315 * from 16-96 kHz(16, 22.05, 32, 44.1, 48, 96kHz)
Michael J. Spencer 2:1df0b61d3b5a 316 * @param[in] TRMode is transmit/receive mode, should be:
Michael J. Spencer 2:1df0b61d3b5a 317 * - I2S_TX_MODE = 0: transmit mode
Michael J. Spencer 2:1df0b61d3b5a 318 * - I2S_RX_MODE = 1: receive mode
Michael J. Spencer 2:1df0b61d3b5a 319 * @return Status: ERROR or SUCCESS
Michael J. Spencer 2:1df0b61d3b5a 320 *********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 321 Status I2S_FreqConfig(LPC_I2S_TypeDef *I2Sx, uint32_t Freq, uint8_t TRMode) {
Michael J. Spencer 2:1df0b61d3b5a 322
Michael J. Spencer 2:1df0b61d3b5a 323 uint32_t i2sMclk;
Michael J. Spencer 2:1df0b61d3b5a 324 uint8_t bitrate, channel, wordwidth;
Michael J. Spencer 2:1df0b61d3b5a 325
Michael J. Spencer 2:1df0b61d3b5a 326 CHECK_PARAM(PARAM_I2Sx(I2Sx));
Michael J. Spencer 2:1df0b61d3b5a 327 CHECK_PARAM(PRAM_I2S_FREQ(Freq));
Michael J. Spencer 2:1df0b61d3b5a 328 CHECK_PARAM(PARAM_I2S_TRX(TRMode));
Michael J. Spencer 2:1df0b61d3b5a 329
Michael J. Spencer 2:1df0b61d3b5a 330 //set i2s reference is i2s_pclk/2 as default
Michael J. Spencer 2:1df0b61d3b5a 331 i2sMclk = CLKPWR_GetPCLK(CLKPWR_PCLKSEL_I2S)/2;
Michael J. Spencer 2:1df0b61d3b5a 332 I2Sx->I2STXRATE = 1 | (1<<8);
Michael J. Spencer 2:1df0b61d3b5a 333 I2Sx->I2SRXRATE = 1 | (1<<8);
Michael J. Spencer 2:1df0b61d3b5a 334 if(TRMode == I2S_TX_MODE)
Michael J. Spencer 2:1df0b61d3b5a 335 {
Michael J. Spencer 2:1df0b61d3b5a 336 channel = i2s_GetChannel(I2Sx,I2S_TX_MODE);
Michael J. Spencer 2:1df0b61d3b5a 337 wordwidth = i2s_GetWordWidth(I2Sx,I2S_TX_MODE);
Michael J. Spencer 2:1df0b61d3b5a 338 }
Michael J. Spencer 2:1df0b61d3b5a 339 else
Michael J. Spencer 2:1df0b61d3b5a 340 {
Michael J. Spencer 2:1df0b61d3b5a 341 channel = i2s_GetChannel(I2Sx,I2S_RX_MODE);
Michael J. Spencer 2:1df0b61d3b5a 342 wordwidth = i2s_GetWordWidth(I2Sx,I2S_RX_MODE);
Michael J. Spencer 2:1df0b61d3b5a 343 }
Michael J. Spencer 2:1df0b61d3b5a 344 bitrate = i2sMclk/(Freq * channel * wordwidth) - 1;
Michael J. Spencer 2:1df0b61d3b5a 345 if (TRMode == I2S_TX_MODE)// Transmitter
Michael J. Spencer 2:1df0b61d3b5a 346 {
Michael J. Spencer 2:1df0b61d3b5a 347 I2Sx->I2STXBITRATE = bitrate;
Michael J. Spencer 2:1df0b61d3b5a 348 } else //Receiver
Michael J. Spencer 2:1df0b61d3b5a 349 {
Michael J. Spencer 2:1df0b61d3b5a 350 I2Sx->I2SRXBITRATE = bitrate;
Michael J. Spencer 2:1df0b61d3b5a 351 }
Michael J. Spencer 2:1df0b61d3b5a 352 return SUCCESS;
Michael J. Spencer 2:1df0b61d3b5a 353 }
Michael J. Spencer 2:1df0b61d3b5a 354
Michael J. Spencer 2:1df0b61d3b5a 355 /********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 356 * @brief I2S set bitrate
Michael J. Spencer 2:1df0b61d3b5a 357 * @param[in] I2Sx I2S peripheral selected, should be: LPC_I2S
Michael J. Spencer 2:1df0b61d3b5a 358 * @param[in] bitrate value will be set
Michael J. Spencer 2:1df0b61d3b5a 359 * bitrate value should be in range: 0 .. 63
Michael J. Spencer 2:1df0b61d3b5a 360 * @param[in] TRMode is transmit/receive mode, should be:
Michael J. Spencer 2:1df0b61d3b5a 361 * - I2S_TX_MODE = 0: transmit mode
Michael J. Spencer 2:1df0b61d3b5a 362 * - I2S_RX_MODE = 1: receive mode
Michael J. Spencer 2:1df0b61d3b5a 363 * @return none
Michael J. Spencer 2:1df0b61d3b5a 364 *********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 365 void I2S_SetBitRate(LPC_I2S_TypeDef *I2Sx, uint8_t bitrate, uint8_t TRMode)
Michael J. Spencer 2:1df0b61d3b5a 366 {
Michael J. Spencer 2:1df0b61d3b5a 367 CHECK_PARAM(PARAM_I2Sx(I2Sx));
Michael J. Spencer 2:1df0b61d3b5a 368 CHECK_PARAM(PARAM_I2S_BITRATE(bitrate));
Michael J. Spencer 2:1df0b61d3b5a 369 CHECK_PARAM(PARAM_I2S_TRX(TRMode));
Michael J. Spencer 2:1df0b61d3b5a 370
Michael J. Spencer 2:1df0b61d3b5a 371 if(TRMode == I2S_TX_MODE)
Michael J. Spencer 2:1df0b61d3b5a 372 {
Michael J. Spencer 2:1df0b61d3b5a 373 I2Sx->I2STXBITRATE = bitrate;
Michael J. Spencer 2:1df0b61d3b5a 374 }
Michael J. Spencer 2:1df0b61d3b5a 375 else
Michael J. Spencer 2:1df0b61d3b5a 376 {
Michael J. Spencer 2:1df0b61d3b5a 377 I2Sx->I2SRXBITRATE = bitrate;
Michael J. Spencer 2:1df0b61d3b5a 378 }
Michael J. Spencer 2:1df0b61d3b5a 379 }
Michael J. Spencer 2:1df0b61d3b5a 380
Michael J. Spencer 2:1df0b61d3b5a 381 /********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 382 * @brief Configuration operating mode for I2S
Michael J. Spencer 2:1df0b61d3b5a 383 * @param[in] I2Sx I2S peripheral selected, should be: LPC_I2S
Michael J. Spencer 2:1df0b61d3b5a 384 * @param[in] ModeConfig pointer to I2S_MODEConf_Type will be used to
Michael J. Spencer 2:1df0b61d3b5a 385 * configure
Michael J. Spencer 2:1df0b61d3b5a 386 * @param[in] TRMode is transmit/receive mode, should be:
Michael J. Spencer 2:1df0b61d3b5a 387 * - I2S_TX_MODE = 0: transmit mode
Michael J. Spencer 2:1df0b61d3b5a 388 * - I2S_RX_MODE = 1: receive mode
Michael J. Spencer 2:1df0b61d3b5a 389 * @return none
Michael J. Spencer 2:1df0b61d3b5a 390 *********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 391 void I2S_ModeConfig(LPC_I2S_TypeDef *I2Sx, I2S_MODEConf_Type* ModeConfig,
Michael J. Spencer 2:1df0b61d3b5a 392 uint8_t TRMode)
Michael J. Spencer 2:1df0b61d3b5a 393 {
Michael J. Spencer 2:1df0b61d3b5a 394 CHECK_PARAM(PARAM_I2Sx(I2Sx));
Michael J. Spencer 2:1df0b61d3b5a 395 CHECK_PARAM(PARAM_I2S_CLKSEL(ModeConfig->clksel));
Michael J. Spencer 2:1df0b61d3b5a 396 CHECK_PARAM(PARAM_I2S_4PIN(ModeConfig->fpin));
Michael J. Spencer 2:1df0b61d3b5a 397 CHECK_PARAM(PARAM_I2S_MCLK(ModeConfig->mcena));
Michael J. Spencer 2:1df0b61d3b5a 398 CHECK_PARAM(PARAM_I2S_TRX(TRMode));
Michael J. Spencer 2:1df0b61d3b5a 399
Michael J. Spencer 2:1df0b61d3b5a 400 if (TRMode == I2S_TX_MODE) {
Michael J. Spencer 2:1df0b61d3b5a 401 I2Sx->I2STXMODE &= ~0x0F; //clear bit 3:0 in I2STXMODE register
Michael J. Spencer 2:1df0b61d3b5a 402 if (ModeConfig->clksel == I2S_CLKSEL_MCLK) {
Michael J. Spencer 2:1df0b61d3b5a 403 I2Sx->I2STXMODE |= 0x02;
Michael J. Spencer 2:1df0b61d3b5a 404 }
Michael J. Spencer 2:1df0b61d3b5a 405 if (ModeConfig->fpin == I2S_4PIN_ENABLE) {
Michael J. Spencer 2:1df0b61d3b5a 406 I2Sx->I2STXMODE |= (1 << 2);
Michael J. Spencer 2:1df0b61d3b5a 407 }
Michael J. Spencer 2:1df0b61d3b5a 408 if (ModeConfig->mcena == I2S_MCLK_ENABLE) {
Michael J. Spencer 2:1df0b61d3b5a 409 I2Sx->I2STXMODE |= (1 << 3);
Michael J. Spencer 2:1df0b61d3b5a 410 }
Michael J. Spencer 2:1df0b61d3b5a 411 } else {
Michael J. Spencer 2:1df0b61d3b5a 412 I2Sx->I2SRXMODE &= ~0x0F; //clear bit 3:0 in I2STXMODE register
Michael J. Spencer 2:1df0b61d3b5a 413 if (ModeConfig->clksel == I2S_CLKSEL_MCLK) {
Michael J. Spencer 2:1df0b61d3b5a 414 I2Sx->I2SRXMODE |= 0x02;
Michael J. Spencer 2:1df0b61d3b5a 415 }
Michael J. Spencer 2:1df0b61d3b5a 416 if (ModeConfig->fpin == I2S_4PIN_ENABLE) {
Michael J. Spencer 2:1df0b61d3b5a 417 I2Sx->I2SRXMODE |= (1 << 2);
Michael J. Spencer 2:1df0b61d3b5a 418 }
Michael J. Spencer 2:1df0b61d3b5a 419 if (ModeConfig->mcena == I2S_MCLK_ENABLE) {
Michael J. Spencer 2:1df0b61d3b5a 420 I2Sx->I2SRXMODE |= (1 << 3);
Michael J. Spencer 2:1df0b61d3b5a 421 }
Michael J. Spencer 2:1df0b61d3b5a 422 }
Michael J. Spencer 2:1df0b61d3b5a 423 }
Michael J. Spencer 2:1df0b61d3b5a 424
Michael J. Spencer 2:1df0b61d3b5a 425 /********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 426 * @brief Configure DMA operation for I2S
Michael J. Spencer 2:1df0b61d3b5a 427 * @param[in] I2Sx I2S peripheral selected, should be: LPC_I2S
Michael J. Spencer 2:1df0b61d3b5a 428 * @param[in] DMAConfig pointer to I2S_DMAConf_Type will be used to configure
Michael J. Spencer 2:1df0b61d3b5a 429 * @param[in] TRMode is transmit/receive mode, should be:
Michael J. Spencer 2:1df0b61d3b5a 430 * - I2S_TX_MODE = 0: transmit mode
Michael J. Spencer 2:1df0b61d3b5a 431 * - I2S_RX_MODE = 1: receive mode
Michael J. Spencer 2:1df0b61d3b5a 432 * @return none
Michael J. Spencer 2:1df0b61d3b5a 433 *********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 434 void I2S_DMAConfig(LPC_I2S_TypeDef *I2Sx, I2S_DMAConf_Type* DMAConfig,
Michael J. Spencer 2:1df0b61d3b5a 435 uint8_t TRMode)
Michael J. Spencer 2:1df0b61d3b5a 436 {
Michael J. Spencer 2:1df0b61d3b5a 437 CHECK_PARAM(PARAM_I2Sx(I2Sx));
Michael J. Spencer 2:1df0b61d3b5a 438 CHECK_PARAM(PARAM_I2S_DMA(DMAConfig->DMAIndex));
Michael J. Spencer 2:1df0b61d3b5a 439 CHECK_PARAM(PARAM_I2S_DMA_DEPTH(DMAConfig->depth));
Michael J. Spencer 2:1df0b61d3b5a 440 CHECK_PARAM(PARAM_I2S_TRX(TRMode));
Michael J. Spencer 2:1df0b61d3b5a 441
Michael J. Spencer 2:1df0b61d3b5a 442 if (TRMode == I2S_RX_MODE) {
Michael J. Spencer 2:1df0b61d3b5a 443 if (DMAConfig->DMAIndex == I2S_DMA_1) {
Michael J. Spencer 2:1df0b61d3b5a 444 LPC_I2S->I2SDMA1 = (DMAConfig->depth) << 8;
Michael J. Spencer 2:1df0b61d3b5a 445 } else {
Michael J. Spencer 2:1df0b61d3b5a 446 LPC_I2S->I2SDMA2 = (DMAConfig->depth) << 8;
Michael J. Spencer 2:1df0b61d3b5a 447 }
Michael J. Spencer 2:1df0b61d3b5a 448 } else {
Michael J. Spencer 2:1df0b61d3b5a 449 if (DMAConfig->DMAIndex == I2S_DMA_1) {
Michael J. Spencer 2:1df0b61d3b5a 450 LPC_I2S->I2SDMA1 = (DMAConfig->depth) << 16;
Michael J. Spencer 2:1df0b61d3b5a 451 } else {
Michael J. Spencer 2:1df0b61d3b5a 452 LPC_I2S->I2SDMA2 = (DMAConfig->depth) << 16;
Michael J. Spencer 2:1df0b61d3b5a 453 }
Michael J. Spencer 2:1df0b61d3b5a 454 }
Michael J. Spencer 2:1df0b61d3b5a 455 }
Michael J. Spencer 2:1df0b61d3b5a 456
Michael J. Spencer 2:1df0b61d3b5a 457 /********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 458 * @brief Enable/Disable DMA operation for I2S
Michael J. Spencer 2:1df0b61d3b5a 459 * @param[in] I2Sx: I2S peripheral selected, should be: LPC_I2S
Michael J. Spencer 2:1df0b61d3b5a 460 * @param[in] DMAIndex chose what DMA is used, should be:
Michael J. Spencer 2:1df0b61d3b5a 461 * - I2S_DMA_1 = 0: DMA1
Michael J. Spencer 2:1df0b61d3b5a 462 * - I2S_DMA_2 = 1: DMA2
Michael J. Spencer 2:1df0b61d3b5a 463 * @param[in] TRMode is transmit/receive mode, should be:
Michael J. Spencer 2:1df0b61d3b5a 464 * - I2S_TX_MODE = 0: transmit mode
Michael J. Spencer 2:1df0b61d3b5a 465 * - I2S_RX_MODE = 1: receive mode
Michael J. Spencer 2:1df0b61d3b5a 466 * @param[in] NewState is new state of DMA operation, should be:
Michael J. Spencer 2:1df0b61d3b5a 467 * - ENABLE
Michael J. Spencer 2:1df0b61d3b5a 468 * - DISABLE
Michael J. Spencer 2:1df0b61d3b5a 469 * @return none
Michael J. Spencer 2:1df0b61d3b5a 470 *********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 471 void I2S_DMACmd(LPC_I2S_TypeDef *I2Sx, uint8_t DMAIndex, uint8_t TRMode,
Michael J. Spencer 2:1df0b61d3b5a 472 FunctionalState NewState)
Michael J. Spencer 2:1df0b61d3b5a 473 {
Michael J. Spencer 2:1df0b61d3b5a 474 CHECK_PARAM(PARAM_I2Sx(I2Sx));
Michael J. Spencer 2:1df0b61d3b5a 475 CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
Michael J. Spencer 2:1df0b61d3b5a 476 CHECK_PARAM(PARAM_I2S_DMA(DMAIndex));
Michael J. Spencer 2:1df0b61d3b5a 477 CHECK_PARAM(PARAM_I2S_TRX(TRMode));
Michael J. Spencer 2:1df0b61d3b5a 478
Michael J. Spencer 2:1df0b61d3b5a 479 if (TRMode == I2S_RX_MODE) {
Michael J. Spencer 2:1df0b61d3b5a 480 if (DMAIndex == I2S_DMA_1) {
Michael J. Spencer 2:1df0b61d3b5a 481 if (NewState == ENABLE)
Michael J. Spencer 2:1df0b61d3b5a 482 I2Sx->I2SDMA1 |= 0x01;
Michael J. Spencer 2:1df0b61d3b5a 483 else
Michael J. Spencer 2:1df0b61d3b5a 484 I2Sx->I2SDMA1 &= ~0x01;
Michael J. Spencer 2:1df0b61d3b5a 485 } else {
Michael J. Spencer 2:1df0b61d3b5a 486 if (NewState == ENABLE)
Michael J. Spencer 2:1df0b61d3b5a 487 I2Sx->I2SDMA2 |= 0x01;
Michael J. Spencer 2:1df0b61d3b5a 488 else
Michael J. Spencer 2:1df0b61d3b5a 489 I2Sx->I2SDMA2 &= ~0x01;
Michael J. Spencer 2:1df0b61d3b5a 490 }
Michael J. Spencer 2:1df0b61d3b5a 491 } else {
Michael J. Spencer 2:1df0b61d3b5a 492 if (DMAIndex == I2S_DMA_1) {
Michael J. Spencer 2:1df0b61d3b5a 493 if (NewState == ENABLE)
Michael J. Spencer 2:1df0b61d3b5a 494 I2Sx->I2SDMA1 |= 0x02;
Michael J. Spencer 2:1df0b61d3b5a 495 else
Michael J. Spencer 2:1df0b61d3b5a 496 I2Sx->I2SDMA1 &= ~0x02;
Michael J. Spencer 2:1df0b61d3b5a 497 } else {
Michael J. Spencer 2:1df0b61d3b5a 498 if (NewState == ENABLE)
Michael J. Spencer 2:1df0b61d3b5a 499 I2Sx->I2SDMA2 |= 0x02;
Michael J. Spencer 2:1df0b61d3b5a 500 else
Michael J. Spencer 2:1df0b61d3b5a 501 I2Sx->I2SDMA2 &= ~0x02;
Michael J. Spencer 2:1df0b61d3b5a 502 }
Michael J. Spencer 2:1df0b61d3b5a 503 }
Michael J. Spencer 2:1df0b61d3b5a 504 }
Michael J. Spencer 2:1df0b61d3b5a 505
Michael J. Spencer 2:1df0b61d3b5a 506 /********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 507 * @brief Configure IRQ for I2S
Michael J. Spencer 2:1df0b61d3b5a 508 * @param[in] I2Sx I2S peripheral selected, should be: LPC_I2S
Michael J. Spencer 2:1df0b61d3b5a 509 * @param[in] TRMode is transmit/receive mode, should be:
Michael J. Spencer 2:1df0b61d3b5a 510 * - I2S_TX_MODE = 0: transmit mode
Michael J. Spencer 2:1df0b61d3b5a 511 * - I2S_RX_MODE = 1: receive mode
Michael J. Spencer 2:1df0b61d3b5a 512 * @param[in] level is the FIFO level that triggers IRQ request
Michael J. Spencer 2:1df0b61d3b5a 513 * @return none
Michael J. Spencer 2:1df0b61d3b5a 514 *********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 515 void I2S_IRQConfig(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode, uint8_t level) {
Michael J. Spencer 2:1df0b61d3b5a 516 CHECK_PARAM(PARAM_I2Sx(I2Sx));
Michael J. Spencer 2:1df0b61d3b5a 517 CHECK_PARAM(PARAM_I2S_TRX(TRMode));
Michael J. Spencer 2:1df0b61d3b5a 518 CHECK_PARAM(PARAM_I2S_IRQ_LEVEL(level));
Michael J. Spencer 2:1df0b61d3b5a 519
Michael J. Spencer 2:1df0b61d3b5a 520 if (TRMode == I2S_RX_MODE) {
Michael J. Spencer 2:1df0b61d3b5a 521 I2Sx->I2SIRQ |= (level << 8);
Michael J. Spencer 2:1df0b61d3b5a 522 } else {
Michael J. Spencer 2:1df0b61d3b5a 523 I2Sx->I2SIRQ |= (level << 16);
Michael J. Spencer 2:1df0b61d3b5a 524 }
Michael J. Spencer 2:1df0b61d3b5a 525 }
Michael J. Spencer 2:1df0b61d3b5a 526
Michael J. Spencer 2:1df0b61d3b5a 527 /********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 528 * @brief Enable/Disable IRQ for I2S
Michael J. Spencer 2:1df0b61d3b5a 529 * @param[in] I2Sx I2S peripheral selected, should be: LPC_I2S
Michael J. Spencer 2:1df0b61d3b5a 530 * @param[in] TRMode is transmit/receive mode, should be:
Michael J. Spencer 2:1df0b61d3b5a 531 * - I2S_TX_MODE = 0: transmit mode
Michael J. Spencer 2:1df0b61d3b5a 532 * - I2S_RX_MODE = 1: receive mode
Michael J. Spencer 2:1df0b61d3b5a 533 * @param[in] NewState is new state of DMA operation, should be:
Michael J. Spencer 2:1df0b61d3b5a 534 * - ENABLE
Michael J. Spencer 2:1df0b61d3b5a 535 * - DISABLE
Michael J. Spencer 2:1df0b61d3b5a 536 * @return none
Michael J. Spencer 2:1df0b61d3b5a 537 *********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 538 void I2S_IRQCmd(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode, FunctionalState NewState) {
Michael J. Spencer 2:1df0b61d3b5a 539 CHECK_PARAM(PARAM_I2Sx(I2Sx));
Michael J. Spencer 2:1df0b61d3b5a 540 CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
Michael J. Spencer 2:1df0b61d3b5a 541
Michael J. Spencer 2:1df0b61d3b5a 542 if (TRMode == I2S_RX_MODE) {
Michael J. Spencer 2:1df0b61d3b5a 543 if (NewState == ENABLE)
Michael J. Spencer 2:1df0b61d3b5a 544 I2Sx->I2SIRQ |= 0x01;
Michael J. Spencer 2:1df0b61d3b5a 545 else
Michael J. Spencer 2:1df0b61d3b5a 546 I2Sx->I2SIRQ &= ~0x01;
Michael J. Spencer 2:1df0b61d3b5a 547 //Enable DMA
Michael J. Spencer 2:1df0b61d3b5a 548
Michael J. Spencer 2:1df0b61d3b5a 549 } else {
Michael J. Spencer 2:1df0b61d3b5a 550 if (NewState == ENABLE)
Michael J. Spencer 2:1df0b61d3b5a 551 I2Sx->I2SIRQ |= 0x02;
Michael J. Spencer 2:1df0b61d3b5a 552 else
Michael J. Spencer 2:1df0b61d3b5a 553 I2Sx->I2SIRQ &= ~0x02;
Michael J. Spencer 2:1df0b61d3b5a 554 }
Michael J. Spencer 2:1df0b61d3b5a 555 }
Michael J. Spencer 2:1df0b61d3b5a 556
Michael J. Spencer 2:1df0b61d3b5a 557 /********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 558 * @brief Get I2S interrupt status
Michael J. Spencer 2:1df0b61d3b5a 559 * @param[in] I2Sx I2S peripheral selected, should be: LPC_I2S
Michael J. Spencer 2:1df0b61d3b5a 560 * @param[in] TRMode is transmit/receive mode, should be:
Michael J. Spencer 2:1df0b61d3b5a 561 * - I2S_TX_MODE = 0: transmit mode
Michael J. Spencer 2:1df0b61d3b5a 562 * - I2S_RX_MODE = 1: receive mode
Michael J. Spencer 2:1df0b61d3b5a 563 * @return FunctionState should be:
Michael J. Spencer 2:1df0b61d3b5a 564 * - ENABLE: interrupt is enable
Michael J. Spencer 2:1df0b61d3b5a 565 * - DISABLE: interrupt is disable
Michael J. Spencer 2:1df0b61d3b5a 566 *********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 567 FunctionalState I2S_GetIRQStatus(LPC_I2S_TypeDef *I2Sx,uint8_t TRMode)
Michael J. Spencer 2:1df0b61d3b5a 568 {
Michael J. Spencer 2:1df0b61d3b5a 569 CHECK_PARAM(PARAM_I2Sx(I2Sx));
Michael J. Spencer 2:1df0b61d3b5a 570 if(TRMode == I2S_TX_MODE)
Michael J. Spencer 2:1df0b61d3b5a 571 return ((FunctionalState)((I2Sx->I2SIRQ >> 1)&0x01));
Michael J. Spencer 2:1df0b61d3b5a 572 else
Michael J. Spencer 2:1df0b61d3b5a 573 return ((FunctionalState)((I2Sx->I2SIRQ)&0x01));
Michael J. Spencer 2:1df0b61d3b5a 574 }
Michael J. Spencer 2:1df0b61d3b5a 575
Michael J. Spencer 2:1df0b61d3b5a 576 /********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 577 * @brief Get I2S interrupt depth
Michael J. Spencer 2:1df0b61d3b5a 578 * @param[in] I2Sx I2S peripheral selected, should be: LPC_I2S
Michael J. Spencer 2:1df0b61d3b5a 579 * @param[in] TRMode is transmit/receive mode, should be:
Michael J. Spencer 2:1df0b61d3b5a 580 * - I2S_TX_MODE = 0: transmit mode
Michael J. Spencer 2:1df0b61d3b5a 581 * - I2S_RX_MODE = 1: receive mode
Michael J. Spencer 2:1df0b61d3b5a 582 * @return depth of FIFO level on which to create an irq request
Michael J. Spencer 2:1df0b61d3b5a 583 *********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 584 uint8_t I2S_GetIRQDepth(LPC_I2S_TypeDef *I2Sx,uint8_t TRMode)
Michael J. Spencer 2:1df0b61d3b5a 585 {
Michael J. Spencer 2:1df0b61d3b5a 586 CHECK_PARAM(PARAM_I2Sx(I2Sx));
Michael J. Spencer 2:1df0b61d3b5a 587 if(TRMode == I2S_TX_MODE)
Michael J. Spencer 2:1df0b61d3b5a 588 return (((I2Sx->I2SIRQ)>>16)&0xFF);
Michael J. Spencer 2:1df0b61d3b5a 589 else
Michael J. Spencer 2:1df0b61d3b5a 590 return (((I2Sx->I2SIRQ)>>8)&0xFF);
Michael J. Spencer 2:1df0b61d3b5a 591 }
Michael J. Spencer 2:1df0b61d3b5a 592 /**
Michael J. Spencer 2:1df0b61d3b5a 593 * @}
Michael J. Spencer 2:1df0b61d3b5a 594 */
Michael J. Spencer 2:1df0b61d3b5a 595
Michael J. Spencer 2:1df0b61d3b5a 596 #endif /* _I2S */
Michael J. Spencer 2:1df0b61d3b5a 597
Michael J. Spencer 2:1df0b61d3b5a 598 /**
Michael J. Spencer 2:1df0b61d3b5a 599 * @}
Michael J. Spencer 2:1df0b61d3b5a 600 */
Michael J. Spencer 2:1df0b61d3b5a 601
Michael J. Spencer 2:1df0b61d3b5a 602 /* --------------------------------- End Of File ------------------------------ */
Michael J. Spencer 2:1df0b61d3b5a 603
Michael J. Spencer 2:1df0b61d3b5a 604 #endif /* __LPC17XX__ */