Fork of Smoothie to port to mbed non-LPC targets.
Fork of Smoothie by
libs/LPC17xx/LPC17xxLib/inc/lpc17xx_gpio.h@2:1df0b61d3b5a, 2014-02-28 (annotated)
- Committer:
- Michael J. Spencer
- Date:
- Fri Feb 28 18:52:52 2014 -0800
- Revision:
- 2:1df0b61d3b5a
Update to latest Smoothie.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
Michael J. Spencer |
2:1df0b61d3b5a | 1 | /********************************************************************** |
Michael J. Spencer |
2:1df0b61d3b5a | 2 | * $Id$ lpc17xx_gpio.h 2010-06-18 |
Michael J. Spencer |
2:1df0b61d3b5a | 3 | *//** |
Michael J. Spencer |
2:1df0b61d3b5a | 4 | * @file lpc17xx_gpio.h |
Michael J. Spencer |
2:1df0b61d3b5a | 5 | * @brief Contains all macro definitions and function prototypes |
Michael J. Spencer |
2:1df0b61d3b5a | 6 | * support for GPDMA firmware library on LPC17xx |
Michael J. Spencer |
2:1df0b61d3b5a | 7 | * @version 3.0 |
Michael J. Spencer |
2:1df0b61d3b5a | 8 | * @date 18. June. 2010 |
Michael J. Spencer |
2:1df0b61d3b5a | 9 | * @author NXP MCU SW Application Team |
Michael J. Spencer |
2:1df0b61d3b5a | 10 | * |
Michael J. Spencer |
2:1df0b61d3b5a | 11 | * Copyright(C) 2010, NXP Semiconductor |
Michael J. Spencer |
2:1df0b61d3b5a | 12 | * All rights reserved. |
Michael J. Spencer |
2:1df0b61d3b5a | 13 | * |
Michael J. Spencer |
2:1df0b61d3b5a | 14 | *********************************************************************** |
Michael J. Spencer |
2:1df0b61d3b5a | 15 | * Software that is described herein is for illustrative purposes only |
Michael J. Spencer |
2:1df0b61d3b5a | 16 | * which provides customers with programming information regarding the |
Michael J. Spencer |
2:1df0b61d3b5a | 17 | * products. This software is supplied "AS IS" without any warranties. |
Michael J. Spencer |
2:1df0b61d3b5a | 18 | * NXP Semiconductors assumes no responsibility or liability for the |
Michael J. Spencer |
2:1df0b61d3b5a | 19 | * use of the software, conveys no license or title under any patent, |
Michael J. Spencer |
2:1df0b61d3b5a | 20 | * copyright, or mask work right to the product. NXP Semiconductors |
Michael J. Spencer |
2:1df0b61d3b5a | 21 | * reserves the right to make changes in the software without |
Michael J. Spencer |
2:1df0b61d3b5a | 22 | * notification. NXP Semiconductors also make no representation or |
Michael J. Spencer |
2:1df0b61d3b5a | 23 | * warranty that such application will be suitable for the specified |
Michael J. Spencer |
2:1df0b61d3b5a | 24 | * use without further testing or modification. |
Michael J. Spencer |
2:1df0b61d3b5a | 25 | **********************************************************************/ |
Michael J. Spencer |
2:1df0b61d3b5a | 26 | |
Michael J. Spencer |
2:1df0b61d3b5a | 27 | /* Peripheral group ----------------------------------------------------------- */ |
Michael J. Spencer |
2:1df0b61d3b5a | 28 | /** @defgroup GPIO GPIO (General Purpose Input/Output) |
Michael J. Spencer |
2:1df0b61d3b5a | 29 | * @ingroup LPC1700CMSIS_FwLib_Drivers |
Michael J. Spencer |
2:1df0b61d3b5a | 30 | * @{ |
Michael J. Spencer |
2:1df0b61d3b5a | 31 | */ |
Michael J. Spencer |
2:1df0b61d3b5a | 32 | |
Michael J. Spencer |
2:1df0b61d3b5a | 33 | #ifndef LPC17XX_GPIO_H_ |
Michael J. Spencer |
2:1df0b61d3b5a | 34 | #define LPC17XX_GPIO_H_ |
Michael J. Spencer |
2:1df0b61d3b5a | 35 | |
Michael J. Spencer |
2:1df0b61d3b5a | 36 | /* Includes ------------------------------------------------------------------- */ |
Michael J. Spencer |
2:1df0b61d3b5a | 37 | #include "LPC17xx.h" |
Michael J. Spencer |
2:1df0b61d3b5a | 38 | #include "lpc_types.h" |
Michael J. Spencer |
2:1df0b61d3b5a | 39 | |
Michael J. Spencer |
2:1df0b61d3b5a | 40 | |
Michael J. Spencer |
2:1df0b61d3b5a | 41 | #ifdef __cplusplus |
Michael J. Spencer |
2:1df0b61d3b5a | 42 | extern "C" |
Michael J. Spencer |
2:1df0b61d3b5a | 43 | { |
Michael J. Spencer |
2:1df0b61d3b5a | 44 | #endif |
Michael J. Spencer |
2:1df0b61d3b5a | 45 | |
Michael J. Spencer |
2:1df0b61d3b5a | 46 | /* Public Macros -------------------------------------------------------------- */ |
Michael J. Spencer |
2:1df0b61d3b5a | 47 | /** @defgroup GPIO_Public_Macros GPIO Public Macros |
Michael J. Spencer |
2:1df0b61d3b5a | 48 | * @{ |
Michael J. Spencer |
2:1df0b61d3b5a | 49 | */ |
Michael J. Spencer |
2:1df0b61d3b5a | 50 | |
Michael J. Spencer |
2:1df0b61d3b5a | 51 | /** Fast GPIO port 0 byte accessible definition */ |
Michael J. Spencer |
2:1df0b61d3b5a | 52 | #define GPIO0_Byte ((GPIO_Byte_TypeDef *)(LPC_GPIO0_BASE)) |
Michael J. Spencer |
2:1df0b61d3b5a | 53 | /** Fast GPIO port 1 byte accessible definition */ |
Michael J. Spencer |
2:1df0b61d3b5a | 54 | #define GPIO1_Byte ((GPIO_Byte_TypeDef *)(LPC_GPIO1_BASE)) |
Michael J. Spencer |
2:1df0b61d3b5a | 55 | /** Fast GPIO port 2 byte accessible definition */ |
Michael J. Spencer |
2:1df0b61d3b5a | 56 | #define GPIO2_Byte ((GPIO_Byte_TypeDef *)(LPC_GPIO2_BASE)) |
Michael J. Spencer |
2:1df0b61d3b5a | 57 | /** Fast GPIO port 3 byte accessible definition */ |
Michael J. Spencer |
2:1df0b61d3b5a | 58 | #define GPIO3_Byte ((GPIO_Byte_TypeDef *)(LPC_GPIO3_BASE)) |
Michael J. Spencer |
2:1df0b61d3b5a | 59 | /** Fast GPIO port 4 byte accessible definition */ |
Michael J. Spencer |
2:1df0b61d3b5a | 60 | #define GPIO4_Byte ((GPIO_Byte_TypeDef *)(LPC_GPIO4_BASE)) |
Michael J. Spencer |
2:1df0b61d3b5a | 61 | |
Michael J. Spencer |
2:1df0b61d3b5a | 62 | |
Michael J. Spencer |
2:1df0b61d3b5a | 63 | /** Fast GPIO port 0 half-word accessible definition */ |
Michael J. Spencer |
2:1df0b61d3b5a | 64 | #define GPIO0_HalfWord ((GPIO_HalfWord_TypeDef *)(LPC_GPIO0_BASE)) |
Michael J. Spencer |
2:1df0b61d3b5a | 65 | /** Fast GPIO port 1 half-word accessible definition */ |
Michael J. Spencer |
2:1df0b61d3b5a | 66 | #define GPIO1_HalfWord ((GPIO_HalfWord_TypeDef *)(LPC_GPIO1_BASE)) |
Michael J. Spencer |
2:1df0b61d3b5a | 67 | /** Fast GPIO port 2 half-word accessible definition */ |
Michael J. Spencer |
2:1df0b61d3b5a | 68 | #define GPIO2_HalfWord ((GPIO_HalfWord_TypeDef *)(LPC_GPIO2_BASE)) |
Michael J. Spencer |
2:1df0b61d3b5a | 69 | /** Fast GPIO port 3 half-word accessible definition */ |
Michael J. Spencer |
2:1df0b61d3b5a | 70 | #define GPIO3_HalfWord ((GPIO_HalfWord_TypeDef *)(LPC_GPIO3_BASE)) |
Michael J. Spencer |
2:1df0b61d3b5a | 71 | /** Fast GPIO port 4 half-word accessible definition */ |
Michael J. Spencer |
2:1df0b61d3b5a | 72 | #define GPIO4_HalfWord ((GPIO_HalfWord_TypeDef *)(LPC_GPIO4_BASE)) |
Michael J. Spencer |
2:1df0b61d3b5a | 73 | |
Michael J. Spencer |
2:1df0b61d3b5a | 74 | /** |
Michael J. Spencer |
2:1df0b61d3b5a | 75 | * @} |
Michael J. Spencer |
2:1df0b61d3b5a | 76 | */ |
Michael J. Spencer |
2:1df0b61d3b5a | 77 | |
Michael J. Spencer |
2:1df0b61d3b5a | 78 | /* Public Types --------------------------------------------------------------- */ |
Michael J. Spencer |
2:1df0b61d3b5a | 79 | /** @defgroup GPIO_Public_Types GPIO Public Types |
Michael J. Spencer |
2:1df0b61d3b5a | 80 | * @{ |
Michael J. Spencer |
2:1df0b61d3b5a | 81 | */ |
Michael J. Spencer |
2:1df0b61d3b5a | 82 | |
Michael J. Spencer |
2:1df0b61d3b5a | 83 | /** |
Michael J. Spencer |
2:1df0b61d3b5a | 84 | * @brief Fast GPIO port byte type definition |
Michael J. Spencer |
2:1df0b61d3b5a | 85 | */ |
Michael J. Spencer |
2:1df0b61d3b5a | 86 | typedef struct { |
Michael J. Spencer |
2:1df0b61d3b5a | 87 | __IO uint8_t FIODIR[4]; /**< FIO direction register in byte-align */ |
Michael J. Spencer |
2:1df0b61d3b5a | 88 | uint32_t RESERVED0[3]; /**< Reserved */ |
Michael J. Spencer |
2:1df0b61d3b5a | 89 | __IO uint8_t FIOMASK[4]; /**< FIO mask register in byte-align */ |
Michael J. Spencer |
2:1df0b61d3b5a | 90 | __IO uint8_t FIOPIN[4]; /**< FIO pin register in byte align */ |
Michael J. Spencer |
2:1df0b61d3b5a | 91 | __IO uint8_t FIOSET[4]; /**< FIO set register in byte-align */ |
Michael J. Spencer |
2:1df0b61d3b5a | 92 | __O uint8_t FIOCLR[4]; /**< FIO clear register in byte-align */ |
Michael J. Spencer |
2:1df0b61d3b5a | 93 | } GPIO_Byte_TypeDef; |
Michael J. Spencer |
2:1df0b61d3b5a | 94 | |
Michael J. Spencer |
2:1df0b61d3b5a | 95 | |
Michael J. Spencer |
2:1df0b61d3b5a | 96 | /** |
Michael J. Spencer |
2:1df0b61d3b5a | 97 | * @brief Fast GPIO port half-word type definition |
Michael J. Spencer |
2:1df0b61d3b5a | 98 | */ |
Michael J. Spencer |
2:1df0b61d3b5a | 99 | typedef struct { |
Michael J. Spencer |
2:1df0b61d3b5a | 100 | __IO uint16_t FIODIRL; /**< FIO direction register lower halfword part */ |
Michael J. Spencer |
2:1df0b61d3b5a | 101 | __IO uint16_t FIODIRU; /**< FIO direction register upper halfword part */ |
Michael J. Spencer |
2:1df0b61d3b5a | 102 | uint32_t RESERVED0[3]; /**< Reserved */ |
Michael J. Spencer |
2:1df0b61d3b5a | 103 | __IO uint16_t FIOMASKL; /**< FIO mask register lower halfword part */ |
Michael J. Spencer |
2:1df0b61d3b5a | 104 | __IO uint16_t FIOMASKU; /**< FIO mask register upper halfword part */ |
Michael J. Spencer |
2:1df0b61d3b5a | 105 | __IO uint16_t FIOPINL; /**< FIO pin register lower halfword part */ |
Michael J. Spencer |
2:1df0b61d3b5a | 106 | __IO uint16_t FIOPINU; /**< FIO pin register upper halfword part */ |
Michael J. Spencer |
2:1df0b61d3b5a | 107 | __IO uint16_t FIOSETL; /**< FIO set register lower halfword part */ |
Michael J. Spencer |
2:1df0b61d3b5a | 108 | __IO uint16_t FIOSETU; /**< FIO set register upper halfword part */ |
Michael J. Spencer |
2:1df0b61d3b5a | 109 | __O uint16_t FIOCLRL; /**< FIO clear register lower halfword part */ |
Michael J. Spencer |
2:1df0b61d3b5a | 110 | __O uint16_t FIOCLRU; /**< FIO clear register upper halfword part */ |
Michael J. Spencer |
2:1df0b61d3b5a | 111 | } GPIO_HalfWord_TypeDef; |
Michael J. Spencer |
2:1df0b61d3b5a | 112 | |
Michael J. Spencer |
2:1df0b61d3b5a | 113 | /** |
Michael J. Spencer |
2:1df0b61d3b5a | 114 | * @} |
Michael J. Spencer |
2:1df0b61d3b5a | 115 | */ |
Michael J. Spencer |
2:1df0b61d3b5a | 116 | |
Michael J. Spencer |
2:1df0b61d3b5a | 117 | |
Michael J. Spencer |
2:1df0b61d3b5a | 118 | /* Public Functions ----------------------------------------------------------- */ |
Michael J. Spencer |
2:1df0b61d3b5a | 119 | /** @defgroup GPIO_Public_Functions GPIO Public Functions |
Michael J. Spencer |
2:1df0b61d3b5a | 120 | * @{ |
Michael J. Spencer |
2:1df0b61d3b5a | 121 | */ |
Michael J. Spencer |
2:1df0b61d3b5a | 122 | |
Michael J. Spencer |
2:1df0b61d3b5a | 123 | /* GPIO style ------------------------------- */ |
Michael J. Spencer |
2:1df0b61d3b5a | 124 | void GPIO_SetDir(uint8_t portNum, uint32_t bitValue, uint8_t dir); |
Michael J. Spencer |
2:1df0b61d3b5a | 125 | void GPIO_SetValue(uint8_t portNum, uint32_t bitValue); |
Michael J. Spencer |
2:1df0b61d3b5a | 126 | void GPIO_ClearValue(uint8_t portNum, uint32_t bitValue); |
Michael J. Spencer |
2:1df0b61d3b5a | 127 | uint32_t GPIO_ReadValue(uint8_t portNum); |
Michael J. Spencer |
2:1df0b61d3b5a | 128 | void GPIO_IntCmd(uint8_t portNum, uint32_t bitValue, uint8_t edgeState); |
Michael J. Spencer |
2:1df0b61d3b5a | 129 | FunctionalState GPIO_GetIntStatus(uint8_t portNum, uint32_t pinNum, uint8_t edgeState); |
Michael J. Spencer |
2:1df0b61d3b5a | 130 | void GPIO_ClearInt(uint8_t portNum, uint32_t bitValue); |
Michael J. Spencer |
2:1df0b61d3b5a | 131 | |
Michael J. Spencer |
2:1df0b61d3b5a | 132 | /* FIO (word-accessible) style ------------------------------- */ |
Michael J. Spencer |
2:1df0b61d3b5a | 133 | void FIO_SetDir(uint8_t portNum, uint32_t bitValue, uint8_t dir); |
Michael J. Spencer |
2:1df0b61d3b5a | 134 | void FIO_SetValue(uint8_t portNum, uint32_t bitValue); |
Michael J. Spencer |
2:1df0b61d3b5a | 135 | void FIO_ClearValue(uint8_t portNum, uint32_t bitValue); |
Michael J. Spencer |
2:1df0b61d3b5a | 136 | uint32_t FIO_ReadValue(uint8_t portNum); |
Michael J. Spencer |
2:1df0b61d3b5a | 137 | void FIO_SetMask(uint8_t portNum, uint32_t bitValue, uint8_t maskValue); |
Michael J. Spencer |
2:1df0b61d3b5a | 138 | void FIO_IntCmd(uint8_t portNum, uint32_t bitValue, uint8_t edgeState); |
Michael J. Spencer |
2:1df0b61d3b5a | 139 | FunctionalState FIO_GetIntStatus(uint8_t portNum, uint32_t pinNum, uint8_t edgeState); |
Michael J. Spencer |
2:1df0b61d3b5a | 140 | void FIO_ClearInt(uint8_t portNum, uint32_t pinNum); |
Michael J. Spencer |
2:1df0b61d3b5a | 141 | |
Michael J. Spencer |
2:1df0b61d3b5a | 142 | /* FIO (halfword-accessible) style ------------------------------- */ |
Michael J. Spencer |
2:1df0b61d3b5a | 143 | void FIO_HalfWordSetDir(uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue, uint8_t dir); |
Michael J. Spencer |
2:1df0b61d3b5a | 144 | void FIO_HalfWordSetMask(uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue, uint8_t maskValue); |
Michael J. Spencer |
2:1df0b61d3b5a | 145 | void FIO_HalfWordSetValue(uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue); |
Michael J. Spencer |
2:1df0b61d3b5a | 146 | void FIO_HalfWordClearValue(uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue); |
Michael J. Spencer |
2:1df0b61d3b5a | 147 | uint16_t FIO_HalfWordReadValue(uint8_t portNum, uint8_t halfwordNum); |
Michael J. Spencer |
2:1df0b61d3b5a | 148 | |
Michael J. Spencer |
2:1df0b61d3b5a | 149 | /* FIO (byte-accessible) style ------------------------------- */ |
Michael J. Spencer |
2:1df0b61d3b5a | 150 | void FIO_ByteSetDir(uint8_t portNum, uint8_t byteNum, uint8_t bitValue, uint8_t dir); |
Michael J. Spencer |
2:1df0b61d3b5a | 151 | void FIO_ByteSetMask(uint8_t portNum, uint8_t byteNum, uint8_t bitValue, uint8_t maskValue); |
Michael J. Spencer |
2:1df0b61d3b5a | 152 | void FIO_ByteSetValue(uint8_t portNum, uint8_t byteNum, uint8_t bitValue); |
Michael J. Spencer |
2:1df0b61d3b5a | 153 | void FIO_ByteClearValue(uint8_t portNum, uint8_t byteNum, uint8_t bitValue); |
Michael J. Spencer |
2:1df0b61d3b5a | 154 | uint8_t FIO_ByteReadValue(uint8_t portNum, uint8_t byteNum); |
Michael J. Spencer |
2:1df0b61d3b5a | 155 | |
Michael J. Spencer |
2:1df0b61d3b5a | 156 | /** |
Michael J. Spencer |
2:1df0b61d3b5a | 157 | * @} |
Michael J. Spencer |
2:1df0b61d3b5a | 158 | */ |
Michael J. Spencer |
2:1df0b61d3b5a | 159 | |
Michael J. Spencer |
2:1df0b61d3b5a | 160 | |
Michael J. Spencer |
2:1df0b61d3b5a | 161 | #ifdef __cplusplus |
Michael J. Spencer |
2:1df0b61d3b5a | 162 | } |
Michael J. Spencer |
2:1df0b61d3b5a | 163 | #endif |
Michael J. Spencer |
2:1df0b61d3b5a | 164 | |
Michael J. Spencer |
2:1df0b61d3b5a | 165 | #endif /* LPC17XX_GPIO_H_ */ |
Michael J. Spencer |
2:1df0b61d3b5a | 166 | |
Michael J. Spencer |
2:1df0b61d3b5a | 167 | /** |
Michael J. Spencer |
2:1df0b61d3b5a | 168 | * @} |
Michael J. Spencer |
2:1df0b61d3b5a | 169 | */ |
Michael J. Spencer |
2:1df0b61d3b5a | 170 | |
Michael J. Spencer |
2:1df0b61d3b5a | 171 | /* --------------------------------- End Of File ------------------------------ */ |