Daniel Vizcaya
/
04_RTOS_Embebidos
Entrega 3er corte - sistemas embebidos
Diff: mbed-os/targets/targets.json
- Revision:
- 0:6ad07c9019fd
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/mbed-os/targets/targets.json Wed May 30 00:01:50 2018 +0000 @@ -0,0 +1,4036 @@ +{ + "Target": { + "core": null, + "default_toolchain": "ARM", + "supported_toolchains": null, + "extra_labels": [], + "is_disk_virtual": false, + "macros": [], + "device_has": [], + "features": [], + "detect_code": [], + "public": false, + "default_lib": "std", + "bootloader_supported": false, + "config": { + "console-uart-flow-control": { + "help": "Console hardware flow control. Options: null, RTS, CTS, RTSCTS.", + "value": null + } + } + }, + "CM4_UARM": { + "inherits": ["Target"], + "core": "Cortex-M4", + "default_toolchain": "uARM", + "public": false, + "supported_toolchains": ["uARM"], + "default_lib": "small" + }, + "CM4_ARM": { + "inherits": ["Target"], + "core": "Cortex-M4", + "public": false, + "supported_toolchains": ["ARM"] + }, + "CM4F_UARM": { + "inherits": ["Target"], + "core": "Cortex-M4F", + "default_toolchain": "uARM", + "public": false, + "supported_toolchains": ["uARM"], + "default_lib": "small" + }, + "CM4F_ARM": { + "inherits": ["Target"], + "core": "Cortex-M4F", + "public": false, + "supported_toolchains": ["ARM"] + }, + "LPCTarget": { + "inherits": ["Target"], + "post_binary_hook": {"function": "LPCTargetCode.lpc_patch"}, + "public": false + }, + "LPC11C24": { + "inherits": ["LPCTarget"], + "core": "Cortex-M0", + "extra_labels": ["NXP", "LPC11XX_11CXX", "LPC11CXX"], + "OUTPUT_EXT": "hex", + "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""], + "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"], + "device_has": ["ANALOGIN", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"], + "device_name": "LPC11C24FBD48/301" + }, + "LPC1114": { + "inherits": ["LPCTarget"], + "core": "Cortex-M0", + "default_toolchain": "uARM", + "extra_labels": ["NXP", "LPC11XX_11CXX", "LPC11XX"], + "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""], + "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"], + "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"], + "default_lib": "small", + "release_versions": ["2"], + "device_name": "LPC1114FN28/102" + }, + "LPC11U24": { + "inherits": ["LPCTarget"], + "core": "Cortex-M0", + "default_toolchain": "uARM", + "extra_labels": ["NXP", "LPC11UXX", "LPC11U24_401"], + "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""], + "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"], + "detect_code": ["1040"], + "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"], + "default_lib": "small", + "release_versions": ["2"], + "device_name": "LPC11U24FBD48/401" + }, + "OC_MBUINO": { + "inherits": ["LPC11U24"], + "macros": ["TARGET_LPC11U24", "CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""], + "extra_labels": ["NXP", "LPC11UXX"], + "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"], + "release_versions": ["2"] + }, + "LPC11U24_301": { + "inherits": ["LPCTarget"], + "core": "Cortex-M0", + "extra_labels": ["NXP", "LPC11UXX"], + "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""], + "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"], + "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"], + "device_name": "LPC11U24FHI33/301" + }, + "LPC11U34_421": { + "inherits": ["LPCTarget"], + "core": "Cortex-M0", + "default_toolchain": "uARM", + "extra_labels": ["NXP", "LPC11UXX"], + "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""], + "supported_toolchains": ["ARM", "uARM", "GCC_ARM"], + "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"], + "default_lib": "small", + "device_name": "LPC11U34FBD48/311" + }, + "MICRONFCBOARD": { + "inherits": ["LPC11U34_421"], + "macros_add": ["LPC11U34_421", "APPNEARME_MICRONFCBOARD"], + "extra_labels_add": ["APPNEARME_MICRONFCBOARD"], + "release_versions": ["2"], + "device_name": "LPC11U34FBD48/311" + }, + "LPC11U35_401": { + "inherits": ["LPCTarget"], + "core": "Cortex-M0", + "default_toolchain": "uARM", + "extra_labels": ["NXP", "LPC11UXX"], + "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""], + "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"], + "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"], + "default_lib": "small", + "release_versions": ["2"], + "device_name": "LPC11U35FBD48/401" + }, + "LPC11U35_501": { + "inherits": ["LPCTarget"], + "core": "Cortex-M0", + "default_toolchain": "uARM", + "extra_labels": ["NXP", "LPC11UXX", "MCU_LPC11U35_501"], + "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""], + "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"], + "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"], + "default_lib": "small", + "release_versions": ["2"], + "device_name": "LPC11U35FHI33/501" + }, + "LPC11U35_501_IBDAP": { + "inherits": ["LPCTarget"], + "core": "Cortex-M0", + "default_toolchain": "uARM", + "extra_labels": ["NXP", "LPC11UXX", "MCU_LPC11U35_501"], + "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""], + "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"], + "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"], + "default_lib": "small", + "device_name": "LPC11U35FHI33/501" + }, + "XADOW_M0": { + "inherits": ["LPC11U35_501"] + }, + "LPC11U35_Y5_MBUG": { + "inherits": ["LPCTarget"], + "core": "Cortex-M0", + "default_toolchain": "uARM", + "extra_labels": ["NXP", "LPC11UXX", "MCU_LPC11U35_501"], + "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""], + "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"], + "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"], + "default_lib": "small", + "device_name": "LPC11U35FHI33/501" + }, + "LPC11U37_501": { + "inherits": ["LPCTarget"], + "core": "Cortex-M0", + "default_toolchain": "uARM", + "extra_labels": ["NXP", "LPC11UXX"], + "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""], + "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"], + "default_lib": "small", + "device_name": "LPC11U37FBD64/501" + }, + "LPCCAPPUCCINO": { + "inherits": ["LPC11U37_501"], + "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"], + "device_name": "LPC11U37FBD64/501" + }, + "ARCH_GPRS": { + "supported_form_factors": ["ARDUINO"], + "core": "Cortex-M0", + "default_toolchain": "uARM", + "extra_labels": ["NXP", "LPC11UXX", "LPC11U37_501"], + "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""], + "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"], + "inherits": ["LPCTarget"], + "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"], + "default_lib": "small", + "release_versions": ["2"], + "device_name": "LPC11U37FBD64/501" + }, + "LPC11U68": { + "supported_form_factors": ["ARDUINO"], + "core": "Cortex-M0+", + "default_toolchain": "uARM", + "extra_labels": ["NXP", "LPC11U6X"], + "supported_toolchains": ["ARM", "uARM", "GCC_CR", "GCC_ARM", "IAR"], + "inherits": ["LPCTarget"], + "detect_code": ["1168"], + "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI"], + "default_lib": "small", + "release_versions": ["2"], + "device_name": "LPC11U68JBD100" + }, + "LPC1347": { + "inherits": ["LPCTarget"], + "core": "Cortex-M3", + "extra_labels": ["NXP", "LPC13XX"], + "supported_toolchains": ["ARM", "GCC_ARM", "IAR"], + "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"], + "release_versions": ["2"], + "device_name": "LPC1347FBD48" + }, + "LPC1549": { + "supported_form_factors": ["ARDUINO"], + "core": "Cortex-M3", + "default_toolchain": "uARM", + "extra_labels": ["NXP", "LPC15XX"], + "supported_toolchains": ["uARM", "GCC_CR", "GCC_ARM", "IAR"], + "inherits": ["LPCTarget"], + "detect_code": ["1549"], + "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "INTERRUPTIN", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE"], + "default_lib": "small", + "release_versions": ["2"], + "device_name": "LPC1549JBD64" + }, + "LPC1768": { + "inherits": ["LPCTarget"], + "core": "Cortex-M3", + "extra_labels": ["NXP", "LPC176X", "MBED_LPC1768"], + "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"], + "detect_code": ["1010"], + "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "FLASH"], + "release_versions": ["2", "5"], + "features": ["LWIP"], + "device_name": "LPC1768", + "bootloader_supported": true + }, + "LPC1769": { + "inherits": ["LPC1768"], + "device_name": "LPC1769" + }, + "ARCH_PRO": { + "supported_form_factors": ["ARDUINO"], + "core": "Cortex-M3", + "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"], + "extra_labels": ["NXP", "LPC176X"], + "macros": ["TARGET_LPC1768"], + "inherits": ["LPCTarget"], + "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "FLASH"], + "release_versions": ["2", "5"], + "features": ["LWIP"], + "device_name": "LPC1768", + "bootloader_supported": true + }, + "UBLOX_C027": { + "supported_form_factors": ["ARDUINO"], + "core": "Cortex-M3", + "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"], + "extra_labels": ["NXP", "LPC176X"], + "config": { + "modem_is_on_board": { + "help": "Value: Tells the build system that the modem is on-board as oppose to a plug-in shield/module.", + "value": 1, + "macro_name": "MODEM_ON_BOARD" + }, + "modem_data_connection_type": { + "help": "Value: Defines how the modem is wired up to the MCU, e.g., data connection can be a UART or USB and so forth.", + "value": 1, + "macro_name": "MODEM_ON_BOARD_UART" + } + }, + "macros": ["TARGET_LPC1768"], + "inherits": ["LPCTarget"], + "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "FLASH"], + "release_versions": ["2", "5"], + "features": ["LWIP"], + "device_name": "LPC1768", + "bootloader_supported": true + }, + "XBED_LPC1768": { + "inherits": ["LPCTarget"], + "core": "Cortex-M3", + "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"], + "extra_labels": ["NXP", "LPC176X", "XBED_LPC1768"], + "macros": ["TARGET_LPC1768"], + "detect_code": ["1010"], + "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "FLASH"], + "device_name": "LPC1768" + }, + "LPC810": { + "inherits": ["LPCTarget"], + "core": "Cortex-M0+", + "default_toolchain": "uARM", + "extra_labels": ["NXP", "LPC81X"], + "is_disk_virtual": true, + "supported_toolchains": ["uARM", "IAR", "GCC_ARM"], + "device_has": ["I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE"], + "default_lib": "small", + "device_name": "LPC810M021FN8" + }, + "LPC812": { + "supported_form_factors": ["ARDUINO"], + "core": "Cortex-M0+", + "default_toolchain": "uARM", + "extra_labels": ["NXP", "LPC81X"], + "is_disk_virtual": true, + "supported_toolchains": ["uARM", "IAR", "GCC_ARM"], + "inherits": ["LPCTarget"], + "detect_code": ["1050"], + "device_has": ["I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE"], + "default_lib": "small", + "release_versions": ["2"], + "device_name": "LPC812M101JDH20" + }, + "LPC824": { + "supported_form_factors": ["ARDUINO"], + "core": "Cortex-M0+", + "default_toolchain": "uARM", + "extra_labels": ["NXP", "LPC82X"], + "is_disk_virtual": true, + "supported_toolchains": ["uARM", "GCC_ARM", "GCC_CR", "IAR"], + "inherits": ["LPCTarget"], + "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"], + "default_lib": "small", + "release_versions": ["2"], + "device_name": "LPC824M201JDH20" + }, + "SSCI824": { + "inherits": ["LPCTarget"], + "core": "Cortex-M0+", + "default_toolchain": "uARM", + "extra_labels": ["NXP", "LPC82X"], + "is_disk_virtual": true, + "supported_toolchains": ["uARM", "GCC_ARM"], + "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"], + "default_lib": "small", + "release_versions": ["2"] + }, + "MCU_LPC4088": { + "inherits": ["LPCTarget"], + "core": "Cortex-M4F", + "extra_labels": ["NXP", "LPC408X"], + "is_disk_virtual": true, + "supported_toolchains": ["ARM", "GCC_CR", "GCC_ARM", "IAR"], + "post_binary_hook": { + "function": "LPC4088Code.binary_hook" + }, + "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"], + "features": ["LWIP"], + "device_name": "LPC4088FBD144" + }, + "LPC4088": { + "inherits": ["MCU_LPC4088"], + "release_versions": ["2", "5"] + }, + "LPC4088_DM": { + "inherits": ["MCU_LPC4088"], + "release_versions": ["2", "5"] + }, + "LPC4330_M4": { + "inherits": ["LPCTarget"], + "core": "Cortex-M4F", + "extra_labels": ["NXP", "LPC43XX", "LPC4330"], + "supported_toolchains": ["ARM", "GCC_CR", "IAR", "GCC_ARM"], + "device_has": ["ANALOGIN", "ANALOGOUT", "DEBUG_AWARENESS", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"], + "device_name": "LPC4330" + }, + "LPC4330_M0": { + "inherits": ["LPCTarget"], + "core": "Cortex-M0", + "extra_labels": ["NXP", "LPC43XX", "LPC4330"], + "supported_toolchains": ["ARM", "GCC_CR", "IAR"], + "device_has": ["ANALOGIN", "ANALOGOUT", "DEBUG_AWARENESS", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"] + }, + "LPC4337": { + "inherits": ["LPCTarget"], + "core": "Cortex-M4F", + "extra_labels": ["NXP", "LPC43XX", "LPC4337"], + "supported_toolchains": ["ARM"], + "device_has": ["ANALOGIN", "ANALOGOUT", "DEBUG_AWARENESS", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"], + "release_versions": ["2"], + "device_name": "LPC4337" + }, + "LPC1800": { + "inherits": ["LPCTarget"], + "core": "Cortex-M3", + "extra_labels": ["NXP", "LPC43XX"], + "public": false, + "supported_toolchains": ["ARM", "GCC_CR", "IAR"] + }, + "LPC11U37H_401": { + "supported_form_factors": ["ARDUINO"], + "core": "Cortex-M0", + "default_toolchain": "uARM", + "extra_labels": ["NXP", "LPC11UXX"], + "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""], + "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR"], + "inherits": ["LPCTarget"], + "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"], + "default_lib": "small", + "release_versions": ["2"], + "device_name": "LPC11U37HFBD64/401" + }, + "ELEKTOR_COCORICO": { + "core": "Cortex-M0+", + "default_toolchain": "uARM", + "extra_labels": ["NXP", "LPC81X"], + "supported_toolchains": ["uARM", "GCC_ARM", "IAR"], + "inherits": ["LPCTarget"], + "is_disk_virtual": true, + "detect_code": ["C000"], + "default_lib": "small", + "device_name": "LPC812M101JDH16" + }, + "KL05Z": { + "supported_form_factors": ["ARDUINO"], + "core": "Cortex-M0+", + "default_toolchain": "uARM", + "extra_labels": ["Freescale", "KLXX"], + "is_disk_virtual": true, + "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"], + "inherits": ["Target"], + "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"], + "default_lib": "small", + "release_versions": ["2"], + "device_name": "MKL05Z32xxx4" + }, + "KL25Z": { + "supported_form_factors": ["ARDUINO"], + "core": "Cortex-M0+", + "extra_labels": ["Freescale", "KLXX"], + "is_disk_virtual": true, + "supported_toolchains": ["ARM", "GCC_ARM", "IAR"], + "inherits": ["Target"], + "detect_code": ["0200"], + "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"], + "release_versions": ["2", "5"], + "device_name": "MKL25Z128xxx4" + }, + "KL26Z": { + "supported_form_factors": ["ARDUINO"], + "core": "Cortex-M0+", + "extra_labels": ["Freescale", "KLXX"], + "is_disk_virtual": true, + "supported_toolchains": ["ARM", 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"supported_form_factors": ["ARDUINO"], + "core": "Cortex-M0+", + "supported_toolchains": ["GCC_ARM", "ARM", "IAR"], + "extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "FRDM"], + "macros": ["CPU_MKL82Z128VLK7", "FSL_RTOS_MBED"], + "is_disk_virtual": true, + "inherits": ["Target"], + "detect_code": ["0218"], + "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG"], + "release_versions": ["2", "5"], + "device_name": "MKL82Z128xxx7" + }, + "USENSE": { + "inherits": ["KL82Z"], + "device_has_add": ["LOWPOWERTIMER"], + "extra_labels_remove": ["FRDM"], + "supported_form_factors": [] + }, + "KW24D": { + "supported_form_factors": ["ARDUINO"], + "core": "Cortex-M4", + "supported_toolchains": ["ARM", "GCC_ARM", "IAR"], + "extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "FRDM"], + "is_disk_virtual": true, + "macros": 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"KPSDK_MCUS", "KPSDK_CODE", "MCU_K64F"], + "is_disk_virtual": true, + "macros": ["CPU_MK64FN1M0VMD12", "FSL_RTOS_MBED"], + "inherits": ["Target"], + "detect_code": ["0240"], + "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE", "STDIO_MESSAGES", "STORAGE", "TRNG", "FLASH"], + "features": ["LWIP", "STORAGE"], + "release_versions": ["2", "5"], + "device_name": "MK64FN1M0xxx12", + "bootloader_supported": true + }, + "EV_COG_AD4050LZ": { + "inherits": ["Target"], + "core": "Cortex-M4F", + "supported_toolchains": ["ARM", "GCC_ARM", "IAR"], + "macros": ["__ADUCM4050__", "EV_COG_AD4050LZ"], + "extra_labels": ["Analog_Devices", "ADUCM4X50", "ADUCM4050", "EV_COG_AD4050LZ", "FLASH_CMSIS_ALGO"], + "device_has": ["SERIAL", "STDIO_MESSAGES", "TRNG", "SLEEP", "INTERRUPTIN", "RTC", "SPI", "I2C", "FLASH", "ANALOGIN"], + "device_name": "ADuCM4050", + "detect_code": ["0603"], + "release_versions": ["5"], + "bootloader_supported": true + }, + "EV_COG_AD3029LZ": { + "inherits": ["Target"], + "core": "Cortex-M3", + "supported_toolchains": ["ARM", "GCC_ARM", "IAR"], + "macros": ["__ADUCM3029__", "EV_COG_AD3029LZ"], + "extra_labels": ["Analog_Devices", "ADUCM302X", "ADUCM3029", "EV_COG_AD3029LZ", "FLASH_CMSIS_ALGO"], + "device_has": ["SERIAL", "STDIO_MESSAGES", "TRNG", "SLEEP", "INTERRUPTIN", "RTC", "SPI", "I2C", "FLASH", "ANALOGIN"], + "device_name": "ADuCM3029", + "detect_code": ["0602"], + "release_versions": ["5"], + "bootloader_supported": true + }, + "MTS_GAMBIT": { + "inherits": ["Target"], + "core": "Cortex-M4F", + "supported_toolchains": ["ARM", "GCC_ARM"], + "extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "KPSDK_MCUS", "KPSDK_CODE", "MCU_K64F"], + "is_disk_virtual": true, + "macros": ["CPU_MK64FN1M0VMD12", "FSL_RTOS_MBED", "TARGET_K64F"], + "device_has": ["I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE", "STDIO_MESSAGES", "FLASH"], + "device_name": "MK64FN1M0xxx12" + }, + "HEXIWEAR": { + "inherits": ["Target"], + "core": "Cortex-M4F", + "extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "MCU_K64F"], + "supported_toolchains": ["ARM", "GCC_ARM", "IAR"], + "macros": ["CPU_MK64FN1M0VMD12", "FSL_RTOS_MBED", "TARGET_K64F"], + "is_disk_virtual": true, + "default_toolchain": "ARM", + "detect_code": ["0214"], + "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE", "STDIO_MESSAGES", "TRNG", "FLASH"], + "default_lib": "std", + "release_versions": ["2", "5"], + "device_name": "MK64FN1M0xxx12", + "bootloader_supported": true + }, + "K66F": { + "supported_form_factors": ["ARDUINO"], + "core": "Cortex-M4F", + "supported_toolchains": ["ARM", "GCC_ARM", "IAR"], + "extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "FRDM"], + "is_disk_virtual": true, + "macros": ["CPU_MK66FN2M0VMD18", "FSL_RTOS_MBED"], + "inherits": ["Target"], + "detect_code": ["0311"], + "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG", "FLASH"], + "features": ["LWIP"], + "release_versions": ["2", "5"], + "device_name": "MK66FN2M0xxx18", + "bootloader_supported": true + }, + "K82F": { + "supported_form_factors": ["ARDUINO"], + "core": "Cortex-M4F", + "supported_toolchains": ["ARM", "GCC_ARM", "IAR"], + "extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "FRDM"], + "is_disk_virtual": true, + "macros": ["CPU_MK82FN256VDC15", "FSL_RTOS_MBED"], + "inherits": ["Target"], + "detect_code": ["0217"], + "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG", "FLASH"], + "release_versions": ["2", "5"], + "device_name": "MK82FN256xxx15" + }, + "UBRIDGE": { + "inherits": ["K82F"], + "extra_labels_remove": ["FRDM"], + "supported_form_factors": [] + }, + "FAMILY_STM32": { + "inherits": ["Target"], + "public": false, + "extra_labels": ["STM"], + "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"], + "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"], + "config": { + "lse_available": { + "help": "Define if a Low Speed External xtal (LSE) is available on the board (0 = No, 1 = Yes). If Yes, the LSE will be used to clock the RTC, LPUART, ... otherwise the Low Speed Internal clock (LSI) will be used", + "value": "1" + }, + "stdio_uart_tx": { + "help": "default TX STDIO pins is defined in PinNames.h file, but it can be overridden" + }, + "stdio_uart_rx": { + "help": "default RX STDIO pins is defined in PinNames.h file, but it can be overridden" + } + }, + "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"] + }, + "MIMXRT1050_EVK": { + "supported_form_factors": ["ARDUINO"], + "core": "Cortex-M7FD", + "supported_toolchains": ["ARM", "GCC_ARM", "IAR"], + "extra_labels": ["NXP", "MCUXpresso_MCUS", "EVK", "MIMXRT1050", "IMX"], + "is_disk_virtual": true, + "macros": ["CPU_MIMXRT1052DVL6A", "FSL_RTOS_MBED"], + "inherits": ["Target"], + "detect_code": ["0227"], + "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "ERROR_RED", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"], + "release_versions": ["2", "5"], + "device_name": "MIMXRT1052" + }, + "LPC54114": { + "supported_form_factors": ["ARDUINO"], + "core": "Cortex-M4F", + "supported_toolchains": ["ARM", "IAR", "GCC_ARM"], + "extra_labels": ["NXP", "MCUXpresso_MCUS", "LPC54114_M4", "LPCXpresso", "LPC"], + "is_disk_virtual": true, + "macros": ["CPU_LPC54114J256BD64_cm4", "FSL_RTOS_MBED"], + "inherits": ["Target"], + "detect_code": ["1054"], + "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "FLASH"], + "release_versions": ["2", "5"], + "device_name" : "LPC54114J256BD64" + }, + "MCU_LPC546XX": { + "core": "Cortex-M4F", + "supported_toolchains": ["ARM", "IAR", "GCC_ARM"], + "extra_labels": ["NXP", "MCUXpresso_MCUS", "LPCXpresso", "LPC", "LPC546XX"], + "is_disk_virtual": true, + "macros": ["CPU_LPC54628J512ET180", "FSL_RTOS_MBED"], + "inherits": ["Target"], + "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "FLASH", "TRNG"], + "features": ["LWIP"], + "device_name" : "LPC54628J512ET180" + }, + "LPC546XX": { + "supported_form_factors": ["ARDUINO"], + "inherits": ["MCU_LPC546XX"], + "detect_code": ["1056"], + "release_versions": ["2", "5"] + }, + "FF_LPC546XX": { + "inherits": ["MCU_LPC546XX"], + "extra_labels_remove" : ["LPCXpresso"], + "detect_code": ["8081"], + "release_versions": ["2", "5"] + }, + "NUCLEO_F030R8": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO", "MORPHO"], + "core": "Cortex-M0", + "extra_labels_add": ["STM32F0", "STM32F030R8"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + } + }, + "detect_code": ["0725"], + "macros_add": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""], + "device_has_add": ["SERIAL_FC"], + "default_lib": "small", + "release_versions": ["2"], + "device_name": "STM32F030R8" + }, + "NUCLEO_F031K6": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO"], + "core": "Cortex-M0", + "default_toolchain": "uARM", + "extra_labels_add": ["STM32F0", "STM32F031K6"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + } + }, + "detect_code": ["0791"], + "overrides": {"lse_available": 0}, + "macros_add": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""], + "device_has_add": ["SERIAL_FC"], + "default_lib": "small", + "release_versions": ["2"], + "device_name": "STM32F031K6" + }, + "NUCLEO_F042K6": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO"], + "core": "Cortex-M0", + "default_toolchain": "uARM", + "extra_labels_add": ["STM32F0", "STM32F042K6"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + } + }, + "detect_code": ["0785"], + "overrides": {"lse_available": 0}, + "macros_add": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""], + "device_has_add": ["CAN", "SERIAL_FC"], + "default_lib": "small", + "release_versions": ["2"], + "device_name": "STM32F042K6" + }, + "NUCLEO_F070RB": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO", "MORPHO"], + "core": "Cortex-M0", + "extra_labels_add": ["STM32F0", "STM32F070RB"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + } + }, + "detect_code": ["0755"], + "macros_add": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""], + "device_has_add": ["LOWPOWERTIMER", "SERIAL_FC", "SERIAL_ASYNCH", "FLASH"], + "release_versions": ["2", "5"], + "device_name": "STM32F070RB" + }, + "NUCLEO_F072RB": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO", "MORPHO"], + "core": "Cortex-M0", + "extra_labels_add": ["STM32F0", "STM32F072RB"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + } + }, + "detect_code": ["0730"], + "macros_add": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""], + "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_FC", "SERIAL_ASYNCH", "FLASH"], + "release_versions": ["2", "5"], + "device_name": "STM32F072RB" + }, + "NUCLEO_F091RC": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO", "MORPHO"], + "core": "Cortex-M0", + "extra_labels_add": ["STM32F0", "STM32F091RC"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + } + }, + "detect_code": ["0750"], + "macros_add": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""], + "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_FC", "SERIAL_ASYNCH", "FLASH"], + "release_versions": ["2", "5"], + "device_name": "STM32F091RC" + }, + "NUCLEO_F103RB": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO", "MORPHO"], + "core": "Cortex-M3", + "extra_labels_add": ["STM32F1", "STM32F103RB"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC (SYSCLK=72 MHz) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI (SYSCLK=64 MHz)", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + }, + "clock_source_usb": { + "help": "In case of HSI clock source, to get 48 Mhz USB, SYSCLK has to be reduced from 64 to 48 MHz (set 0 for the max SYSCLK value)", + "value": "0", + "macro_name": "CLOCK_SOURCE_USB" + } + }, + "detect_code": ["0700"], + "device_has_add": ["CAN", "SERIAL_FC", "SERIAL_ASYNCH", "FLASH"], + "release_versions": ["2", "5"], + "device_name": "STM32F103RB" + }, + "NUCLEO_F207ZG": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO", "MORPHO"], + "core": "Cortex-M3", + "extra_labels_add": ["STM32F2", "STM32F207ZG"], + "config": { + "d11_configuration": { + "help": "Value: PA_7 for the default board configuration, PB_5 in case of solder bridge update (SB121 off/ SB122 on)", + "value": "PA_7", + "macro_name": "STM32_D11_SPI_ETHERNET_PIN" + }, + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + } + }, + "detect_code": ["0835"], + "macros_add": ["USBHOST_OTHER"], + "device_has_add": ["ANALOGOUT", "CAN", "SERIAL_ASYNCH", "SERIAL_FC", "FLASH"], + "features": ["LWIP"], + "release_versions": ["2", "5"], + "device_name": "STM32F207ZG" + }, + "NUCLEO_F302R8": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO", "MORPHO"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32F3", "STM32F302x8", "STM32F302R8"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + } + }, + "detect_code": ["0705"], + "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC"], + "default_lib": "small", + "release_versions": ["2"], + "device_name": "STM32F302R8" + }, + "NUCLEO_F303K8": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32F3", "STM32F303x8", "STM32F303K8"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + } + }, + "overrides": {"lse_available": 0}, + "detect_code": ["0775"], + "default_lib": "small", + "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_FC"], + "release_versions": ["2"], + "device_name": "STM32F303K8" + }, + "NUCLEO_F303RE": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO", "MORPHO"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32F3", "STM32F303xE", "STM32F303RE"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + } + }, + "detect_code": ["0745"], + "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "FLASH"], + "release_versions": ["2", "5"], + "device_name": "STM32F303RE" + }, + "NUCLEO_F303ZE": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO", "MORPHO"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32F3", "STM32F303xE", "STM32F303ZE"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + } + }, + "detect_code": ["0747"], + "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "FLASH"], + "release_versions": ["2", "5"], + "device_name": "STM32F303ZE" + }, + "NUCLEO_F334R8": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO", "MORPHO"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32F3", "STM32F334x8", "STM32F334R8"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + } + }, + "detect_code": ["0735"], + "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC"], + "default_lib": "small", + "release_versions": ["2"], + "device_name": "STM32F334R8" + }, + "NUCLEO_F401RE": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO", "MORPHO"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32F4", "STM32F401xE", "STM32F401RE"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + } + }, + "detect_code": ["0720"], + "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"], + "device_has_add": ["SERIAL_ASYNCH", "SERIAL_FC", "FLASH", "LOWPOWERTIMER"], + "release_versions": ["2", "5"], + "device_name": "STM32F401RE" + }, + "STEVAL_3DP001V1": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32F4", "STM32F401xE", "STM32F401VE"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL | USE_PLL_HSI", + "value": "USE_PLL_HSE_XTAL|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + } + }, + "macros_add": ["USB_STM_HAL", "USBHOST_OTHER", "HSE_VALUE=25000000"], + "device_has_add": ["SERIAL_ASYNCH", "SERIAL_FC", "FLASH", "LOWPOWERTIMER"], + "overrides": {"lse_available": 0}, + "release_versions": ["2", "5"], + "device_name": "STM32F401VE" + }, + "NUCLEO_F410RB": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO", "MORPHO"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32F4", "STM32F410RB","STM32F410xB", "STM32F410Rx"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + }, + "lowpowertimer_lptim": { + "help": "This target supports LPTIM. Set value 1 to use LPTIM for LOWPOWERTIMER, or 0 to use RTC wakeup timer", + "value": 1 + } + }, + "detect_code": ["0744"], + "device_has_add": ["ANALOGOUT", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"], + "release_versions": ["2", "5"], + "device_name": "STM32F410RB" + }, + "NUCLEO_F411RE": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO", "MORPHO"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32F4", "STM32F411xE", "STM32F411RE"], + "detect_code": ["0740"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + }, + "clock_source_usb": { + "help": "As 48 Mhz clock is configured for USB, SYSCLK has to be reduced from 100 to 96 MHz (set 0 for the max SYSCLK value)", + "value": "0", + "macro_name": "CLOCK_SOURCE_USB" + } + }, + "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"], + "device_has_add": ["LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "FLASH"], + "release_versions": ["2", "5"], + "device_name": "STM32F411RE", + "bootloader_supported": true + }, + "NUCLEO_F412ZG": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO", "MORPHO"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32F4", "STM32F412xG", "STM32F412ZG"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + } + }, + "detect_code": ["0826"], + "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"], + "device_has_add": ["CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"], + "release_versions": ["2", "5"], + "device_name": "STM32F412ZG", + "bootloader_supported": true + }, + "MTB_MXCHIP_EMW3166": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32F4", "STM32F412xG", "STM32F412ZG"], + "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"], + "device_has_add": ["CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"], + "release_versions": ["2", "5"], + "device_name": "STM32F412ZG", + "bootloader_supported": true, + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + } + } + }, + "USI_WM_BN_BM_22": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32F4", "STM32F412xG", "STM32F412ZG"], + "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"], + "device_has_add": ["SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"], + "release_versions": ["2", "5"], + "device_name": "STM32F412ZG", + "bootloader_supported": true, + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + } + } + }, + "MTB_USI_WM_BN_BM_22": { + "inherits": ["USI_WM_BN_BM_22"] + }, + "MTB_ADV_WISE_1530": { + "inherits": ["USI_WM_BN_BM_22"], + "overrides": { + "stdio_uart_tx": "PB_10", + "stdio_uart_rx": "PC_11" + } + }, + "DISCO_F413ZH": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32F4", "STM32F413xx", "STM32F413ZH", "STM32F413xH"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + }, + "lowpowertimer_lptim": { + "help": "This target supports LPTIM. Set value 1 to use LPTIM for LOWPOWERTIMER, or 0 to use RTC wakeup timer", + "value": 1 + } + }, + "detect_code": ["0743"], + "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"], + "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"], + "release_versions": ["2", "5"], + "device_name": "STM32F413ZH" + }, + "NUCLEO_F413ZH": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32F4", "STM32F413xx", "STM32F413ZH", "STM32F413xH"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + } + }, + "detect_code": ["0743"], + "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"], + "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"], + "release_versions": ["2", "5"], + "device_name": "STM32F413ZH" + }, + "ELMO_F411RE": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO"], + "core": "Cortex-M4F", + "default_toolchain": "uARM", + "extra_labels_add": ["STM32F4", "STM32F411xE", "STM32F411RE"], + "supported_toolchains": ["ARM", "uARM", "GCC_ARM"], + "detect_code": ["----"], + "device_has_add": [], + "default_lib": "small", + "release_versions": ["2"], + "device_name": "STM32F411RE" + }, + "NUCLEO_F429ZI": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO"], + "core": "Cortex-M4F", + "config": { + "d11_configuration": { + "help": "Value: PA_7 for the default board configuration, PB_5 in case of solder bridge update (SB121 off/ SB122 on)", + "value": "PA_7", + "macro_name": "STM32_D11_SPI_ETHERNET_PIN" + }, + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + }, + "clock_source_usb": { + "help": "As 48 Mhz clock is configured for USB, SYSCLK has to be reduced from 180 to 168 MHz (set 0 for the max SYSCLK value)", + "value": "1", + "macro_name": "CLOCK_SOURCE_USB" + } + }, + "extra_labels_add": ["STM32F4", "STM32F429", "STM32F429ZI", "STM32F429xx", "STM32F429xI"], + "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"], + "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"], + "detect_code": ["0796"], + "features": ["LWIP"], + "release_versions": ["2", "5"], + "device_name": "STM32F429ZI", + "bootloader_supported": true + }, + "NUCLEO_F439ZI": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO"], + "core": "Cortex-M4F", + "config": { + "d11_configuration": { + "help": "Value: PA_7 for the default board configuration, PB_5 in case of solder bridge update (SB121 off/ SB122 on)", + "value": "PA_7", + "macro_name": "STM32_D11_SPI_ETHERNET_PIN" + }, + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + }, + "clock_source_usb": { + "help": "As 48 Mhz clock is configured for USB, SYSCLK has to be reduced from 180 to 168 MHz (set 0 for the max SYSCLK value)", + "value": "1", + "macro_name": "CLOCK_SOURCE_USB" + } + }, + "extra_labels_add": ["STM32F4", "STM32F439", "STM32F439ZI", "STM32F439xx", "STM32F439xI"], + "macros_add": ["MBEDTLS_CONFIG_HW_SUPPORT", "USB_STM_HAL", "USBHOST_OTHER"], + "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_FC", "TRNG", "FLASH"], + "detect_code": ["0797"], + "features": ["LWIP"], + "release_versions": ["2", "5"], + "device_name" : "STM32F439ZI", + "bootloader_supported": true + }, + "NUCLEO_F446RE": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO", "MORPHO"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32F4", "STM32F446xE", "STM32F446RE"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + } + }, + "detect_code": ["0777"], + "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"], + "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "FLASH"], + "release_versions": ["2", "5"], + "device_name": "STM32F446RE", + "bootloader_supported": true + }, + "NUCLEO_F446ZE": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO", "MORPHO"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32F4", "STM32F446xE", "STM32F446ZE"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + } + }, + "detect_code": ["0778"], + "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"], + "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "FLASH"], + "release_versions": ["2", "5"], + "device_name": "STM32F446ZE" + }, + "B96B_F446VE": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO", "MORPHO"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32F4", "STM32F446xE", "STM32F446VE"], + "detect_code": ["0840"], + "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "FLASH"], + "release_versions": ["2", "5"], + "device_name":"STM32F446VE" + }, + "NUCLEO_F746ZG": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M7F", + "extra_labels_add": ["STM32F7", "STM32F746", "STM32F746xG", "STM32F746ZG"], + "config": { + "d11_configuration": { + "help": "Value: PA_7 for the default board configuration, PB_5 in case of solder bridge update (SB121 off/ SB122 on)", + "value": "PA_7", + "macro_name": "STM32_D11_SPI_ETHERNET_PIN" + }, + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + }, + "lowpowertimer_lptim": { + "help": "This target supports LPTIM. Set value 1 to use LPTIM for LOWPOWERTIMER, or 0 to use RTC wakeup timer", + "value": 1 + } + }, + "macros_add": ["USBHOST_OTHER"], + "supported_form_factors": ["ARDUINO"], + "detect_code": ["0816"], + "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "TRNG", "FLASH"], + "features": ["LWIP"], + "release_versions": ["2", "5"], + "device_name": "STM32F746ZG", + "bootloader_supported": true + }, + "NUCLEO_F756ZG": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M7F", + "extra_labels_add": ["STM32F7", "STM32F756", "STM32F756xG", "STM32F756ZG"], + "config": { + "d11_configuration": { + "help": "Value: PA_7 for the default board configuration, PB_5 in case of solder bridge update (SB121 off/ SB122 on)", + "value": "PA_7", + "macro_name": "STM32_D11_SPI_ETHERNET_PIN" + }, + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + }, + "lowpowertimer_lptim": { + "help": "This target supports LPTIM. Set value 1 to use LPTIM for LOWPOWERTIMER, or 0 to use RTC wakeup timer", + "value": 1 + } + }, + "macros_add": ["TRANSACTION_QUEUE_SIZE_SPI=2", "USBHOST_OTHER", "MBEDTLS_CONFIG_HW_SUPPORT"], + "supported_form_factors": ["ARDUINO"], + "detect_code": ["0819"], + "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "TRNG", "FLASH"], + "features": ["LWIP"], + "release_versions": ["2", "5"], + "device_name": "STM32F756ZG" + }, + "NUCLEO_F767ZI": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M7FD", + "extra_labels_add": ["STM32F7", "STM32F767", "STM32F767xI", "STM32F767ZI"], + "config": { + "d11_configuration": { + "help": "Value: PA_7 for the default board configuration, PB_5 in case of solder bridge update (SB121 off/ SB122 on)", + "value": "PA_7", + "macro_name": "STM32_D11_SPI_ETHERNET_PIN" + }, + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + }, + "lowpowertimer_lptim": { + "help": "This target supports LPTIM. Set value 1 to use LPTIM for LOWPOWERTIMER, or 0 to use RTC wakeup timer", + "value": 1 + } + }, + "supported_form_factors": ["ARDUINO"], + "macros_add": ["USBHOST_OTHER"], + "detect_code": ["0818"], + "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "TRNG", "FLASH"], + "features": ["LWIP"], + "release_versions": ["2", "5"], + "device_name": "STM32F767ZI", + "bootloader_supported": true + }, + "NUCLEO_L011K4": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M0+", + "extra_labels_add": ["STM32L0", "STM32L011K4"], + "supported_toolchains": ["uARM"], + "default_toolchain": "uARM", + "supported_form_factors": ["ARDUINO"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + }, + "lowpowertimer_lptim": { + "help": "This target supports LPTIM. Set value 1 to use LPTIM for LOWPOWERTIMER, or 0 to use RTC wakeup timer", + "value": 1 + } + }, + "detect_code": ["0780"], + "device_has_add": ["LOWPOWERTIMER", "SERIAL_FC", "FLASH"], + "default_lib": "small", + "release_versions": ["2"], + "device_name": "STM32L011K4" + }, + "NUCLEO_L031K6": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M0+", + "extra_labels_add": ["STM32L0", "STM32L031K6"], + "default_toolchain": "uARM", + "supported_form_factors": ["ARDUINO"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + }, + "lowpowertimer_lptim": { + "help": "This target supports LPTIM. Set value 1 to use LPTIM for LOWPOWERTIMER, or 0 to use RTC wakeup timer", + "value": 1 + } + }, + "detect_code": ["0790"], + "device_has_add": ["LOWPOWERTIMER", "SERIAL_FC", "FLASH"], + "default_lib": "small", + "release_versions": ["2"], + "device_name": "STM32L031K6" + }, + "NUCLEO_L053R8": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO", "MORPHO"], + "core": "Cortex-M0+", + "extra_labels_add": ["STM32L0", "STM32L053x8", "STM32L053R8"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + }, + "lowpowertimer_lptim": { + "help": "This target supports LPTIM. Set value 1 to use LPTIM for LOWPOWERTIMER, or 0 to use RTC wakeup timer", + "value": 1 + } + }, + "detect_code": ["0715"], + "device_has_add": ["ANALOGOUT", "LOWPOWERTIMER", "SERIAL_FC", "SERIAL_ASYNCH", "FLASH"], + "default_lib": "small", + "release_versions": ["2"], + "device_name": "STM32L053R8" + }, + "NUCLEO_L073RZ": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO", "MORPHO"], + "core": "Cortex-M0+", + "extra_labels_add": ["STM32L0", "STM32L073RZ", "STM32L073xx"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + }, + "lowpowertimer_lptim": { + "help": "This target supports LPTIM. Set value 1 to use LPTIM for LOWPOWERTIMER, or 0 to use RTC wakeup timer", + "value": 1 + } + }, + "detect_code": ["0760"], + "device_has_add": ["ANALOGOUT", "LOWPOWERTIMER", "SERIAL_FC", "SERIAL_ASYNCH", "TRNG", "FLASH"], + "release_versions": ["2", "5"], + "device_name": "STM32L073RZ" + }, + "NUCLEO_L152RE": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO", "MORPHO"], + "core": "Cortex-M3", + "extra_labels_add": ["STM32L1", "STM32L152RE"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + } + }, + "detect_code": ["0710"], + "device_has_add": ["ANALOGOUT", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "FLASH"], + "release_versions": ["2", "5"], + "device_name": "STM32L152RE" + }, + "NUCLEO_L432KC": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32L4", "STM32L432xC", "STM32L432KC"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI | USE_PLL_MSI", + "value": "USE_PLL_MSI", + "macro_name": "CLOCK_SOURCE" + }, + "lowpowertimer_lptim": { + "help": "This target supports LPTIM. Set value 1 to use LPTIM for LOWPOWERTIMER, or 0 to use RTC wakeup timer", + "value": 1 + } + }, + "detect_code": ["0770"], + "device_has_add": ["ANALOGOUT", "LOWPOWERTIMER", "SERIAL_FC", "SERIAL_ASYNCH", "CAN", "TRNG", "FLASH"], + "release_versions": ["2", "5"], + "device_name": "STM32L432KC", + "bootloader_supported": true + }, + "NUCLEO_L433RC_P": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO", "MORPHO"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32L4", "STM32L433xC", "STM32L433RC"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI | USE_PLL_MSI", + "value": "USE_PLL_MSI", + "macro_name": "CLOCK_SOURCE" + }, + "lowpowertimer_lptim": { + "help": "This target supports LPTIM. Set value 1 to use LPTIM for LOWPOWERTIMER, or 0 to use RTC wakeup timer", + "value": 1 + } + }, + "detect_code": ["0779"], + "device_has_add": ["ANALOGOUT", "LOWPOWERTIMER", "SERIAL_FC", "SERIAL_ASYNCH", "CAN", "TRNG", "FLASH"], + "release_versions": ["2", "5"], + "device_name": "STM32L433RC", + "bootloader_supported": true + }, + "MTB_ADV_WISE_1510": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32L4", "STM32L443xC", "STM32L443RC"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSI | USE_PLL_MSI", + "value": "USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + } + }, + "overrides": {"lse_available": 0}, + "release_versions": ["5"], + "device_has_add": ["ANALOGOUT", "SERIAL_FC", "SERIAL_ASYNCH", "CAN", "TRNG", "FLASH"], + "macros_add": ["MBEDTLS_CONFIG_HW_SUPPORT"], + "device_name" : "STM32L443RC", + "detect_code": ["0458"], + "bootloader_supported": true + }, + "NUCLEO_L476RG": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO", "MORPHO"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32L4", "STM32L476RG", "STM32L476xG"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI | USE_PLL_MSI", + "value": "USE_PLL_MSI", + "macro_name": "CLOCK_SOURCE" + }, + "lowpowertimer_lptim": { + "help": "This target supports LPTIM. Set value 1 to use LPTIM for LOWPOWERTIMER, or 0 to use RTC wakeup timer", + "value": 1 + } + }, + "detect_code": ["0765"], + "macros_add": ["USBHOST_OTHER", "TWO_RAM_REGIONS"], + "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"], + "release_versions": ["2", "5"], + "device_name": "STM32L476RG", + "bootloader_supported": true + }, + "SILICA_SENSOR_NODE": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M4F", + "default_toolchain": "GCC_ARM", + "extra_labels_add": ["STM32L4", "STM32L476xG", "STM32L476JG"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI | USE_PLL_MSI", + "value": "USE_PLL_MSI", + "macro_name": "CLOCK_SOURCE" + } + }, + "detect_code": ["0766"], + "macros_add": ["USBHOST_OTHER", "TWO_RAM_REGIONS"], + "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"], + "release_versions": ["5"], + "device_name": "STM32L476JG" + }, + "NUCLEO_L486RG": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO", "MORPHO"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32L4", "STM32L486RG", "STM32L486xG"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI | USE_PLL_MSI", + "value": "USE_PLL_MSI", + "macro_name": "CLOCK_SOURCE" + }, + "lowpowertimer_lptim": { + "help": "This target supports LPTIM. Set value 1 to use LPTIM for LOWPOWERTIMER, or 0 to use RTC wakeup timer", + "value": 1 + } + }, + "detect_code": ["0827"], + "macros_add": ["USBHOST_OTHER", "MBEDTLS_CONFIG_HW_SUPPORT", "TWO_RAM_REGIONS"], + "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"], + "release_versions": ["2", "5"], + "device_name": "STM32L486RG" + }, + "MTB_ADV_WISE_1570": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32L4", "STM32L486RG", "STM32L486xG", "WISE_1570"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI | USE_PLL_MSI", + "value": "USE_PLL_HSE_XTAL", + "macro_name": "CLOCK_SOURCE" + } + }, + "detect_code": ["0460"], + "macros_add": ["MBEDTLS_CONFIG_HW_SUPPORT", "WISE_1570", "TWO_RAM_REGIONS"], + "device_has_add": ["ANALOGOUT", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"], + "release_versions": ["5"], + "device_name": "STM32L486RG", + "OUTPUT_EXT": "hex" + }, + "ARCH_MAX": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO"], + "core": "Cortex-M4F", + "supported_toolchains": ["ARM", "uARM", "GCC_ARM"], + "program_cycle_s": 2, + "extra_labels_add": ["STM32F4", "STM32F407", "STM32F407xG", "STM32F407VG"], + "device_has_add": ["ANALOGOUT"], + "release_versions": ["2"], + "device_name": "STM32F407VG" + }, + "DISCO_F051R8": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M0", + "extra_labels_add": ["STM32F0", "STM32F051", "STM32F051R8"], + "supported_toolchains": ["GCC_ARM"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + } + }, + "macros_add": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""], + "device_has_add": ["SERIAL_FC"], + "device_name": "STM32F051R8" + }, + "DISCO_F100RB": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M3", + "extra_labels_add": ["STM32F1", "STM32F100RB"], + "supported_toolchains": ["GCC_ARM"], + "device_has_add": [], + "device_name": "STM32F100RB" + }, + "DISCO_F303VC": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32F3", "STM32F303", "STM32F303xC", "STM32F303VC"], + "overrides": {"lse_available": 0}, + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + } + }, + "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"], + "release_versions": ["2", "5"], + "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_FC"], + "device_name": "STM32F303VC" + }, + "DISCO_F334C8": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32F3", "STM32F334x8","STM32F334C8"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + } + }, + "overrides": {"lse_available": 0}, + "detect_code": ["0810"], + "device_has_add": ["ANALOGOUT", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC"], + "default_lib": "small", + "release_versions": ["2"], + "device_name": "STM32F334C8" + }, + "DISCO_F407VG": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32F4", "STM32F407", "STM32F407xG", "STM32F407VG"], + "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL | USE_PLL_HSI", + "value": "USE_PLL_HSE_XTAL|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + } + }, + "macros_add": ["USB_STM_HAL"], + "overrides": {"lse_available": 0}, + "device_has_add": ["ANALOGOUT"], + "release_versions": ["2", "5"], + "device_name": "STM32F407VG" + }, + "DISCO_F429ZI": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32F4", "STM32F429", "STM32F429ZI", "STM32F429xI", "STM32F429xx"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL | USE_PLL_HSI", + "value": "USE_PLL_HSE_XTAL|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + }, + "clock_source_usb": { + "help": "As 48 Mhz clock is configured for USB, SYSCLK has to be reduced from 180 to 168 MHz (set 0 for the max SYSCLK value)", + "value": "1", + "macro_name": "CLOCK_SOURCE_USB" + } + }, + "overrides": {"lse_available": 0}, + "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"], + "device_has_add": ["ANALOGOUT", "CAN", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"], + "release_versions": ["2", "5"], + "device_name": "STM32F429ZI", + "bootloader_supported": true + }, + "DISCO_F469NI": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32F4", "STM32F469", "STM32F469NI", "STM32F469xI", "STM32F469xx"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL | USE_PLL_HSI", + "value": "USE_PLL_HSE_XTAL|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + } + }, + "detect_code": ["0788"], + "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"], + "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_FC", "TRNG", "FLASH"], + "release_versions": ["2", "5"], + "device_name": "STM32F469NI" + }, + "DISCO_L053C8": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M0+", + "extra_labels_add": ["STM32L0", "STM32L053x8", "STM32L053C8"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + }, + "lowpowertimer_lptim": { + "help": "This target supports LPTIM. Set value 1 to use LPTIM for LOWPOWERTIMER, or 0 to use RTC wakeup timer", + "value": 1 + + } + }, + "overrides": {"lse_available": 0}, + "device_has_add": ["ANALOGOUT", "LOWPOWERTIMER", "SERIAL_FC", "FLASH"], + "default_lib": "small", + "release_versions": ["2"], + "device_name": "STM32L053C8" + }, + "DISCO_L072CZ_LRWAN1": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M0+", + "extra_labels_add": ["STM32L0", "STM32L072CZ", "STM32L072xZ", "STM32L072xx"], + "supported_form_factors": ["ARDUINO", "MORPHO"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + }, + "lowpowertimer_lptim": { + "help": "This target supports LPTIM. Set value 1 to use LPTIM for LOWPOWERTIMER, or 0 to use RTC wakeup timer", + "value": 1 + } + }, + "detect_code": ["0833"], + "device_has_add": ["ANALOGOUT", "LOWPOWERTIMER", "SERIAL_FC", "SERIAL_ASYNCH", "TRNG", "FLASH"], + "release_versions": ["2", "5"], + "device_name": "STM32L072CZ" + }, + "MTB_MURATA_ABZ": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M0+", + "extra_labels_add": ["STM32L0", "STM32L0x2xZ", "STM32L082CZ", "STM32L082xx"], + "detect_code": ["0456"], + "device_has_add": ["ANALOGOUT", "SERIAL_FC", "SERIAL_ASYNCH", "TRNG", "FLASH"], + "release_versions": ["5"], + "device_name": "STM32L082CZ" + }, + "DISCO_F746NG": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M7F", + "extra_labels_add": ["STM32F7", "STM32F746", "STM32F746xG", "STM32F746NG"], + "supported_form_factors": ["ARDUINO"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL | USE_PLL_HSI", + "value": "USE_PLL_HSE_XTAL|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + }, + "usb_speed": { + "help": "Select the USB speed/connector (0=FullSpeed, 1=HighSpeed)", + "value": "1" + }, + "lowpowertimer_lptim": { + "help": "This target supports LPTIM. Set value 1 to use LPTIM for LOWPOWERTIMER, or 0 to use RTC wakeup timer", + "value": 1 + } + }, + "detect_code": ["0815"], + "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"], + "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "TRNG", "FLASH"], + "features": ["LWIP"], + "release_versions": ["2", "5"], + "device_name": "STM32F746NG" + }, + "DISCO_F769NI": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M7FD", + "extra_labels_add": ["STM32F7", "STM32F769", "STM32F769xI", "STM32F769NI"], + "supported_form_factors": ["ARDUINO"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + }, + "lowpowertimer_lptim": { + "help": "This target supports LPTIM. Set value 1 to use LPTIM for LOWPOWERTIMER, or 0 to use RTC wakeup timer", + "value": 1 + } + }, + "detect_code": ["0817"], + "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"], + "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "TRNG", "FLASH"], + "features": ["LWIP"], + "release_versions": ["2", "5"], + "device_name": "STM32F769NI" + }, + "DISCO_L475VG_IOT01A": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32L4", "STM32L475xG", "STM32L475VG"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI | USE_PLL_MSI", + "value": "USE_PLL_MSI", + "macro_name": "CLOCK_SOURCE" + }, + "lowpowertimer_lptim": { + "help": "This target supports LPTIM. Set value 1 to use LPTIM for LOWPOWERTIMER, or 0 to use RTC wakeup timer", + "value": 1 + } + }, + "supported_form_factors": ["ARDUINO"], + "detect_code": ["0764"], + "macros_add": ["USBHOST_OTHER", "TWO_RAM_REGIONS"], + "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_FC", "TRNG", "FLASH"], + "release_versions": ["2", "5"], + "device_name": "STM32L475VG", + "bootloader_supported": true + }, + "DISCO_L476VG": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32L4", "STM32L476xG", "STM32L476VG"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI | USE_PLL_MSI", + "value": "USE_PLL_MSI", + "macro_name": "CLOCK_SOURCE" + }, + "lowpowertimer_lptim": { + "help": "This target supports LPTIM. Set value 1 to use LPTIM for LOWPOWERTIMER, or 0 to use RTC wakeup timer", + "value": 1 + } + }, + "detect_code": ["0820"], + "macros_add": ["USBHOST_OTHER", "TWO_RAM_REGIONS"], + "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_FC", "TRNG", "FLASH"], + "release_versions": ["2", "5"], + "device_name": "STM32L476VG", + "bootloader_supported": true + }, + "MTS_MDOT_F405RG": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32F4", "STM32F405RG"], + "is_disk_virtual": true, + "macros_add": ["HSE_VALUE=26000000"], + "device_has_add": ["ANALOGOUT"], + "release_versions": ["2"], + "device_name": "STM32F405RG" + }, + "MTS_MDOT_F411RE": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32F4", "STM32F411RE"], + "macros_add": ["HSE_VALUE=26000000", "USE_PLL_HSE_EXTC=0", "VECT_TAB_OFFSET=0x00010000"], + "post_binary_hook": { + "function": "MTSCode.combine_bins_mts_dot", + "toolchains": ["GCC_ARM", "ARM_STD", "ARM_MICRO", "IAR"] + }, + "device_has_add": [], + "release_versions": ["2", "5"], + "device_name": "STM32F411RE" + }, + "MTS_DRAGONFLY_F411RE": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32F4", "STM32F411RE"], + "config": { + "modem_is_on_board": { + "help": "Value: Tells the build system that the modem is on-board as oppose to a plug-in shield/module.", + "value": 1, + "macro_name": "MODEM_ON_BOARD" + }, + "modem_data_connection_type": { + "help": "Value: Defines how an on-board modem is wired up to the MCU, e.g., data connection can be a UART or USB and so forth.", + "value": 1, + "macro_name": "MODEM_ON_BOARD_UART" + } + }, + "overrides": {"lse_available": 0}, + "macros_add": ["HSE_VALUE=26000000", "VECT_TAB_OFFSET=0x08010000"], + "post_binary_hook": { + "function": "MTSCode.combine_bins_mts_dragonfly", + "toolchains": ["GCC_ARM", "ARM_STD", "ARM_MICRO", "IAR"] + }, + "device_has_add": [], + "release_versions": ["2", "5"], + "device_name": "STM32F411RE" + }, + "MTB_MTS_DRAGONFLY": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32F4", "STM32F411RE"], + "config": { + "modem_is_on_board": { + "help": "Value: Tells the build system that the modem is on-board as oppose to a plug-in shield/module.", + "value": 1, + "macro_name": "MODEM_ON_BOARD" + }, + "modem_data_connection_type": { + "help": "Value: Defines how an on-board modem is wired up to the MCU, e.g., data connection can be a UART or USB and so forth.", + "value": 1, + "macro_name": "MODEM_ON_BOARD_UART" + } + }, + "overrides": { + "lse_available": 0 + }, + "macros_add": ["HSE_VALUE=26000000", "VECT_TAB_OFFSET=0x08010000"], + "post_binary_hook": { + "function": "MTSCode.combine_bins_mtb_mts_dragonfly", + "toolchains": ["GCC_ARM", "ARM_STD", "ARM_MICRO", "IAR"] + }, + "release_versions": ["2", "5"], + "device_name": "STM32F411RE", + "bootloader_supported": true + }, + "XDOT_L151CC": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M3", + "default_toolchain": "ARM", + "extra_labels_add": ["STM32L1", "STM32L151CC"], + "config": { + "hse_value": { + "value": "24000000", + "macro_name": "HSE_VALUE" + } + }, + "supported_toolchains": ["ARM", "GCC_ARM", "IAR"], + "device_has_add": ["ANALOGOUT", "FLASH"], + "release_versions": ["5"], + "device_name": "STM32L151CC", + "bootloader_supported": true + }, + "FF1705_L151CC": { + "supported_form_factors": ["ARDUINO"], + "inherits": ["XDOT_L151CC"], + "detect_code": ["8080"] + }, + "MTB_MTS_XDOT": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M3", + "default_toolchain": "ARM", + "extra_labels_add": ["STM32L1", "STM32L151CC"], + "config": { + "hse_value": { + "value": "24000000", + "macro_name": "HSE_VALUE" + } + }, + "overrides": { + "stdio_uart_tx": "PA_2", + "stdio_uart_rx": "PA_3" + }, + "supported_toolchains": ["ARM", "GCC_ARM", "IAR"], + "device_has_add": ["ANALOGOUT", "FLASH"], + "release_versions": ["5"], + "device_name": "STM32L151CC", + "bootloader_supported": true + }, + "MTB_RAK811": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M3", + "default_toolchain": "ARM", + "extra_labels_add": ["STM32L1", "STM32L151xBA", "STM32L151CBA"], + "supported_toolchains": ["ARM", "GCC_ARM", "IAR"], + "device_has_add": ["ANALOGOUT"], + "release_versions": ["5"], + "device_name": "STM32L151CBxxA", + "bootloader_supported": true + }, + "MOTE_L152RC": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M3", + "default_toolchain": "uARM", + "extra_labels_add": ["STM32L1", "STM32L152RC"], + "overrides": {"lse_available": 0}, + "detect_code": ["4100"], + "device_has_add": ["ANALOGOUT"], + "default_lib": "small", + "release_versions": ["2"], + "device_name": "STM32L152RC" + }, + "DISCO_F401VC": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M4F", + "default_toolchain": "GCC_ARM", + "extra_labels_add": ["STM32F4", "STM32F401", "STM32F401xC", "STM32F401VC"], + "supported_toolchains": ["GCC_ARM"], + "device_has_add": [], + "device_name": "STM32F401VC" + }, + "MODULE_UBLOX_ODIN_W2": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32F4", "STM32F439", "STM32F439ZI","STM32F439xx", "STM32F439xI"], + "macros": ["MBEDTLS_CONFIG_HW_SUPPORT", "HSE_VALUE=24000000", "HSE_STARTUP_TIMEOUT=5000", "CB_INTERFACE_SDIO","CB_CHIP_WL18XX","SUPPORT_80211D_ALWAYS","WLAN_ENABLED","MBEDTLS_ARC4_C","MBEDTLS_DES_C","MBEDTLS_MD4_C","MBEDTLS_MD5_C","MBEDTLS_SHA1_C"], + "device_has_add": ["CAN", "EMAC", "TRNG", "FLASH"], + "device_has_remove": ["RTC", "SLEEP"], + "features": ["LWIP"], + "device_name": "STM32F439ZI", + "public": false, + "bootloader_supported": true + }, + "UBLOX_EVK_ODIN_W2": { + "inherits": ["MODULE_UBLOX_ODIN_W2"], + "supported_form_factors": ["ARDUINO"], + "release_versions": ["5"], + "config": { + "stdio_uart_tx_help": { + "help": "Value: D8(default) or D1" + }, + "stdio_uart_rx_help": { + "help": "Value: D2(default) or D0" + } + }, + "overrides": { + "stdio_uart_tx": "D8", + "stdio_uart_rx": "D2" + } + }, + "MBED_CONNECT_ODIN": { + "inherits": ["MODULE_UBLOX_ODIN_W2"], + "release_versions": ["5"], + "config": { + "stdio_uart_tx_help": { + "help": "Value: PA_9(default) or PD_8" + }, + "stdio_uart_rx_help": { + "help": "Value: PA_10(default) or PD_9" + } + }, + "overrides": { + "stdio_uart_tx": "PA_9", + "stdio_uart_rx": "PA_10" + } + }, + "MTB_UBLOX_ODIN_W2": { + "inherits": ["MODULE_UBLOX_ODIN_W2"], + "release_versions": ["5"] + }, + "UBLOX_C030": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO"], + "core": "Cortex-M4F", + "supported_toolchains": ["GCC_ARM", "ARM", "IAR"], + "extra_labels_add": ["STM32F4", "STM32F437", "STM32F437VG", "STM32F437xx", "STM32F437xG"], + "config": { + "modem_is_on_board": { + "help": "Value: Tells the build system that the modem is on-board as oppose to a plug-in shield/module.", + "value": 1, + "macro_name": "MODEM_ON_BOARD" + }, + "modem_data_connection_type": { + "help": "Value: Defines how the modem is wired up to the MCU, e.g., data connection can be a UART or USB and so forth.", + "value": 1, + "macro_name": "MODEM_ON_BOARD_UART" + } + }, + "macros_add": ["MBEDTLS_CONFIG_HW_SUPPORT", "HSE_VALUE=12000000", "GNSSBAUD=9600"], + "overrides": {"lse_available": 0}, + "device_has_add": ["ANALOGOUT", "SERIAL_FC", "TRNG", "FLASH"], + "features": ["LWIP"], + "public": false, + "device_name": "STM32F437VG", + "bootloader_supported": true + }, + "UBLOX_C030_U201": { + "inherits": ["UBLOX_C030"], + "release_versions": ["5"] + }, + "UBLOX_C030_N211": { + "inherits": ["UBLOX_C030"], + "release_versions": ["5"] + }, + "UBLOX_C030_R410M": { + "inherits": ["UBLOX_C030"], + "release_versions": ["5"] + }, + "NZ32_SC151": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M3", + "default_toolchain": "uARM", + "program_cycle_s": 1.5, + "extra_labels_add": ["STM32L1", "STM32L151RC"], + "overrides": {"lse_available": 0}, + "supported_toolchains": ["ARM", "uARM", "GCC_ARM"], + "device_has_add": ["ANALOGOUT"], + "default_lib": "small", + "device_name": "STM32L151RC" + }, + "MCU_NRF51": { + "inherits": ["Target"], + "core": "Cortex-M0", + "OVERRIDE_BOOTLOADER_FILENAME": "nrf51822_bootloader.hex", + "macros": ["NRF51", "TARGET_NRF51822", "CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""], + "MERGE_BOOTLOADER": false, + "extra_labels": ["NORDIC", "MCU_NRF51", "MCU_NRF51822"], + "OUTPUT_EXT": "hex", + "is_disk_virtual": true, + "supported_toolchains": ["ARM", "GCC_ARM"], + "public": false, + "MERGE_SOFT_DEVICE": true, + "EXPECTED_SOFTDEVICES_WITH_OFFSETS": [ + { + "boot": "s130_nrf51_1.0.0_bootloader.hex", + "name": "s130_nrf51_1.0.0_softdevice.hex", + "offset": 114688 + }, + { + "boot": "s110_nrf51822_8.0.0_bootloader.hex", + "name": "s110_nrf51822_8.0.0_softdevice.hex", + "offset": 98304 + }, + { + "boot": "s110_nrf51822_7.1.0_bootloader.hex", + "name": "s110_nrf51822_7.1.0_softdevice.hex", + "offset": 90112 + }, + { + "boot": "s110_nrf51822_7.0.0_bootloader.hex", + "name": "s110_nrf51822_7.0.0_softdevice.hex", + "offset": 90112 + }, + { + "boot": "s110_nrf51822_6.0.0_bootloader.hex", + "name": "s110_nrf51822_6.0.0_softdevice.hex", + "offset": 81920 + } + ], + "detect_code": ["1070"], + "post_binary_hook": { + "function": "MCU_NRF51Code.binary_hook", + "toolchains": ["ARM_STD", "GCC_ARM"] + }, + "program_cycle_s": 6, + "features": ["BLE"], + "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"] + }, + "MCU_NRF51_16K_BASE": { + "inherits": ["MCU_NRF51"], + "extra_labels_add": ["MCU_NORDIC_16K", "MCU_NRF51_16K"], + "macros_add": ["TARGET_MCU_NORDIC_16K", "TARGET_MCU_NRF51_16K"], + "public": false, + "default_lib": "small" + }, + "MCU_NRF51_16K_BOOT_BASE": { + "inherits": ["MCU_NRF51_16K_BASE"], + "MERGE_BOOTLOADER": true, + "extra_labels_add": ["MCU_NRF51_16K_BOOT"], + "macros_add": ["TARGET_MCU_NRF51_16K_BOOT", "TARGET_OTA_ENABLED"], + "public": false + }, + "MCU_NRF51_16K_OTA_BASE": { + "inherits": ["MCU_NRF51_16K_BASE"], + "public": false, + "extra_labels_add": ["MCU_NRF51_16K_OTA"], + "macros_add": ["TARGET_MCU_NRF51_16K_OTA", "TARGET_OTA_ENABLED"], + "MERGE_SOFT_DEVICE": false + }, + "MCU_NRF51_16K": { + "inherits": ["MCU_NRF51_16K_BASE"], + "extra_labels_add": ["MCU_NRF51_16K_S130"], + "macros_add": ["TARGET_MCU_NRF51_16K_S130"], + "public": false + }, + "MCU_NRF51_S110": { + "extra_labels_add": ["MCU_NRF51_16K_S110"], + "macros_add": ["TARGET_MCU_NRF51_16K_S110"], + "EXPECTED_SOFTDEVICES_WITH_OFFSETS": [ + { + "name": "s110_nrf51822_8.0.0_softdevice.hex", + "boot": "s110_nrf51822_8.0.0_bootloader.hex", + "offset": 98304 + }, + { + "name": "s110_nrf51822_7.1.0_softdevice.hex", + "boot": "s110_nrf51822_7.1.0_bootloader.hex", + "offset": 90112 + } + ], + "public": false + }, + "MCU_NRF51_16K_S110": { + "inherits": ["MCU_NRF51_S110", "MCU_NRF51_16K_BASE"], + "public": false + }, + "MCU_NRF51_16K_BOOT": { + "inherits": ["MCU_NRF51_16K_BOOT_BASE"], + "extra_labels_add": ["MCU_NRF51_16K_S130"], + "macros_add": ["TARGET_MCU_NRF51_16K_S130"], + "public": false + }, + "MCU_NRF51_16K_BOOT_S110": { + "inherits": ["MCU_NRF51_S110", "MCU_NRF51_16K_BOOT_BASE"], + "public": false + }, + "MCU_NRF51_16K_OTA": { + "inherits": ["MCU_NRF51_16K_OTA_BASE"], + "extra_labels_add": ["MCU_NRF51_16K_S130"], + "macros_add": ["TARGET_MCU_NRF51_16K_S130"], + "public": false + }, + "MCU_NRF51_16K_OTA_S110": { + "inherits": ["MCU_NRF51_S110", "MCU_NRF51_16K_OTA_BASE"], + "public": false + }, + "MCU_NRF51_32K": { + "inherits": ["MCU_NRF51"], + "extra_labels_add": ["MCU_NORDIC_32K", "MCU_NRF51_32K"], + "macros_add": ["TARGET_MCU_NORDIC_32K", "TARGET_MCU_NRF51_32K"], + "public": false + }, + "MCU_NRF51_32K_BOOT": { + "inherits": ["MCU_NRF51_32K"], + "MERGE_BOOTLOADER": true, + "extra_labels_add": ["MCU_NRF51_32K_BOOT"], + "macros_add": ["TARGET_MCU_NRF51_32K_BOOT", "TARGET_OTA_ENABLED"], + "public": false + }, + "MCU_NRF51_32K_OTA": { + "inherits": ["MCU_NRF51_32K"], + "public": false, + "extra_labels_add": ["MCU_NRF51_32K_OTA"], + "macros_add": ["TARGET_MCU_NRF51_32K_OTA", "TARGET_OTA_ENABLED"], + "MERGE_SOFT_DEVICE": false + }, + "NRF51822": { + "inherits": ["MCU_NRF51_16K"], + "extra_labels_add": ["NRF51822", "NRF51822_MKIT"], + "macros_add": ["TARGET_NRF51822_MKIT"], + "release_versions": ["2"], + "device_name": "nRF51822_xxAA" + }, + "NRF51822_BOOT": { + "inherits": ["MCU_NRF51_16K_BOOT"], + "extra_labels_add": ["NRF51822", "NRF51822_MKIT"], + "macros_add": ["TARGET_NRF51822_MKIT"] + }, + "NRF51822_OTA": { + "inherits": ["MCU_NRF51_16K_OTA"], + "extra_labels_add": ["NRF51822", "NRF51822_MKIT"], + "macros_add": ["TARGET_NRF51822_MKIT"] + }, + "ARCH_BLE": { + "supported_form_factors": ["ARDUINO"], + "inherits": ["MCU_NRF51_16K"], + "release_versions": ["2"], + "device_name": "nRF51822_xxAA" + }, + "ARCH_BLE_BOOT": { + "supported_form_factors": ["ARDUINO"], + "inherits": ["MCU_NRF51_16K_BOOT"], + "extra_labels_add": ["ARCH_BLE"], + "macros_add": ["TARGET_ARCH_BLE"] + }, + "ARCH_BLE_OTA": { + "supported_form_factors": ["ARDUINO"], + "inherits": ["MCU_NRF51_16K_OTA"], + "extra_labels_add": ["ARCH_BLE"], + "macros_add": ["TARGET_ARCH_BLE"] + }, + "ARCH_LINK": { + "supported_form_factors": ["ARDUINO"], + "inherits": ["MCU_NRF51_16K"], + "extra_labels_add": ["ARCH_BLE"], + "macros_add": ["TARGET_ARCH_BLE"] + }, + "ARCH_LINK_BOOT": { + "supported_form_factors": ["ARDUINO"], + "inherits": ["MCU_NRF51_16K_BOOT"], + "extra_labels_add": ["ARCH_BLE", "ARCH_LINK"], + "macros_add": ["TARGET_ARCH_BLE", "TARGET_ARCH_LINK"] + }, + "ARCH_LINK_OTA": { + "supported_form_factors": ["ARDUINO"], + "inherits": ["MCU_NRF51_16K_OTA"], + "extra_labels_add": ["ARCH_BLE", "ARCH_LINK"], + "macros_add": ["TARGET_ARCH_BLE", "TARGET_ARCH_LINK"] + }, + "SEEED_TINY_BLE": { + "inherits": ["MCU_NRF51_16K"], + "release_versions": ["2"], + "device_name": "nRF51822_xxAA" + }, + "SEEED_TINY_BLE_BOOT": { + "inherits": ["MCU_NRF51_16K_BOOT"], + "extra_labels_add": ["SEEED_TINY_BLE"], + "macros_add": ["TARGET_SEEED_TINY_BLE"] + }, + "SEEED_TINY_BLE_OTA": { + "inherits": ["MCU_NRF51_16K_OTA"], + "extra_labels_add": ["SEEED_TINY_BLE"], + "macros_add": ["TARGET_SEEED_TINY_BLE"] + }, + "HRM1017": { + "inherits": ["MCU_NRF51_16K"], + "macros_add": ["TARGET_NRF_LFCLK_RC"], + "release_versions": ["2"], + "device_name": "nRF51822_xxAA" + }, + "HRM1017_BOOT": { + "inherits": ["MCU_NRF51_16K_BOOT"], + "extra_labels_add": ["HRM1017"], + "macros_add": ["TARGET_HRM1017", "TARGET_NRF_LFCLK_RC"] + }, + "HRM1017_OTA": { + "inherits": ["MCU_NRF51_16K_OTA"], + "extra_labels_add": ["HRM1017"], + "macros_add": ["TARGET_HRM1017", "TARGET_NRF_LFCLK_RC"] + }, + "RBLAB_NRF51822": { + "supported_form_factors": ["ARDUINO"], + "inherits": ["MCU_NRF51_16K"], + "release_versions": ["2"], + "device_name": "nRF51822_xxAA" + }, + "RBLAB_NRF51822_BOOT": { + "supported_form_factors": ["ARDUINO"], + "inherits": ["MCU_NRF51_16K_BOOT"], + "extra_labels_add": ["RBLAB_NRF51822"], + "macros_add": ["TARGET_RBLAB_NRF51822"] + }, + "RBLAB_NRF51822_OTA": { + "supported_form_factors": ["ARDUINO"], + "inherits": ["MCU_NRF51_16K_OTA"], + "extra_labels_add": ["RBLAB_NRF51822"], + "macros_add": ["TARGET_RBLAB_NRF51822"] + }, + "RBLAB_BLENANO": { + "inherits": ["MCU_NRF51_16K"], + "release_versions": ["2"] + }, + "RBLAB_BLENANO_BOOT": { + "inherits": ["MCU_NRF51_16K_BOOT"], + "extra_labels_add": ["RBLAB_BLENANO"], + "macros_add": ["TARGET_RBLAB_BLENANO"] + }, + "RBLAB_BLENANO_OTA": { + "inherits": ["MCU_NRF51_16K_OTA"], + "extra_labels_add": ["RBLAB_BLENANO"], + "macros_add": ["TARGET_RBLAB_BLENANO"] + }, + "RBLAB_BLENANO2": { + "supported_form_factors": ["ARDUINO"], + "inherits": ["MCU_NRF52832"], + "release_versions": ["5"], + "device_name": "nRF52832_xxAA" + }, + "NRF51822_Y5_MBUG": { + "inherits": ["MCU_NRF51_16K"] + }, + "WALLBOT_BLE": { + "inherits": ["MCU_NRF51_16K"], + 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["GCC_ARM", "IAR", "ARM"], + "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "STDIO_MESSAGES"], + "features": ["BLE"], + "release_versions": ["2", "5"] + }, + "EFM32": { + "inherits": ["Target"], + "extra_labels": ["Silicon_Labs", "EFM32"], + "macros": ["MBEDTLS_CONFIG_HW_SUPPORT", "MBED_TICKLESS"], + "public": false + }, + "EFM32GG990F1024": { + "inherits": ["EFM32"], + "extra_labels_add": ["EFM32GG", "1024K", "SL_AES"], + "core": "Cortex-M3", + "macros_add": ["EFM32GG990F1024", "TRANSACTION_QUEUE_SIZE_SPI=4"], + "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"], + "release_versions": ["2", "5"], + "device_name": "EFM32GG990F1024", + "public": false, + "bootloader_supported": true + }, + "EFM32GG_STK3700": { + "inherits": ["EFM32GG990F1024"], + "progen": {"target": "efm32gg-stk"}, + "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "FLASH", "ITM"], + "forced_reset_timeout": 2, + "config": { + "hf_clock_src": { + "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator", + "value": "HFXO", + "macro_name": "CORE_CLOCK_SOURCE" + }, + "hfxo_clock_freq": { + "help": "Value: External crystal frequency in hertz", + "value": "48000000", + "macro_name": "HFXO_FREQUENCY" + }, + "lf_clock_src": { + "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator", + "value": "LFXO", + "macro_name": "LOW_ENERGY_CLOCK_SOURCE" + }, + "lfxo_clock_freq": { + "help": "Value: External crystal frequency in hertz", + "value": "32768", + "macro_name": "LFXO_FREQUENCY" + }, + "hfrco_clock_freq": { + "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select", + "value": "21000000", + "macro_name": "HFRCO_FREQUENCY" + }, + "hfrco_band_select": { + "help": "Value: One of _CMU_HFRCOCTRL_BAND_28MHZ, _CMU_HFRCOCTRL_BAND_21MHZ, _CMU_HFRCOCTRL_BAND_14MHZ, _CMU_HFRCOCTRL_BAND_11MHZ, _CMU_HFRCOCTRL_BAND_7MHZ, _CMU_HFRCOCTRL_BAND_1MHZ. Be sure to set hfrco_clock_freq accordingly!", + "value": "_CMU_HFRCOCTRL_BAND_21MHZ", + "macro_name": "HFRCO_FREQUENCY_ENUM" + }, + "board_controller_enable": { + "help": "Pin to pull high for enabling the USB serial port", + "value": "PF7", + "macro_name": "EFM_BC_EN" + } + } + }, + "EFM32LG990F256": { + "inherits": ["EFM32"], + "extra_labels_add": ["EFM32LG", "256K", "SL_AES"], + "core": "Cortex-M3", + "macros_add": ["EFM32LG990F256", "TRANSACTION_QUEUE_SIZE_SPI=4"], + "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"], + "release_versions": ["2", "5"], + "device_name": "EFM32LG990F256", + "public": false, + "bootloader_supported": true + }, + "EFM32LG_STK3600": { + "inherits": ["EFM32LG990F256"], + "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "FLASH"], + "forced_reset_timeout": 2, + "device_name": "EFM32LG990F256", + "config": { + "hf_clock_src": { + "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator", + "value": "HFXO", + "macro_name": "CORE_CLOCK_SOURCE" + }, + "hfxo_clock_freq": { + "help": "Value: External crystal frequency in hertz", + "value": "48000000", + "macro_name": "HFXO_FREQUENCY" + }, + "lf_clock_src": { + "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator", + "value": "LFXO", + "macro_name": "LOW_ENERGY_CLOCK_SOURCE" + }, + "lfxo_clock_freq": { + "help": "Value: External crystal frequency in hertz", + "value": "32768", + "macro_name": "LFXO_FREQUENCY" + }, + "hfrco_clock_freq": { + "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select", + "value": "21000000", + "macro_name": "HFRCO_FREQUENCY" + }, + "hfrco_band_select": { + "help": "Value: One of _CMU_HFRCOCTRL_BAND_28MHZ, _CMU_HFRCOCTRL_BAND_21MHZ, _CMU_HFRCOCTRL_BAND_14MHZ, _CMU_HFRCOCTRL_BAND_11MHZ, _CMU_HFRCOCTRL_BAND_7MHZ, _CMU_HFRCOCTRL_BAND_1MHZ. Be sure to set hfrco_clock_freq accordingly!", + "value": "_CMU_HFRCOCTRL_BAND_21MHZ", + "macro_name": "HFRCO_FREQUENCY_ENUM" + }, + "board_controller_enable": { + "help": "Pin to pull high for enabling the USB serial port", + "value": "PF7", + "macro_name": "EFM_BC_EN" + } + } + }, + "EFM32WG990F256": { + "inherits": ["EFM32"], + "extra_labels_add": ["EFM32WG", "256K", "SL_AES"], + "core": "Cortex-M4F", + "macros_add": ["EFM32WG990F256", "TRANSACTION_QUEUE_SIZE_SPI=4"], + "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"], + "release_versions": ["2", "5"], + "device_name": "EFM32WG990F256", + "public": false, + "bootloader_supported": true + }, + "EFM32WG_STK3800": { + "inherits": ["EFM32WG990F256"], + "progen": {"target": "efm32wg-stk"}, + "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "FLASH"], + "forced_reset_timeout": 2, + "config": { + "hf_clock_src": { + "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator", + "value": "HFXO", + "macro_name": "CORE_CLOCK_SOURCE" + }, + "hfxo_clock_freq": { + "help": "Value: External crystal frequency in hertz", + "value": "48000000", + "macro_name": "HFXO_FREQUENCY" + }, + "lf_clock_src": { + "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator", + "value": "LFXO", + "macro_name": "LOW_ENERGY_CLOCK_SOURCE" + }, + "lfxo_clock_freq": { + "help": "Value: External crystal frequency in hertz", + "value": "32768", + "macro_name": "LFXO_FREQUENCY" + }, + "hfrco_clock_freq": { + "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select", + "value": "21000000", + "macro_name": "HFRCO_FREQUENCY" + }, + "hfrco_band_select": { + "help": "Value: One of _CMU_HFRCOCTRL_BAND_28MHZ, _CMU_HFRCOCTRL_BAND_21MHZ, _CMU_HFRCOCTRL_BAND_14MHZ, _CMU_HFRCOCTRL_BAND_11MHZ, _CMU_HFRCOCTRL_BAND_7MHZ, _CMU_HFRCOCTRL_BAND_1MHZ. Be sure to set hfrco_clock_freq accordingly!", + "value": "_CMU_HFRCOCTRL_BAND_21MHZ", + "macro_name": "HFRCO_FREQUENCY_ENUM" + }, + "board_controller_enable": { + "help": "Pin to pull high for enabling the USB serial port", + "value": "PF7", + "macro_name": "EFM_BC_EN" + } + } + }, + "EFM32ZG222F32": { + "inherits": ["EFM32"], + "extra_labels_add": ["EFM32ZG", "32K", "SL_AES"], + "core": "Cortex-M0+", + "default_toolchain": "uARM", + "macros_add": ["EFM32ZG222F32", "TRANSACTION_QUEUE_SIZE_SPI=0"], + "supported_toolchains": ["GCC_ARM", "uARM", "IAR"], + "default_lib": "small", + "release_versions": ["2"], + "device_name": "EFM32ZG222F32", + "public": false + }, + "EFM32ZG_STK3200": { + "inherits": ["EFM32ZG222F32"], + "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"], + "forced_reset_timeout": 2, + "config": { + "hf_clock_src": { + "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator", + "value": "HFXO", + "macro_name": "CORE_CLOCK_SOURCE" + }, + "hfxo_clock_freq": { + "help": "Value: External crystal frequency in hertz", + "value": "24000000", + "macro_name": "HFXO_FREQUENCY" + }, + "lf_clock_src": { + "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator", + "value": "LFXO", + "macro_name": "LOW_ENERGY_CLOCK_SOURCE" + }, + "lfxo_clock_freq": { + "help": "Value: External crystal frequency in hertz", + "value": "32768", + "macro_name": "LFXO_FREQUENCY" + }, + "hfrco_clock_freq": { + "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select", + "value": "21000000", + "macro_name": "HFRCO_FREQUENCY" + }, + "hfrco_band_select": { + "help": "Value: One of _CMU_HFRCOCTRL_BAND_21MHZ, _CMU_HFRCOCTRL_BAND_14MHZ, _CMU_HFRCOCTRL_BAND_11MHZ, _CMU_HFRCOCTRL_BAND_7MHZ, _CMU_HFRCOCTRL_BAND_1MHZ. Be sure to set hfrco_clock_freq accordingly!", + "value": "_CMU_HFRCOCTRL_BAND_21MHZ", + "macro_name": "HFRCO_FREQUENCY_ENUM" + }, + "board_controller_enable": { + "help": "Pin to pull high for enabling the USB serial port", + "value": "PA9", + "macro_name": "EFM_BC_EN" + } + } + }, + "EFM32HG322F64": { + "inherits": ["EFM32"], + "extra_labels_add": ["EFM32HG", "64K", "SL_AES"], + "core": "Cortex-M0+", + "default_toolchain": "uARM", + "macros_add": ["EFM32HG322F64", "TRANSACTION_QUEUE_SIZE_SPI=0"], + "supported_toolchains": ["GCC_ARM", "uARM", "IAR"], + "default_lib": "small", + "release_versions": ["2"], + "device_name": "EFM32HG322F64", + "public": false + }, + "EFM32HG_STK3400": { + "inherits": ["EFM32HG322F64"], + "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"], + "forced_reset_timeout": 2, + "config": { + "hf_clock_src": { + "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator", + "value": "HFXO", + "macro_name": "CORE_CLOCK_SOURCE" + }, + "hfxo_clock_freq": { + "help": "Value: External crystal frequency in hertz", + "value": "24000000", + "macro_name": "HFXO_FREQUENCY" + }, + "lf_clock_src": { + "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator", + "value": "LFXO", + "macro_name": "LOW_ENERGY_CLOCK_SOURCE" + }, + "lfxo_clock_freq": { + "help": "Value: External crystal frequency in hertz", + "value": "32768", + "macro_name": "LFXO_FREQUENCY" + }, + "hfrco_clock_freq": { + "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select", + "value": "21000000", + "macro_name": "HFRCO_FREQUENCY" + }, + "hfrco_band_select": { + "help": "Value: One of _CMU_HFRCOCTRL_BAND_21MHZ, _CMU_HFRCOCTRL_BAND_14MHZ, _CMU_HFRCOCTRL_BAND_11MHZ, _CMU_HFRCOCTRL_BAND_7MHZ, _CMU_HFRCOCTRL_BAND_1MHZ. Be sure to set hfrco_clock_freq accordingly!", + "value": "_CMU_HFRCOCTRL_BAND_21MHZ", + "macro_name": "HFRCO_FREQUENCY_ENUM" + }, + "board_controller_enable": { + "help": "Pin to pull high for enabling the USB serial port", + "value": "PA9", + "macro_name": "EFM_BC_EN" + } + } + }, + "EFM32PG1B100F256GM32": { + "inherits": ["EFM32"], + "extra_labels_add": ["EFM32PG", "256K", "SL_CRYPTO"], + "core": "Cortex-M4F", + "macros_add": ["EFM32PG1B100F256GM32", "TRANSACTION_QUEUE_SIZE_SPI=4"], + "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"], + "release_versions": ["2", "5"], + "device_name": "EFM32PG1B100F256GM32", + "public": false, + "bootloader_supported": true + }, + "EFM32PG_STK3401": { + "inherits": ["EFM32PG1B100F256GM32"], + "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "FLASH"], + "forced_reset_timeout": 2, + "config": { + "hf_clock_src": { + "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator", + "value": "HFXO", + "macro_name": "CORE_CLOCK_SOURCE" + }, + "hfxo_clock_freq": { + "help": "Value: External crystal frequency in hertz", + "value": "40000000", + "macro_name": "HFXO_FREQUENCY" + }, + "lf_clock_src": { + "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator", + "value": "LFXO", + "macro_name": "LOW_ENERGY_CLOCK_SOURCE" + }, + "lfxo_clock_freq": { + "help": "Value: External crystal frequency in hertz", + "value": "32768", + "macro_name": "LFXO_FREQUENCY" + }, + "hfrco_clock_freq": { + "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select", + "value": "32000000", + "macro_name": "HFRCO_FREQUENCY" + }, + "hfrco_band_select": { + "help": "Value: One of cmuHFRCOFreq_1M0Hz, cmuHFRCOFreq_2M0Hz, cmuHFRCOFreq_4M0Hz, cmuHFRCOFreq_7M0Hz, cmuHFRCOFreq_13M0Hz, cmuHFRCOFreq_16M0Hz, cmuHFRCOFreq_19M0Hz, cmuHFRCOFreq_26M0Hz, cmuHFRCOFreq_32M0Hz, cmuHFRCOFreq_38M0Hz. Be sure to set hfrco_clock_freq accordingly!", + "value": "cmuHFRCOFreq_32M0Hz", + "macro_name": "HFRCO_FREQUENCY_ENUM" + }, + "board_controller_enable": { + "help": "Pin to pull high for enabling the USB serial port", + "value": "PA5", + "macro_name": "EFM_BC_EN" + } + } + }, + "EFR32MG1P132F256GM48": { + "inherits": ["EFM32"], + "extra_labels_add": ["EFR32MG1", "EFR32_1", "256K", "SL_RAIL", "SL_CRYPTO"], + "core": "Cortex-M4F", + "macros_add": ["EFR32MG1P132F256GM48", "TRANSACTION_QUEUE_SIZE_SPI=4"], + "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"], + "release_versions": ["2", "5"], + "device_name": "EFR32MG1P132F256GM48", + "public": false, + "bootloader_supported": true + }, + "EFR32MG1P233F256GM48": { + "inherits": ["EFM32"], + "extra_labels_add": ["EFR32MG1", "EFR32_1", "256K", "SL_RAIL", "SL_CRYPTO"], + "core": "Cortex-M4F", + "macros_add": ["EFR32MG1P233F256GM48", "TRANSACTION_QUEUE_SIZE_SPI=4"], + "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"], + "release_versions": ["2", "5"], + "public": false, + "bootloader_supported": true + }, + "EFR32MG1_BRD4150": { + "inherits": ["EFR32MG1P132F256GM48"], + "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "FLASH"], + "forced_reset_timeout": 2, + "config": { + "hf_clock_src": { + "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator", + "value": "HFXO", + "macro_name": "CORE_CLOCK_SOURCE" + }, + "hfxo_clock_freq": { + "help": "Value: External crystal frequency in hertz", + "value": "38400000", + "macro_name": "HFXO_FREQUENCY" + }, + "lf_clock_src": { + "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator", + "value": "LFXO", + "macro_name": "LOW_ENERGY_CLOCK_SOURCE" + }, + "lfxo_clock_freq": { + "help": "Value: External crystal frequency in hertz", + "value": "32768", + "macro_name": "LFXO_FREQUENCY" + }, + "hfrco_clock_freq": { + "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select", + "value": "32000000", + "macro_name": "HFRCO_FREQUENCY" + }, + "hfrco_band_select": { + "help": "Value: One of cmuHFRCOFreq_1M0Hz, cmuHFRCOFreq_2M0Hz, cmuHFRCOFreq_4M0Hz, cmuHFRCOFreq_7M0Hz, cmuHFRCOFreq_13M0Hz, cmuHFRCOFreq_16M0Hz, cmuHFRCOFreq_19M0Hz, cmuHFRCOFreq_26M0Hz, cmuHFRCOFreq_32M0Hz, cmuHFRCOFreq_38M0Hz. Be sure to set hfrco_clock_freq accordingly!", + "value": "cmuHFRCOFreq_32M0Hz", + "macro_name": "HFRCO_FREQUENCY_ENUM" + }, + "board_controller_enable": { + "help": "Pin to pull high for enabling the USB serial port", + "value": "PA5", + "macro_name": "EFM_BC_EN" + } + }, + "public": false + }, + "TB_SENSE_1": { + "inherits": ["EFR32MG1P233F256GM48"], + "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "FLASH"], + "forced_reset_timeout": 5, + "config": { + "hf_clock_src": { + "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator", + "value": "HFXO", + "macro_name": "CORE_CLOCK_SOURCE" + }, + "hfxo_clock_freq": { + "help": "Value: External crystal frequency in hertz", + "value": "38400000", + "macro_name": "HFXO_FREQUENCY" + }, + "lf_clock_src": { + "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator", + "value": "LFXO", + "macro_name": "LOW_ENERGY_CLOCK_SOURCE" + }, + "lfxo_clock_freq": { + "help": "Value: External crystal frequency in hertz", + "value": "32768", + "macro_name": "LFXO_FREQUENCY" + }, + "hfrco_clock_freq": { + "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select", + "value": "32000000", + "macro_name": "HFRCO_FREQUENCY" + }, + "hfrco_band_select": { + "help": "Value: One of cmuHFRCOFreq_1M0Hz, cmuHFRCOFreq_2M0Hz, cmuHFRCOFreq_4M0Hz, cmuHFRCOFreq_7M0Hz, cmuHFRCOFreq_13M0Hz, cmuHFRCOFreq_16M0Hz, cmuHFRCOFreq_19M0Hz, cmuHFRCOFreq_26M0Hz, cmuHFRCOFreq_32M0Hz, cmuHFRCOFreq_38M0Hz. Be sure to set hfrco_clock_freq accordingly!", + "value": "cmuHFRCOFreq_32M0Hz", + "macro_name": "HFRCO_FREQUENCY_ENUM" + } + } + }, + "EFM32PG12B500F1024GL125": { + "inherits": ["EFM32"], + "extra_labels_add": ["EFM32PG12", "1024K", "SL_CRYPTO"], + "core": "Cortex-M4F", + "macros_add": ["EFM32PG12B500F1024GL125", "TRANSACTION_QUEUE_SIZE_SPI=4"], + "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"], + "release_versions": ["2", "5"], + "device_name": "EFM32PG12B500F1024GL125", + "public": false, + "bootloader_supported": true + }, + "EFM32PG12_STK3402": { + "inherits": ["EFM32PG12B500F1024GL125"], + "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG", "FLASH"], + "forced_reset_timeout": 2, + "config": { + "hf_clock_src": { + "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator", + "value": "HFXO", + "macro_name": "CORE_CLOCK_SOURCE" + }, + "hfxo_clock_freq": { + "help": "Value: External crystal frequency in hertz", + "value": "40000000", + "macro_name": "HFXO_FREQUENCY" + }, + "lf_clock_src": { + "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator", + "value": "LFXO", + "macro_name": "LOW_ENERGY_CLOCK_SOURCE" + }, + "lfxo_clock_freq": { + "help": "Value: External crystal frequency in hertz", + "value": "32768", + "macro_name": "LFXO_FREQUENCY" + }, + "hfrco_clock_freq": { + "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select", + "value": "32000000", + "macro_name": "HFRCO_FREQUENCY" + }, + "hfrco_band_select": { + "help": "Value: One of cmuHFRCOFreq_1M0Hz, cmuHFRCOFreq_2M0Hz, cmuHFRCOFreq_4M0Hz, cmuHFRCOFreq_7M0Hz, cmuHFRCOFreq_13M0Hz, cmuHFRCOFreq_16M0Hz, cmuHFRCOFreq_19M0Hz, cmuHFRCOFreq_26M0Hz, cmuHFRCOFreq_32M0Hz, cmuHFRCOFreq_38M0Hz. Be sure to set hfrco_clock_freq accordingly!", + "value": "cmuHFRCOFreq_32M0Hz", + "macro_name": "HFRCO_FREQUENCY_ENUM" + }, + "board_controller_enable": { + "help": "Pin to pull high for enabling the USB serial port", + "value": "PA5", + "macro_name": "EFM_BC_EN" + } + } + }, + "EFR32MG12P332F1024GL125": { + "inherits": ["EFM32"], + "extra_labels_add": ["EFR32MG12", "EFR32_12", "1024K", "SL_RAIL", "SL_CRYPTO"], + "core": "Cortex-M4F", + "macros_add": ["EFR32MG12P332F1024GL125", "TRANSACTION_QUEUE_SIZE_SPI=4"], + "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"], + "release_versions": ["2", "5"], + "device_name": "EFR32MG12P332F1024GL125", + "public": false, + "bootloader_supported": true + }, + "TB_SENSE_12": { + "inherits": ["EFR32MG12P332F1024GL125"], + "device_name": "EFR32MG12P332F1024GL125", + "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG", "FLASH"], + "forced_reset_timeout": 5, + "config": { + "hf_clock_src": { + "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator", + "value": "HFXO", + "macro_name": "CORE_CLOCK_SOURCE" + }, + "hfxo_clock_freq": { + "help": "Value: External crystal frequency in hertz", + "value": "38400000", + "macro_name": "HFXO_FREQUENCY" + }, + "lf_clock_src": { + "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator", + "value": "LFXO", + "macro_name": "LOW_ENERGY_CLOCK_SOURCE" + }, + "lfxo_clock_freq": { + "help": "Value: External crystal frequency in hertz", + "value": "32768", + "macro_name": "LFXO_FREQUENCY" + }, + "hfrco_clock_freq": { + "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select", + "value": "32000000", + "macro_name": "HFRCO_FREQUENCY" + }, + "hfrco_band_select": { + "help": "Value: One of cmuHFRCOFreq_1M0Hz, cmuHFRCOFreq_2M0Hz, cmuHFRCOFreq_4M0Hz, cmuHFRCOFreq_7M0Hz, cmuHFRCOFreq_13M0Hz, cmuHFRCOFreq_16M0Hz, cmuHFRCOFreq_19M0Hz, cmuHFRCOFreq_26M0Hz, cmuHFRCOFreq_32M0Hz, cmuHFRCOFreq_38M0Hz. Be sure to set hfrco_clock_freq accordingly!", + "value": "cmuHFRCOFreq_32M0Hz", + "macro_name": "HFRCO_FREQUENCY_ENUM" + } + } + }, + "WIZWIKI_W7500": { + "supported_form_factors": ["ARDUINO"], + "core": "Cortex-M0", + "extra_labels": ["WIZNET", "W7500x", "WIZwiki_W7500"], + "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""], + "supported_toolchains": ["uARM", "ARM", "GCC_ARM", "IAR"], + "inherits": ["Target"], + "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"], + "release_versions": ["2", "5"] + }, + "WIZWIKI_W7500P": { + "supported_form_factors": ["ARDUINO"], + "core": "Cortex-M0", + "extra_labels": ["WIZNET", "W7500x", "WIZwiki_W7500P"], + "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""], + "supported_toolchains": ["uARM", "ARM", "GCC_ARM", "IAR"], + "inherits": ["Target"], + "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"], + "release_versions": ["2", "5"] + }, + "WIZWIKI_W7500ECO": { + "inherits": ["Target"], + "core": "Cortex-M0", + "extra_labels": ["WIZNET", "W7500x", "WIZwiki_W7500ECO"], + "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""], + "supported_toolchains": ["uARM", "ARM", "GCC_ARM", "IAR"], + "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"], + "release_versions": ["2", "5"] + }, + "SAMR21G18A": { + "inherits": ["Target"], + "core": "Cortex-M0+", + "macros": ["__SAMR21G18A__", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"], + "extra_labels": ["Atmel", "SAM_CortexM0P", "SAMR21"], + "supported_toolchains": ["GCC_ARM", "ARM", "uARM"], + "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"], + "release_versions": ["2"], + "device_name": "ATSAMR21G18A" + }, + "SAMD21J18A": { + "inherits": ["Target"], + "core": "Cortex-M0+", + "macros": ["__SAMD21J18A__", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"], + "extra_labels": ["Atmel", "SAM_CortexM0P", "SAMD21"], + "supported_toolchains": ["GCC_ARM", "ARM", "uARM"], + "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"], + "release_versions": ["2"], + "device_name": "ATSAMD21J18A" + }, + "SAMD21G18A": { + "inherits": ["Target"], + "core": "Cortex-M0+", + "macros": ["__SAMD21G18A__", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"], + "extra_labels": ["Atmel", "SAM_CortexM0P", "SAMD21"], + "supported_toolchains": ["GCC_ARM", "ARM", "uARM"], + "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"], + "release_versions": ["2"], + "device_name": "ATSAMD21G18A" + }, + "SAML21J18A": { + "inherits": ["Target"], + "core": "Cortex-M0+", + "macros": ["__SAML21J18A__", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"], + "extra_labels": ["Atmel", "SAM_CortexM0P", "SAML21"], + "supported_toolchains": ["GCC_ARM", "ARM", "uARM"], + "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"], + "device_name": "ATSAML21J18A" + }, + "SAMG55J19": { + "inherits": ["Target"], + "core": "Cortex-M4", + "extra_labels": ["Atmel", "SAM_CortexM4", "SAMG55"], + "macros": ["__SAMG55J19__", "BOARD=75", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"], + "supported_toolchains": ["GCC_ARM", "ARM", "uARM"], + "default_toolchain": "ARM", + "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"], + "default_lib": "std", + "device_name": "ATSAMG55J19" + }, + "MCU_NRF51_UNIFIED": { + "inherits": ["Target"], + "core": "Cortex-M0", + "OVERRIDE_BOOTLOADER_FILENAME": "nrf51822_bootloader.hex", + "macros": [ + "NRF51", + "TARGET_NRF51822", + "BLE_STACK_SUPPORT_REQD", + "SOFTDEVICE_PRESENT", + "S130", + "TARGET_MCU_NRF51822", + "CMSIS_VECTAB_VIRTUAL", + "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\"", + "NO_SYSTICK", + "MBED_TICKLESS" + ], + "MERGE_BOOTLOADER": false, + "extra_labels": [ + "NORDIC", + "MCU_NRF51", + "MCU_NRF51822_UNIFIED", + "NRF5x", + "NRF51", + "SDK_11" + ], + "OUTPUT_EXT": "hex", + "is_disk_virtual": true, + "supported_toolchains": ["ARM", "GCC_ARM", "IAR"], + "public": false, + "MERGE_SOFT_DEVICE": true, + "EXPECTED_SOFTDEVICES_WITH_OFFSETS": [ + { + "boot": "", + "name": "s130_nrf51_2.0.0_softdevice.hex", + "offset": 110592 + } + ], + "detect_code": ["1070"], + "post_binary_hook": { + "function": "MCU_NRF51Code.binary_hook", + "toolchains": ["ARM_STD", "GCC_ARM", "IAR"] + }, + "program_cycle_s": 6, + "features": ["BLE"], + "config": { + "lf_clock_src": { + "value": "NRF_LF_SRC_XTAL", + "macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_SRC" + }, + "uart_hwfc": { + "help": "Value: 1 for enable, 0 for disable", + "value": 1, + "macro_name": "MBED_CONF_NORDIC_UART_HWFC" + } + }, + "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"] + }, + "MCU_NRF51_32K_UNIFIED": { + "inherits": ["MCU_NRF51_UNIFIED"], + "extra_labels_add": ["MCU_NORDIC_32K", "MCU_NRF51_32K"], + "macros_add": ["TARGET_MCU_NORDIC_32K", "TARGET_MCU_NRF51_32K"], + "public": false + }, + "NRF51_DK": { + "supported_form_factors": ["ARDUINO"], + "inherits": ["MCU_NRF51_32K_UNIFIED"], + "device_has": ["ANALOGIN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"], + "release_versions": ["2", "5"], + "device_name": "nRF51822_xxAA" + }, + "NRF51_DONGLE": { + "inherits": ["MCU_NRF51_32K_UNIFIED"], + "progen": {"target": "nrf51-dongle"}, + "device_has": ["I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"], + "release_versions": ["2", "5"] + }, + "OSHCHIP": { + "inherits": ["MCU_NRF51_32K_UNIFIED"], + "overrides": {"lf_clock_src": "NRF_LF_SRC_RC"}, + "device_has": ["ANALOGIN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"], + "device_name": "nRF51822_xxAC" + }, + "MCU_NRF52832": { + "inherits": ["Target"], + "core": "Cortex-M4F", + "macros": [ + "BOARD_PCA10040", + "NRF52", + "TARGET_NRF52832", + "CMSIS_VECTAB_VIRTUAL", + "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\"", + "MBED_TICKLESS" + ], + "device_has": [ + "ANALOGIN", + "FLASH", + "I2C", + "I2C_ASYNCH", + "INTERRUPTIN", + "ITM", + "LOWPOWERTIMER", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "RTC", + "SERIAL", + "SERIAL_ASYNCH", + "SERIAL_FC", + "SLEEP", + "SPI", + "SPI_ASYNCH", + "STCLK_OFF_DURING_SLEEP", + "TRNG" + ], + "extra_labels": [ + "NORDIC", + "NRF5x", + "NRF52", + "SDK_14_2", + "SOFTDEVICE_COMMON", + "SOFTDEVICE_S132" + ], + "config": { + "lf_clock_src": { + "macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_SRC", + "help": "Select Low Frequency clock source. Options: NRF_LF_SRC_XTAL, NRF_LF_SRC_SYNTH, and NRF_LF_SRC_RC", + "value": "NRF_LF_SRC_XTAL" + }, + "lf_clock_rc_calib_timer_interval": { + "macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_CALIB_TIMER_INTERVAL", + "value": 16 + }, + "lf_clock_rc_calib_mode_config": { + "macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_CALIB_MODE_CONFIG", + "value": 0 + } + }, + "OUTPUT_EXT": "hex", + "is_disk_virtual": true, + "supported_toolchains": ["GCC_ARM", "ARM", "IAR"], + "public": false, + "detect_code": ["1101"], + "program_cycle_s": 6, + "bootloader_supported": true + }, + "NRF52_DK": { + "supported_form_factors": ["ARDUINO"], + "inherits": ["MCU_NRF52832"], + "release_versions": ["5"], + "device_name": "nRF52832_xxAA" + }, + "UBLOX_EVA_NINA": { + "inherits": ["MCU_NRF52832"], + "release_versions": ["5"], + "device_name": "nRF52832_xxAA" + }, + "UBLOX_EVK_NINA_B1": { + "supported_form_factors": ["ARDUINO"], + "inherits": ["MCU_NRF52832"], + "release_versions": ["5"], + "device_name": "nRF52832_xxAA" + }, + "MTB_UBLOX_NINA_B1": { + "inherits": ["MCU_NRF52832"], + "release_versions": ["5"], + "device_name": "nRF52832_xxAA" + }, + "MTB_LAIRD_BL652": { + "inherits": ["MCU_NRF52832"], + "release_versions": ["5"], + "device_name": "nRF52832_xxAA" + }, + "DELTA_DFBM_NQ620": { + "supported_form_factors": ["ARDUINO"], + "inherits": ["MCU_NRF52832"], + "release_versions": ["5"], + "device_name": "nRF52832_xxAA" + }, + "MCU_NRF52840": { + "inherits": ["Target"], + "core": "Cortex-M4F", + "macros": [ + "BOARD_PCA10056", + "NRF52840_XXAA", + "TARGET_NRF52840", + "CMSIS_VECTAB_VIRTUAL", + "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\"", + "MBED_TICKLESS" + ], + "device_has": [ + "ANALOGIN", + "FLASH", + "I2C", + "I2C_ASYNCH", + "INTERRUPTIN", + "ITM", + "LOWPOWERTIMER", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "RTC", + "SERIAL", + "SERIAL_ASYNCH", + "SERIAL_FC", + "SLEEP", + "SPI", + "SPI_ASYNCH", + "STCLK_OFF_DURING_SLEEP", + "TRNG" + ], + "extra_labels": [ + "NORDIC", + "NRF5x", + "NRF52", + "SDK_14_2", + "SOFTDEVICE_COMMON", + "SOFTDEVICE_S140" + ], + "config": { + "lf_clock_src": { + "macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_SRC", + "help": "Select Low Frequency clock source. Options: NRF_LF_SRC_XTAL, NRF_LF_SRC_SYNTH, and NRF_LF_SRC_RC", + "value": "NRF_LF_SRC_XTAL" + }, + "lf_clock_rc_calib_timer_interval": { + "macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_CALIB_TIMER_INTERVAL", + "value": 16 + }, + "lf_clock_rc_calib_mode_config": { + "macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_CALIB_MODE_CONFIG", + "value": 0 + } + }, + "OUTPUT_EXT": "hex", + "is_disk_virtual": true, + "supported_toolchains": ["GCC_ARM", "ARM", "IAR"], + "public": false, + "detect_code": ["1101"], + "program_cycle_s": 6, + "bootloader_supported": true + }, + "NRF52840_DK": { + "supported_form_factors": ["ARDUINO"], + "inherits": ["MCU_NRF52840"], + "release_versions": ["5"], + "device_name": "nRF52840_xxAA" + }, + "BLUEPILL_F103C8": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M3", + "default_toolchain": "GCC_ARM", + "extra_labels_add": ["STM32F1", "STM32F103C8"], + "supported_toolchains": ["GCC_ARM"], + "device_has_add": [], + "device_has_remove": ["RTC", "STDIO_MESSAGES"] + }, + "NUMAKER_PFM_NUC472": { + "core": "Cortex-M4F", + "default_toolchain": "ARM", + "extra_labels": ["NUVOTON", "NUC472", "NU_XRAM_SUPPORTED", "FLASH_CMSIS_ALGO"], + "is_disk_virtual": true, + "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"], + "config": { + "gpio-irq-debounce-enable": { + "help": "Enable GPIO IRQ debounce", + "value": 0 + }, + "gpio-irq-debounce-enable-list": { + "help": "Comma separated pin list to enable GPIO IRQ debounce", + "value": "NC" + }, + "gpio-irq-debounce-clock-source": { + "help": "Select GPIO IRQ debounce clock source: GPIO_DBCTL_DBCLKSRC_HCLK or GPIO_DBCTL_DBCLKSRC_IRC10K", + "value": "GPIO_DBCTL_DBCLKSRC_IRC10K" + }, + "gpio-irq-debounce-sample-rate": { + "help": "Select GPIO IRQ debounce sample rate: GPIO_DBCTL_DBCLKSEL_1, GPIO_DBCTL_DBCLKSEL_2, GPIO_DBCTL_DBCLKSEL_4, ..., or GPIO_DBCTL_DBCLKSEL_32768", + "value": "GPIO_DBCTL_DBCLKSEL_16" + } + }, + "inherits": ["Target"], + "macros_add": ["MBEDTLS_CONFIG_HW_SUPPORT"], + "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "STDIO_MESSAGES", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "TRNG", "CAN", "FLASH"], + "features": ["LWIP"], + "release_versions": ["5"], + "device_name": "NUC472HI8AE", + "bootloader_supported": true + }, + "NCS36510": { + "inherits": ["Target"], + "core": "Cortex-M3", + "extra_labels": ["ONSEMI"], + "config": { + "mac-addr-low": { + "help": "Lower 32 bits of the MAC extended address. All FFs indicates that factory programmed MAC address shall be used. In order to override the factory programmed MAC address this value needs to be changed from 0xFFFFFFFF to any chosen value.", + "value": "0xFFFFFFFF" + }, + "mac-addr-high": { + "help": "Higher 32 bits of the MAC extended address. All FFs indicates that factory programmed MAC address shall be used. In order to override the factory programmed MAC address this value needs to be changed from 0xFFFFFFFF to any chosen value.", + "value": "0xFFFFFFFF" + }, + "32KHz-clk-trim": { + "help": "32KHz clock trim", + "value": "0x39" + }, + "32MHz-clk-trim": { + "help": "32MHz clock trim", + "value": "0x17" + }, + "rssi-trim": { + "help": "RSSI trim", + "value": "0x3D" + }, + "txtune-trim": { + "help": "TX tune trim", + "value": "0xFFFFFFFF" + } + }, + "OUTPUT_EXT": "hex", + "post_binary_hook": {"function": "NCS36510TargetCode.ncs36510_addfib"}, + "macros": ["CM3", "CPU_NCS36510", "TARGET_NCS36510", "LOAD_ADDRESS=0x3000"], + "supported_toolchains": ["GCC_ARM", "ARM", "IAR"], + "device_has": ["ANALOGIN", "SERIAL", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "LOWPOWERTIMER", "TRNG", "SPISLAVE", "RTC"], + "release_versions": ["2", "5"] + }, + "NUMAKER_PFM_M453": { + "core": "Cortex-M4F", + "default_toolchain": "ARM", + "extra_labels": ["NUVOTON", "M451", "NUMAKER_PFM_M453", "FLASH_CMSIS_ALGO"], + "is_disk_virtual": true, + "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"], + "config": { + "gpio-irq-debounce-enable": { + "help": "Enable GPIO IRQ debounce", + "value": 0 + }, + "gpio-irq-debounce-enable-list": { + "help": "Comma separated pin list to enable GPIO IRQ debounce", + "value": "NC" + }, + "gpio-irq-debounce-clock-source": { + "help": "Select GPIO IRQ debounce clock source: GPIO_DBCTL_DBCLKSRC_HCLK or GPIO_DBCTL_DBCLKSRC_LIRC", + "value": "GPIO_DBCTL_DBCLKSRC_LIRC" + }, + "gpio-irq-debounce-sample-rate": { + "help": "Select GPIO IRQ debounce sample rate: GPIO_DBCTL_DBCLKSEL_1, GPIO_DBCTL_DBCLKSEL_2, GPIO_DBCTL_DBCLKSEL_4, ..., or GPIO_DBCTL_DBCLKSEL_32768", + "value": "GPIO_DBCTL_DBCLKSEL_16" + } + }, + "inherits": ["Target"], + "progen": {"target": "numaker-pfm-m453"}, + "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "STDIO_MESSAGES", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "CAN", "FLASH"], + "release_versions": ["2", "5"], + "device_name": "M453VG6AE", + "bootloader_supported": true + }, + "NUMAKER_PFM_NANO130": { + "core": "Cortex-M0", + "default_toolchain": "ARM", + "extra_labels": ["NUVOTON", "NANO100", "NANO130KE3BN"], + "is_disk_virtual": true, + "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"], + "config": { + "gpio-irq-debounce-enable": { + "help": "Enable GPIO IRQ debounce", + "value": 0 + }, + "gpio-irq-debounce-enable-list": { + "help": "Comma separated pin list to enable GPIO IRQ debounce", + "value": "NC" + }, + "gpio-irq-debounce-clock-source": { + "help": "Select GPIO IRQ debounce clock source: GPIO_DBCLKSRC_HCLK or GPIO_DBCLKSRC_IRC10K", + "value": "GPIO_DBCLKSRC_IRC10K" + }, + "gpio-irq-debounce-sample-rate": { + "help": "Select GPIO IRQ debounce sample rate: GPIO_DBCLKSEL_1, GPIO_DBCLKSEL_2, GPIO_DBCLKSEL_4, ..., or GPIO_DBCLKSEL_32768", + "value": "GPIO_DBCLKSEL_16" + } + }, + "inherits": ["Target"], + "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\"","MBED_FAULT_HANDLER_DISABLED"], + "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "STDIO_MESSAGES", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"], + "release_versions": ["5"], + "device_name": "NANO130KE3BN" + }, + "HI2110": { + "inherits": ["Target"], + "core": "Cortex-M0", + "default_toolchain": "GCC_ARM", + "supported_toolchains": ["GCC_ARM", "ARM", "IAR"], + "extra_labels": ["ublox"], + "macros": ["TARGET_PROCESSOR_FAMILY_BOUDICA", "BOUDICA_SARA", "NDEBUG=1", "CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""], + "public": false, + "target_overrides": { + "*": { + "core.stdio-flush-at-exit": false + } + }, + "device_has": ["INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SLEEP", "STDIO_MESSAGES"], + "default_lib": "std", + "release_versions": ["5"] + }, + "SARA_NBIOT": { + "inherits": ["HI2110"], + "extra_labels": ["ublox", "HI2110"], + "public": false + }, + "SARA_NBIOT_EVK": { + "inherits": ["SARA_NBIOT"], + "extra_labels": ["ublox", "HI2110", "SARA_NBIOT"] + }, + "REALTEK_RTL8195AM": { + "supported_form_factors": ["ARDUINO"], + "core": "Cortex-M3", + "default_toolchain": "GCC_ARM", + "inherits": ["Target"], + "detect_code": ["4600"], + "extra_labels": ["Realtek", "AMEBA", "RTL8195A"], + "macros": ["__RTL8195A__","CONFIG_PLATFORM_8195A","CONFIG_MBED_ENABLED","PLATFORM_CMSIS_RTOS","MBED_FAULT_HANDLER_DISABLED"], + "supported_toolchains": ["GCC_ARM", "ARM", "IAR"], + "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "TRNG", "EMAC", "FLASH"], + "features": ["LWIP"], + "post_binary_hook": { + "function": "RTL8195ACode.binary_hook", + "toolchains": ["ARM_STD", "GCC_ARM", "IAR"] + }, + "release_versions": ["5"] + }, + "VBLUNO51_LEGACY": { + "supported_form_factors": ["ARDUINO"], + "inherits": ["MCU_NRF51_32K"], + "detect_code": ["C006"], + "overrides": {"uart_hwfc": 0}, + "extra_labels_add": ["VBLUNO51"] + }, + "VBLUNO51_BOOT": { + "supported_form_factors": ["ARDUINO"], + "inherits": ["MCU_NRF51_32K_BOOT"], + "detect_code": ["C006"], + "overrides": {"uart_hwfc": 0}, + "extra_labels_add": ["VBLUNO51"], + "macros_add": ["TARGET_VBLUNO51"] + }, + "VBLUNO51_OTA": { + "supported_form_factors": ["ARDUINO"], + "inherits": ["MCU_NRF51_32K_OTA"], + "detect_code": ["C006"], + "overrides": {"uart_hwfc": 0}, + "extra_labels_add": ["VBLUNO51"], + "macros_add": ["TARGET_VBLUNO51"] + }, + "VBLUNO51": { + "supported_form_factors": ["ARDUINO"], + "inherits": ["MCU_NRF51_32K_UNIFIED"], + "detect_code": ["C006"], + "overrides": {"uart_hwfc": 0}, + "device_has": ["ANALOGIN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"], + "release_versions": ["2"], + "device_name": "nRF51822_xxAC" + }, + "DISCO_L496AG": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32L4", "STM32L496AG", "STM32L496xG"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI | USE_PLL_MSI", + "value": "USE_PLL_MSI", + "macro_name": "CLOCK_SOURCE" + }, + "lowpowertimer_lptim": { + "help": "This target supports LPTIM. Set value 1 to use LPTIM for LOWPOWERTIMER, or 0 to use RTC wakeup timer", + "value": 1 + } + }, + "detect_code": ["0822"], + "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"], + "release_versions": ["2", "5"], + "device_name": "STM32L496AG" + }, + "NUCLEO_L496ZG": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO", "MORPHO"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32L4", "STM32L496ZG", "STM32L496xG"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI | USE_PLL_MSI", + "value": "USE_PLL_MSI", + "macro_name": "CLOCK_SOURCE" + }, + "lowpowertimer_lptim": { + "help": "This target supports LPTIM. Set value 1 to use LPTIM for LOWPOWERTIMER, or 0 to use RTC wakeup timer", + "value": 1 + } + }, + "detect_code": ["0823"], + "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"], + "release_versions": ["2", "5"], + "device_name": "STM32L496ZG" + }, + "NUCLEO_L496ZG_P": { + "inherits": ["NUCLEO_L496ZG"], + "detect_code": ["0828"] + }, + "VBLUNO52": { + "supported_form_factors": ["ARDUINO"], + "inherits": ["MCU_NRF52832"], + "release_versions": ["5"], + "device_name": "nRF52832_xxAA" + }, + "NUMAKER_PFM_M487": { + "core": "Cortex-M4F", + "default_toolchain": "ARM", + "extra_labels": ["NUVOTON", "M480", "FLASH_CMSIS_ALGO"], + "is_disk_virtual": true, + "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"], + "config": { + "gpio-irq-debounce-enable": { + "help": "Enable GPIO IRQ debounce", + "value": 0 + }, + "gpio-irq-debounce-enable-list": { + "help": "Comma separated pin list to enable GPIO IRQ debounce", + "value": "NC" + }, + "gpio-irq-debounce-clock-source": { + "help": "Select GPIO IRQ debounce clock source: GPIO_DBCTL_DBCLKSRC_HCLK or GPIO_DBCTL_DBCLKSRC_LIRC", + "value": "GPIO_DBCTL_DBCLKSRC_LIRC" + }, + "gpio-irq-debounce-sample-rate": { + "help": "Select GPIO IRQ debounce sample rate: GPIO_DBCTL_DBCLKSEL_1, GPIO_DBCTL_DBCLKSEL_2, GPIO_DBCTL_DBCLKSEL_4, ..., or GPIO_DBCTL_DBCLKSEL_32768", + "value": "GPIO_DBCTL_DBCLKSEL_16" + }, + "usb-device-hsusbd": { + "help": "Select high-speed USB device or not", + "value": 1 + }, + "ctrl01-enable": { + "help": "Enable control_01", + "value": 0 + } + }, + "inherits": ["Target"], + "macros_add": ["MBEDTLS_CONFIG_HW_SUPPORT"], + "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "STDIO_MESSAGES", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "TRNG", "FLASH", "CAN"], + "features": ["LWIP"], + "release_versions": ["5"], + "device_name": "M487JIDAE", + "bootloader_supported": true + }, + "TMPM066": { + "inherits": ["Target"], + "core": "Cortex-M0", + "is_disk_virtual": true, + "extra_labels": ["TOSHIBA"], + "macros": ["__TMPM066__", "CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""], + "supported_toolchains": ["GCC_ARM", "ARM", "IAR"], + "device_has": ["ANALOGIN", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SLEEP", "I2C", "I2CSLAVE", "STDIO_MESSAGES", "PWMOUT"], + "device_name": "TMPM066FWUG", + "detect_code": ["7011"], + "release_versions": ["5"] + }, + "SAKURAIO_EVB_01": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": [], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32F4", "STM32F411xE", "STM32F411RE"], + "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + } + }, + "device_has_add": ["LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "FLASH"], + "release_versions": ["2"], + "device_name": "STM32F411RE" + }, + "TMPM46B": { + "inherits": ["Target"], + "core": "Cortex-M4", + "is_disk_virtual": true, + "extra_labels": ["TOSHIBA"], + "macros": ["__TMPM46B__"], + "supported_toolchains": ["GCC_ARM", "ARM", "IAR"], + "device_has": ["ANALOGIN", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_FC", "SPI", "I2C", "STDIO_MESSAGES", "TRNG", "FLASH", "SLEEP"], + "device_name": "TMPM46BF10FG", + "detect_code": ["7013"], + "release_versions": ["5"], + "bootloader_supported": true + } +}