Ben Gordon / Mbed 2 deprecated Muscle_Controlled_Servo

Dependencies:   mbed

SPI.cpp@10:6b9c7857d57c, 2018-06-01 (annotated)

Committer:
BenRJG
Date:
Fri Jun 01 13:39:12 2018 +0000
Revision:
10:6b9c7857d57c
Parent:
7:a2648aacc8a7 
fixed adc

Who changed what in which revision?

UserRevisionLine numberNew contents of line
BenRJG 1:acc66d3a1a1c 1 #include "SPI.h"
BenRJG 1:acc66d3a1a1c 2
BenRJG 1:acc66d3a1a1c 3 SPI spi(PA_7, PA_6, PA_5); // Ordered as: mosi, miso, sclk could use forth parameter ssel
BenRJG 1:acc66d3a1a1c 4 // However using multi SPI devices within FPGA with a seperate chip select
BenRJG 1:acc66d3a1a1c 5 SPI spi_cmd(PA_7, PA_6, PA_5); // NB another instance call spi_cmd for 8 bit SPI dataframe see later line 37
BenRJG 1:acc66d3a1a1c 6 // For each device NB PA_7 PA_6 PA_5 are D11 D12 D13 respectively
BenRJG 3:d6e142b6ead1 7
BenRJG 3:d6e142b6ead1 8 //DigitalOut LED_cs(PC_6); // Chip Select for Basic Outputs to illuminate Onboard FPGA DEO nano LEDs CN7 pin 1
BenRJG 3:d6e142b6ead1 9 //DigitalOut LCD_cs(PB_15); // Chip Select for the LCD via FPGA CN7 pin 3
BenRJG 3:d6e142b6ead1 10 //DigitalOut ADC_cs(PB_9); // Chip Select for the ADC via FPGA CN7 pin 4
BenRJG 3:d6e142b6ead1 11
BenRJG 7:a2648aacc8a7 12 BusOut cs(PC_6,PB_15,PB_9); // Chip Select => 111(7) = Nothing, 110(6) = General, 101(5) = LCD, 011(3) = ADC
BenRJG 1:acc66d3a1a1c 13
BenRJG 1:acc66d3a1a1c 14 //NBB the following line for F429ZI !!!!
BenRJG 1:acc66d3a1a1c 15 DigitalIn DO_NOT_USE(PB_12); // MAKE PB_12 (D19) an INPUT do NOT make an OUTPUT under any circumstances !!!!! ************* !!!!!!!!!!!
BenRJG 1:acc66d3a1a1c 16 // This Pin is connected to the 5VDC from the FPGA card and an INPUT is 5V Tolerant
BenRJG 1:acc66d3a1a1c 17
BenRJG 2:b615682e3e4f 18
BenRJG 1:acc66d3a1a1c 19 //Ticker ticktock;
BenRJG 4:bcef9164776e 20
BenRJG 4:bcef9164776e 21 void spi_write_data(short destination, unsigned int data)
BenRJG 4:bcef9164776e 22 {
BenRJG 5:11489c0bd020 23 cs = destination; // Select the device by seting chip select LOW
BenRJG 4:bcef9164776e 24 spi_cmd.write(0);
BenRJG 4:bcef9164776e 25 spi.write(data);
BenRJG 5:11489c0bd020 26 cs = CS_RESET; // De-Select the device by seting chip select HIGH
BenRJG 4:bcef9164776e 27 }
BenRJG 4:bcef9164776e 28
BenRJG 4:bcef9164776e 29 int spi_read_data(short destination)
BenRJG 4:bcef9164776e 30 {
BenRJG 5:11489c0bd020 31 cs = destination; // Select the device by seting chip select LOW
BenRJG 4:bcef9164776e 32 unsigned int read = spi.write(0);
BenRJG 5:11489c0bd020 33 cs = CS_RESET; // De-Select the device by seting chip select HIGH
BenRJG 5:11489c0bd020 34 return read; // Return the read switch value
BenRJG 4:bcef9164776e 35 }
BenRJG 4:bcef9164776e 36
BenRJG 4:bcef9164776e 37 int spi_read_write_data(short destination, unsigned int data)
BenRJG 4:bcef9164776e 38 {
BenRJG 5:11489c0bd020 39 cs = destination; // Select the device by seting chip select LOW
BenRJG 4:bcef9164776e 40 spi_cmd.write(0);
BenRJG 4:bcef9164776e 41 unsigned int read = spi.write(data);
BenRJG 5:11489c0bd020 42 cs = CS_RESET; // De-Select the device by seting chip select HIGH
BenRJG 5:11489c0bd020 43 return read; // Return the read switch value
BenRJG 4:bcef9164776e 44 }
BenRJG 4:bcef9164776e 45
BenRJG 4:bcef9164776e 46
BenRJG 4:bcef9164776e 47
BenRJG 2:b615682e3e4f 48 void SPI_INIT (void)
BenRJG 2:b615682e3e4f 49 {
BenRJG 5:11489c0bd020 50 cs = CS_RESET; // Chip must be deselected, Chip Select is active LOW
BenRJG 3:d6e142b6ead1 51
BenRJG 2:b615682e3e4f 52 spi.format(16,0); // Setup the DATA frame SPI for 16 bit wide word, Clock Polarity 0 and Clock Phase 0 (0)
BenRJG 2:b615682e3e4f 53 spi_cmd.format(8,0); // Setup the COMMAND SPI as 8 Bit wide word, Clock Polarity 0 and Clock Phase 0 (0)
BenRJG 2:b615682e3e4f 54 spi.frequency(1000000); // 1MHz clock rate
BenRJG 2:b615682e3e4f 55 spi_cmd.frequency(1000000); // 1MHz clock rate
BenRJG 2:b615682e3e4f 56 }