Ben Gordon
/
Muscle_Controlled_Servo
LCD.cpp@5:11489c0bd020, 2018-04-05 (annotated)
- Committer:
- BenRJG
- Date:
- Thu Apr 05 15:54:48 2018 +0000
- Revision:
- 5:11489c0bd020
- Parent:
- 4:bcef9164776e
- Child:
- 8:462ce856429b
Separated functions to individual SPI, FPGA, LCD and ADC files
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
BenRJG | 5:11489c0bd020 | 1 | #include "LCD.h" |
BenRJG | 5:11489c0bd020 | 2 | |
BenRJG | 5:11489c0bd020 | 3 | void LCD_INIT(void) |
BenRJG | 5:11489c0bd020 | 4 | { |
BenRJG | 5:11489c0bd020 | 5 | |
BenRJG | 5:11489c0bd020 | 6 | // Preload some arrays |
BenRJG | 5:11489c0bd020 | 7 | // char hello_world[] ="Hello World"; |
BenRJG | 5:11489c0bd020 | 8 | char splash_screen1[]="Martin Simpson"; |
BenRJG | 5:11489c0bd020 | 9 | char splash_screen2[]="Plymouth UNI"; |
BenRJG | 5:11489c0bd020 | 10 | char DVM[] ="Voltage="; |
BenRJG | 5:11489c0bd020 | 11 | |
BenRJG | 5:11489c0bd020 | 12 | lcd_cls(); |
BenRJG | 5:11489c0bd020 | 13 | lcd_locate(1,1); |
BenRJG | 5:11489c0bd020 | 14 | lcd_display(splash_screen1); //Credit line 1 |
BenRJG | 5:11489c0bd020 | 15 | lcd_locate(2,2); |
BenRJG | 5:11489c0bd020 | 16 | lcd_display(splash_screen2); //Credit line 2 |
BenRJG | 5:11489c0bd020 | 17 | wait(2); |
BenRJG | 5:11489c0bd020 | 18 | lcd_cls(); |
BenRJG | 5:11489c0bd020 | 19 | lcd_locate(1,0); |
BenRJG | 5:11489c0bd020 | 20 | lcd_display(DVM); //Type Voltage display |
BenRJG | 5:11489c0bd020 | 21 | lcd_locate(1,13); |
BenRJG | 5:11489c0bd020 | 22 | lcd_display("V"); //Units display |
BenRJG | 5:11489c0bd020 | 23 | } |
BenRJG | 5:11489c0bd020 | 24 | |
BenRJG | 5:11489c0bd020 | 25 | int lcd_cls(void){ |
BenRJG | 5:11489c0bd020 | 26 | spi_write_data(CS_LCD,0x0001); |
BenRJG | 5:11489c0bd020 | 27 | wait_us(CD); //Clear Screen |
BenRJG | 5:11489c0bd020 | 28 | return 0; |
BenRJG | 5:11489c0bd020 | 29 | } |
BenRJG | 5:11489c0bd020 | 30 | |
BenRJG | 5:11489c0bd020 | 31 | int lcd_locate(uint8_t line, uint8_t column){ |
BenRJG | 5:11489c0bd020 | 32 | uint8_t line_addr; |
BenRJG | 5:11489c0bd020 | 33 | uint8_t column_addr; |
BenRJG | 5:11489c0bd020 | 34 | switch(line){ |
BenRJG | 5:11489c0bd020 | 35 | case 1: line_addr=0x80; break; |
BenRJG | 5:11489c0bd020 | 36 | case 2: line_addr=0xC0; break; |
BenRJG | 5:11489c0bd020 | 37 | default: return -1; //return code !=0 is error |
BenRJG | 5:11489c0bd020 | 38 | } |
BenRJG | 5:11489c0bd020 | 39 | if(column<16){column_addr=column;} |
BenRJG | 5:11489c0bd020 | 40 | else{return -1;} |
BenRJG | 5:11489c0bd020 | 41 | spi_write_data(CS_LCD,(line_addr+column_addr)); |
BenRJG | 5:11489c0bd020 | 42 | wait_us(CD); //DDRAM location Second line is 0x00C0 first line starts at 0x0080 |
BenRJG | 5:11489c0bd020 | 43 | return 0; |
BenRJG | 5:11489c0bd020 | 44 | } |
BenRJG | 5:11489c0bd020 | 45 | |
BenRJG | 5:11489c0bd020 | 46 | int lcd_display(char* str){ |
BenRJG | 5:11489c0bd020 | 47 | |
BenRJG | 5:11489c0bd020 | 48 | if (strlen(str)>16){return -1;} //return code !=0 is error |
BenRJG | 5:11489c0bd020 | 49 | |
BenRJG | 5:11489c0bd020 | 50 | uint8_t command_data=1; |
BenRJG | 5:11489c0bd020 | 51 | uint32_t wait_time; |
BenRJG | 5:11489c0bd020 | 52 | |
BenRJG | 5:11489c0bd020 | 53 | switch(command_data){ |
BenRJG | 5:11489c0bd020 | 54 | case 0: wait_time=DD; break; |
BenRJG | 5:11489c0bd020 | 55 | case 1: wait_time=CD; break; |
BenRJG | 5:11489c0bd020 | 56 | default: return -1; |
BenRJG | 5:11489c0bd020 | 57 | } |
BenRJG | 5:11489c0bd020 | 58 | |
BenRJG | 5:11489c0bd020 | 59 | for (int i=0; i<strlen(str);i++){ |
BenRJG | 5:11489c0bd020 | 60 | spi_write_data(CS_LCD,((command_data<<8)+str[i])); |
BenRJG | 5:11489c0bd020 | 61 | wait_us(wait_time); |
BenRJG | 5:11489c0bd020 | 62 | } |
BenRJG | 5:11489c0bd020 | 63 | return 0; |
BenRJG | 5:11489c0bd020 | 64 | } |
BenRJG | 5:11489c0bd020 | 65 | |
BenRJG | 5:11489c0bd020 | 66 | int bar_graph(uint8_t level){ |
BenRJG | 5:11489c0bd020 | 67 | if (level>16){return -1;} //return code !=0 is error |
BenRJG | 5:11489c0bd020 | 68 | spi_write_data(CS_LCD,0x00C0); |
BenRJG | 5:11489c0bd020 | 69 | wait_us(CD); //DDRAM location Second line is 0x00C0 first line starts at 0x0080 |
BenRJG | 5:11489c0bd020 | 70 | for (int i=1; i<=level ;i++) |
BenRJG | 5:11489c0bd020 | 71 | { |
BenRJG | 5:11489c0bd020 | 72 | if(level>0){spi_write_data(CS_LCD,0x01FF);wait_us(DD);} // BLACK SPACE |
BenRJG | 5:11489c0bd020 | 73 | else{spi_write_data(CS_LCD,0x0120);wait_us(DD);} // WHITE SPACE |
BenRJG | 5:11489c0bd020 | 74 | } |
BenRJG | 5:11489c0bd020 | 75 | for (int i=level; i<=16 ;i++) |
BenRJG | 5:11489c0bd020 | 76 | { |
BenRJG | 5:11489c0bd020 | 77 | spi_write_data(CS_LCD,0x0120);wait_us(DD); // SPACE |
BenRJG | 5:11489c0bd020 | 78 | } |
BenRJG | 5:11489c0bd020 | 79 | return 0; // return code ==0 is OK |
BenRJG | 5:11489c0bd020 | 80 | } |