Arturo Rios Ramos
/
STM32F103C8_Adivina
El programa cuenta los intentos ingresados por el usuario para adivinar el numero
SysClockConf.cpp@2:f7a3163071b1, 2019-09-13 (annotated)
- Committer:
- JavierMarcelo98
- Date:
- Fri Sep 13 06:53:02 2019 +0000
- Revision:
- 2:f7a3163071b1
- Parent:
- 0:f680c41c1640
Programa adivina modificado dados ciertos criterios.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
Antulius | 0:f680c41c1640 | 1 | /* |
Antulius | 0:f680c41c1640 | 2 | ****************************************************************************** |
Antulius | 0:f680c41c1640 | 3 | * @file SysClockConf.c |
Antulius | 0:f680c41c1640 | 4 | * @version |
Antulius | 0:f680c41c1640 | 5 | * @date 05-July-2016 |
Antulius | 0:f680c41c1640 | 6 | * @brief System Clock configuration for STM32F103C8T6 |
Antulius | 0:f680c41c1640 | 7 | ***************************************************************************** |
Antulius | 0:f680c41c1640 | 8 | * |
Antulius | 0:f680c41c1640 | 9 | * All rights reserved. |
Antulius | 0:f680c41c1640 | 10 | |
Antulius | 0:f680c41c1640 | 11 | This program is free software: you can redistribute it and/or modify |
Antulius | 0:f680c41c1640 | 12 | it under the terms of the GNU General Public License as published by |
Antulius | 0:f680c41c1640 | 13 | the Free Software Foundation, either version 3 of the License, or |
Antulius | 0:f680c41c1640 | 14 | (at your option) any later version. |
Antulius | 0:f680c41c1640 | 15 | |
Antulius | 0:f680c41c1640 | 16 | This program is distributed in the hope that it will be useful, |
Antulius | 0:f680c41c1640 | 17 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
Antulius | 0:f680c41c1640 | 18 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
Antulius | 0:f680c41c1640 | 19 | GNU General Public License for more details. |
Antulius | 0:f680c41c1640 | 20 | |
Antulius | 0:f680c41c1640 | 21 | You should have received a copy of the GNU General Public License |
Antulius | 0:f680c41c1640 | 22 | along with this program. If not, see <http://www.gnu.org/licenses/>. |
Antulius | 0:f680c41c1640 | 23 | */ |
Antulius | 0:f680c41c1640 | 24 | |
Antulius | 0:f680c41c1640 | 25 | #include "SysClockConf.h" |
Antulius | 0:f680c41c1640 | 26 | #include "mbed.h" |
Antulius | 0:f680c41c1640 | 27 | |
Antulius | 0:f680c41c1640 | 28 | void HSE_SystemClock_Config(void) { |
Antulius | 0:f680c41c1640 | 29 | RCC_OscInitTypeDef RCC_OscInitStruct; |
Antulius | 0:f680c41c1640 | 30 | RCC_ClkInitTypeDef RCC_ClkInitStruct; |
Antulius | 0:f680c41c1640 | 31 | RCC_PeriphCLKInitTypeDef PeriphClkInit; |
Antulius | 0:f680c41c1640 | 32 | |
Antulius | 0:f680c41c1640 | 33 | RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; |
Antulius | 0:f680c41c1640 | 34 | RCC_OscInitStruct.HSEState = RCC_HSE_ON; |
Antulius | 0:f680c41c1640 | 35 | RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1; |
Antulius | 0:f680c41c1640 | 36 | RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; |
Antulius | 0:f680c41c1640 | 37 | RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; |
Antulius | 0:f680c41c1640 | 38 | RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9; |
Antulius | 0:f680c41c1640 | 39 | HAL_RCC_OscConfig(&RCC_OscInitStruct); |
Antulius | 0:f680c41c1640 | 40 | RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; |
Antulius | 0:f680c41c1640 | 41 | RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; |
Antulius | 0:f680c41c1640 | 42 | RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; |
Antulius | 0:f680c41c1640 | 43 | RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; |
Antulius | 0:f680c41c1640 | 44 | RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; |
Antulius | 0:f680c41c1640 | 45 | HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2); |
Antulius | 0:f680c41c1640 | 46 | PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC|RCC_PERIPHCLK_USB; |
Antulius | 0:f680c41c1640 | 47 | PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6; |
Antulius | 0:f680c41c1640 | 48 | PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5; |
Antulius | 0:f680c41c1640 | 49 | HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit); |
Antulius | 0:f680c41c1640 | 50 | } |
Antulius | 0:f680c41c1640 | 51 | |
Antulius | 0:f680c41c1640 | 52 | void confSysClock(void) { |
Antulius | 0:f680c41c1640 | 53 | HAL_RCC_DeInit(); |
Antulius | 0:f680c41c1640 | 54 | HSE_SystemClock_Config(); |
Antulius | 0:f680c41c1640 | 55 | SystemCoreClockUpdate(); |
Antulius | 0:f680c41c1640 | 56 | } |