Filip Hormot
Mems sensor
LSM9DS1_RegVals.h@1:45447b012eea, 2016-09-23 (annotated)
- Committer:
- Anunnaki
- Date:
- Fri Sep 23 12:15:01 2016 +0000
- Revision:
- 1:45447b012eea
- Parent:
- 0:da46ed0f1363
Changed faulty addresses
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| Anunnaki | 0:da46ed0f1363 | 1 | /* Copyright (c) 2016 Aconno. All Rights Reserved. |
| Anunnaki | 0:da46ed0f1363 | 2 | * |
| Anunnaki | 0:da46ed0f1363 | 3 | * Licensees are granted free, non-transferable use of the information. NO |
| Anunnaki | 0:da46ed0f1363 | 4 | * WARRANTY of ANY KIND is provided. This heading must NOT be removed from |
| Anunnaki | 0:da46ed0f1363 | 5 | * the file. |
| Anunnaki | 0:da46ed0f1363 | 6 | * |
| Anunnaki | 1:45447b012eea | 7 | */ |
| Anunnaki | 0:da46ed0f1363 | 8 | |
| Anunnaki | 0:da46ed0f1363 | 9 | //Accelerometer and Gyroscope registars addresses |
| Anunnaki | 0:da46ed0f1363 | 10 | #define ACT_THS 0x04 |
| Anunnaki | 0:da46ed0f1363 | 11 | #define ACT_DUR 0x05 |
| Anunnaki | 0:da46ed0f1363 | 12 | #define INT_GEN_CFG_XL 0x06 |
| Anunnaki | 0:da46ed0f1363 | 13 | #define INT_GEN_THS_X_XL 0x07 |
| Anunnaki | 0:da46ed0f1363 | 14 | #define INT_GEN_THS_Y_XL 0x08 |
| Anunnaki | 0:da46ed0f1363 | 15 | #define INT_GEN_THS_Z_XL 0x09 |
| Anunnaki | 0:da46ed0f1363 | 16 | #define INT_GEN_DUR_XL 0x0A |
| Anunnaki | 0:da46ed0f1363 | 17 | #define REFERENCE_G 0x0B |
| Anunnaki | 0:da46ed0f1363 | 18 | #define INT1_CTRL 0x0C |
| Anunnaki | 0:da46ed0f1363 | 19 | #define INT2_CTRL 0x0D |
| Anunnaki | 0:da46ed0f1363 | 20 | #define WHO_AM_I_XG 0x0F |
| Anunnaki | 0:da46ed0f1363 | 21 | #define CTRL_REG1_G 0x10 |
| Anunnaki | 0:da46ed0f1363 | 22 | #define CTRL_REG2_G 0x11 |
| Anunnaki | 0:da46ed0f1363 | 23 | #define CTRL_REG3_G 0x12 |
| Anunnaki | 0:da46ed0f1363 | 24 | #define ORIENT_CFG_G 0x13 |
| Anunnaki | 0:da46ed0f1363 | 25 | #define INT_GEN_SRC_G 0x14 |
| Anunnaki | 0:da46ed0f1363 | 26 | #define OUT_TEMP_L 0x15 |
| Anunnaki | 0:da46ed0f1363 | 27 | #define OUT_TEMP_H 0x16 |
| Anunnaki | 0:da46ed0f1363 | 28 | #define STATUS_REG_0 0x17 |
| Anunnaki | 0:da46ed0f1363 | 29 | #define OUT_X_L_G 0x18 |
| Anunnaki | 0:da46ed0f1363 | 30 | #define OUT_X_H_G 0x19 |
| Anunnaki | 0:da46ed0f1363 | 31 | #define OUT_Y_L_G 0x1A |
| Anunnaki | 0:da46ed0f1363 | 32 | #define OUT_Y_H_G 0x1B |
| Anunnaki | 0:da46ed0f1363 | 33 | #define OUT_Z_L_G 0x1C |
| Anunnaki | 0:da46ed0f1363 | 34 | #define OUT_Z_H_G 0x1D |
| Anunnaki | 0:da46ed0f1363 | 35 | #define CTRL_REG4 0x1E |
| Anunnaki | 0:da46ed0f1363 | 36 | #define CTRL_REG5_XL 0x1F |
| Anunnaki | 0:da46ed0f1363 | 37 | #define CTRL_REG6_XL 0x20 |
| Anunnaki | 0:da46ed0f1363 | 38 | #define CTRL_REG7_XL 0x21 |
| Anunnaki | 0:da46ed0f1363 | 39 | #define CTRL_REG8 0x22 |
| Anunnaki | 0:da46ed0f1363 | 40 | #define CTRL_REG9 0x23 |
| Anunnaki | 0:da46ed0f1363 | 41 | #define CTRL_REG10 0x24 |
| Anunnaki | 0:da46ed0f1363 | 42 | #define INT_GEN_SRC_XL 0x26 |
| Anunnaki | 0:da46ed0f1363 | 43 | #define STATUS_REG_1 0x27 |
| Anunnaki | 0:da46ed0f1363 | 44 | #define OUT_X_L_XL 0x28 |
| Anunnaki | 0:da46ed0f1363 | 45 | #define OUT_X_H_XL 0x29 |
| Anunnaki | 0:da46ed0f1363 | 46 | #define OUT_Y_L_XL 0x2A |
| Anunnaki | 0:da46ed0f1363 | 47 | #define OUT_Y_H_XL 0x2B |
| Anunnaki | 0:da46ed0f1363 | 48 | #define OUT_Z_L_XL 0x2C |
| Anunnaki | 0:da46ed0f1363 | 49 | #define OUT_Z_H_XL 0x2D |
| Anunnaki | 0:da46ed0f1363 | 50 | #define FIFO_CTRL 0x2E |
| Anunnaki | 0:da46ed0f1363 | 51 | #define FIFO_SRC 0x2F |
| Anunnaki | 0:da46ed0f1363 | 52 | #define INT_GEN_CFG_G 0x30 |
| Anunnaki | 0:da46ed0f1363 | 53 | #define INT_GEN_THS_XH_G 0x31 |
| Anunnaki | 0:da46ed0f1363 | 54 | #define INT_GEN_THS_XL_G 0x32 |
| Anunnaki | 0:da46ed0f1363 | 55 | #define INT_GEN_THS_YH_G 0x33 |
| Anunnaki | 0:da46ed0f1363 | 56 | #define INT_GEN_THS_YL_G 0x34 |
| Anunnaki | 0:da46ed0f1363 | 57 | #define INT_GEN_THS_ZH_G 0x35 |
| Anunnaki | 0:da46ed0f1363 | 58 | #define INT_GEN_THS_ZL_G 0x36 |
| Anunnaki | 0:da46ed0f1363 | 59 | #define INT_GEN_DUR_G 0x37 |
| Anunnaki | 0:da46ed0f1363 | 60 | |
| Anunnaki | 0:da46ed0f1363 | 61 | //Magnetometer registers addresses |
| Anunnaki | 0:da46ed0f1363 | 62 | #define OFFSET_X_REG_L_M 0x05 |
| Anunnaki | 0:da46ed0f1363 | 63 | #define OFFSET_X_REG_H_M 0x06 |
| Anunnaki | 0:da46ed0f1363 | 64 | #define OFFSET_Y_REG_L_M 0x07 |
| Anunnaki | 0:da46ed0f1363 | 65 | #define OFFSET_Y_REG_H_M 0x08 |
| Anunnaki | 0:da46ed0f1363 | 66 | #define OFFSET_Z_REG_L_M 0x09 |
| Anunnaki | 0:da46ed0f1363 | 67 | #define OFFSET_Z_REG_H_M 0x0A |
| Anunnaki | 0:da46ed0f1363 | 68 | #define WHO_AM_I_M 0x0F |
| Anunnaki | 0:da46ed0f1363 | 69 | #define CTRL_REG1_M 0x20 |
| Anunnaki | 0:da46ed0f1363 | 70 | #define CTRL_REG2_M 0x21 |
| Anunnaki | 0:da46ed0f1363 | 71 | #define CTRL_REG3_M 0x22 |
| Anunnaki | 0:da46ed0f1363 | 72 | #define CTRL_REG4_M 0x23 |
| Anunnaki | 0:da46ed0f1363 | 73 | #define CTRL_REG5_M 0x24 |
| Anunnaki | 0:da46ed0f1363 | 74 | #define STATUS_REG_M 0x27 |
| Anunnaki | 0:da46ed0f1363 | 75 | #define OUT_X_L_M 0x28 |
| Anunnaki | 0:da46ed0f1363 | 76 | #define OUT_X_H_M 0x29 |
| Anunnaki | 0:da46ed0f1363 | 77 | #define OUT_Y_L_M 0x2A |
| Anunnaki | 0:da46ed0f1363 | 78 | #define OUT_Y_H_M 0x2B |
| Anunnaki | 0:da46ed0f1363 | 79 | #define OUT_Z_L_M 0x2C |
| Anunnaki | 0:da46ed0f1363 | 80 | #define OUT_Z_H_M 0x2D |
| Anunnaki | 0:da46ed0f1363 | 81 | #define INT_CFG_M 0x30 |
| Anunnaki | 0:da46ed0f1363 | 82 | #define INT_SRC_M 0x30 |
| Anunnaki | 0:da46ed0f1363 | 83 | #define INT_THS_L_M 0x32 |
| Anunnaki | 0:da46ed0f1363 | 84 | #define INT_THS_H_M 0x33 |