For use with STM32L746RG . Class which provides functions to control a TAOS TCS3472 Color Light-to-Digital Converter with IR Filter via I2C.
Fork of TCS3472_I2C by
TCS3472_I2C.cpp@5:d4cf0fa1a182, 2014-04-16 (annotated)
- Committer:
- karlmaxwell67
- Date:
- Wed Apr 16 10:57:46 2014 +0000
- Revision:
- 5:d4cf0fa1a182
- Parent:
- 4:5d1f8d7d81ff
- Child:
- 6:6d5bb4ad7d6e
_
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
karlmaxwell67 | 1:70d7d9f1af01 | 1 | #include "TCS3472_I2C.h" |
karlmaxwell67 | 1:70d7d9f1af01 | 2 | |
karlmaxwell67 | 3:6a89ac4a1979 | 3 | TCS3472_I2C::TCS3472_I2C( PinName sda, PinName scl ) : i2c( sda, scl ){ |
karlmaxwell67 | 5:d4cf0fa1a182 | 4 | i2c.frequency(100000); |
karlmaxwell67 | 3:6a89ac4a1979 | 5 | enablePowerAndRGBC(); |
karlmaxwell67 | 1:70d7d9f1af01 | 6 | } |
karlmaxwell67 | 1:70d7d9f1af01 | 7 | |
karlmaxwell67 | 1:70d7d9f1af01 | 8 | int TCS3472_I2C::writeSingleRegister( char address, char data ){ |
karlmaxwell67 | 1:70d7d9f1af01 | 9 | char tx[2] = { address | 160, data }; //0d160 = 0b10100000 |
karlmaxwell67 | 3:6a89ac4a1979 | 10 | int ack = i2c.write( SLAVE_ADDRESS << 1, tx, 2 ); |
karlmaxwell67 | 3:6a89ac4a1979 | 11 | return ack; |
karlmaxwell67 | 3:6a89ac4a1979 | 12 | } |
karlmaxwell67 | 3:6a89ac4a1979 | 13 | |
karlmaxwell67 | 3:6a89ac4a1979 | 14 | int TCS3472_I2C::writeMultipleRegisters( char address, char* data, int quantity ){ |
karlmaxwell67 | 3:6a89ac4a1979 | 15 | char tx[ quantity + 1 ]; |
karlmaxwell67 | 3:6a89ac4a1979 | 16 | tx[0] = address | 160; |
karlmaxwell67 | 3:6a89ac4a1979 | 17 | for ( int i = 1; i <= quantity; i++ ){ |
karlmaxwell67 | 3:6a89ac4a1979 | 18 | tx[ i ] = data[ i - 1 ]; |
karlmaxwell67 | 3:6a89ac4a1979 | 19 | } |
karlmaxwell67 | 3:6a89ac4a1979 | 20 | int ack = i2c.write( SLAVE_ADDRESS << 1, tx, quantity + 1 ); |
karlmaxwell67 | 1:70d7d9f1af01 | 21 | return ack; |
karlmaxwell67 | 1:70d7d9f1af01 | 22 | } |
karlmaxwell67 | 1:70d7d9f1af01 | 23 | |
karlmaxwell67 | 1:70d7d9f1af01 | 24 | char TCS3472_I2C::readSingleRegister( char address ){ |
karlmaxwell67 | 1:70d7d9f1af01 | 25 | char output = 255; |
karlmaxwell67 | 1:70d7d9f1af01 | 26 | char command = address | 160; //0d160 = 0b10100000 |
karlmaxwell67 | 3:6a89ac4a1979 | 27 | i2c.write( SLAVE_ADDRESS << 1, &command, 1, true ); |
karlmaxwell67 | 3:6a89ac4a1979 | 28 | i2c.read( SLAVE_ADDRESS << 1, &output, 1 ); |
karlmaxwell67 | 1:70d7d9f1af01 | 29 | return output; |
karlmaxwell67 | 1:70d7d9f1af01 | 30 | } |
karlmaxwell67 | 1:70d7d9f1af01 | 31 | |
karlmaxwell67 | 1:70d7d9f1af01 | 32 | int TCS3472_I2C::readMultipleRegisters( char address, char* output, int quantity ){ |
karlmaxwell67 | 1:70d7d9f1af01 | 33 | char command = address | 160; //0d160 = 0b10100000 |
karlmaxwell67 | 3:6a89ac4a1979 | 34 | i2c.write( SLAVE_ADDRESS << 1, &command, 1, true ); |
karlmaxwell67 | 3:6a89ac4a1979 | 35 | int ack = i2c.read( SLAVE_ADDRESS << 1, output, quantity ); |
karlmaxwell67 | 1:70d7d9f1af01 | 36 | return ack; |
karlmaxwell67 | 1:70d7d9f1af01 | 37 | } |
karlmaxwell67 | 1:70d7d9f1af01 | 38 | |
karlmaxwell67 | 1:70d7d9f1af01 | 39 | int TCS3472_I2C::getAllColours( int* readings ){ |
karlmaxwell67 | 1:70d7d9f1af01 | 40 | char buffer[8] = { 0 }; |
karlmaxwell67 | 1:70d7d9f1af01 | 41 | |
karlmaxwell67 | 1:70d7d9f1af01 | 42 | readMultipleRegisters( CDATA, buffer, 8 ); |
karlmaxwell67 | 1:70d7d9f1af01 | 43 | |
karlmaxwell67 | 1:70d7d9f1af01 | 44 | readings[0] = (int)buffer[1] << 8 | (int)buffer[0]; |
karlmaxwell67 | 1:70d7d9f1af01 | 45 | readings[1] = (int)buffer[3] << 8 | (int)buffer[2]; |
karlmaxwell67 | 1:70d7d9f1af01 | 46 | readings[2] = (int)buffer[5] << 8 | (int)buffer[4]; |
karlmaxwell67 | 1:70d7d9f1af01 | 47 | readings[3] = (int)buffer[7] << 8 | (int)buffer[6]; |
karlmaxwell67 | 0:453a43c8bf2b | 48 | |
karlmaxwell67 | 1:70d7d9f1af01 | 49 | return 0; |
karlmaxwell67 | 1:70d7d9f1af01 | 50 | } |
karlmaxwell67 | 1:70d7d9f1af01 | 51 | |
karlmaxwell67 | 1:70d7d9f1af01 | 52 | int TCS3472_I2C::getClearData(){ |
karlmaxwell67 | 1:70d7d9f1af01 | 53 | char buffer[2] = { 0 }; |
karlmaxwell67 | 1:70d7d9f1af01 | 54 | readMultipleRegisters( CDATA, buffer, 2 ); |
karlmaxwell67 | 1:70d7d9f1af01 | 55 | int reading = (int)buffer[1] << 8 | (int)buffer[0]; |
karlmaxwell67 | 1:70d7d9f1af01 | 56 | return reading; |
karlmaxwell67 | 1:70d7d9f1af01 | 57 | } |
karlmaxwell67 | 1:70d7d9f1af01 | 58 | |
karlmaxwell67 | 1:70d7d9f1af01 | 59 | int TCS3472_I2C::getRedData(){ |
karlmaxwell67 | 1:70d7d9f1af01 | 60 | char buffer[2] = { 0 }; |
karlmaxwell67 | 1:70d7d9f1af01 | 61 | readMultipleRegisters( RDATA, buffer, 2 ); |
karlmaxwell67 | 1:70d7d9f1af01 | 62 | int reading = (int)buffer[1] << 8 | (int)buffer[0]; |
karlmaxwell67 | 1:70d7d9f1af01 | 63 | return reading; |
karlmaxwell67 | 1:70d7d9f1af01 | 64 | } |
karlmaxwell67 | 1:70d7d9f1af01 | 65 | |
karlmaxwell67 | 1:70d7d9f1af01 | 66 | int TCS3472_I2C::getGreenData(){ |
karlmaxwell67 | 1:70d7d9f1af01 | 67 | char buffer[2] = { 0 }; |
karlmaxwell67 | 1:70d7d9f1af01 | 68 | readMultipleRegisters( GDATA, buffer, 2 ); |
karlmaxwell67 | 1:70d7d9f1af01 | 69 | int reading = (int)buffer[1] << 8 | (int)buffer[0]; |
karlmaxwell67 | 1:70d7d9f1af01 | 70 | return reading; |
karlmaxwell67 | 1:70d7d9f1af01 | 71 | } |
karlmaxwell67 | 1:70d7d9f1af01 | 72 | |
karlmaxwell67 | 1:70d7d9f1af01 | 73 | int TCS3472_I2C::getBlueData(){ |
karlmaxwell67 | 1:70d7d9f1af01 | 74 | char buffer[2] = { 0 }; |
karlmaxwell67 | 1:70d7d9f1af01 | 75 | readMultipleRegisters( BDATA, buffer, 2 ); |
karlmaxwell67 | 1:70d7d9f1af01 | 76 | int reading = (int)buffer[1] << 8 | (int)buffer[0]; |
karlmaxwell67 | 1:70d7d9f1af01 | 77 | return reading; |
karlmaxwell67 | 2:38d5187a4e7b | 78 | } |
karlmaxwell67 | 2:38d5187a4e7b | 79 | |
karlmaxwell67 | 3:6a89ac4a1979 | 80 | int TCS3472_I2C::enablePower(){ |
karlmaxwell67 | 3:6a89ac4a1979 | 81 | char enable_old = readSingleRegister( ENABLE ); |
karlmaxwell67 | 3:6a89ac4a1979 | 82 | char enable_new = enable_old | 1; // sets PON (bit 0) to 1 |
karlmaxwell67 | 3:6a89ac4a1979 | 83 | int ack = writeSingleRegister( ENABLE, enable_new ); |
karlmaxwell67 | 3:6a89ac4a1979 | 84 | return ack; |
karlmaxwell67 | 3:6a89ac4a1979 | 85 | } |
karlmaxwell67 | 3:6a89ac4a1979 | 86 | |
karlmaxwell67 | 3:6a89ac4a1979 | 87 | int TCS3472_I2C::disablePower(){ |
karlmaxwell67 | 3:6a89ac4a1979 | 88 | char enable_old = readSingleRegister( ENABLE ); |
karlmaxwell67 | 3:6a89ac4a1979 | 89 | char enable_new = enable_old & 254; // sets PON (bit 0) to 0 |
karlmaxwell67 | 3:6a89ac4a1979 | 90 | int ack = writeSingleRegister( ENABLE, enable_new ); |
karlmaxwell67 | 3:6a89ac4a1979 | 91 | return ack; |
karlmaxwell67 | 3:6a89ac4a1979 | 92 | } |
karlmaxwell67 | 3:6a89ac4a1979 | 93 | |
karlmaxwell67 | 4:5d1f8d7d81ff | 94 | bool TCS3472_I2C::isPowerEnabled(){ |
karlmaxwell67 | 4:5d1f8d7d81ff | 95 | char enable = readSingleRegister( ENABLE ); |
karlmaxwell67 | 4:5d1f8d7d81ff | 96 | char pon = enable << 7; |
karlmaxwell67 | 4:5d1f8d7d81ff | 97 | pon = pon >> 7; // gets PON (bit 0) from ENABLE register byte |
karlmaxwell67 | 4:5d1f8d7d81ff | 98 | return (bool)pon; |
karlmaxwell67 | 4:5d1f8d7d81ff | 99 | } |
karlmaxwell67 | 4:5d1f8d7d81ff | 100 | |
karlmaxwell67 | 3:6a89ac4a1979 | 101 | int TCS3472_I2C::enableRGBC(){ |
karlmaxwell67 | 3:6a89ac4a1979 | 102 | char enable_old = readSingleRegister( ENABLE ); |
karlmaxwell67 | 3:6a89ac4a1979 | 103 | char enable_new = enable_old | 2; // sets AEN (bit 1) to 1 |
karlmaxwell67 | 3:6a89ac4a1979 | 104 | int ack = writeSingleRegister( ENABLE, enable_new ); |
karlmaxwell67 | 3:6a89ac4a1979 | 105 | return ack; |
karlmaxwell67 | 3:6a89ac4a1979 | 106 | } |
karlmaxwell67 | 3:6a89ac4a1979 | 107 | |
karlmaxwell67 | 3:6a89ac4a1979 | 108 | int TCS3472_I2C::disableRGBC(){ |
karlmaxwell67 | 3:6a89ac4a1979 | 109 | char enable_old = readSingleRegister( ENABLE ); |
karlmaxwell67 | 3:6a89ac4a1979 | 110 | char enable_new = enable_old & 253; // sets AEN (bit 1) to 0 |
karlmaxwell67 | 3:6a89ac4a1979 | 111 | int ack = writeSingleRegister( ENABLE, enable_new ); |
karlmaxwell67 | 3:6a89ac4a1979 | 112 | return ack; |
karlmaxwell67 | 3:6a89ac4a1979 | 113 | } |
karlmaxwell67 | 3:6a89ac4a1979 | 114 | |
karlmaxwell67 | 4:5d1f8d7d81ff | 115 | bool TCS3472_I2C::isRGBCEnabled(){ |
karlmaxwell67 | 4:5d1f8d7d81ff | 116 | char enable = readSingleRegister( ENABLE ); |
karlmaxwell67 | 4:5d1f8d7d81ff | 117 | char aen = enable << 6; |
karlmaxwell67 | 4:5d1f8d7d81ff | 118 | aen = aen >> 7; // gets AEN (bit 1) from ENABLE register byte |
karlmaxwell67 | 4:5d1f8d7d81ff | 119 | return (bool)aen; |
karlmaxwell67 | 4:5d1f8d7d81ff | 120 | } |
karlmaxwell67 | 4:5d1f8d7d81ff | 121 | |
karlmaxwell67 | 3:6a89ac4a1979 | 122 | int TCS3472_I2C::enablePowerAndRGBC(){ |
karlmaxwell67 | 3:6a89ac4a1979 | 123 | char enable_old = readSingleRegister( ENABLE ); |
karlmaxwell67 | 3:6a89ac4a1979 | 124 | char enable_new = enable_old | 3; // sets PON (bit 0) and AEN (bit 1) to 1 |
karlmaxwell67 | 3:6a89ac4a1979 | 125 | int ack = writeSingleRegister( ENABLE, enable_new ); |
karlmaxwell67 | 3:6a89ac4a1979 | 126 | return ack; |
karlmaxwell67 | 3:6a89ac4a1979 | 127 | } |
karlmaxwell67 | 3:6a89ac4a1979 | 128 | |
karlmaxwell67 | 3:6a89ac4a1979 | 129 | int TCS3472_I2C::disablePowerAndRGBC(){ |
karlmaxwell67 | 3:6a89ac4a1979 | 130 | char enable_old = readSingleRegister( ENABLE ); |
karlmaxwell67 | 4:5d1f8d7d81ff | 131 | char enable_new = enable_old & 252; // sets PON (bit 0) and AEN (bit 1) to 0 |
karlmaxwell67 | 3:6a89ac4a1979 | 132 | int ack = writeSingleRegister( ENABLE, enable_new ); |
karlmaxwell67 | 2:38d5187a4e7b | 133 | return ack; |
karlmaxwell67 | 2:38d5187a4e7b | 134 | } |
karlmaxwell67 | 2:38d5187a4e7b | 135 | |
karlmaxwell67 | 2:38d5187a4e7b | 136 | int TCS3472_I2C::enableWait(){ |
karlmaxwell67 | 3:6a89ac4a1979 | 137 | char enable_old = readSingleRegister( ENABLE ); |
karlmaxwell67 | 4:5d1f8d7d81ff | 138 | char enable_new = enable_old | 8; // sets WEN (bit 3) to 1 |
karlmaxwell67 | 3:6a89ac4a1979 | 139 | int ack = writeSingleRegister( ENABLE, enable_new ); |
karlmaxwell67 | 2:38d5187a4e7b | 140 | return ack; |
karlmaxwell67 | 2:38d5187a4e7b | 141 | } |
karlmaxwell67 | 2:38d5187a4e7b | 142 | |
karlmaxwell67 | 2:38d5187a4e7b | 143 | int TCS3472_I2C::disableWait(){ |
karlmaxwell67 | 3:6a89ac4a1979 | 144 | char enable_old = readSingleRegister( ENABLE ); |
karlmaxwell67 | 4:5d1f8d7d81ff | 145 | char enable_new = enable_old & 247; // sets WEN (bit 3) to 0 |
karlmaxwell67 | 3:6a89ac4a1979 | 146 | int ack = writeSingleRegister( ENABLE, enable_new ); |
karlmaxwell67 | 2:38d5187a4e7b | 147 | return ack; |
karlmaxwell67 | 2:38d5187a4e7b | 148 | } |
karlmaxwell67 | 2:38d5187a4e7b | 149 | |
karlmaxwell67 | 4:5d1f8d7d81ff | 150 | bool TCS3472_I2C::isWaitEnabled(){ |
karlmaxwell67 | 4:5d1f8d7d81ff | 151 | char enable = readSingleRegister( ENABLE ); |
karlmaxwell67 | 4:5d1f8d7d81ff | 152 | char wen = enable << 4; |
karlmaxwell67 | 4:5d1f8d7d81ff | 153 | wen = wen >> 7; // gets WEN (bit 3) from ENABLE register byte |
karlmaxwell67 | 4:5d1f8d7d81ff | 154 | return (bool)wen; |
karlmaxwell67 | 4:5d1f8d7d81ff | 155 | } |
karlmaxwell67 | 4:5d1f8d7d81ff | 156 | |
karlmaxwell67 | 2:38d5187a4e7b | 157 | int TCS3472_I2C::enableInterrupt(){ |
karlmaxwell67 | 3:6a89ac4a1979 | 158 | char enable_old = readSingleRegister( ENABLE ); |
karlmaxwell67 | 4:5d1f8d7d81ff | 159 | char enable_new = enable_old | 16; // sets AIEN (bit 4) to 1 |
karlmaxwell67 | 3:6a89ac4a1979 | 160 | int ack = writeSingleRegister( ENABLE, enable_new ); |
karlmaxwell67 | 2:38d5187a4e7b | 161 | return ack; |
karlmaxwell67 | 2:38d5187a4e7b | 162 | } |
karlmaxwell67 | 2:38d5187a4e7b | 163 | |
karlmaxwell67 | 2:38d5187a4e7b | 164 | int TCS3472_I2C::disableInterrupt(){ |
karlmaxwell67 | 3:6a89ac4a1979 | 165 | char enable_old = readSingleRegister( ENABLE ); |
karlmaxwell67 | 4:5d1f8d7d81ff | 166 | char enable_new = enable_old & 239; // sets AIEN (bit 4) to 0 |
karlmaxwell67 | 3:6a89ac4a1979 | 167 | int ack = writeSingleRegister( ENABLE, enable_new ); |
karlmaxwell67 | 3:6a89ac4a1979 | 168 | return ack; |
karlmaxwell67 | 3:6a89ac4a1979 | 169 | } |
karlmaxwell67 | 3:6a89ac4a1979 | 170 | |
karlmaxwell67 | 4:5d1f8d7d81ff | 171 | bool TCS3472_I2C::isInterruptEnabled(){ |
karlmaxwell67 | 4:5d1f8d7d81ff | 172 | char enable = readSingleRegister( ENABLE ); |
karlmaxwell67 | 4:5d1f8d7d81ff | 173 | char aien = enable << 3; |
karlmaxwell67 | 4:5d1f8d7d81ff | 174 | aien = aien >> 7; // gets AIEN (bit 4) from ENABLE register byte |
karlmaxwell67 | 4:5d1f8d7d81ff | 175 | return (bool)aien; |
karlmaxwell67 | 4:5d1f8d7d81ff | 176 | } |
karlmaxwell67 | 4:5d1f8d7d81ff | 177 | |
karlmaxwell67 | 3:6a89ac4a1979 | 178 | int TCS3472_I2C::setIntegrationTime( const float itime ){ |
karlmaxwell67 | 4:5d1f8d7d81ff | 179 | char atime = 256 - roundTowardsZero( itime / 2.4 ); // rounding ensures nearest value of atime is used |
karlmaxwell67 | 3:6a89ac4a1979 | 180 | int ack = writeSingleRegister( ATIME, atime ); |
karlmaxwell67 | 2:38d5187a4e7b | 181 | return ack; |
karlmaxwell67 | 2:38d5187a4e7b | 182 | } |
karlmaxwell67 | 2:38d5187a4e7b | 183 | |
karlmaxwell67 | 4:5d1f8d7d81ff | 184 | float TCS3472_I2C::readIntegrationTime(){ |
karlmaxwell67 | 4:5d1f8d7d81ff | 185 | float itime = 0; |
karlmaxwell67 | 4:5d1f8d7d81ff | 186 | char atime = readSingleRegister( ATIME ); |
karlmaxwell67 | 4:5d1f8d7d81ff | 187 | itime = 2.4 * ( 256 - atime ); |
karlmaxwell67 | 4:5d1f8d7d81ff | 188 | return itime; |
karlmaxwell67 | 4:5d1f8d7d81ff | 189 | } |
karlmaxwell67 | 4:5d1f8d7d81ff | 190 | |
karlmaxwell67 | 2:38d5187a4e7b | 191 | int TCS3472_I2C::setWaitTime( const float time ){ |
karlmaxwell67 | 2:38d5187a4e7b | 192 | int ack = 1; |
karlmaxwell67 | 2:38d5187a4e7b | 193 | char wtime = 0; |
karlmaxwell67 | 4:5d1f8d7d81ff | 194 | if ( time >= 2.39 && time <= 614.4 ){ // 2.39 instead of 2.4 to allow for float accuracy errors |
karlmaxwell67 | 3:6a89ac4a1979 | 195 | ack = writeSingleRegister( CONFIG, 0 ); // sets WLONG to 0 |
karlmaxwell67 | 4:5d1f8d7d81ff | 196 | wtime = 256 - roundTowardsZero( time / 2.4 ); |
karlmaxwell67 | 2:38d5187a4e7b | 197 | } |
karlmaxwell67 | 4:5d1f8d7d81ff | 198 | else if ( time > 614.4 && time <= 7400.1 ){ // 7400.1 instead of 7400 to allow for float accuracy errors |
karlmaxwell67 | 3:6a89ac4a1979 | 199 | ack = writeSingleRegister( CONFIG, 2 ); // sets WLONG to 1 |
karlmaxwell67 | 4:5d1f8d7d81ff | 200 | wtime = 256 - roundTowardsZero( time / 28.8 ); |
karlmaxwell67 | 2:38d5187a4e7b | 201 | } |
karlmaxwell67 | 2:38d5187a4e7b | 202 | ack = ack || writeSingleRegister( WTIME, wtime ); |
karlmaxwell67 | 2:38d5187a4e7b | 203 | return ack; |
karlmaxwell67 | 3:6a89ac4a1979 | 204 | } |
karlmaxwell67 | 3:6a89ac4a1979 | 205 | |
karlmaxwell67 | 4:5d1f8d7d81ff | 206 | float TCS3472_I2C::readWaitTime(){ |
karlmaxwell67 | 4:5d1f8d7d81ff | 207 | float time = 0; |
karlmaxwell67 | 4:5d1f8d7d81ff | 208 | char wtime = readSingleRegister( WTIME ); |
karlmaxwell67 | 4:5d1f8d7d81ff | 209 | char config = readSingleRegister( CONFIG ); |
karlmaxwell67 | 4:5d1f8d7d81ff | 210 | int wlong = ( config << 6 ) >> 7; // gets WLONG (bit 1) from CONFIG register byte |
karlmaxwell67 | 4:5d1f8d7d81ff | 211 | if ( wlong == 0 ){ |
karlmaxwell67 | 4:5d1f8d7d81ff | 212 | time = 2.4 * ( 256 - wtime ); |
karlmaxwell67 | 4:5d1f8d7d81ff | 213 | } |
karlmaxwell67 | 4:5d1f8d7d81ff | 214 | else if ( wlong == 1 ){ |
karlmaxwell67 | 4:5d1f8d7d81ff | 215 | time = 28.8 * ( 256 - wtime ); // 28.8 = 2.4 * 12 |
karlmaxwell67 | 4:5d1f8d7d81ff | 216 | } |
karlmaxwell67 | 4:5d1f8d7d81ff | 217 | return time; |
karlmaxwell67 | 4:5d1f8d7d81ff | 218 | } |
karlmaxwell67 | 4:5d1f8d7d81ff | 219 | |
karlmaxwell67 | 3:6a89ac4a1979 | 220 | char TCS3472_I2C::readEnableRegister(){ |
karlmaxwell67 | 3:6a89ac4a1979 | 221 | return readSingleRegister( ENABLE ); |
karlmaxwell67 | 3:6a89ac4a1979 | 222 | } |
karlmaxwell67 | 3:6a89ac4a1979 | 223 | |
karlmaxwell67 | 3:6a89ac4a1979 | 224 | int TCS3472_I2C::readLowInterruptThreshold(){ |
karlmaxwell67 | 3:6a89ac4a1979 | 225 | char buffer[2] = { 0 }; |
karlmaxwell67 | 3:6a89ac4a1979 | 226 | readMultipleRegisters( AILTL, buffer, 2 ); |
karlmaxwell67 | 3:6a89ac4a1979 | 227 | int reading = (int)buffer[1] << 8 | (int)buffer[0]; |
karlmaxwell67 | 3:6a89ac4a1979 | 228 | return reading; |
karlmaxwell67 | 3:6a89ac4a1979 | 229 | } |
karlmaxwell67 | 3:6a89ac4a1979 | 230 | |
karlmaxwell67 | 3:6a89ac4a1979 | 231 | int TCS3472_I2C::readHighInterruptThreshold(){ |
karlmaxwell67 | 3:6a89ac4a1979 | 232 | char buffer[2] = { 0 }; |
karlmaxwell67 | 3:6a89ac4a1979 | 233 | readMultipleRegisters( AIHTL, buffer, 2 ); |
karlmaxwell67 | 3:6a89ac4a1979 | 234 | int reading = (int)buffer[1] << 8 | (int)buffer[0]; |
karlmaxwell67 | 3:6a89ac4a1979 | 235 | return reading; |
karlmaxwell67 | 3:6a89ac4a1979 | 236 | } |
karlmaxwell67 | 3:6a89ac4a1979 | 237 | |
karlmaxwell67 | 3:6a89ac4a1979 | 238 | int TCS3472_I2C::setLowInterruptThreshold( const int threshold ){ |
karlmaxwell67 | 3:6a89ac4a1979 | 239 | char threshold_bytes[2]; |
karlmaxwell67 | 3:6a89ac4a1979 | 240 | threshold_bytes[0] = threshold; // take lowest 8 bits of threshold |
karlmaxwell67 | 3:6a89ac4a1979 | 241 | threshold_bytes[1] = threshold >> 8; // take highest 8 bits of threshold |
karlmaxwell67 | 3:6a89ac4a1979 | 242 | int ack = writeMultipleRegisters( AILTL, threshold_bytes, 2 ); |
karlmaxwell67 | 3:6a89ac4a1979 | 243 | return ack; |
karlmaxwell67 | 3:6a89ac4a1979 | 244 | } |
karlmaxwell67 | 3:6a89ac4a1979 | 245 | |
karlmaxwell67 | 3:6a89ac4a1979 | 246 | int TCS3472_I2C::setHighInterruptThreshold( const int threshold ){ |
karlmaxwell67 | 3:6a89ac4a1979 | 247 | char threshold_bytes[2]; |
karlmaxwell67 | 3:6a89ac4a1979 | 248 | threshold_bytes[0] = threshold; |
karlmaxwell67 | 3:6a89ac4a1979 | 249 | threshold_bytes[1] = threshold >> 8; |
karlmaxwell67 | 3:6a89ac4a1979 | 250 | int ack = writeMultipleRegisters( AIHTL, threshold_bytes, 2 ); |
karlmaxwell67 | 3:6a89ac4a1979 | 251 | return ack; |
karlmaxwell67 | 3:6a89ac4a1979 | 252 | } |
karlmaxwell67 | 3:6a89ac4a1979 | 253 | |
karlmaxwell67 | 3:6a89ac4a1979 | 254 | int TCS3472_I2C::readInterruptPersistence(){ |
karlmaxwell67 | 3:6a89ac4a1979 | 255 | char pers = readSingleRegister( PERS ); |
karlmaxwell67 | 3:6a89ac4a1979 | 256 | char persistence_bits = ( pers << 4 ) >> 4; // discard bits 4 to 7, keep only bits 0 to 3 |
karlmaxwell67 | 3:6a89ac4a1979 | 257 | int persistence = -1; |
karlmaxwell67 | 3:6a89ac4a1979 | 258 | switch (persistence_bits){ |
karlmaxwell67 | 3:6a89ac4a1979 | 259 | case 0: |
karlmaxwell67 | 3:6a89ac4a1979 | 260 | persistence = 0; |
karlmaxwell67 | 3:6a89ac4a1979 | 261 | break; |
karlmaxwell67 | 3:6a89ac4a1979 | 262 | case 1: |
karlmaxwell67 | 3:6a89ac4a1979 | 263 | persistence = 1; |
karlmaxwell67 | 3:6a89ac4a1979 | 264 | break; |
karlmaxwell67 | 3:6a89ac4a1979 | 265 | case 2: |
karlmaxwell67 | 3:6a89ac4a1979 | 266 | persistence = 2; |
karlmaxwell67 | 3:6a89ac4a1979 | 267 | break; |
karlmaxwell67 | 3:6a89ac4a1979 | 268 | case 3: |
karlmaxwell67 | 3:6a89ac4a1979 | 269 | persistence = 3; |
karlmaxwell67 | 3:6a89ac4a1979 | 270 | break; |
karlmaxwell67 | 3:6a89ac4a1979 | 271 | case 4: |
karlmaxwell67 | 3:6a89ac4a1979 | 272 | persistence = 5; |
karlmaxwell67 | 3:6a89ac4a1979 | 273 | break; |
karlmaxwell67 | 3:6a89ac4a1979 | 274 | case 5: |
karlmaxwell67 | 3:6a89ac4a1979 | 275 | persistence = 10; |
karlmaxwell67 | 3:6a89ac4a1979 | 276 | break; |
karlmaxwell67 | 3:6a89ac4a1979 | 277 | case 6: |
karlmaxwell67 | 3:6a89ac4a1979 | 278 | persistence = 15; |
karlmaxwell67 | 3:6a89ac4a1979 | 279 | break; |
karlmaxwell67 | 3:6a89ac4a1979 | 280 | case 7: |
karlmaxwell67 | 3:6a89ac4a1979 | 281 | persistence = 20; |
karlmaxwell67 | 3:6a89ac4a1979 | 282 | break; |
karlmaxwell67 | 3:6a89ac4a1979 | 283 | case 8: |
karlmaxwell67 | 3:6a89ac4a1979 | 284 | persistence = 25; |
karlmaxwell67 | 3:6a89ac4a1979 | 285 | break; |
karlmaxwell67 | 3:6a89ac4a1979 | 286 | case 9: |
karlmaxwell67 | 3:6a89ac4a1979 | 287 | persistence = 30; |
karlmaxwell67 | 3:6a89ac4a1979 | 288 | break; |
karlmaxwell67 | 3:6a89ac4a1979 | 289 | case 10: |
karlmaxwell67 | 3:6a89ac4a1979 | 290 | persistence = 35; |
karlmaxwell67 | 3:6a89ac4a1979 | 291 | break; |
karlmaxwell67 | 3:6a89ac4a1979 | 292 | case 11: |
karlmaxwell67 | 3:6a89ac4a1979 | 293 | persistence = 40; |
karlmaxwell67 | 3:6a89ac4a1979 | 294 | break; |
karlmaxwell67 | 3:6a89ac4a1979 | 295 | case 12: |
karlmaxwell67 | 3:6a89ac4a1979 | 296 | persistence = 45; |
karlmaxwell67 | 3:6a89ac4a1979 | 297 | break; |
karlmaxwell67 | 3:6a89ac4a1979 | 298 | case 13: |
karlmaxwell67 | 3:6a89ac4a1979 | 299 | persistence = 50; |
karlmaxwell67 | 3:6a89ac4a1979 | 300 | break; |
karlmaxwell67 | 3:6a89ac4a1979 | 301 | case 14: |
karlmaxwell67 | 3:6a89ac4a1979 | 302 | persistence = 55; |
karlmaxwell67 | 3:6a89ac4a1979 | 303 | break; |
karlmaxwell67 | 3:6a89ac4a1979 | 304 | case 15: |
karlmaxwell67 | 3:6a89ac4a1979 | 305 | persistence = 60; |
karlmaxwell67 | 3:6a89ac4a1979 | 306 | break; |
karlmaxwell67 | 3:6a89ac4a1979 | 307 | default: |
karlmaxwell67 | 3:6a89ac4a1979 | 308 | break; |
karlmaxwell67 | 3:6a89ac4a1979 | 309 | } |
karlmaxwell67 | 3:6a89ac4a1979 | 310 | return persistence; |
karlmaxwell67 | 3:6a89ac4a1979 | 311 | } |
karlmaxwell67 | 3:6a89ac4a1979 | 312 | |
karlmaxwell67 | 3:6a89ac4a1979 | 313 | int TCS3472_I2C::setInterruptPersistence( const int persistence ){ |
karlmaxwell67 | 3:6a89ac4a1979 | 314 | char pers_byte; |
karlmaxwell67 | 3:6a89ac4a1979 | 315 | int ack = 0; |
karlmaxwell67 | 3:6a89ac4a1979 | 316 | switch (persistence){ |
karlmaxwell67 | 3:6a89ac4a1979 | 317 | case 0: |
karlmaxwell67 | 3:6a89ac4a1979 | 318 | pers_byte = 0; |
karlmaxwell67 | 3:6a89ac4a1979 | 319 | break; |
karlmaxwell67 | 3:6a89ac4a1979 | 320 | case 1: |
karlmaxwell67 | 3:6a89ac4a1979 | 321 | pers_byte = 1; |
karlmaxwell67 | 3:6a89ac4a1979 | 322 | break; |
karlmaxwell67 | 3:6a89ac4a1979 | 323 | case 2: |
karlmaxwell67 | 3:6a89ac4a1979 | 324 | pers_byte = 2; |
karlmaxwell67 | 3:6a89ac4a1979 | 325 | break; |
karlmaxwell67 | 3:6a89ac4a1979 | 326 | case 3: |
karlmaxwell67 | 3:6a89ac4a1979 | 327 | pers_byte = 3; |
karlmaxwell67 | 3:6a89ac4a1979 | 328 | break; |
karlmaxwell67 | 3:6a89ac4a1979 | 329 | case 5: |
karlmaxwell67 | 3:6a89ac4a1979 | 330 | pers_byte = 4; |
karlmaxwell67 | 3:6a89ac4a1979 | 331 | break; |
karlmaxwell67 | 3:6a89ac4a1979 | 332 | case 10: |
karlmaxwell67 | 3:6a89ac4a1979 | 333 | pers_byte = 5; |
karlmaxwell67 | 3:6a89ac4a1979 | 334 | break; |
karlmaxwell67 | 3:6a89ac4a1979 | 335 | case 15: |
karlmaxwell67 | 3:6a89ac4a1979 | 336 | pers_byte = 6; |
karlmaxwell67 | 3:6a89ac4a1979 | 337 | break; |
karlmaxwell67 | 3:6a89ac4a1979 | 338 | case 20: |
karlmaxwell67 | 3:6a89ac4a1979 | 339 | pers_byte = 7; |
karlmaxwell67 | 3:6a89ac4a1979 | 340 | break; |
karlmaxwell67 | 3:6a89ac4a1979 | 341 | case 25: |
karlmaxwell67 | 3:6a89ac4a1979 | 342 | pers_byte = 8; |
karlmaxwell67 | 3:6a89ac4a1979 | 343 | break; |
karlmaxwell67 | 3:6a89ac4a1979 | 344 | case 30: |
karlmaxwell67 | 3:6a89ac4a1979 | 345 | pers_byte = 9; |
karlmaxwell67 | 3:6a89ac4a1979 | 346 | break; |
karlmaxwell67 | 3:6a89ac4a1979 | 347 | case 35: |
karlmaxwell67 | 3:6a89ac4a1979 | 348 | pers_byte = 10; |
karlmaxwell67 | 3:6a89ac4a1979 | 349 | break; |
karlmaxwell67 | 3:6a89ac4a1979 | 350 | case 40: |
karlmaxwell67 | 3:6a89ac4a1979 | 351 | pers_byte = 11; |
karlmaxwell67 | 3:6a89ac4a1979 | 352 | break; |
karlmaxwell67 | 3:6a89ac4a1979 | 353 | case 45: |
karlmaxwell67 | 3:6a89ac4a1979 | 354 | pers_byte = 12; |
karlmaxwell67 | 3:6a89ac4a1979 | 355 | break; |
karlmaxwell67 | 3:6a89ac4a1979 | 356 | case 50: |
karlmaxwell67 | 3:6a89ac4a1979 | 357 | pers_byte = 13; |
karlmaxwell67 | 3:6a89ac4a1979 | 358 | break; |
karlmaxwell67 | 3:6a89ac4a1979 | 359 | case 55: |
karlmaxwell67 | 3:6a89ac4a1979 | 360 | pers_byte = 14; |
karlmaxwell67 | 3:6a89ac4a1979 | 361 | break; |
karlmaxwell67 | 3:6a89ac4a1979 | 362 | case 60: |
karlmaxwell67 | 3:6a89ac4a1979 | 363 | pers_byte = 15; |
karlmaxwell67 | 3:6a89ac4a1979 | 364 | break; |
karlmaxwell67 | 3:6a89ac4a1979 | 365 | default: |
karlmaxwell67 | 3:6a89ac4a1979 | 366 | ack = 2; // 2 used to indicate invalid entry |
karlmaxwell67 | 3:6a89ac4a1979 | 367 | break; |
karlmaxwell67 | 3:6a89ac4a1979 | 368 | } |
karlmaxwell67 | 3:6a89ac4a1979 | 369 | if ( ack != 2 ){ |
karlmaxwell67 | 3:6a89ac4a1979 | 370 | ack = writeSingleRegister( PERS, pers_byte ); |
karlmaxwell67 | 3:6a89ac4a1979 | 371 | } |
karlmaxwell67 | 3:6a89ac4a1979 | 372 | return ack; |
karlmaxwell67 | 3:6a89ac4a1979 | 373 | } |
karlmaxwell67 | 3:6a89ac4a1979 | 374 | |
karlmaxwell67 | 3:6a89ac4a1979 | 375 | int TCS3472_I2C::clearInterrupt(){ |
karlmaxwell67 | 3:6a89ac4a1979 | 376 | char tx = 230; |
karlmaxwell67 | 3:6a89ac4a1979 | 377 | int ack = i2c.write( SLAVE_ADDRESS << 1, &tx, 1 ); |
karlmaxwell67 | 3:6a89ac4a1979 | 378 | return ack; |
karlmaxwell67 | 3:6a89ac4a1979 | 379 | } |
karlmaxwell67 | 3:6a89ac4a1979 | 380 | |
karlmaxwell67 | 3:6a89ac4a1979 | 381 | int TCS3472_I2C::readRGBCGain(){ |
karlmaxwell67 | 3:6a89ac4a1979 | 382 | char control = readSingleRegister( CONTROL ); |
karlmaxwell67 | 3:6a89ac4a1979 | 383 | char gain_bits = ( control << 6 ) >> 6; // discard bits 2 to 7, keep only bits 0 & 1 |
karlmaxwell67 | 3:6a89ac4a1979 | 384 | int gain; |
karlmaxwell67 | 3:6a89ac4a1979 | 385 | switch (gain_bits) { |
karlmaxwell67 | 3:6a89ac4a1979 | 386 | case 0: |
karlmaxwell67 | 3:6a89ac4a1979 | 387 | gain = 1; |
karlmaxwell67 | 3:6a89ac4a1979 | 388 | break; |
karlmaxwell67 | 3:6a89ac4a1979 | 389 | case 1: |
karlmaxwell67 | 3:6a89ac4a1979 | 390 | gain = 4; |
karlmaxwell67 | 3:6a89ac4a1979 | 391 | break; |
karlmaxwell67 | 3:6a89ac4a1979 | 392 | case 2: |
karlmaxwell67 | 3:6a89ac4a1979 | 393 | gain = 16; |
karlmaxwell67 | 3:6a89ac4a1979 | 394 | break; |
karlmaxwell67 | 3:6a89ac4a1979 | 395 | case 3: |
karlmaxwell67 | 3:6a89ac4a1979 | 396 | gain = 60; |
karlmaxwell67 | 3:6a89ac4a1979 | 397 | break; |
karlmaxwell67 | 3:6a89ac4a1979 | 398 | default: |
karlmaxwell67 | 3:6a89ac4a1979 | 399 | gain = 0; |
karlmaxwell67 | 3:6a89ac4a1979 | 400 | break; |
karlmaxwell67 | 3:6a89ac4a1979 | 401 | } |
karlmaxwell67 | 3:6a89ac4a1979 | 402 | return gain; |
karlmaxwell67 | 3:6a89ac4a1979 | 403 | } |
karlmaxwell67 | 3:6a89ac4a1979 | 404 | |
karlmaxwell67 | 3:6a89ac4a1979 | 405 | int TCS3472_I2C::setRGBCGain( const int gain ){ |
karlmaxwell67 | 3:6a89ac4a1979 | 406 | char control; |
karlmaxwell67 | 3:6a89ac4a1979 | 407 | int ack = 0; |
karlmaxwell67 | 3:6a89ac4a1979 | 408 | switch (gain){ |
karlmaxwell67 | 3:6a89ac4a1979 | 409 | case 1: |
karlmaxwell67 | 3:6a89ac4a1979 | 410 | control = 0; |
karlmaxwell67 | 3:6a89ac4a1979 | 411 | break; |
karlmaxwell67 | 3:6a89ac4a1979 | 412 | case 4: |
karlmaxwell67 | 3:6a89ac4a1979 | 413 | control = 1; |
karlmaxwell67 | 3:6a89ac4a1979 | 414 | break; |
karlmaxwell67 | 3:6a89ac4a1979 | 415 | case 16: |
karlmaxwell67 | 3:6a89ac4a1979 | 416 | control = 2; |
karlmaxwell67 | 3:6a89ac4a1979 | 417 | break; |
karlmaxwell67 | 3:6a89ac4a1979 | 418 | case 60: |
karlmaxwell67 | 3:6a89ac4a1979 | 419 | control = 3; |
karlmaxwell67 | 3:6a89ac4a1979 | 420 | break; |
karlmaxwell67 | 3:6a89ac4a1979 | 421 | default: |
karlmaxwell67 | 3:6a89ac4a1979 | 422 | ack = 2; // 2 used to indicate invalid entry |
karlmaxwell67 | 3:6a89ac4a1979 | 423 | break; |
karlmaxwell67 | 3:6a89ac4a1979 | 424 | } |
karlmaxwell67 | 3:6a89ac4a1979 | 425 | if ( ack != 2 ){ |
karlmaxwell67 | 3:6a89ac4a1979 | 426 | ack = writeSingleRegister( CONTROL, control ); |
karlmaxwell67 | 3:6a89ac4a1979 | 427 | } |
karlmaxwell67 | 3:6a89ac4a1979 | 428 | return ack; |
karlmaxwell67 | 3:6a89ac4a1979 | 429 | } |
karlmaxwell67 | 3:6a89ac4a1979 | 430 | |
karlmaxwell67 | 3:6a89ac4a1979 | 431 | char TCS3472_I2C::getDeviceID(){ |
karlmaxwell67 | 3:6a89ac4a1979 | 432 | return readSingleRegister( ID ); |
karlmaxwell67 | 3:6a89ac4a1979 | 433 | } |
karlmaxwell67 | 3:6a89ac4a1979 | 434 | |
karlmaxwell67 | 3:6a89ac4a1979 | 435 | char TCS3472_I2C::readStatusRegister(){ |
karlmaxwell67 | 3:6a89ac4a1979 | 436 | return readSingleRegister( STATUS ); |
karlmaxwell67 | 4:5d1f8d7d81ff | 437 | } |
karlmaxwell67 | 4:5d1f8d7d81ff | 438 | |
karlmaxwell67 | 4:5d1f8d7d81ff | 439 | float TCS3472_I2C::roundTowardsZero( const float value ){ |
karlmaxwell67 | 4:5d1f8d7d81ff | 440 | float result = 0; |
karlmaxwell67 | 4:5d1f8d7d81ff | 441 | if ( ( value >= 0 && ( value - (int)value ) < 0.5 ) || ( value < 0 && ( abs(value) - (int)abs(value) ) >= 0.5 ) ){ |
karlmaxwell67 | 4:5d1f8d7d81ff | 442 | result = floor(value); |
karlmaxwell67 | 4:5d1f8d7d81ff | 443 | } |
karlmaxwell67 | 4:5d1f8d7d81ff | 444 | else{ |
karlmaxwell67 | 4:5d1f8d7d81ff | 445 | result = ceil(value); |
karlmaxwell67 | 4:5d1f8d7d81ff | 446 | } |
karlmaxwell67 | 4:5d1f8d7d81ff | 447 | return result; |
karlmaxwell67 | 0:453a43c8bf2b | 448 | } |