Simple mbed library with macros
Dependents: SimpleTimer SimpleUART SimpleTimer Stoppuhr1
mbed_globals.h
- Committer:
- Alkorin
- Date:
- 2010-11-08
- Revision:
- 2:e6b2d22fbf75
- Parent:
- 1:1033948951f0
- Child:
- 3:0b94bf95c552
File content as of revision 2:e6b2d22fbf75:
#ifndef __MBED_GLOBALS_H__ #define __MBED_GLOBALS_H__ /* GLOBALS MACRO */ #define GET_REGISTER8(reg) *(volatile uint8_t *)(reg) #define GET_REGISTER16(reg) *(volatile uint16_t *)(reg) #define GET_REGISTER32(reg) *(volatile uint32_t *)(reg) #define SET_REGISTER8(reg, val) *(uint8_t *)(reg)=(val) #define SET_REGISTER16(reg, val) *(uint16_t *)(reg)=(val) #define SET_REGISTER32(reg, val) *(uint32_t *)(reg)=(val) // See 34.3.2.5 p740 #define BIT_BANDING_ADDRESS(reg, bit) (((reg) & 0xF0000000) | (0x02000000) | (((reg) & 0x000FFFFF) << 5) | ((bit) << 2)) #define GET_BIT_VALUE(reg, bit) GET_REGISTER32(BIT_BANDING_ADDRESS(reg, bit)) /** Peripheral memory map **/ /* Base addresses */ #define LPC_FLASH_BASE (0x00000000UL) #define LPC_RAM_BASE (0x10000000UL) #define LPC_GPIO_BASE (0x2009C000UL) #define LPC_APB0_BASE (0x40000000UL) #define LPC_APB1_BASE (0x40080000UL) #define LPC_AHB_BASE (0x50000000UL) #define LPC_CM3_BASE (0xE0000000UL) /* APB0 peripherals */ #define LPC_WDT_BASE (LPC_APB0_BASE + 0x00000) #define LPC_TIM0_BASE (LPC_APB0_BASE + 0x04000) #define LPC_TIM1_BASE (LPC_APB0_BASE + 0x08000) #define LPC_UART0_BASE (LPC_APB0_BASE + 0x0C000) #define LPC_UART1_BASE (LPC_APB0_BASE + 0x10000) #define LPC_PWM1_BASE (LPC_APB0_BASE + 0x18000) #define LPC_I2C0_BASE (LPC_APB0_BASE + 0x1C000) #define LPC_SPI_BASE (LPC_APB0_BASE + 0x20000) #define LPC_RTC_BASE (LPC_APB0_BASE + 0x24000) #define LPC_GPIOINT_BASE (LPC_APB0_BASE + 0x28080) #define LPC_PINCON_BASE (LPC_APB0_BASE + 0x2C000) #define LPC_SSP1_BASE (LPC_APB0_BASE + 0x30000) #define LPC_ADC_BASE (LPC_APB0_BASE + 0x34000) #define LPC_CANAF_RAM_BASE (LPC_APB0_BASE + 0x38000) #define LPC_CANAF_BASE (LPC_APB0_BASE + 0x3C000) #define LPC_CANCR_BASE (LPC_APB0_BASE + 0x40000) #define LPC_CAN1_BASE (LPC_APB0_BASE + 0x44000) #define LPC_CAN2_BASE (LPC_APB0_BASE + 0x48000) #define LPC_I2C1_BASE (LPC_APB0_BASE + 0x5C000) /* APB1 peripherals */ #define LPC_SSP0_BASE (LPC_APB1_BASE + 0x08000) #define LPC_DAC_BASE (LPC_APB1_BASE + 0x0C000) #define LPC_TIM2_BASE (LPC_APB1_BASE + 0x10000) #define LPC_TIM3_BASE (LPC_APB1_BASE + 0x14000) #define LPC_UART2_BASE (LPC_APB1_BASE + 0x18000) #define LPC_UART3_BASE (LPC_APB1_BASE + 0x1C000) #define LPC_I2C2_BASE (LPC_APB1_BASE + 0x20000) #define LPC_I2S_BASE (LPC_APB1_BASE + 0x28000) #define LPC_RIT_BASE (LPC_APB1_BASE + 0x30000) #define LPC_MCPWM_BASE (LPC_APB1_BASE + 0x38000) #define LPC_QEI_BASE (LPC_APB1_BASE + 0x3C000) #define LPC_SC_BASE (LPC_APB1_BASE + 0x7C000) /* AHB peripherals */ #define LPC_EMAC_BASE (LPC_AHB_BASE + 0x00000) #define LPC_GPDMA_BASE (LPC_AHB_BASE + 0x04000) #define LPC_GPDMACH0_BASE (LPC_AHB_BASE + 0x04100) #define LPC_GPDMACH1_BASE (LPC_AHB_BASE + 0x04120) #define LPC_GPDMACH2_BASE (LPC_AHB_BASE + 0x04140) #define LPC_GPDMACH3_BASE (LPC_AHB_BASE + 0x04160) #define LPC_GPDMACH4_BASE (LPC_AHB_BASE + 0x04180) #define LPC_GPDMACH5_BASE (LPC_AHB_BASE + 0x041A0) #define LPC_GPDMACH6_BASE (LPC_AHB_BASE + 0x041C0) #define LPC_GPDMACH7_BASE (LPC_AHB_BASE + 0x041E0) #define LPC_USB_BASE (LPC_AHB_BASE + 0x0C000) /* GPIOs */ #define LPC_GPIO0_BASE (LPC_GPIO_BASE + 0x00000) #define LPC_GPIO1_BASE (LPC_GPIO_BASE + 0x00020) #define LPC_GPIO2_BASE (LPC_GPIO_BASE + 0x00040) #define LPC_GPIO3_BASE (LPC_GPIO_BASE + 0x00060) #define LPC_GPIO4_BASE (LPC_GPIO_BASE + 0x00080) #endif