Diff: serial.h

Revision:

8:f8b47457fdcf

Parent:

7:8443cecf62d1

Child:

9:9cb955772c69

--- a/serial.h	Sat Nov 13 21:33:11 2010 +0000
+++ b/serial.h	Sat Nov 13 22:15:12 2010 +0000
@@ -1,3 +1,35 @@
+/*
+* Copyright or © or Copr. 2010, Thomas SOETE
+* 
+* Author e-mail: thomas@soete.org
+* 
+* This software is governed by the CeCILL license under French law and
+* abiding by the rules of distribution of free software.  You can  use, 
+* modify and/ or redistribute the software under the terms of the CeCILL
+* license as circulated by CEA, CNRS and INRIA at the following URL
+* "http://www.cecill.info". 
+* 
+* As a counterpart to the access to the source code and  rights to copy,
+* modify and redistribute granted by the license, users are provided only
+* with a limited warranty  and the software's author,  the holder of the
+* economic rights,  and the successive licensors  have only  limited
+* liability. 
+* 
+* In this respect, the user's attention is drawn to the risks associated
+* with loading,  using,  modifying and/or developing or reproducing the
+* software by the user in light of its specific status of free software,
+* that may mean  that it is complicated to manipulate,  and  that  also
+* therefore means  that it is reserved for developers  and  experienced
+* professionals having in-depth computer knowledge. Users are therefore
+* encouraged to load and test the software's suitability as regards their
+* requirements in conditions enabling the security of their systems and/or 
+* data to be ensured and,  more generally, to use and operate it in the 
+* same conditions as regards security. 
+* 
+* The fact that you are presently reading this means that you have had
+* knowledge of the CeCILL license and that you accept its terms.
+*/
+
 #ifndef __SERIAL_H__
 #define __SERIAL_H__
 
@@ -131,9 +163,13 @@
 
 inline void SERIAL_SETBAUD(unsigned int baud) {
     // Peripheral Clock Selection register bit values (See Table 42, p57)
-    static int divisors[4] = { 4, 1, 2, 8 };
-    
-    uint16_t divisorValue = ((SystemCoreClock / 16 / baud) * divisors[UART_PCLK]);
+    uint16_t divisorValue = (SystemCoreClock / 16 / baud);
+    #if 0
+        // Peripheral Clock for UART is set to CCLK in SERIAL_INIT. Divisor is then 1.
+        // Else, use code below
+        static int divisors[4] = { 4, 1, 2, 8 };
+        uint16_t divisorValue = ((SystemCoreClock / 16 / baud) / divisors[UART_PCLK]);
+    #endif
     
     UART_BASE->LCR |= (1 << DLA_BIT);
     UART_BASE->DLM = (uint8_t) (divisorValue >> 8);