Simple mbed library with macros
Dependents: SimpleTimer SimpleUART SimpleTimer Stoppuhr1
serial.h@3:0b94bf95c552, 2010-11-08 (annotated)
- Committer:
- Alkorin
- Date:
- Mon Nov 08 12:34:34 2010 +0000
- Revision:
- 3:0b94bf95c552
- Parent:
- 0:aa3c3d1a5918
- Child:
- 4:afddc4848b6c
Use CMSIS Cortex-M3 Core Peripheral Access Layer Header File instead of hardcoded addresses
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
Alkorin | 0:aa3c3d1a5918 | 1 | #ifndef __SERIAL_H__ |
Alkorin | 0:aa3c3d1a5918 | 2 | #define __SERIAL_H__ |
Alkorin | 0:aa3c3d1a5918 | 3 | |
Alkorin | 0:aa3c3d1a5918 | 4 | #include "interrupt.h" |
Alkorin | 0:aa3c3d1a5918 | 5 | #include "mbed_globals.h" |
Alkorin | 0:aa3c3d1a5918 | 6 | |
Alkorin | 0:aa3c3d1a5918 | 7 | /** Serial port (Choose UARTn (0,2,3)) **/ |
Alkorin | 0:aa3c3d1a5918 | 8 | #define UART_BASE LPC_UART0_BASE |
Alkorin | 0:aa3c3d1a5918 | 9 | |
Alkorin | 0:aa3c3d1a5918 | 10 | /** Registers **/ |
Alkorin | 0:aa3c3d1a5918 | 11 | // UARTn Receiver Buffer Register |
Alkorin | 0:aa3c3d1a5918 | 12 | #define UnRBR 0x00 |
Alkorin | 0:aa3c3d1a5918 | 13 | // UARTn Transmit Holding Register |
Alkorin | 0:aa3c3d1a5918 | 14 | #define UnTHR 0x00 |
Alkorin | 0:aa3c3d1a5918 | 15 | // UARTn Interrupt Enable Register |
Alkorin | 0:aa3c3d1a5918 | 16 | #define UnIER 0x04 |
Alkorin | 0:aa3c3d1a5918 | 17 | // UARTn Interrupt Identification Register |
Alkorin | 0:aa3c3d1a5918 | 18 | #define UnIIR 0x08 |
Alkorin | 0:aa3c3d1a5918 | 19 | // UARTn Line Status Register |
Alkorin | 0:aa3c3d1a5918 | 20 | #define UnLSR 0x14 |
Alkorin | 0:aa3c3d1a5918 | 21 | |
Alkorin | 0:aa3c3d1a5918 | 22 | /** Bits **/ |
Alkorin | 0:aa3c3d1a5918 | 23 | // RBR Interrupt Enable (UnIER, 14.4.4 p302) |
Alkorin | 0:aa3c3d1a5918 | 24 | #define RBR_INT_BIT 0 |
Alkorin | 0:aa3c3d1a5918 | 25 | // Receiver Data Ready (UnLSR, 14.4.8 p306) |
Alkorin | 0:aa3c3d1a5918 | 26 | #define RDR_BIT 0 |
Alkorin | 0:aa3c3d1a5918 | 27 | // Transmitter Holding Register Empty (UnLSR, 14.4.8 p306) |
Alkorin | 0:aa3c3d1a5918 | 28 | #define THRE_BIT 5 |
Alkorin | 0:aa3c3d1a5918 | 29 | |
Alkorin | 0:aa3c3d1a5918 | 30 | /** Macros **/ |
Alkorin | 0:aa3c3d1a5918 | 31 | #define SERIAL_PUTCHAR(c) while (GET_BIT_VALUE(UART_BASE + UnLSR, THRE_BIT) == 0); \ |
Alkorin | 0:aa3c3d1a5918 | 32 | SET_REGISTER8(UART_BASE + UnTHR, c) |
Alkorin | 0:aa3c3d1a5918 | 33 | |
Alkorin | 0:aa3c3d1a5918 | 34 | #define SERIAL_DATA_TO_READ() (GET_BIT_VALUE(UART_BASE + UnLSR, RDR_BIT) == 1) |
Alkorin | 0:aa3c3d1a5918 | 35 | |
Alkorin | 0:aa3c3d1a5918 | 36 | #define SERIAL_GETCHAR() GET_REGISTER8(UART_BASE + UnRBR) |
Alkorin | 0:aa3c3d1a5918 | 37 | |
Alkorin | 0:aa3c3d1a5918 | 38 | // See 14.4.5 p303 |
Alkorin | 0:aa3c3d1a5918 | 39 | inline int SERIAL_CHECK_INTERRUPT(void) { |
Alkorin | 0:aa3c3d1a5918 | 40 | unsigned int serialStatus = GET_REGISTER32(UART_BASE + UnIIR); |
Alkorin | 0:aa3c3d1a5918 | 41 | |
Alkorin | 0:aa3c3d1a5918 | 42 | if (serialStatus & 1) // IntStatus, 1 = No Interrupt is pending. |
Alkorin | 0:aa3c3d1a5918 | 43 | return 0; |
Alkorin | 0:aa3c3d1a5918 | 44 | |
Alkorin | 0:aa3c3d1a5918 | 45 | serialStatus = (serialStatus >> 1) & 0x3; // IntId, 2 = More than threshold data to read, 6 = Some caracters to read |
Alkorin | 0:aa3c3d1a5918 | 46 | if (serialStatus != 2 && serialStatus != 6) |
Alkorin | 0:aa3c3d1a5918 | 47 | return 0; |
Alkorin | 0:aa3c3d1a5918 | 48 | |
Alkorin | 0:aa3c3d1a5918 | 49 | return 1; |
Alkorin | 0:aa3c3d1a5918 | 50 | } |
Alkorin | 0:aa3c3d1a5918 | 51 | |
Alkorin | 3:0b94bf95c552 | 52 | #define SERIAL_SETBAUD(baud) |
Alkorin | 3:0b94bf95c552 | 53 | |
Alkorin | 0:aa3c3d1a5918 | 54 | #endif |