Library to control the KL25z Clock Module.
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Revision 3:99e9aaefc9f6, committed 2015-01-15
- Comitter:
- AlfredoER
- Date:
- Thu Jan 15 21:00:27 2015 +0000
- Parent:
- 2:95fce27229b0
- Commit message:
- -Tested with different system clock prescalers.
Changed in this revision
kl25z_clock.cpp | Show annotated file Show diff for this revision Revisions of this file |
diff -r 95fce27229b0 -r 99e9aaefc9f6 kl25z_clock.cpp --- a/kl25z_clock.cpp Thu Jan 08 17:08:07 2015 +0000 +++ b/kl25z_clock.cpp Thu Jan 15 21:00:27 2015 +0000 @@ -9,6 +9,8 @@ /* SIM->SCGC5: PORTA=1 */ SIM->SCGC5 |= (uint32_t)0x0200UL; /* Enable clock gate for ports to enable pin routing */ /* SIM->CLKDIV1: OUTDIV1=1,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,OUTDIV4=1,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0 */ + //SIM->CLKDIV1 = (uint32_t)0x10010000UL; /* Update system prescalers */ + /* SIM->CLKDIV1: OUTDIV1=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,OUTDIV4=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0 */ SIM->CLKDIV1 = (uint32_t)0x10010000UL; /* Update system prescalers */ /* PORTA->PCR18: ISF=0,MUX=0 */ PORTA->PCR[18] &= (uint32_t)~0x01000700UL; @@ -45,7 +47,9 @@ } /* Run this to get the new system frequency */ + //SIM->CLKDIV1 = (uint32_t)0x20000000UL; /* Update system prescalers */ SystemCoreClockUpdate(); + } void switchPEEtoBLPI( void )