Alessandro Angelino / target-freescale-ksdk

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Fork of target-freescale-ksdk by Morpheus

TARGET_KPSDK_CODE/hal/sim/fsl_sim_hal.c@0:e4d670b91a9a, 2016-03-23 (annotated)

Committer:
screamer
Date:
Wed Mar 23 21:26:50 2016 +0000
Revision:
0:e4d670b91a9a
Initial revision

Who changed what in which revision?

UserRevisionLine numberNew contents of line
screamer 0:e4d670b91a9a 1 /*
screamer 0:e4d670b91a9a 2 * Copyright (c) 2013 - 2014, Freescale Semiconductor, Inc.
screamer 0:e4d670b91a9a 3 * All rights reserved.
screamer 0:e4d670b91a9a 4 *
screamer 0:e4d670b91a9a 5 * Redistribution and use in source and binary forms, with or without modification,
screamer 0:e4d670b91a9a 6 * are permitted provided that the following conditions are met:
screamer 0:e4d670b91a9a 7 *
screamer 0:e4d670b91a9a 8 * o Redistributions of source code must retain the above copyright notice, this list
screamer 0:e4d670b91a9a 9 * of conditions and the following disclaimer.
screamer 0:e4d670b91a9a 10 *
screamer 0:e4d670b91a9a 11 * o Redistributions in binary form must reproduce the above copyright notice, this
screamer 0:e4d670b91a9a 12 * list of conditions and the following disclaimer in the documentation and/or
screamer 0:e4d670b91a9a 13 * other materials provided with the distribution.
screamer 0:e4d670b91a9a 14 *
screamer 0:e4d670b91a9a 15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
screamer 0:e4d670b91a9a 16 * contributors may be used to endorse or promote products derived from this
screamer 0:e4d670b91a9a 17 * software without specific prior written permission.
screamer 0:e4d670b91a9a 18 *
screamer 0:e4d670b91a9a 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
screamer 0:e4d670b91a9a 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
screamer 0:e4d670b91a9a 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
screamer 0:e4d670b91a9a 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
screamer 0:e4d670b91a9a 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
screamer 0:e4d670b91a9a 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
screamer 0:e4d670b91a9a 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
screamer 0:e4d670b91a9a 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
screamer 0:e4d670b91a9a 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
screamer 0:e4d670b91a9a 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
screamer 0:e4d670b91a9a 29 */
screamer 0:e4d670b91a9a 30
screamer 0:e4d670b91a9a 31 #include "fsl_sim_hal.h"
screamer 0:e4d670b91a9a 32
screamer 0:e4d670b91a9a 33 /*******************************************************************************
screamer 0:e4d670b91a9a 34 * Definitions
screamer 0:e4d670b91a9a 35 ******************************************************************************/
screamer 0:e4d670b91a9a 36
screamer 0:e4d670b91a9a 37 /*******************************************************************************
screamer 0:e4d670b91a9a 38 * Code
screamer 0:e4d670b91a9a 39 ******************************************************************************/
screamer 0:e4d670b91a9a 40
screamer 0:e4d670b91a9a 41 /*FUNCTION**********************************************************************
screamer 0:e4d670b91a9a 42 *
screamer 0:e4d670b91a9a 43 * Function Name : CLOCK_HAL_SetSource
screamer 0:e4d670b91a9a 44 * Description : Set clock source setting
screamer 0:e4d670b91a9a 45 * This function will set the settings for specified clock source. Each clock
screamer 0:e4d670b91a9a 46 * source has its clock selection settings. Refer to reference manual for
screamer 0:e4d670b91a9a 47 * details of settings for each clock source. Refer to clock_source_names_t
screamer 0:e4d670b91a9a 48 * for clock sources.
screamer 0:e4d670b91a9a 49 *
screamer 0:e4d670b91a9a 50 *END**************************************************************************/
screamer 0:e4d670b91a9a 51 sim_hal_status_t CLOCK_HAL_SetSource(uint32_t baseAddr,
screamer 0:e4d670b91a9a 52 clock_source_names_t clockSource,
screamer 0:e4d670b91a9a 53 uint8_t setting)
screamer 0:e4d670b91a9a 54 {
screamer 0:e4d670b91a9a 55 sim_hal_status_t status = kSimHalSuccess;
screamer 0:e4d670b91a9a 56 assert(clockSource < kClockSourceMax);
screamer 0:e4d670b91a9a 57
screamer 0:e4d670b91a9a 58 switch (clockSource)
screamer 0:e4d670b91a9a 59 {
screamer 0:e4d670b91a9a 60 #if FSL_FEATURE_SIM_OPT_HAS_NFCSRC
screamer 0:e4d670b91a9a 61 case kClockNfcSrc: /* NFCSRC*/
screamer 0:e4d670b91a9a 62 BW_SIM_SOPT2_NFCSRC(baseAddr, setting);
screamer 0:e4d670b91a9a 63 break;
screamer 0:e4d670b91a9a 64 case kClockNfcSel: /* NFC_CLKSEL*/
screamer 0:e4d670b91a9a 65 BW_SIM_SOPT2_NFC_CLKSEL(baseAddr, setting);
screamer 0:e4d670b91a9a 66 break;
screamer 0:e4d670b91a9a 67 #endif
screamer 0:e4d670b91a9a 68
screamer 0:e4d670b91a9a 69 #if FSL_FEATURE_SIM_OPT_HAS_ESDHCSRC
screamer 0:e4d670b91a9a 70 case kClockEsdhcSrc: /* ESDHCSRC*/
screamer 0:e4d670b91a9a 71 BW_SIM_SOPT2_ESDHCSRC(baseAddr, setting);
screamer 0:e4d670b91a9a 72 break;
screamer 0:e4d670b91a9a 73 #endif
screamer 0:e4d670b91a9a 74
screamer 0:e4d670b91a9a 75 #if FSL_FEATURE_SIM_OPT_HAS_SDHCSRC
screamer 0:e4d670b91a9a 76 case kClockSdhcSrc: /* SDHCSRC*/
screamer 0:e4d670b91a9a 77 BW_SIM_SOPT2_SDHCSRC(baseAddr, setting);
screamer 0:e4d670b91a9a 78 break;
screamer 0:e4d670b91a9a 79 #endif
screamer 0:e4d670b91a9a 80
screamer 0:e4d670b91a9a 81 #if FSL_FEATURE_SIM_OPT_HAS_LCDCSRC
screamer 0:e4d670b91a9a 82 case kClockLcdcSrc: /* LCDCSRC*/
screamer 0:e4d670b91a9a 83 BW_SIM_SOPT2_LCDCSRC(baseAddr, setting);
screamer 0:e4d670b91a9a 84 break;
screamer 0:e4d670b91a9a 85 case kClockLcdcSel: /* LCDC_CLKSEL*/
screamer 0:e4d670b91a9a 86 BW_SIM_SOPT2_LCDC_CLKSEL(baseAddr, setting);
screamer 0:e4d670b91a9a 87 break;
screamer 0:e4d670b91a9a 88 #endif
screamer 0:e4d670b91a9a 89
screamer 0:e4d670b91a9a 90 #if FSL_FEATURE_SIM_OPT_HAS_TIMESRC
screamer 0:e4d670b91a9a 91 case kClockTimeSrc: /* TIMESRC*/
screamer 0:e4d670b91a9a 92 BW_SIM_SOPT2_TIMESRC(baseAddr, setting);
screamer 0:e4d670b91a9a 93 break;
screamer 0:e4d670b91a9a 94 #endif
screamer 0:e4d670b91a9a 95
screamer 0:e4d670b91a9a 96 #if FSL_FEATURE_SIM_OPT_HAS_RMIISRC
screamer 0:e4d670b91a9a 97 case kClockRmiiSrc: /* RMIISRC*/
screamer 0:e4d670b91a9a 98 BW_SIM_SOPT2_RMIISRC(baseAddr, setting);
screamer 0:e4d670b91a9a 99 break;
screamer 0:e4d670b91a9a 100 #endif
screamer 0:e4d670b91a9a 101
screamer 0:e4d670b91a9a 102 #if FSL_FEATURE_SIM_OPT_HAS_USBSRC
screamer 0:e4d670b91a9a 103 case kClockUsbSrc: /* USBSRC*/
screamer 0:e4d670b91a9a 104 BW_SIM_SOPT2_USBSRC(baseAddr, setting);
screamer 0:e4d670b91a9a 105 break;
screamer 0:e4d670b91a9a 106 #endif
screamer 0:e4d670b91a9a 107
screamer 0:e4d670b91a9a 108 #if FSL_FEATURE_SIM_OPT_HAS_USBFSRC
screamer 0:e4d670b91a9a 109 case kClockUsbfSrc: /* USBFSRC*/
screamer 0:e4d670b91a9a 110 BW_SIM_SOPT2_USBFSRC(baseAddr, setting);
screamer 0:e4d670b91a9a 111 break;
screamer 0:e4d670b91a9a 112 case kClockUsbfSel: /* USBF_CLKSEL*/
screamer 0:e4d670b91a9a 113 BW_SIM_SOPT2_USBF_CLKSEL(baseAddr, setting);
screamer 0:e4d670b91a9a 114 break;
screamer 0:e4d670b91a9a 115 #endif
screamer 0:e4d670b91a9a 116
screamer 0:e4d670b91a9a 117 #if FSL_FEATURE_SIM_OPT_HAS_USBHSRC
screamer 0:e4d670b91a9a 118 case kClockUsbhSrc: /* USBHSRC*/
screamer 0:e4d670b91a9a 119 BW_SIM_SOPT2_USBHSRC(baseAddr, setting);
screamer 0:e4d670b91a9a 120 break;
screamer 0:e4d670b91a9a 121 #endif
screamer 0:e4d670b91a9a 122
screamer 0:e4d670b91a9a 123 #if FSL_FEATURE_SIM_OPT_HAS_UART0SRC
screamer 0:e4d670b91a9a 124 case kClockUart0Src: /* UART0SRC*/
screamer 0:e4d670b91a9a 125 BW_SIM_SOPT2_UART0SRC(baseAddr, setting);
screamer 0:e4d670b91a9a 126 break;
screamer 0:e4d670b91a9a 127 #endif
screamer 0:e4d670b91a9a 128
screamer 0:e4d670b91a9a 129 #if FSL_FEATURE_SIM_OPT_HAS_TPMSRC
screamer 0:e4d670b91a9a 130 case kClockTpmSrc: /* TPMSRC*/
screamer 0:e4d670b91a9a 131 BW_SIM_SOPT2_TPMSRC(baseAddr, setting);
screamer 0:e4d670b91a9a 132 break;
screamer 0:e4d670b91a9a 133 #endif
screamer 0:e4d670b91a9a 134
screamer 0:e4d670b91a9a 135 #if FSL_FEATURE_SIM_OPT_HAS_LPUARTSRC
screamer 0:e4d670b91a9a 136 case kClockLpuartSrc: /* LPUARTSRC*/
screamer 0:e4d670b91a9a 137 BW_SIM_SOPT2_LPUARTSRC(baseAddr, setting);
screamer 0:e4d670b91a9a 138 break;
screamer 0:e4d670b91a9a 139 #endif
screamer 0:e4d670b91a9a 140
screamer 0:e4d670b91a9a 141 case kClockOsc32kSel: /* OSC32KSEL*/
screamer 0:e4d670b91a9a 142 BW_SIM_SOPT1_OSC32KSEL(baseAddr, setting);
screamer 0:e4d670b91a9a 143 break;
screamer 0:e4d670b91a9a 144
screamer 0:e4d670b91a9a 145 case kClockPllfllSel: /* PLLFLLSEL*/
screamer 0:e4d670b91a9a 146 BW_SIM_SOPT2_PLLFLLSEL(baseAddr, setting);
screamer 0:e4d670b91a9a 147 break;
screamer 0:e4d670b91a9a 148
screamer 0:e4d670b91a9a 149 #if FSL_FEATURE_SIM_OPT_HAS_TRACE_CLKSEL
screamer 0:e4d670b91a9a 150 case kClockTraceSel: /* TRACE_CLKSEL*/
screamer 0:e4d670b91a9a 151 BW_SIM_SOPT2_TRACECLKSEL(baseAddr, setting);
screamer 0:e4d670b91a9a 152 break;
screamer 0:e4d670b91a9a 153 #endif
screamer 0:e4d670b91a9a 154
screamer 0:e4d670b91a9a 155 case kClockClkoutSel: /* CLKOUTSEL*/
screamer 0:e4d670b91a9a 156 BW_SIM_SOPT2_CLKOUTSEL(baseAddr, setting);
screamer 0:e4d670b91a9a 157 break;
screamer 0:e4d670b91a9a 158
screamer 0:e4d670b91a9a 159 #if FSL_FEATURE_SIM_OPT_HAS_RTC_CLOCK_OUT_SELECTION
screamer 0:e4d670b91a9a 160 case kClockRtcClkoutSel: /* RTCCLKOUTSEL*/
screamer 0:e4d670b91a9a 161 BW_SIM_SOPT2_RTCCLKOUTSEL(baseAddr, setting);
screamer 0:e4d670b91a9a 162 break;
screamer 0:e4d670b91a9a 163 #endif
screamer 0:e4d670b91a9a 164
screamer 0:e4d670b91a9a 165 default:
screamer 0:e4d670b91a9a 166 status = kSimHalNoSuchClockSrc;
screamer 0:e4d670b91a9a 167 break;
screamer 0:e4d670b91a9a 168 }
screamer 0:e4d670b91a9a 169
screamer 0:e4d670b91a9a 170 return status;
screamer 0:e4d670b91a9a 171 }
screamer 0:e4d670b91a9a 172
screamer 0:e4d670b91a9a 173 /*FUNCTION**********************************************************************
screamer 0:e4d670b91a9a 174 *
screamer 0:e4d670b91a9a 175 * Function Name : CLOCK_HAL_GetSource
screamer 0:e4d670b91a9a 176 * Description : Get clock source setting
screamer 0:e4d670b91a9a 177 * This function will get the settings for specified clock source. Each clock
screamer 0:e4d670b91a9a 178 * source has its clock selection settings. Refer to reference manual for
screamer 0:e4d670b91a9a 179 * details of settings for each clock source. Refer to clock_source_names_t
screamer 0:e4d670b91a9a 180 * for clock sources.
screamer 0:e4d670b91a9a 181 *
screamer 0:e4d670b91a9a 182 *END**************************************************************************/
screamer 0:e4d670b91a9a 183 sim_hal_status_t CLOCK_HAL_GetSource(uint32_t baseAddr,
screamer 0:e4d670b91a9a 184 clock_source_names_t clockSource,
screamer 0:e4d670b91a9a 185 uint8_t *setting)
screamer 0:e4d670b91a9a 186 {
screamer 0:e4d670b91a9a 187 sim_hal_status_t status = kSimHalSuccess;
screamer 0:e4d670b91a9a 188 assert(clockSource < kClockSourceMax);
screamer 0:e4d670b91a9a 189
screamer 0:e4d670b91a9a 190 switch (clockSource)
screamer 0:e4d670b91a9a 191 {
screamer 0:e4d670b91a9a 192 #if FSL_FEATURE_SIM_OPT_HAS_NFCSRC
screamer 0:e4d670b91a9a 193 case kClockNfcSrc: /* NFCSRC*/
screamer 0:e4d670b91a9a 194 *setting = BR_SIM_SOPT2_NFCSRC(baseAddr);
screamer 0:e4d670b91a9a 195 break;
screamer 0:e4d670b91a9a 196 case kClockNfcSel: /* NFC_CLKSEL*/
screamer 0:e4d670b91a9a 197 *setting = BR_SIM_SOPT2_NFC_CLKSEL(baseAddr);
screamer 0:e4d670b91a9a 198 break;
screamer 0:e4d670b91a9a 199 #endif
screamer 0:e4d670b91a9a 200
screamer 0:e4d670b91a9a 201 #if FSL_FEATURE_SIM_OPT_HAS_ESDHCSRC
screamer 0:e4d670b91a9a 202 case kClockEsdhcSrc: /* ESDHCSRC*/
screamer 0:e4d670b91a9a 203 *setting = BR_SIM_SOPT2_ESDHCSRC(baseAddr);
screamer 0:e4d670b91a9a 204 break;
screamer 0:e4d670b91a9a 205 #endif
screamer 0:e4d670b91a9a 206
screamer 0:e4d670b91a9a 207 #if FSL_FEATURE_SIM_OPT_HAS_SDHCSRC
screamer 0:e4d670b91a9a 208 case kClockSdhcSrc: /* SDHCSRC*/
screamer 0:e4d670b91a9a 209 *setting = BR_SIM_SOPT2_SDHCSRC(baseAddr);
screamer 0:e4d670b91a9a 210 break;
screamer 0:e4d670b91a9a 211 #endif
screamer 0:e4d670b91a9a 212
screamer 0:e4d670b91a9a 213 #if FSL_FEATURE_SIM_OPT_HAS_LCDCSRC
screamer 0:e4d670b91a9a 214 case kClockLcdcSrc: /* LCDCSRC*/
screamer 0:e4d670b91a9a 215 *setting = BR_SIM_SOPT2_LCDCSRC(baseAddr);
screamer 0:e4d670b91a9a 216 break;
screamer 0:e4d670b91a9a 217 case kClockLcdcSel: /* LCDC_CLKSEL*/
screamer 0:e4d670b91a9a 218 *setting = BR_SIM_SOPT2_LCDC_CLKSEL(baseAddr);
screamer 0:e4d670b91a9a 219 break;
screamer 0:e4d670b91a9a 220 #endif
screamer 0:e4d670b91a9a 221
screamer 0:e4d670b91a9a 222 #if FSL_FEATURE_SIM_OPT_HAS_TIMESRC
screamer 0:e4d670b91a9a 223 case kClockTimeSrc: /* TIMESRC*/
screamer 0:e4d670b91a9a 224 *setting = BR_SIM_SOPT2_TIMESRC(baseAddr);
screamer 0:e4d670b91a9a 225 break;
screamer 0:e4d670b91a9a 226 #endif
screamer 0:e4d670b91a9a 227
screamer 0:e4d670b91a9a 228 #if FSL_FEATURE_SIM_OPT_HAS_RMIISRC
screamer 0:e4d670b91a9a 229 case kClockRmiiSrc: /* RMIISRC*/
screamer 0:e4d670b91a9a 230 *setting = BR_SIM_SOPT2_RMIISRC(baseAddr);
screamer 0:e4d670b91a9a 231 break;
screamer 0:e4d670b91a9a 232 #endif
screamer 0:e4d670b91a9a 233
screamer 0:e4d670b91a9a 234 #if FSL_FEATURE_SIM_OPT_HAS_USBSRC
screamer 0:e4d670b91a9a 235 case kClockUsbSrc: /* USBSRC*/
screamer 0:e4d670b91a9a 236 *setting = BR_SIM_SOPT2_USBSRC(baseAddr);
screamer 0:e4d670b91a9a 237 break;
screamer 0:e4d670b91a9a 238 #endif
screamer 0:e4d670b91a9a 239
screamer 0:e4d670b91a9a 240 #if FSL_FEATURE_SIM_OPT_HAS_USBFSRC
screamer 0:e4d670b91a9a 241 case kClockUsbfSrc: /* USBFSRC*/
screamer 0:e4d670b91a9a 242 *setting = BR_SIM_SOPT2_USBFSRC(baseAddr);
screamer 0:e4d670b91a9a 243 break;
screamer 0:e4d670b91a9a 244 case kClockUsbfSel: /* USBF_CLKSEL*/
screamer 0:e4d670b91a9a 245 *setting = BR_SIM_SOPT2_USBF_CLKSEL(baseAddr);
screamer 0:e4d670b91a9a 246 break;
screamer 0:e4d670b91a9a 247 #endif
screamer 0:e4d670b91a9a 248
screamer 0:e4d670b91a9a 249 #if FSL_FEATURE_SIM_OPT_HAS_USBHSRC
screamer 0:e4d670b91a9a 250 case kClockUsbhSrc: /* USBHSRC*/
screamer 0:e4d670b91a9a 251 *setting = BR_SIM_SOPT2_USBHSRC(baseAddr);
screamer 0:e4d670b91a9a 252 break;
screamer 0:e4d670b91a9a 253 #endif
screamer 0:e4d670b91a9a 254
screamer 0:e4d670b91a9a 255 #if FSL_FEATURE_SIM_OPT_HAS_UART0SRC
screamer 0:e4d670b91a9a 256 case kClockUart0Src: /* UART0SRC*/
screamer 0:e4d670b91a9a 257 *setting = BR_SIM_SOPT2_UART0SRC(baseAddr);
screamer 0:e4d670b91a9a 258 break;
screamer 0:e4d670b91a9a 259 #endif
screamer 0:e4d670b91a9a 260
screamer 0:e4d670b91a9a 261 #if FSL_FEATURE_SIM_OPT_HAS_TPMSRC
screamer 0:e4d670b91a9a 262 case kClockTpmSrc: /* TPMSRC*/
screamer 0:e4d670b91a9a 263 *setting = BR_SIM_SOPT2_TPMSRC(baseAddr);
screamer 0:e4d670b91a9a 264 break;
screamer 0:e4d670b91a9a 265 #endif
screamer 0:e4d670b91a9a 266
screamer 0:e4d670b91a9a 267 #if FSL_FEATURE_SIM_OPT_HAS_LPUARTSRC
screamer 0:e4d670b91a9a 268 case kClockLpuartSrc: /* LPUARTSRC*/
screamer 0:e4d670b91a9a 269 *setting = BR_SIM_SOPT2_LPUARTSRC(baseAddr);
screamer 0:e4d670b91a9a 270 break;
screamer 0:e4d670b91a9a 271 #endif
screamer 0:e4d670b91a9a 272
screamer 0:e4d670b91a9a 273 case kClockOsc32kSel: /* OSC32KSEL*/
screamer 0:e4d670b91a9a 274 *setting = BR_SIM_SOPT1_OSC32KSEL(baseAddr);
screamer 0:e4d670b91a9a 275 break;
screamer 0:e4d670b91a9a 276
screamer 0:e4d670b91a9a 277 case kClockPllfllSel: /* PLLFLLSEL*/
screamer 0:e4d670b91a9a 278 *setting = BR_SIM_SOPT2_PLLFLLSEL(baseAddr);
screamer 0:e4d670b91a9a 279 break;
screamer 0:e4d670b91a9a 280
screamer 0:e4d670b91a9a 281 #if FSL_FEATURE_SIM_OPT_HAS_TRACE_CLKSEL
screamer 0:e4d670b91a9a 282 case kClockTraceSel: /* TRACE_CLKSEL*/
screamer 0:e4d670b91a9a 283 *setting = BR_SIM_SOPT2_TRACECLKSEL(baseAddr);
screamer 0:e4d670b91a9a 284 break;
screamer 0:e4d670b91a9a 285 #endif
screamer 0:e4d670b91a9a 286
screamer 0:e4d670b91a9a 287 case kClockClkoutSel: /* CLKOUTSEL */
screamer 0:e4d670b91a9a 288 *setting = BR_SIM_SOPT2_CLKOUTSEL(baseAddr);
screamer 0:e4d670b91a9a 289 break;
screamer 0:e4d670b91a9a 290
screamer 0:e4d670b91a9a 291 #if FSL_FEATURE_SIM_OPT_HAS_RTC_CLOCK_OUT_SELECTION
screamer 0:e4d670b91a9a 292 case kClockRtcClkoutSel: /* RTCCLKOUTSEL */
screamer 0:e4d670b91a9a 293 *setting = BR_SIM_SOPT2_RTCCLKOUTSEL(baseAddr);
screamer 0:e4d670b91a9a 294 break;
screamer 0:e4d670b91a9a 295 #endif
screamer 0:e4d670b91a9a 296
screamer 0:e4d670b91a9a 297 default:
screamer 0:e4d670b91a9a 298 status = kSimHalNoSuchClockSrc;
screamer 0:e4d670b91a9a 299 break;
screamer 0:e4d670b91a9a 300 }
screamer 0:e4d670b91a9a 301
screamer 0:e4d670b91a9a 302 return status;
screamer 0:e4d670b91a9a 303 }
screamer 0:e4d670b91a9a 304
screamer 0:e4d670b91a9a 305 /*FUNCTION**********************************************************************
screamer 0:e4d670b91a9a 306 *
screamer 0:e4d670b91a9a 307 * Function Name : CLOCK_HAL_SetDivider
screamer 0:e4d670b91a9a 308 * Description : Set clock divider setting
screamer 0:e4d670b91a9a 309 * This function will set the setting for specified clock divider. Refer to
screamer 0:e4d670b91a9a 310 * reference manual for supported clock divider and value range. Refer to
screamer 0:e4d670b91a9a 311 * clock_divider_names_t for dividers.
screamer 0:e4d670b91a9a 312 *
screamer 0:e4d670b91a9a 313 *END**************************************************************************/
screamer 0:e4d670b91a9a 314 sim_hal_status_t CLOCK_HAL_SetDivider(uint32_t baseAddr,
screamer 0:e4d670b91a9a 315 clock_divider_names_t clockDivider,
screamer 0:e4d670b91a9a 316 uint32_t setting)
screamer 0:e4d670b91a9a 317 {
screamer 0:e4d670b91a9a 318 sim_hal_status_t status = kSimHalSuccess;
screamer 0:e4d670b91a9a 319 assert(clockDivider < kClockDividerMax);
screamer 0:e4d670b91a9a 320
screamer 0:e4d670b91a9a 321 switch (clockDivider)
screamer 0:e4d670b91a9a 322 {
screamer 0:e4d670b91a9a 323 case kClockDividerOutdiv1: /* OUTDIV1*/
screamer 0:e4d670b91a9a 324 BW_SIM_CLKDIV1_OUTDIV1(baseAddr, setting);
screamer 0:e4d670b91a9a 325 break;
screamer 0:e4d670b91a9a 326
screamer 0:e4d670b91a9a 327 #if FSL_FEATURE_SIM_DIVIDER_HAS_OUTDIV2
screamer 0:e4d670b91a9a 328 case kClockDividerOutdiv2: /* OUTDIV2*/
screamer 0:e4d670b91a9a 329 BW_SIM_CLKDIV1_OUTDIV2(baseAddr, setting);
screamer 0:e4d670b91a9a 330 break;
screamer 0:e4d670b91a9a 331 #endif
screamer 0:e4d670b91a9a 332
screamer 0:e4d670b91a9a 333 #if FSL_FEATURE_SIM_DIVIDER_HAS_OUTDIV3
screamer 0:e4d670b91a9a 334 case kClockDividerOutdiv3: /* OUTDIV3*/
screamer 0:e4d670b91a9a 335 BW_SIM_CLKDIV1_OUTDIV3(baseAddr, setting);
screamer 0:e4d670b91a9a 336 break;
screamer 0:e4d670b91a9a 337 #endif
screamer 0:e4d670b91a9a 338
screamer 0:e4d670b91a9a 339 case kClockDividerOutdiv4: /* OUTDIV4*/
screamer 0:e4d670b91a9a 340 BW_SIM_CLKDIV1_OUTDIV4(baseAddr, setting);
screamer 0:e4d670b91a9a 341 break;
screamer 0:e4d670b91a9a 342
screamer 0:e4d670b91a9a 343 #if FSL_FEATURE_SIM_DIVIDER_HAS_USBDIV
screamer 0:e4d670b91a9a 344 case kClockDividerUsbFrac: /* USBFRAC*/
screamer 0:e4d670b91a9a 345 BW_SIM_CLKDIV2_USBFRAC(baseAddr, setting);
screamer 0:e4d670b91a9a 346 break;
screamer 0:e4d670b91a9a 347 case kClockDividerUsbDiv: /* USBDIV*/
screamer 0:e4d670b91a9a 348 BW_SIM_CLKDIV2_USBDIV(baseAddr, setting);
screamer 0:e4d670b91a9a 349 break;
screamer 0:e4d670b91a9a 350 #endif
screamer 0:e4d670b91a9a 351
screamer 0:e4d670b91a9a 352 #if FSL_FEATURE_SIM_DIVIDER_HAS_USBFSDIV
screamer 0:e4d670b91a9a 353 case kClockDividerUsbfsFrac: /* USBFSFRAC*/
screamer 0:e4d670b91a9a 354 BW_SIM_CLKDIV2_USBFSFRAC(baseAddr, setting);
screamer 0:e4d670b91a9a 355 break;
screamer 0:e4d670b91a9a 356 case kClockDividerUsbfsDiv: /* USBFSDIV*/
screamer 0:e4d670b91a9a 357 BW_SIM_CLKDIV2_USBFSDIV(baseAddr, setting);
screamer 0:e4d670b91a9a 358 break;
screamer 0:e4d670b91a9a 359 #endif
screamer 0:e4d670b91a9a 360
screamer 0:e4d670b91a9a 361 #if FSL_FEATURE_SIM_DIVIDER_HAS_USBHSDIV
screamer 0:e4d670b91a9a 362 case kClockDividerUsbhsFrac: /* USBHSFRAC*/
screamer 0:e4d670b91a9a 363 BW_SIM_CLKDIV2_USBHSFRAC(baseAddr, setting);
screamer 0:e4d670b91a9a 364 break;
screamer 0:e4d670b91a9a 365 case kClockDividerUsbhsDiv: /* USBHSDIV*/
screamer 0:e4d670b91a9a 366 BW_SIM_CLKDIV2_USBHSDIV(baseAddr, setting);
screamer 0:e4d670b91a9a 367 break;
screamer 0:e4d670b91a9a 368 #endif
screamer 0:e4d670b91a9a 369
screamer 0:e4d670b91a9a 370 #if FSL_FEATURE_SIM_OPT_HAS_LCDCSRC
screamer 0:e4d670b91a9a 371 case kClockDividerLcdcFrac: /* LCDCFRAC*/
screamer 0:e4d670b91a9a 372 BW_SIM_CLKDIV3_LCDCFRAC(baseAddr, setting);
screamer 0:e4d670b91a9a 373 break;
screamer 0:e4d670b91a9a 374 case kClockDividerLcdcDiv: /* LCDCDIV*/
screamer 0:e4d670b91a9a 375 BW_SIM_CLKDIV3_LCDCDIV(baseAddr, setting);
screamer 0:e4d670b91a9a 376 break;
screamer 0:e4d670b91a9a 377 #endif
screamer 0:e4d670b91a9a 378
screamer 0:e4d670b91a9a 379 #if FSL_FEATURE_SIM_OPT_HAS_NFCSRC
screamer 0:e4d670b91a9a 380 case kClockDividerNfcFrac: /* NFCFRAC*/
screamer 0:e4d670b91a9a 381 BW_SIM_CLKDIV4_NFCFRAC(baseAddr, setting);
screamer 0:e4d670b91a9a 382 break;
screamer 0:e4d670b91a9a 383 case kClockDividerNfcDiv: /* NFCDIV*/
screamer 0:e4d670b91a9a 384 BW_SIM_CLKDIV4_NFCDIV(baseAddr, setting);
screamer 0:e4d670b91a9a 385 break;
screamer 0:e4d670b91a9a 386 #endif
screamer 0:e4d670b91a9a 387
screamer 0:e4d670b91a9a 388 case kClockDividerSpecial1: /* special divider 1 */
screamer 0:e4d670b91a9a 389 break;
screamer 0:e4d670b91a9a 390
screamer 0:e4d670b91a9a 391 default:
screamer 0:e4d670b91a9a 392 status = kSimHalNoSuchDivider;
screamer 0:e4d670b91a9a 393 break;
screamer 0:e4d670b91a9a 394 }
screamer 0:e4d670b91a9a 395
screamer 0:e4d670b91a9a 396 return status;
screamer 0:e4d670b91a9a 397 }
screamer 0:e4d670b91a9a 398
screamer 0:e4d670b91a9a 399 /*FUNCTION**********************************************************************
screamer 0:e4d670b91a9a 400 *
screamer 0:e4d670b91a9a 401 * Function Name : CLOCK_HAL_SetOutDividers
screamer 0:e4d670b91a9a 402 * Description : Set all clock out dividers setting at the same time
screamer 0:e4d670b91a9a 403 * This function will set the setting for all clock out dividers. Refer to
screamer 0:e4d670b91a9a 404 * reference manual for supported clock divider and value range. Refer to
screamer 0:e4d670b91a9a 405 * clock_divider_names_t for dividers.
screamer 0:e4d670b91a9a 406 *
screamer 0:e4d670b91a9a 407 *END**************************************************************************/
screamer 0:e4d670b91a9a 408 void CLOCK_HAL_SetOutDividers(uint32_t baseAddr, uint32_t outdiv1, uint32_t outdiv2,
screamer 0:e4d670b91a9a 409 uint32_t outdiv3, uint32_t outdiv4)
screamer 0:e4d670b91a9a 410 {
screamer 0:e4d670b91a9a 411 uint32_t clkdiv1 = 0;
screamer 0:e4d670b91a9a 412
screamer 0:e4d670b91a9a 413 clkdiv1 |= BF_SIM_CLKDIV1_OUTDIV1(outdiv1);
screamer 0:e4d670b91a9a 414 #if FSL_FEATURE_SIM_DIVIDER_HAS_OUTDIV2
screamer 0:e4d670b91a9a 415 clkdiv1 |= BF_SIM_CLKDIV1_OUTDIV2(outdiv2);
screamer 0:e4d670b91a9a 416 #endif
screamer 0:e4d670b91a9a 417 #if FSL_FEATURE_SIM_DIVIDER_HAS_OUTDIV3
screamer 0:e4d670b91a9a 418 clkdiv1 |= BF_SIM_CLKDIV1_OUTDIV3(outdiv3);
screamer 0:e4d670b91a9a 419 #endif
screamer 0:e4d670b91a9a 420 clkdiv1 |= BF_SIM_CLKDIV1_OUTDIV4(outdiv4);
screamer 0:e4d670b91a9a 421
screamer 0:e4d670b91a9a 422 HW_SIM_CLKDIV1_WR(baseAddr, clkdiv1);
screamer 0:e4d670b91a9a 423 }
screamer 0:e4d670b91a9a 424
screamer 0:e4d670b91a9a 425 /*FUNCTION**********************************************************************
screamer 0:e4d670b91a9a 426 *
screamer 0:e4d670b91a9a 427 * Function Name : CLOCK_HAL_GetDivider
screamer 0:e4d670b91a9a 428 * Description : Get clock divider setting
screamer 0:e4d670b91a9a 429 * This function will get the setting for specified clock divider. Refer to
screamer 0:e4d670b91a9a 430 * reference manual for supported clock divider and value range. Refer to
screamer 0:e4d670b91a9a 431 * clock_divider_names_t for dividers.
screamer 0:e4d670b91a9a 432 *
screamer 0:e4d670b91a9a 433 *END**************************************************************************/
screamer 0:e4d670b91a9a 434 sim_hal_status_t CLOCK_HAL_GetDivider(uint32_t baseAddr,
screamer 0:e4d670b91a9a 435 clock_divider_names_t clockDivider,
screamer 0:e4d670b91a9a 436 uint32_t *setting)
screamer 0:e4d670b91a9a 437 {
screamer 0:e4d670b91a9a 438 sim_hal_status_t status = kSimHalSuccess;
screamer 0:e4d670b91a9a 439 assert(clockDivider < kClockDividerMax);
screamer 0:e4d670b91a9a 440
screamer 0:e4d670b91a9a 441 *setting = 0;
screamer 0:e4d670b91a9a 442
screamer 0:e4d670b91a9a 443 switch (clockDivider)
screamer 0:e4d670b91a9a 444 {
screamer 0:e4d670b91a9a 445 case kClockDividerOutdiv1: /* OUTDIV1*/
screamer 0:e4d670b91a9a 446 *setting = BR_SIM_CLKDIV1_OUTDIV1(baseAddr);
screamer 0:e4d670b91a9a 447 break;
screamer 0:e4d670b91a9a 448
screamer 0:e4d670b91a9a 449 #if FSL_FEATURE_SIM_DIVIDER_HAS_OUTDIV2
screamer 0:e4d670b91a9a 450 case kClockDividerOutdiv2: /* OUTDIV2*/
screamer 0:e4d670b91a9a 451 *setting = BR_SIM_CLKDIV1_OUTDIV2(baseAddr);
screamer 0:e4d670b91a9a 452 break;
screamer 0:e4d670b91a9a 453 #endif
screamer 0:e4d670b91a9a 454
screamer 0:e4d670b91a9a 455 #if FSL_FEATURE_SIM_DIVIDER_HAS_OUTDIV3
screamer 0:e4d670b91a9a 456 case kClockDividerOutdiv3: /* OUTDIV3*/
screamer 0:e4d670b91a9a 457 *setting = BR_SIM_CLKDIV1_OUTDIV3(baseAddr);
screamer 0:e4d670b91a9a 458 break;
screamer 0:e4d670b91a9a 459 #endif
screamer 0:e4d670b91a9a 460
screamer 0:e4d670b91a9a 461 case kClockDividerOutdiv4: /* OUTDIV4*/
screamer 0:e4d670b91a9a 462 *setting = BR_SIM_CLKDIV1_OUTDIV4(baseAddr);
screamer 0:e4d670b91a9a 463 break;
screamer 0:e4d670b91a9a 464
screamer 0:e4d670b91a9a 465 #if FSL_FEATURE_SIM_DIVIDER_HAS_USBDIV
screamer 0:e4d670b91a9a 466 case kClockDividerUsbFrac: /* USBFRAC*/
screamer 0:e4d670b91a9a 467 *setting = BR_SIM_CLKDIV2_USBFRAC(baseAddr);
screamer 0:e4d670b91a9a 468 break;
screamer 0:e4d670b91a9a 469 case kClockDividerUsbDiv: /* USBDIV*/
screamer 0:e4d670b91a9a 470 *setting = BR_SIM_CLKDIV2_USBDIV(baseAddr);
screamer 0:e4d670b91a9a 471 break;
screamer 0:e4d670b91a9a 472 #endif
screamer 0:e4d670b91a9a 473
screamer 0:e4d670b91a9a 474 #if FSL_FEATURE_SIM_DIVIDER_HAS_USBFSDIV
screamer 0:e4d670b91a9a 475 case kClockDividerUsbfsFrac: /* USBFSFRAC*/
screamer 0:e4d670b91a9a 476 *setting = BR_SIM_CLKDIV2_USBFSFRAC(baseAddr);
screamer 0:e4d670b91a9a 477 break;
screamer 0:e4d670b91a9a 478 case kClockDividerUsbfsDiv: /* USBFSDIV*/
screamer 0:e4d670b91a9a 479 *setting = BR_SIM_CLKDIV2_USBFSDIV(baseAddr);
screamer 0:e4d670b91a9a 480 break;
screamer 0:e4d670b91a9a 481 #endif
screamer 0:e4d670b91a9a 482
screamer 0:e4d670b91a9a 483 #if FSL_FEATURE_SIM_DIVIDER_HAS_USBHSDIV
screamer 0:e4d670b91a9a 484 case kClockDividerUsbhsFrac: /* USBHSFRAC*/
screamer 0:e4d670b91a9a 485 *setting = BR_SIM_CLKDIV2_USBHSFRAC(baseAddr);
screamer 0:e4d670b91a9a 486 break;
screamer 0:e4d670b91a9a 487 case kClockDividerUsbhsDiv: /* USBHSDIV*/
screamer 0:e4d670b91a9a 488 *setting = BR_SIM_CLKDIV2_USBHSDIV(baseAddr);
screamer 0:e4d670b91a9a 489 break;
screamer 0:e4d670b91a9a 490 #endif
screamer 0:e4d670b91a9a 491
screamer 0:e4d670b91a9a 492 #if FSL_FEATURE_SIM_OPT_HAS_LCDCSRC
screamer 0:e4d670b91a9a 493 case kClockDividerLcdcFrac: /* LCDCFRAC*/
screamer 0:e4d670b91a9a 494 *setting = BR_SIM_CLKDIV3_LCDCFRAC(baseAddr);
screamer 0:e4d670b91a9a 495 break;
screamer 0:e4d670b91a9a 496 case kClockDividerLcdcDiv: /* LCDCDIV*/
screamer 0:e4d670b91a9a 497 *setting = BR_SIM_CLKDIV3_LCDCDIV(baseAddr);
screamer 0:e4d670b91a9a 498 break;
screamer 0:e4d670b91a9a 499 #endif
screamer 0:e4d670b91a9a 500
screamer 0:e4d670b91a9a 501 #if FSL_FEATURE_SIM_OPT_HAS_NFCSRC
screamer 0:e4d670b91a9a 502 case kClockDividerNfcFrac: /* NFCFRAC*/
screamer 0:e4d670b91a9a 503 *setting = BR_SIM_CLKDIV4_NFCFRAC(baseAddr);
screamer 0:e4d670b91a9a 504 break;
screamer 0:e4d670b91a9a 505 case kClockDividerNfcDiv: /* NFCDIV*/
screamer 0:e4d670b91a9a 506 *setting = BR_SIM_CLKDIV4_NFCDIV(baseAddr);
screamer 0:e4d670b91a9a 507 break;
screamer 0:e4d670b91a9a 508 #endif
screamer 0:e4d670b91a9a 509
screamer 0:e4d670b91a9a 510 case kClockDividerSpecial1: /* special divider 1 */
screamer 0:e4d670b91a9a 511 *setting = 1;
screamer 0:e4d670b91a9a 512 break;
screamer 0:e4d670b91a9a 513
screamer 0:e4d670b91a9a 514 default:
screamer 0:e4d670b91a9a 515 status = kSimHalNoSuchDivider;
screamer 0:e4d670b91a9a 516 break;
screamer 0:e4d670b91a9a 517 }
screamer 0:e4d670b91a9a 518
screamer 0:e4d670b91a9a 519 return status;
screamer 0:e4d670b91a9a 520 }
screamer 0:e4d670b91a9a 521
screamer 0:e4d670b91a9a 522 /*FUNCTION**********************************************************************
screamer 0:e4d670b91a9a 523 *
screamer 0:e4d670b91a9a 524 * Function Name : SIM_HAL_SetAdcAlternativeTriggerCmd
screamer 0:e4d670b91a9a 525 * Description : Set ADCx alternate trigger enable setting
screamer 0:e4d670b91a9a 526 * This function will enable/disable alternative conversion triggers for ADCx.
screamer 0:e4d670b91a9a 527 *
screamer 0:e4d670b91a9a 528 *END**************************************************************************/
screamer 0:e4d670b91a9a 529 void SIM_HAL_SetAdcAlternativeTriggerCmd(uint32_t baseAddr, uint8_t instance, bool enable)
screamer 0:e4d670b91a9a 530 {
screamer 0:e4d670b91a9a 531 assert(instance < HW_ADC_INSTANCE_COUNT);
screamer 0:e4d670b91a9a 532
screamer 0:e4d670b91a9a 533 switch (instance)
screamer 0:e4d670b91a9a 534 {
screamer 0:e4d670b91a9a 535 case 0:
screamer 0:e4d670b91a9a 536 BW_SIM_SOPT7_ADC0ALTTRGEN(baseAddr, enable ? 1 : 0);
screamer 0:e4d670b91a9a 537 break;
screamer 0:e4d670b91a9a 538 #if (HW_ADC_INSTANCE_COUNT > 1)
screamer 0:e4d670b91a9a 539 case 1:
screamer 0:e4d670b91a9a 540 BW_SIM_SOPT7_ADC1ALTTRGEN(baseAddr, enable ? 1 : 0);
screamer 0:e4d670b91a9a 541 break;
screamer 0:e4d670b91a9a 542 #if (HW_ADC_INSTANCE_COUNT > 2)
screamer 0:e4d670b91a9a 543 case 2:
screamer 0:e4d670b91a9a 544 BW_SIM_SOPT7_ADC2ALTTRGEN(baseAddr, enable ? 1 : 0);
screamer 0:e4d670b91a9a 545 break;
screamer 0:e4d670b91a9a 546 case 3:
screamer 0:e4d670b91a9a 547 BW_SIM_SOPT7_ADC3ALTTRGEN(baseAddr, enable ? 1 : 0);
screamer 0:e4d670b91a9a 548 break;
screamer 0:e4d670b91a9a 549 #endif
screamer 0:e4d670b91a9a 550 #endif
screamer 0:e4d670b91a9a 551 default:
screamer 0:e4d670b91a9a 552 break;
screamer 0:e4d670b91a9a 553 }
screamer 0:e4d670b91a9a 554 }
screamer 0:e4d670b91a9a 555
screamer 0:e4d670b91a9a 556 /*FUNCTION**********************************************************************
screamer 0:e4d670b91a9a 557 *
screamer 0:e4d670b91a9a 558 * Function Name : SIM_HAL_GetAdcAlternativeTriggerCmd
screamer 0:e4d670b91a9a 559 * Description : Get ADCx alternate trigger enable settingg
screamer 0:e4d670b91a9a 560 * This function will get ADCx alternate trigger enable setting.
screamer 0:e4d670b91a9a 561 *
screamer 0:e4d670b91a9a 562 *END**************************************************************************/
screamer 0:e4d670b91a9a 563 bool SIM_HAL_GetAdcAlternativeTriggerCmd(uint32_t baseAddr, uint8_t instance)
screamer 0:e4d670b91a9a 564 {
screamer 0:e4d670b91a9a 565 bool retValue = false;
screamer 0:e4d670b91a9a 566
screamer 0:e4d670b91a9a 567 assert(instance < HW_ADC_INSTANCE_COUNT);
screamer 0:e4d670b91a9a 568
screamer 0:e4d670b91a9a 569 switch (instance)
screamer 0:e4d670b91a9a 570 {
screamer 0:e4d670b91a9a 571 case 0:
screamer 0:e4d670b91a9a 572 retValue = BR_SIM_SOPT7_ADC0ALTTRGEN(baseAddr);
screamer 0:e4d670b91a9a 573 break;
screamer 0:e4d670b91a9a 574 #if (HW_ADC_INSTANCE_COUNT > 1)
screamer 0:e4d670b91a9a 575 case 1:
screamer 0:e4d670b91a9a 576 retValue = BR_SIM_SOPT7_ADC1ALTTRGEN(baseAddr);
screamer 0:e4d670b91a9a 577 break;
screamer 0:e4d670b91a9a 578 #if (HW_ADC_INSTANCE_COUNT > 2)
screamer 0:e4d670b91a9a 579 case 2:
screamer 0:e4d670b91a9a 580 retValue = BR_SIM_SOPT7_ADC2ALTTRGEN(baseAddr);
screamer 0:e4d670b91a9a 581 break;
screamer 0:e4d670b91a9a 582 case 3:
screamer 0:e4d670b91a9a 583 retValue = BR_SIM_SOPT7_ADC3ALTTRGEN(baseAddr);
screamer 0:e4d670b91a9a 584 break;
screamer 0:e4d670b91a9a 585 #endif
screamer 0:e4d670b91a9a 586 #endif
screamer 0:e4d670b91a9a 587 default:
screamer 0:e4d670b91a9a 588 retValue = false;
screamer 0:e4d670b91a9a 589 break;
screamer 0:e4d670b91a9a 590 }
screamer 0:e4d670b91a9a 591
screamer 0:e4d670b91a9a 592 return retValue;
screamer 0:e4d670b91a9a 593 }
screamer 0:e4d670b91a9a 594
screamer 0:e4d670b91a9a 595 /*FUNCTION**********************************************************************
screamer 0:e4d670b91a9a 596 *
screamer 0:e4d670b91a9a 597 * Function Name : SIM_HAL_SetAdcPreTriggerMode
screamer 0:e4d670b91a9a 598 * Description : Set ADCx pre-trigger select setting
screamer 0:e4d670b91a9a 599 * This function will select the ADCx pre-trigger source when alternative
screamer 0:e4d670b91a9a 600 * triggers are enabled through ADCxALTTRGEN
screamer 0:e4d670b91a9a 601 *
screamer 0:e4d670b91a9a 602 *END**************************************************************************/
screamer 0:e4d670b91a9a 603 void SIM_HAL_SetAdcPreTriggerMode(uint32_t baseAddr, uint8_t instance, sim_pretrgsel_t select)
screamer 0:e4d670b91a9a 604 {
screamer 0:e4d670b91a9a 605 assert(instance < HW_ADC_INSTANCE_COUNT);
screamer 0:e4d670b91a9a 606
screamer 0:e4d670b91a9a 607 switch (instance)
screamer 0:e4d670b91a9a 608 {
screamer 0:e4d670b91a9a 609 case 0:
screamer 0:e4d670b91a9a 610 BW_SIM_SOPT7_ADC0PRETRGSEL(baseAddr, select);
screamer 0:e4d670b91a9a 611 break;
screamer 0:e4d670b91a9a 612 #if (HW_ADC_INSTANCE_COUNT > 1)
screamer 0:e4d670b91a9a 613 case 1:
screamer 0:e4d670b91a9a 614 BW_SIM_SOPT7_ADC1PRETRGSEL(baseAddr, select);
screamer 0:e4d670b91a9a 615 break;
screamer 0:e4d670b91a9a 616 #if (HW_ADC_INSTANCE_COUNT > 2)
screamer 0:e4d670b91a9a 617 case 2:
screamer 0:e4d670b91a9a 618 BW_SIM_SOPT7_ADC2PRETRGSEL(baseAddr, select);
screamer 0:e4d670b91a9a 619 break;
screamer 0:e4d670b91a9a 620 case 3:
screamer 0:e4d670b91a9a 621 BW_SIM_SOPT7_ADC3PRETRGSEL(baseAddr, select);
screamer 0:e4d670b91a9a 622 break;
screamer 0:e4d670b91a9a 623 #endif
screamer 0:e4d670b91a9a 624 #endif
screamer 0:e4d670b91a9a 625 default:
screamer 0:e4d670b91a9a 626 break;
screamer 0:e4d670b91a9a 627 }
screamer 0:e4d670b91a9a 628 }
screamer 0:e4d670b91a9a 629
screamer 0:e4d670b91a9a 630 /*FUNCTION**********************************************************************
screamer 0:e4d670b91a9a 631 *
screamer 0:e4d670b91a9a 632 * Function Name : SIM_HAL_GetAdcPreTriggerMode
screamer 0:e4d670b91a9a 633 * Description : Get ADCx pre-trigger select setting
screamer 0:e4d670b91a9a 634 * This function will get ADCx pre-trigger select setting.
screamer 0:e4d670b91a9a 635 *
screamer 0:e4d670b91a9a 636 *END**************************************************************************/
screamer 0:e4d670b91a9a 637 sim_pretrgsel_t SIM_HAL_GetAdcPreTriggerMode(uint32_t baseAddr, uint8_t instance)
screamer 0:e4d670b91a9a 638 {
screamer 0:e4d670b91a9a 639 sim_pretrgsel_t retValue = (sim_pretrgsel_t)0;
screamer 0:e4d670b91a9a 640
screamer 0:e4d670b91a9a 641 assert(instance < HW_ADC_INSTANCE_COUNT);
screamer 0:e4d670b91a9a 642
screamer 0:e4d670b91a9a 643 switch (instance)
screamer 0:e4d670b91a9a 644 {
screamer 0:e4d670b91a9a 645 case 0:
screamer 0:e4d670b91a9a 646 retValue = (sim_pretrgsel_t)BR_SIM_SOPT7_ADC0PRETRGSEL(baseAddr);
screamer 0:e4d670b91a9a 647 break;
screamer 0:e4d670b91a9a 648 #if (HW_ADC_INSTANCE_COUNT > 1)
screamer 0:e4d670b91a9a 649 case 1:
screamer 0:e4d670b91a9a 650 retValue = (sim_pretrgsel_t)BR_SIM_SOPT7_ADC1PRETRGSEL(baseAddr);
screamer 0:e4d670b91a9a 651 break;
screamer 0:e4d670b91a9a 652 #if (HW_ADC_INSTANCE_COUNT > 2)
screamer 0:e4d670b91a9a 653 case 2:
screamer 0:e4d670b91a9a 654 retValue = (sim_pretrgsel_t)BR_SIM_SOPT7_ADC2PRETRGSEL(baseAddr);
screamer 0:e4d670b91a9a 655 break;
screamer 0:e4d670b91a9a 656 case 3:
screamer 0:e4d670b91a9a 657 retValue = (sim_pretrgsel_t)BR_SIM_SOPT7_ADC3PRETRGSEL(baseAddr);
screamer 0:e4d670b91a9a 658 break;
screamer 0:e4d670b91a9a 659 #endif
screamer 0:e4d670b91a9a 660 #endif
screamer 0:e4d670b91a9a 661 default:
screamer 0:e4d670b91a9a 662 break;
screamer 0:e4d670b91a9a 663 }
screamer 0:e4d670b91a9a 664
screamer 0:e4d670b91a9a 665 return retValue;
screamer 0:e4d670b91a9a 666 }
screamer 0:e4d670b91a9a 667
screamer 0:e4d670b91a9a 668 /*FUNCTION**********************************************************************
screamer 0:e4d670b91a9a 669 *
screamer 0:e4d670b91a9a 670 * Function Name : SIM_HAL_SetAdcTriggerMode
screamer 0:e4d670b91a9a 671 * Description : Set ADCx trigger select setting
screamer 0:e4d670b91a9a 672 * This function will select the ADCx trigger source when alternative triggers
screamer 0:e4d670b91a9a 673 * are enabled through ADCxALTTRGEN
screamer 0:e4d670b91a9a 674 *
screamer 0:e4d670b91a9a 675 *END**************************************************************************/
screamer 0:e4d670b91a9a 676 void SIM_HAL_SetAdcTriggerMode(uint32_t baseAddr, uint8_t instance, sim_trgsel_t select)
screamer 0:e4d670b91a9a 677 {
screamer 0:e4d670b91a9a 678 assert(instance < HW_ADC_INSTANCE_COUNT);
screamer 0:e4d670b91a9a 679
screamer 0:e4d670b91a9a 680 switch (instance)
screamer 0:e4d670b91a9a 681 {
screamer 0:e4d670b91a9a 682 case 0:
screamer 0:e4d670b91a9a 683 BW_SIM_SOPT7_ADC0TRGSEL(baseAddr, select);
screamer 0:e4d670b91a9a 684 break;
screamer 0:e4d670b91a9a 685 #if (HW_ADC_INSTANCE_COUNT > 1)
screamer 0:e4d670b91a9a 686 case 1:
screamer 0:e4d670b91a9a 687 BW_SIM_SOPT7_ADC1TRGSEL(baseAddr, select);
screamer 0:e4d670b91a9a 688 break;
screamer 0:e4d670b91a9a 689 #if (HW_ADC_INSTANCE_COUNT > 2)
screamer 0:e4d670b91a9a 690 case 2:
screamer 0:e4d670b91a9a 691 BW_SIM_SOPT7_ADC2TRGSEL(baseAddr, select);
screamer 0:e4d670b91a9a 692 break;
screamer 0:e4d670b91a9a 693 case 3:
screamer 0:e4d670b91a9a 694 BW_SIM_SOPT7_ADC3TRGSEL(baseAddr, select);
screamer 0:e4d670b91a9a 695 break;
screamer 0:e4d670b91a9a 696 #endif
screamer 0:e4d670b91a9a 697 #endif
screamer 0:e4d670b91a9a 698 default:
screamer 0:e4d670b91a9a 699 break;
screamer 0:e4d670b91a9a 700 }
screamer 0:e4d670b91a9a 701 }
screamer 0:e4d670b91a9a 702
screamer 0:e4d670b91a9a 703 /*FUNCTION**********************************************************************
screamer 0:e4d670b91a9a 704 *
screamer 0:e4d670b91a9a 705 * Function Name : SIM_HAL_GetAdcTriggerMode
screamer 0:e4d670b91a9a 706 * Description : Get ADCx trigger select setting
screamer 0:e4d670b91a9a 707 * This function will get ADCx trigger select setting.
screamer 0:e4d670b91a9a 708 *
screamer 0:e4d670b91a9a 709 *END**************************************************************************/
screamer 0:e4d670b91a9a 710 sim_pretrgsel_t SIM_HAL_GetAdcTriggerMode(uint32_t baseAddr, uint8_t instance)
screamer 0:e4d670b91a9a 711 {
screamer 0:e4d670b91a9a 712 sim_pretrgsel_t retValue =(sim_pretrgsel_t)0;
screamer 0:e4d670b91a9a 713
screamer 0:e4d670b91a9a 714 assert(instance < HW_ADC_INSTANCE_COUNT);
screamer 0:e4d670b91a9a 715
screamer 0:e4d670b91a9a 716 switch (instance)
screamer 0:e4d670b91a9a 717 {
screamer 0:e4d670b91a9a 718 case 0:
screamer 0:e4d670b91a9a 719 retValue = (sim_pretrgsel_t)BR_SIM_SOPT7_ADC0TRGSEL(baseAddr);
screamer 0:e4d670b91a9a 720 break;
screamer 0:e4d670b91a9a 721 #if (HW_ADC_INSTANCE_COUNT > 1)
screamer 0:e4d670b91a9a 722 case 1:
screamer 0:e4d670b91a9a 723 retValue = (sim_pretrgsel_t)BR_SIM_SOPT7_ADC1TRGSEL(baseAddr);
screamer 0:e4d670b91a9a 724 break;
screamer 0:e4d670b91a9a 725 #if (HW_ADC_INSTANCE_COUNT > 2)
screamer 0:e4d670b91a9a 726 case 2:
screamer 0:e4d670b91a9a 727 retValue = (sim_pretrgsel_t)BR_SIM_SOPT7_ADC2TRGSEL(baseAddr);
screamer 0:e4d670b91a9a 728 break;
screamer 0:e4d670b91a9a 729 case 3:
screamer 0:e4d670b91a9a 730 retValue = (sim_pretrgsel_t)BR_SIM_SOPT7_ADC3TRGSEL(baseAddr);
screamer 0:e4d670b91a9a 731 break;
screamer 0:e4d670b91a9a 732 #endif
screamer 0:e4d670b91a9a 733 #endif
screamer 0:e4d670b91a9a 734 default:
screamer 0:e4d670b91a9a 735 break;
screamer 0:e4d670b91a9a 736 }
screamer 0:e4d670b91a9a 737
screamer 0:e4d670b91a9a 738 return retValue;
screamer 0:e4d670b91a9a 739 }
screamer 0:e4d670b91a9a 740
screamer 0:e4d670b91a9a 741 /*FUNCTION**********************************************************************
screamer 0:e4d670b91a9a 742 *
screamer 0:e4d670b91a9a 743 * Function Name : SIM_HAL_SetUartRxSrcMode
screamer 0:e4d670b91a9a 744 * Description : Set UARTx receive data source select setting
screamer 0:e4d670b91a9a 745 * This function will select the source for the UART1 receive data.
screamer 0:e4d670b91a9a 746 *
screamer 0:e4d670b91a9a 747 *END**************************************************************************/
screamer 0:e4d670b91a9a 748 void SIM_HAL_SetUartRxSrcMode(uint32_t baseAddr, uint8_t instance, sim_uart_rxsrc_t select)
screamer 0:e4d670b91a9a 749 {
screamer 0:e4d670b91a9a 750 assert(instance < FSL_FEATURE_SIM_OPT_UART_COUNT);
screamer 0:e4d670b91a9a 751
screamer 0:e4d670b91a9a 752 switch (instance)
screamer 0:e4d670b91a9a 753 {
screamer 0:e4d670b91a9a 754 case 0:
screamer 0:e4d670b91a9a 755 BW_SIM_SOPT5_UART0RXSRC(baseAddr, select);
screamer 0:e4d670b91a9a 756 break;
screamer 0:e4d670b91a9a 757 case 1:
screamer 0:e4d670b91a9a 758 BW_SIM_SOPT5_UART1RXSRC(baseAddr, select);
screamer 0:e4d670b91a9a 759 break;
screamer 0:e4d670b91a9a 760 default:
screamer 0:e4d670b91a9a 761 break;
screamer 0:e4d670b91a9a 762 }
screamer 0:e4d670b91a9a 763 }
screamer 0:e4d670b91a9a 764
screamer 0:e4d670b91a9a 765 /*FUNCTION**********************************************************************
screamer 0:e4d670b91a9a 766 *
screamer 0:e4d670b91a9a 767 * Function Name : SIM_HAL_GetAdcPreTriggerMode
screamer 0:e4d670b91a9a 768 * Description : Get UARTx receive data source select setting
screamer 0:e4d670b91a9a 769 * This function will get UARTx receive data source select setting.
screamer 0:e4d670b91a9a 770 *
screamer 0:e4d670b91a9a 771 *END**************************************************************************/
screamer 0:e4d670b91a9a 772 sim_uart_rxsrc_t SIM_HAL_GetUartRxSrcMode(uint32_t baseAddr, uint8_t instance)
screamer 0:e4d670b91a9a 773 {
screamer 0:e4d670b91a9a 774 sim_uart_rxsrc_t retValue = (sim_uart_rxsrc_t)0;
screamer 0:e4d670b91a9a 775
screamer 0:e4d670b91a9a 776 assert(instance < FSL_FEATURE_SIM_OPT_UART_COUNT);
screamer 0:e4d670b91a9a 777
screamer 0:e4d670b91a9a 778 switch (instance)
screamer 0:e4d670b91a9a 779 {
screamer 0:e4d670b91a9a 780 case 0:
screamer 0:e4d670b91a9a 781 retValue = (sim_uart_rxsrc_t)BR_SIM_SOPT5_UART0RXSRC(baseAddr);
screamer 0:e4d670b91a9a 782 break;
screamer 0:e4d670b91a9a 783 case 1:
screamer 0:e4d670b91a9a 784 retValue = (sim_uart_rxsrc_t)BR_SIM_SOPT5_UART1RXSRC(baseAddr);
screamer 0:e4d670b91a9a 785 break;
screamer 0:e4d670b91a9a 786 default:
screamer 0:e4d670b91a9a 787 break;
screamer 0:e4d670b91a9a 788 }
screamer 0:e4d670b91a9a 789
screamer 0:e4d670b91a9a 790 return retValue;
screamer 0:e4d670b91a9a 791 }
screamer 0:e4d670b91a9a 792
screamer 0:e4d670b91a9a 793 /*FUNCTION**********************************************************************
screamer 0:e4d670b91a9a 794 *
screamer 0:e4d670b91a9a 795 * Function Name : SIM_HAL_SetUartTxSrcMode
screamer 0:e4d670b91a9a 796 * Description : Set UARTx transmit data source select setting
screamer 0:e4d670b91a9a 797 * This function will select the source for the UARTx transmit data.
screamer 0:e4d670b91a9a 798 *
screamer 0:e4d670b91a9a 799 *END**************************************************************************/
screamer 0:e4d670b91a9a 800 void SIM_HAL_SetUartTxSrcMode(uint32_t baseAddr, uint8_t instance, sim_uart_txsrc_t select)
screamer 0:e4d670b91a9a 801 {
screamer 0:e4d670b91a9a 802 assert(instance < FSL_FEATURE_SIM_OPT_UART_COUNT);
screamer 0:e4d670b91a9a 803
screamer 0:e4d670b91a9a 804 switch (instance)
screamer 0:e4d670b91a9a 805 {
screamer 0:e4d670b91a9a 806 case 0:
screamer 0:e4d670b91a9a 807 BW_SIM_SOPT5_UART0TXSRC(baseAddr, select);
screamer 0:e4d670b91a9a 808 break;
screamer 0:e4d670b91a9a 809 case 1:
screamer 0:e4d670b91a9a 810 BW_SIM_SOPT5_UART1TXSRC(baseAddr, select);
screamer 0:e4d670b91a9a 811 break;
screamer 0:e4d670b91a9a 812 default:
screamer 0:e4d670b91a9a 813 break;
screamer 0:e4d670b91a9a 814 }
screamer 0:e4d670b91a9a 815 }
screamer 0:e4d670b91a9a 816
screamer 0:e4d670b91a9a 817 /*FUNCTION**********************************************************************
screamer 0:e4d670b91a9a 818 *
screamer 0:e4d670b91a9a 819 * Function Name : SIM_HAL_GetUartTxSrcMode
screamer 0:e4d670b91a9a 820 * Description : Get UARTx transmit data source select setting
screamer 0:e4d670b91a9a 821 * This function will get UARTx transmit data source select setting.
screamer 0:e4d670b91a9a 822 *
screamer 0:e4d670b91a9a 823 *END**************************************************************************/
screamer 0:e4d670b91a9a 824 sim_uart_txsrc_t SIM_HAL_GetUartTxSrcMode(uint32_t baseAddr, uint8_t instance)
screamer 0:e4d670b91a9a 825 {
screamer 0:e4d670b91a9a 826 sim_uart_txsrc_t retValue =(sim_uart_txsrc_t)0;
screamer 0:e4d670b91a9a 827
screamer 0:e4d670b91a9a 828 assert(instance < FSL_FEATURE_SIM_OPT_UART_COUNT);
screamer 0:e4d670b91a9a 829
screamer 0:e4d670b91a9a 830 switch (instance)
screamer 0:e4d670b91a9a 831 {
screamer 0:e4d670b91a9a 832 case 0:
screamer 0:e4d670b91a9a 833 retValue = (sim_uart_txsrc_t)BR_SIM_SOPT5_UART0TXSRC(baseAddr);
screamer 0:e4d670b91a9a 834 break;
screamer 0:e4d670b91a9a 835 case 1:
screamer 0:e4d670b91a9a 836 retValue = (sim_uart_txsrc_t)BR_SIM_SOPT5_UART1TXSRC(baseAddr);
screamer 0:e4d670b91a9a 837 break;
screamer 0:e4d670b91a9a 838 default:
screamer 0:e4d670b91a9a 839 break;
screamer 0:e4d670b91a9a 840 }
screamer 0:e4d670b91a9a 841
screamer 0:e4d670b91a9a 842 return retValue;
screamer 0:e4d670b91a9a 843 }
screamer 0:e4d670b91a9a 844
screamer 0:e4d670b91a9a 845 #if FSL_FEATURE_SIM_OPT_HAS_ODE
screamer 0:e4d670b91a9a 846 /*FUNCTION**********************************************************************
screamer 0:e4d670b91a9a 847 *
screamer 0:e4d670b91a9a 848 * Function Name : SIM_HAL_SetUartOpenDrainCmd
screamer 0:e4d670b91a9a 849 * Description : Set UARTx Open Drain Enable setting
screamer 0:e4d670b91a9a 850 * This function will enable/disable the UARTx Open Drain.
screamer 0:e4d670b91a9a 851 *
screamer 0:e4d670b91a9a 852 *END**************************************************************************/
screamer 0:e4d670b91a9a 853 void SIM_HAL_SetUartOpenDrainCmd(uint32_t baseAddr, uint8_t instance, bool enable)
screamer 0:e4d670b91a9a 854 {
screamer 0:e4d670b91a9a 855 assert(instance < FSL_FEATURE_SIM_OPT_UART_COUNT);
screamer 0:e4d670b91a9a 856
screamer 0:e4d670b91a9a 857 switch (instance)
screamer 0:e4d670b91a9a 858 {
screamer 0:e4d670b91a9a 859 case 0:
screamer 0:e4d670b91a9a 860 BW_SIM_SOPT5_UART0ODE(baseAddr, enable ? 1 : 0);
screamer 0:e4d670b91a9a 861 break;
screamer 0:e4d670b91a9a 862 case 1:
screamer 0:e4d670b91a9a 863 BW_SIM_SOPT5_UART1ODE(baseAddr, enable ? 1 : 0);
screamer 0:e4d670b91a9a 864 break;
screamer 0:e4d670b91a9a 865 case 2:
screamer 0:e4d670b91a9a 866 BW_SIM_SOPT5_UART2ODE(baseAddr, enable ? 1 : 0);
screamer 0:e4d670b91a9a 867 break;
screamer 0:e4d670b91a9a 868 default:
screamer 0:e4d670b91a9a 869 break;
screamer 0:e4d670b91a9a 870 }
screamer 0:e4d670b91a9a 871 }
screamer 0:e4d670b91a9a 872
screamer 0:e4d670b91a9a 873 /*FUNCTION**********************************************************************
screamer 0:e4d670b91a9a 874 *
screamer 0:e4d670b91a9a 875 * Function Name : SIM_HAL_GetUartOpenDrainCmd
screamer 0:e4d670b91a9a 876 * Description : Get UARTx Open Drain Enable setting
screamer 0:e4d670b91a9a 877 * This function will get UARTx Open Drain Enable setting.
screamer 0:e4d670b91a9a 878 *
screamer 0:e4d670b91a9a 879 *END**************************************************************************/
screamer 0:e4d670b91a9a 880 bool SIM_HAL_GetUartOpenDrainCmd(uint32_t baseAddr, uint8_t instance)
screamer 0:e4d670b91a9a 881 {
screamer 0:e4d670b91a9a 882 bool retValue = false;
screamer 0:e4d670b91a9a 883
screamer 0:e4d670b91a9a 884 assert(instance < FSL_FEATURE_SIM_OPT_UART_COUNT);
screamer 0:e4d670b91a9a 885
screamer 0:e4d670b91a9a 886 switch (instance)
screamer 0:e4d670b91a9a 887 {
screamer 0:e4d670b91a9a 888 case 0:
screamer 0:e4d670b91a9a 889 retValue = BR_SIM_SOPT5_UART0ODE(baseAddr);
screamer 0:e4d670b91a9a 890 break;
screamer 0:e4d670b91a9a 891 case 1:
screamer 0:e4d670b91a9a 892 retValue = BR_SIM_SOPT5_UART1ODE(baseAddr);
screamer 0:e4d670b91a9a 893 break;
screamer 0:e4d670b91a9a 894 case 2:
screamer 0:e4d670b91a9a 895 retValue = BR_SIM_SOPT5_UART2ODE(baseAddr);
screamer 0:e4d670b91a9a 896 break;
screamer 0:e4d670b91a9a 897 default:
screamer 0:e4d670b91a9a 898 break;
screamer 0:e4d670b91a9a 899 }
screamer 0:e4d670b91a9a 900
screamer 0:e4d670b91a9a 901 return retValue;
screamer 0:e4d670b91a9a 902 }
screamer 0:e4d670b91a9a 903 #endif
screamer 0:e4d670b91a9a 904
screamer 0:e4d670b91a9a 905 #if FSL_FEATURE_SIM_OPT_HAS_FTM
screamer 0:e4d670b91a9a 906 /*FUNCTION**********************************************************************
screamer 0:e4d670b91a9a 907 *
screamer 0:e4d670b91a9a 908 * Function Name : SIM_HAL_SetFtmTriggerSrcMode
screamer 0:e4d670b91a9a 909 * Description : Set FlexTimer x hardware trigger y source select setting
screamer 0:e4d670b91a9a 910 * This function will select the source of FTMx hardware trigger y.
screamer 0:e4d670b91a9a 911 *
screamer 0:e4d670b91a9a 912 *END**************************************************************************/
screamer 0:e4d670b91a9a 913 void SIM_HAL_SetFtmTriggerSrcMode(uint32_t baseAddr,
screamer 0:e4d670b91a9a 914 uint8_t instance,
screamer 0:e4d670b91a9a 915 uint8_t trigger,
screamer 0:e4d670b91a9a 916 sim_ftm_trg_src_t select)
screamer 0:e4d670b91a9a 917 {
screamer 0:e4d670b91a9a 918 assert (instance < HW_FTM_INSTANCE_COUNT);
screamer 0:e4d670b91a9a 919 assert (trigger < FSL_FEATURE_SIM_OPT_FTM_TRIGGER_COUNT);
screamer 0:e4d670b91a9a 920
screamer 0:e4d670b91a9a 921 switch (instance)
screamer 0:e4d670b91a9a 922 {
screamer 0:e4d670b91a9a 923 #if FSL_FEATURE_SIM_OPT_HAS_FTM0_TRIGGER
screamer 0:e4d670b91a9a 924 case 0:
screamer 0:e4d670b91a9a 925 switch (trigger)
screamer 0:e4d670b91a9a 926 {
screamer 0:e4d670b91a9a 927 case 0:
screamer 0:e4d670b91a9a 928 BW_SIM_SOPT4_FTM0TRG0SRC(baseAddr, select);
screamer 0:e4d670b91a9a 929 break;
screamer 0:e4d670b91a9a 930 case 1:
screamer 0:e4d670b91a9a 931 BW_SIM_SOPT4_FTM0TRG1SRC(baseAddr, select);
screamer 0:e4d670b91a9a 932 break;
screamer 0:e4d670b91a9a 933 default:
screamer 0:e4d670b91a9a 934 break;
screamer 0:e4d670b91a9a 935 }
screamer 0:e4d670b91a9a 936 break;
screamer 0:e4d670b91a9a 937 #endif
screamer 0:e4d670b91a9a 938 #if FSL_FEATURE_SIM_OPT_HAS_FTM3_TRIGGER
screamer 0:e4d670b91a9a 939 case 3:
screamer 0:e4d670b91a9a 940 switch (trigger)
screamer 0:e4d670b91a9a 941 {
screamer 0:e4d670b91a9a 942 case 0:
screamer 0:e4d670b91a9a 943 BW_SIM_SOPT4_FTM3TRG0SRC(baseAddr, select);
screamer 0:e4d670b91a9a 944 break;
screamer 0:e4d670b91a9a 945 case 1:
screamer 0:e4d670b91a9a 946 BW_SIM_SOPT4_FTM3TRG1SRC(baseAddr, select);
screamer 0:e4d670b91a9a 947 break;
screamer 0:e4d670b91a9a 948 default:
screamer 0:e4d670b91a9a 949 break;
screamer 0:e4d670b91a9a 950 }
screamer 0:e4d670b91a9a 951 break;
screamer 0:e4d670b91a9a 952 #endif
screamer 0:e4d670b91a9a 953 default:
screamer 0:e4d670b91a9a 954 break;
screamer 0:e4d670b91a9a 955 }
screamer 0:e4d670b91a9a 956 }
screamer 0:e4d670b91a9a 957
screamer 0:e4d670b91a9a 958 /*FUNCTION**********************************************************************
screamer 0:e4d670b91a9a 959 *
screamer 0:e4d670b91a9a 960 * Function Name : SIM_HAL_GetFtmTriggerSrcMode
screamer 0:e4d670b91a9a 961 * Description : Get FlexTimer x hardware trigger y source select setting
screamer 0:e4d670b91a9a 962 * This function will get FlexTimer x hardware trigger y source select setting.
screamer 0:e4d670b91a9a 963 *
screamer 0:e4d670b91a9a 964 *END**************************************************************************/
screamer 0:e4d670b91a9a 965 sim_ftm_trg_src_t SIM_HAL_GetFtmTriggerSrcMode(uint32_t baseAddr, uint8_t instance, uint8_t trigger)
screamer 0:e4d670b91a9a 966 {
screamer 0:e4d670b91a9a 967 sim_ftm_trg_src_t retValue = (sim_ftm_trg_src_t)0;
screamer 0:e4d670b91a9a 968
screamer 0:e4d670b91a9a 969 assert (instance < HW_FTM_INSTANCE_COUNT);
screamer 0:e4d670b91a9a 970 assert (trigger < FSL_FEATURE_SIM_OPT_FTM_TRIGGER_COUNT);
screamer 0:e4d670b91a9a 971
screamer 0:e4d670b91a9a 972 switch (instance)
screamer 0:e4d670b91a9a 973 {
screamer 0:e4d670b91a9a 974 #if FSL_FEATURE_SIM_OPT_HAS_FTM0_TRIGGER
screamer 0:e4d670b91a9a 975 case 0:
screamer 0:e4d670b91a9a 976 switch (trigger)
screamer 0:e4d670b91a9a 977 {
screamer 0:e4d670b91a9a 978 case 0:
screamer 0:e4d670b91a9a 979 retValue = (sim_ftm_trg_src_t)BR_SIM_SOPT4_FTM0TRG0SRC(baseAddr);
screamer 0:e4d670b91a9a 980 break;
screamer 0:e4d670b91a9a 981 case 1:
screamer 0:e4d670b91a9a 982 retValue = (sim_ftm_trg_src_t)BR_SIM_SOPT4_FTM0TRG1SRC(baseAddr);
screamer 0:e4d670b91a9a 983 break;
screamer 0:e4d670b91a9a 984 default:
screamer 0:e4d670b91a9a 985 break;
screamer 0:e4d670b91a9a 986 }
screamer 0:e4d670b91a9a 987 break;
screamer 0:e4d670b91a9a 988 #endif
screamer 0:e4d670b91a9a 989 #if FSL_FEATURE_SIM_OPT_HAS_FTM3_TRIGGER
screamer 0:e4d670b91a9a 990 case 3:
screamer 0:e4d670b91a9a 991 switch (trigger)
screamer 0:e4d670b91a9a 992 {
screamer 0:e4d670b91a9a 993 case 0:
screamer 0:e4d670b91a9a 994 retValue = (sim_ftm_trg_src_t)BR_SIM_SOPT4_FTM3TRG0SRC(baseAddr);
screamer 0:e4d670b91a9a 995 break;
screamer 0:e4d670b91a9a 996 case 1:
screamer 0:e4d670b91a9a 997 retValue = (sim_ftm_trg_src_t)BR_SIM_SOPT4_FTM3TRG1SRC(baseAddr);
screamer 0:e4d670b91a9a 998 break;
screamer 0:e4d670b91a9a 999 default:
screamer 0:e4d670b91a9a 1000 break;
screamer 0:e4d670b91a9a 1001 }
screamer 0:e4d670b91a9a 1002 break;
screamer 0:e4d670b91a9a 1003 #endif
screamer 0:e4d670b91a9a 1004 default:
screamer 0:e4d670b91a9a 1005 break;
screamer 0:e4d670b91a9a 1006 }
screamer 0:e4d670b91a9a 1007
screamer 0:e4d670b91a9a 1008 return retValue;
screamer 0:e4d670b91a9a 1009 }
screamer 0:e4d670b91a9a 1010
screamer 0:e4d670b91a9a 1011 /*FUNCTION**********************************************************************
screamer 0:e4d670b91a9a 1012 *
screamer 0:e4d670b91a9a 1013 * Function Name : SIM_HAL_SetFtmExternalClkPinMode
screamer 0:e4d670b91a9a 1014 * Description : Set FlexTimer x external clock pin select setting
screamer 0:e4d670b91a9a 1015 * This function will select the source of FTMx external clock pin select
screamer 0:e4d670b91a9a 1016 *
screamer 0:e4d670b91a9a 1017 *END**************************************************************************/
screamer 0:e4d670b91a9a 1018 void SIM_HAL_SetFtmExternalClkPinMode(uint32_t baseAddr, uint8_t instance, sim_ftm_clk_sel_t select)
screamer 0:e4d670b91a9a 1019 {
screamer 0:e4d670b91a9a 1020 assert (instance < HW_FTM_INSTANCE_COUNT);
screamer 0:e4d670b91a9a 1021
screamer 0:e4d670b91a9a 1022 switch (instance)
screamer 0:e4d670b91a9a 1023 {
screamer 0:e4d670b91a9a 1024 case 0:
screamer 0:e4d670b91a9a 1025 BW_SIM_SOPT4_FTM0CLKSEL(baseAddr, select);
screamer 0:e4d670b91a9a 1026 break;
screamer 0:e4d670b91a9a 1027 case 1:
screamer 0:e4d670b91a9a 1028 BW_SIM_SOPT4_FTM1CLKSEL(baseAddr, select);
screamer 0:e4d670b91a9a 1029 break;
screamer 0:e4d670b91a9a 1030 case 2:
screamer 0:e4d670b91a9a 1031 BW_SIM_SOPT4_FTM2CLKSEL(baseAddr, select);
screamer 0:e4d670b91a9a 1032 break;
screamer 0:e4d670b91a9a 1033 #if (HW_FTM_INSTANCE_COUNT > 3)
screamer 0:e4d670b91a9a 1034 case 3:
screamer 0:e4d670b91a9a 1035 BW_SIM_SOPT4_FTM3CLKSEL(baseAddr, select);
screamer 0:e4d670b91a9a 1036 break;
screamer 0:e4d670b91a9a 1037 #endif
screamer 0:e4d670b91a9a 1038 default:
screamer 0:e4d670b91a9a 1039 break;
screamer 0:e4d670b91a9a 1040 }
screamer 0:e4d670b91a9a 1041 }
screamer 0:e4d670b91a9a 1042
screamer 0:e4d670b91a9a 1043 /*FUNCTION**********************************************************************
screamer 0:e4d670b91a9a 1044 *
screamer 0:e4d670b91a9a 1045 * Function Name : SIM_HAL_GetFtmExternalClkPinMode
screamer 0:e4d670b91a9a 1046 * Description : Get FlexTimer x external clock pin select setting
screamer 0:e4d670b91a9a 1047 * This function will get FlexTimer x external clock pin select setting.
screamer 0:e4d670b91a9a 1048 *
screamer 0:e4d670b91a9a 1049 *END**************************************************************************/
screamer 0:e4d670b91a9a 1050 sim_ftm_clk_sel_t SIM_HAL_GetFtmExternalClkPinMode(uint32_t baseAddr, uint8_t instance)
screamer 0:e4d670b91a9a 1051 {
screamer 0:e4d670b91a9a 1052 sim_ftm_clk_sel_t retValue = (sim_ftm_clk_sel_t)0;
screamer 0:e4d670b91a9a 1053
screamer 0:e4d670b91a9a 1054 assert (instance < HW_FTM_INSTANCE_COUNT);
screamer 0:e4d670b91a9a 1055
screamer 0:e4d670b91a9a 1056 switch (instance)
screamer 0:e4d670b91a9a 1057 {
screamer 0:e4d670b91a9a 1058 case 0:
screamer 0:e4d670b91a9a 1059 retValue = (sim_ftm_clk_sel_t)BR_SIM_SOPT4_FTM0CLKSEL(baseAddr);
screamer 0:e4d670b91a9a 1060 break;
screamer 0:e4d670b91a9a 1061 case 1:
screamer 0:e4d670b91a9a 1062 retValue = (sim_ftm_clk_sel_t)BR_SIM_SOPT4_FTM1CLKSEL(baseAddr);
screamer 0:e4d670b91a9a 1063 break;
screamer 0:e4d670b91a9a 1064 case 2:
screamer 0:e4d670b91a9a 1065 retValue = (sim_ftm_clk_sel_t)BR_SIM_SOPT4_FTM2CLKSEL(baseAddr);
screamer 0:e4d670b91a9a 1066 break;
screamer 0:e4d670b91a9a 1067 #if (HW_FTM_INSTANCE_COUNT > 3)
screamer 0:e4d670b91a9a 1068 case 3:
screamer 0:e4d670b91a9a 1069 retValue = (sim_ftm_clk_sel_t)BR_SIM_SOPT4_FTM3CLKSEL(baseAddr);
screamer 0:e4d670b91a9a 1070 break;
screamer 0:e4d670b91a9a 1071 #endif
screamer 0:e4d670b91a9a 1072 default:
screamer 0:e4d670b91a9a 1073 break;
screamer 0:e4d670b91a9a 1074 }
screamer 0:e4d670b91a9a 1075
screamer 0:e4d670b91a9a 1076 return retValue;
screamer 0:e4d670b91a9a 1077 }
screamer 0:e4d670b91a9a 1078
screamer 0:e4d670b91a9a 1079 /*FUNCTION**********************************************************************
screamer 0:e4d670b91a9a 1080 *
screamer 0:e4d670b91a9a 1081 * Function Name : SIM_HAL_SetFtmChSrcMode
screamer 0:e4d670b91a9a 1082 * Description : FlexTimer x channel y input capture source select setting
screamer 0:e4d670b91a9a 1083 * This function will select FlexTimer x channel y input capture source
screamer 0:e4d670b91a9a 1084 *
screamer 0:e4d670b91a9a 1085 *END**************************************************************************/
screamer 0:e4d670b91a9a 1086 void SIM_HAL_SetFtmChSrcMode(uint32_t baseAddr,
screamer 0:e4d670b91a9a 1087 uint8_t instance,
screamer 0:e4d670b91a9a 1088 uint8_t channel,
screamer 0:e4d670b91a9a 1089 sim_ftm_ch_src_t select)
screamer 0:e4d670b91a9a 1090 {
screamer 0:e4d670b91a9a 1091 assert (instance < HW_FTM_INSTANCE_COUNT);
screamer 0:e4d670b91a9a 1092
screamer 0:e4d670b91a9a 1093 switch (instance)
screamer 0:e4d670b91a9a 1094 {
screamer 0:e4d670b91a9a 1095 #if FSL_FEATURE_SIM_OPT_HAS_FTM1_CHANNELS
screamer 0:e4d670b91a9a 1096 case 1:
screamer 0:e4d670b91a9a 1097 switch (channel)
screamer 0:e4d670b91a9a 1098 {
screamer 0:e4d670b91a9a 1099 case 0:
screamer 0:e4d670b91a9a 1100 BW_SIM_SOPT4_FTM1CH0SRC(baseAddr, select);
screamer 0:e4d670b91a9a 1101 break;
screamer 0:e4d670b91a9a 1102 default:
screamer 0:e4d670b91a9a 1103 break;
screamer 0:e4d670b91a9a 1104 }
screamer 0:e4d670b91a9a 1105 break;
screamer 0:e4d670b91a9a 1106 #endif
screamer 0:e4d670b91a9a 1107 #if FSL_FEATURE_SIM_OPT_HAS_FTM2_CHANNELS
screamer 0:e4d670b91a9a 1108 case 2:
screamer 0:e4d670b91a9a 1109 switch (channel)
screamer 0:e4d670b91a9a 1110 {
screamer 0:e4d670b91a9a 1111 case 0:
screamer 0:e4d670b91a9a 1112 BW_SIM_SOPT4_FTM2CH0SRC(baseAddr, select);
screamer 0:e4d670b91a9a 1113 break;
screamer 0:e4d670b91a9a 1114 #if FSL_FEATURE_SIM_OPT_HAS_FTM2_CHANNEL1
screamer 0:e4d670b91a9a 1115 case 1:
screamer 0:e4d670b91a9a 1116 BW_SIM_SOPT4_FTM2CH1SRC(baseAddr, select);
screamer 0:e4d670b91a9a 1117 break;
screamer 0:e4d670b91a9a 1118 #endif
screamer 0:e4d670b91a9a 1119 default:
screamer 0:e4d670b91a9a 1120 break;
screamer 0:e4d670b91a9a 1121 }
screamer 0:e4d670b91a9a 1122 break;
screamer 0:e4d670b91a9a 1123 #endif
screamer 0:e4d670b91a9a 1124 #if FSL_FEATURE_SIM_OPT_HAS_FTM3_CHANNELS
screamer 0:e4d670b91a9a 1125 case 3:
screamer 0:e4d670b91a9a 1126 switch (channel)
screamer 0:e4d670b91a9a 1127 {
screamer 0:e4d670b91a9a 1128 case 0:
screamer 0:e4d670b91a9a 1129 BW_SIM_SOPT4_FTM3CH0SRC(baseAddr, select);
screamer 0:e4d670b91a9a 1130 break;
screamer 0:e4d670b91a9a 1131 default:
screamer 0:e4d670b91a9a 1132 break;
screamer 0:e4d670b91a9a 1133 }
screamer 0:e4d670b91a9a 1134 break;
screamer 0:e4d670b91a9a 1135 #endif
screamer 0:e4d670b91a9a 1136 default:
screamer 0:e4d670b91a9a 1137 break;
screamer 0:e4d670b91a9a 1138 }
screamer 0:e4d670b91a9a 1139 }
screamer 0:e4d670b91a9a 1140
screamer 0:e4d670b91a9a 1141 /*FUNCTION**********************************************************************
screamer 0:e4d670b91a9a 1142 *
screamer 0:e4d670b91a9a 1143 * Function Name : SIM_HAL_GetFtmChSrcMode
screamer 0:e4d670b91a9a 1144 * Description : Get FlexTimer x channel y input capture source select setting
screamer 0:e4d670b91a9a 1145 * This function will get FlexTimer x channel y input capture source select
screamer 0:e4d670b91a9a 1146 * setting.
screamer 0:e4d670b91a9a 1147 *
screamer 0:e4d670b91a9a 1148 *END**************************************************************************/
screamer 0:e4d670b91a9a 1149 sim_ftm_ch_src_t SIM_HAL_GetFtmChSrcMode(uint32_t baseAddr, uint8_t instance, uint8_t channel)
screamer 0:e4d670b91a9a 1150 {
screamer 0:e4d670b91a9a 1151 sim_ftm_ch_src_t retValue = (sim_ftm_ch_src_t)0;
screamer 0:e4d670b91a9a 1152
screamer 0:e4d670b91a9a 1153 assert (instance < HW_FTM_INSTANCE_COUNT);
screamer 0:e4d670b91a9a 1154
screamer 0:e4d670b91a9a 1155 switch (instance)
screamer 0:e4d670b91a9a 1156 {
screamer 0:e4d670b91a9a 1157 #if FSL_FEATURE_SIM_OPT_HAS_FTM1_CHANNELS
screamer 0:e4d670b91a9a 1158 case 1:
screamer 0:e4d670b91a9a 1159 switch (channel)
screamer 0:e4d670b91a9a 1160 {
screamer 0:e4d670b91a9a 1161 case 0:
screamer 0:e4d670b91a9a 1162 retValue = (sim_ftm_ch_src_t)BR_SIM_SOPT4_FTM1CH0SRC(baseAddr);
screamer 0:e4d670b91a9a 1163 break;
screamer 0:e4d670b91a9a 1164 default:
screamer 0:e4d670b91a9a 1165 break;
screamer 0:e4d670b91a9a 1166 }
screamer 0:e4d670b91a9a 1167 break;
screamer 0:e4d670b91a9a 1168 #endif
screamer 0:e4d670b91a9a 1169 #if FSL_FEATURE_SIM_OPT_HAS_FTM2_CHANNELS
screamer 0:e4d670b91a9a 1170 case 2:
screamer 0:e4d670b91a9a 1171 switch (channel)
screamer 0:e4d670b91a9a 1172 {
screamer 0:e4d670b91a9a 1173 case 0:
screamer 0:e4d670b91a9a 1174 retValue = (sim_ftm_ch_src_t)BR_SIM_SOPT4_FTM2CH0SRC(baseAddr);
screamer 0:e4d670b91a9a 1175 break;
screamer 0:e4d670b91a9a 1176 #if FSL_FEATURE_SIM_OPT_HAS_FTM2_CHANNEL1
screamer 0:e4d670b91a9a 1177 case 1:
screamer 0:e4d670b91a9a 1178 retValue = (sim_ftm_ch_src_t)BR_SIM_SOPT4_FTM2CH1SRC(baseAddr);
screamer 0:e4d670b91a9a 1179 break;
screamer 0:e4d670b91a9a 1180 #endif
screamer 0:e4d670b91a9a 1181 default:
screamer 0:e4d670b91a9a 1182 break;
screamer 0:e4d670b91a9a 1183 }
screamer 0:e4d670b91a9a 1184 break;
screamer 0:e4d670b91a9a 1185 #endif
screamer 0:e4d670b91a9a 1186 #if FSL_FEATURE_SIM_OPT_HAS_FTM3_CHANNELS
screamer 0:e4d670b91a9a 1187 case 3:
screamer 0:e4d670b91a9a 1188 switch (channel)
screamer 0:e4d670b91a9a 1189 {
screamer 0:e4d670b91a9a 1190 case 0:
screamer 0:e4d670b91a9a 1191 retValue = (sim_ftm_ch_src_t)BR_SIM_SOPT4_FTM3CH0SRC(baseAddr);
screamer 0:e4d670b91a9a 1192 break;
screamer 0:e4d670b91a9a 1193 default:
screamer 0:e4d670b91a9a 1194 break;
screamer 0:e4d670b91a9a 1195 }
screamer 0:e4d670b91a9a 1196 break;
screamer 0:e4d670b91a9a 1197 #endif
screamer 0:e4d670b91a9a 1198 default:
screamer 0:e4d670b91a9a 1199 break;
screamer 0:e4d670b91a9a 1200 }
screamer 0:e4d670b91a9a 1201
screamer 0:e4d670b91a9a 1202 return retValue;
screamer 0:e4d670b91a9a 1203 }
screamer 0:e4d670b91a9a 1204
screamer 0:e4d670b91a9a 1205 /*FUNCTION**********************************************************************
screamer 0:e4d670b91a9a 1206 *
screamer 0:e4d670b91a9a 1207 * Function Name : SIM_HAL_SetFtmFaultSelMode
screamer 0:e4d670b91a9a 1208 * Description : Set FlexTimer x fault y select setting
screamer 0:e4d670b91a9a 1209 * This function will set the FlexTimer x fault y select setting.
screamer 0:e4d670b91a9a 1210 *
screamer 0:e4d670b91a9a 1211 *END**************************************************************************/
screamer 0:e4d670b91a9a 1212 void SIM_HAL_SetFtmFaultSelMode(uint32_t baseAddr,
screamer 0:e4d670b91a9a 1213 uint8_t instance,
screamer 0:e4d670b91a9a 1214 uint8_t fault,
screamer 0:e4d670b91a9a 1215 sim_ftm_flt_sel_t select)
screamer 0:e4d670b91a9a 1216 {
screamer 0:e4d670b91a9a 1217 assert (instance < HW_FTM_INSTANCE_COUNT);
screamer 0:e4d670b91a9a 1218
screamer 0:e4d670b91a9a 1219 switch (instance)
screamer 0:e4d670b91a9a 1220 {
screamer 0:e4d670b91a9a 1221 case 0:
screamer 0:e4d670b91a9a 1222 switch (fault)
screamer 0:e4d670b91a9a 1223 {
screamer 0:e4d670b91a9a 1224 case 0:
screamer 0:e4d670b91a9a 1225 BW_SIM_SOPT4_FTM0FLT0(baseAddr, select);
screamer 0:e4d670b91a9a 1226 break;
screamer 0:e4d670b91a9a 1227 case 1:
screamer 0:e4d670b91a9a 1228 BW_SIM_SOPT4_FTM0FLT1(baseAddr, select);
screamer 0:e4d670b91a9a 1229 break;
screamer 0:e4d670b91a9a 1230 #if (FSL_FEATURE_SIM_OPT_FTM0_FAULT_COUNT > 2)
screamer 0:e4d670b91a9a 1231 case 2:
screamer 0:e4d670b91a9a 1232 BW_SIM_SOPT4_FTM0FLT2(baseAddr, select);
screamer 0:e4d670b91a9a 1233 break;
screamer 0:e4d670b91a9a 1234 #if (FSL_FEATURE_SIM_OPT_FTM0_FAULT_COUNT > 3)
screamer 0:e4d670b91a9a 1235 case 3:
screamer 0:e4d670b91a9a 1236 BW_SIM_SOPT4_FTM0FLT3(baseAddr, select);
screamer 0:e4d670b91a9a 1237 break;
screamer 0:e4d670b91a9a 1238 #endif
screamer 0:e4d670b91a9a 1239 #endif
screamer 0:e4d670b91a9a 1240 default:
screamer 0:e4d670b91a9a 1241 break;
screamer 0:e4d670b91a9a 1242 }
screamer 0:e4d670b91a9a 1243 break;
screamer 0:e4d670b91a9a 1244 case 1:
screamer 0:e4d670b91a9a 1245 BW_SIM_SOPT4_FTM1FLT0(baseAddr, select);
screamer 0:e4d670b91a9a 1246 break;
screamer 0:e4d670b91a9a 1247 case 2:
screamer 0:e4d670b91a9a 1248 BW_SIM_SOPT4_FTM2FLT0(baseAddr, select);
screamer 0:e4d670b91a9a 1249 break;
screamer 0:e4d670b91a9a 1250 #if (HW_FTM_INSTANCE_COUNT > 3)
screamer 0:e4d670b91a9a 1251 case 3:
screamer 0:e4d670b91a9a 1252 BW_SIM_SOPT4_FTM3FLT0(baseAddr, select);
screamer 0:e4d670b91a9a 1253 break;
screamer 0:e4d670b91a9a 1254 #endif
screamer 0:e4d670b91a9a 1255 default:
screamer 0:e4d670b91a9a 1256 break;
screamer 0:e4d670b91a9a 1257 }
screamer 0:e4d670b91a9a 1258 }
screamer 0:e4d670b91a9a 1259
screamer 0:e4d670b91a9a 1260 /*FUNCTION**********************************************************************
screamer 0:e4d670b91a9a 1261 *
screamer 0:e4d670b91a9a 1262 * Function Name : SIM_HAL_GetFtmFaultSelMode
screamer 0:e4d670b91a9a 1263 * Description : Get FlexTimer x fault y select setting
screamer 0:e4d670b91a9a 1264 * This function will get FlexTimer x fault y select setting.
screamer 0:e4d670b91a9a 1265 *
screamer 0:e4d670b91a9a 1266 *END**************************************************************************/
screamer 0:e4d670b91a9a 1267 sim_ftm_flt_sel_t SIM_HAL_GetFtmFaultSelMode(uint32_t baseAddr, uint8_t instance, uint8_t fault)
screamer 0:e4d670b91a9a 1268 {
screamer 0:e4d670b91a9a 1269 sim_ftm_flt_sel_t retValue = (sim_ftm_flt_sel_t)0;
screamer 0:e4d670b91a9a 1270
screamer 0:e4d670b91a9a 1271 assert (instance < HW_FTM_INSTANCE_COUNT);
screamer 0:e4d670b91a9a 1272
screamer 0:e4d670b91a9a 1273 switch (instance)
screamer 0:e4d670b91a9a 1274 {
screamer 0:e4d670b91a9a 1275 case 0:
screamer 0:e4d670b91a9a 1276 switch (fault)
screamer 0:e4d670b91a9a 1277 {
screamer 0:e4d670b91a9a 1278 case 0:
screamer 0:e4d670b91a9a 1279 retValue = (sim_ftm_flt_sel_t)BR_SIM_SOPT4_FTM0FLT0(baseAddr);
screamer 0:e4d670b91a9a 1280 break;
screamer 0:e4d670b91a9a 1281 case 1:
screamer 0:e4d670b91a9a 1282 retValue = (sim_ftm_flt_sel_t)BR_SIM_SOPT4_FTM0FLT1(baseAddr);
screamer 0:e4d670b91a9a 1283 break;
screamer 0:e4d670b91a9a 1284 #if (FSL_FEATURE_SIM_OPT_FTM0_FAULT_COUNT > 2)
screamer 0:e4d670b91a9a 1285 case 2:
screamer 0:e4d670b91a9a 1286 retValue = (sim_ftm_flt_sel_t)BR_SIM_SOPT4_FTM0FLT2(baseAddr);
screamer 0:e4d670b91a9a 1287 break;
screamer 0:e4d670b91a9a 1288 #if (FSL_FEATURE_SIM_OPT_FTM0_FAULT_COUNT > 3)
screamer 0:e4d670b91a9a 1289 case 3:
screamer 0:e4d670b91a9a 1290 retValue = (sim_ftm_flt_sel_t)BR_SIM_SOPT4_FTM0FLT3(baseAddr);
screamer 0:e4d670b91a9a 1291 break;
screamer 0:e4d670b91a9a 1292 #endif
screamer 0:e4d670b91a9a 1293 #endif
screamer 0:e4d670b91a9a 1294 default:
screamer 0:e4d670b91a9a 1295 break;
screamer 0:e4d670b91a9a 1296 }
screamer 0:e4d670b91a9a 1297 break;
screamer 0:e4d670b91a9a 1298 case 1:
screamer 0:e4d670b91a9a 1299 retValue = (sim_ftm_flt_sel_t)BR_SIM_SOPT4_FTM1FLT0(baseAddr);
screamer 0:e4d670b91a9a 1300 break;
screamer 0:e4d670b91a9a 1301 case 2:
screamer 0:e4d670b91a9a 1302 retValue = (sim_ftm_flt_sel_t)BR_SIM_SOPT4_FTM2FLT0(baseAddr);
screamer 0:e4d670b91a9a 1303 break;
screamer 0:e4d670b91a9a 1304 #if (HW_FTM_INSTANCE_COUNT > 3)
screamer 0:e4d670b91a9a 1305 case 3:
screamer 0:e4d670b91a9a 1306 retValue = (sim_ftm_flt_sel_t)BR_SIM_SOPT4_FTM3FLT0(baseAddr);
screamer 0:e4d670b91a9a 1307 break;
screamer 0:e4d670b91a9a 1308 #endif
screamer 0:e4d670b91a9a 1309 default:
screamer 0:e4d670b91a9a 1310 break;
screamer 0:e4d670b91a9a 1311 }
screamer 0:e4d670b91a9a 1312
screamer 0:e4d670b91a9a 1313 return retValue;
screamer 0:e4d670b91a9a 1314 }
screamer 0:e4d670b91a9a 1315 #endif
screamer 0:e4d670b91a9a 1316
screamer 0:e4d670b91a9a 1317 #if FSL_FEATURE_SIM_OPT_HAS_TPM
screamer 0:e4d670b91a9a 1318 /*FUNCTION**********************************************************************
screamer 0:e4d670b91a9a 1319 *
screamer 0:e4d670b91a9a 1320 * Function Name : SIM_HAL_SetTpmExternalClkPinSelMode
screamer 0:e4d670b91a9a 1321 * Description : Set Timer/PWM x external clock pin select setting
screamer 0:e4d670b91a9a 1322 * This function will select the source of Timer/PWM x external clock pin select
screamer 0:e4d670b91a9a 1323 *
screamer 0:e4d670b91a9a 1324 *END**************************************************************************/
screamer 0:e4d670b91a9a 1325 void SIM_HAL_SetTpmExternalClkPinSelMode(uint32_t baseAddr,
screamer 0:e4d670b91a9a 1326 uint8_t instance,
screamer 0:e4d670b91a9a 1327 sim_tpm_clk_sel_t select)
screamer 0:e4d670b91a9a 1328 {
screamer 0:e4d670b91a9a 1329 assert (instance < HW_TPM_INSTANCE_COUNT);
screamer 0:e4d670b91a9a 1330
screamer 0:e4d670b91a9a 1331 switch (instance)
screamer 0:e4d670b91a9a 1332 {
screamer 0:e4d670b91a9a 1333 case 0:
screamer 0:e4d670b91a9a 1334 BW_SIM_SOPT4_TPM0CLKSEL(baseAddr, select);
screamer 0:e4d670b91a9a 1335 break;
screamer 0:e4d670b91a9a 1336 case 1:
screamer 0:e4d670b91a9a 1337 BW_SIM_SOPT4_TPM1CLKSEL(baseAddr, select);
screamer 0:e4d670b91a9a 1338 break;
screamer 0:e4d670b91a9a 1339 case 2:
screamer 0:e4d670b91a9a 1340 BW_SIM_SOPT4_TPM2CLKSEL(baseAddr, select);
screamer 0:e4d670b91a9a 1341 break;
screamer 0:e4d670b91a9a 1342 default:
screamer 0:e4d670b91a9a 1343 break;
screamer 0:e4d670b91a9a 1344 }
screamer 0:e4d670b91a9a 1345 }
screamer 0:e4d670b91a9a 1346
screamer 0:e4d670b91a9a 1347 /*FUNCTION**********************************************************************
screamer 0:e4d670b91a9a 1348 *
screamer 0:e4d670b91a9a 1349 * Function Name : SIM_HAL_GetTpmExternalClkPinSelMode
screamer 0:e4d670b91a9a 1350 * Description : Get Timer/PWM x external clock pin select setting
screamer 0:e4d670b91a9a 1351 * This function will get Timer/PWM x external clock pin select setting.
screamer 0:e4d670b91a9a 1352 *
screamer 0:e4d670b91a9a 1353 *END**************************************************************************/
screamer 0:e4d670b91a9a 1354 sim_tpm_clk_sel_t SIM_HAL_GetTpmExternalClkPinSelMode(uint32_t baseAddr, uint8_t instance)
screamer 0:e4d670b91a9a 1355 {
screamer 0:e4d670b91a9a 1356 sim_tpm_clk_sel_t retValue = (sim_tpm_clk_sel_t)0;
screamer 0:e4d670b91a9a 1357
screamer 0:e4d670b91a9a 1358 assert (instance < HW_TPM_INSTANCE_COUNT);
screamer 0:e4d670b91a9a 1359
screamer 0:e4d670b91a9a 1360 switch (instance)
screamer 0:e4d670b91a9a 1361 {
screamer 0:e4d670b91a9a 1362 case 0:
screamer 0:e4d670b91a9a 1363 retValue = (sim_tpm_clk_sel_t)BR_SIM_SOPT4_TPM0CLKSEL(baseAddr);
screamer 0:e4d670b91a9a 1364 break;
screamer 0:e4d670b91a9a 1365 case 1:
screamer 0:e4d670b91a9a 1366 retValue = (sim_tpm_clk_sel_t)BR_SIM_SOPT4_TPM1CLKSEL(baseAddr);
screamer 0:e4d670b91a9a 1367 break;
screamer 0:e4d670b91a9a 1368 case 2:
screamer 0:e4d670b91a9a 1369 retValue = (sim_tpm_clk_sel_t)BR_SIM_SOPT4_TPM2CLKSEL(baseAddr);
screamer 0:e4d670b91a9a 1370 break;
screamer 0:e4d670b91a9a 1371 default:
screamer 0:e4d670b91a9a 1372 break;
screamer 0:e4d670b91a9a 1373 }
screamer 0:e4d670b91a9a 1374
screamer 0:e4d670b91a9a 1375 return retValue;
screamer 0:e4d670b91a9a 1376 }
screamer 0:e4d670b91a9a 1377
screamer 0:e4d670b91a9a 1378 /*FUNCTION**********************************************************************
screamer 0:e4d670b91a9a 1379 *
screamer 0:e4d670b91a9a 1380 * Function Name : SIM_HAL_SetTpmChSrcMode
screamer 0:e4d670b91a9a 1381 * Description : Timer/PWM x channel y input capture source select setting
screamer 0:e4d670b91a9a 1382 * This function will select Timer/PWM x channel y input capture source
screamer 0:e4d670b91a9a 1383 *
screamer 0:e4d670b91a9a 1384 *END**************************************************************************/
screamer 0:e4d670b91a9a 1385 void SIM_HAL_SetTpmChSrcMode(uint32_t baseAddr,
screamer 0:e4d670b91a9a 1386 uint8_t instance,
screamer 0:e4d670b91a9a 1387 uint8_t channel,
screamer 0:e4d670b91a9a 1388 sim_tpm_ch_src_t select)
screamer 0:e4d670b91a9a 1389 {
screamer 0:e4d670b91a9a 1390 assert (instance < HW_TPM_INSTANCE_COUNT);
screamer 0:e4d670b91a9a 1391
screamer 0:e4d670b91a9a 1392 switch (instance)
screamer 0:e4d670b91a9a 1393 {
screamer 0:e4d670b91a9a 1394 case 1:
screamer 0:e4d670b91a9a 1395 switch (channel)
screamer 0:e4d670b91a9a 1396 {
screamer 0:e4d670b91a9a 1397 case 0:
screamer 0:e4d670b91a9a 1398 BW_SIM_SOPT4_TPM1CH0SRC(baseAddr, select);
screamer 0:e4d670b91a9a 1399 break;
screamer 0:e4d670b91a9a 1400 default:
screamer 0:e4d670b91a9a 1401 break;
screamer 0:e4d670b91a9a 1402 }
screamer 0:e4d670b91a9a 1403 break;
screamer 0:e4d670b91a9a 1404 case 2:
screamer 0:e4d670b91a9a 1405 switch (channel)
screamer 0:e4d670b91a9a 1406 {
screamer 0:e4d670b91a9a 1407 case 0:
screamer 0:e4d670b91a9a 1408 BW_SIM_SOPT4_TPM2CH0SRC(baseAddr, select);
screamer 0:e4d670b91a9a 1409 break;
screamer 0:e4d670b91a9a 1410 default:
screamer 0:e4d670b91a9a 1411 break;
screamer 0:e4d670b91a9a 1412 }
screamer 0:e4d670b91a9a 1413 break;
screamer 0:e4d670b91a9a 1414 default:
screamer 0:e4d670b91a9a 1415 break;
screamer 0:e4d670b91a9a 1416 }
screamer 0:e4d670b91a9a 1417 }
screamer 0:e4d670b91a9a 1418
screamer 0:e4d670b91a9a 1419 /*FUNCTION**********************************************************************
screamer 0:e4d670b91a9a 1420 *
screamer 0:e4d670b91a9a 1421 * Function Name : SIM_HAL_GetTpmChSrcMode
screamer 0:e4d670b91a9a 1422 * Description : Get Timer/PWM x channel y input capture source select setting
screamer 0:e4d670b91a9a 1423 * This function will get Timer/PWM x channel y input capture source select
screamer 0:e4d670b91a9a 1424 * setting.
screamer 0:e4d670b91a9a 1425 *
screamer 0:e4d670b91a9a 1426 *END**************************************************************************/
screamer 0:e4d670b91a9a 1427 sim_tpm_ch_src_t SIM_HAL_GetTpmChSrcMode(uint32_t baseAddr,
screamer 0:e4d670b91a9a 1428 uint8_t instance,
screamer 0:e4d670b91a9a 1429 uint8_t channel)
screamer 0:e4d670b91a9a 1430 {
screamer 0:e4d670b91a9a 1431 sim_tpm_ch_src_t retValue = (sim_tpm_ch_src_t)0;
screamer 0:e4d670b91a9a 1432
screamer 0:e4d670b91a9a 1433 assert (instance < HW_TPM_INSTANCE_COUNT);
screamer 0:e4d670b91a9a 1434
screamer 0:e4d670b91a9a 1435 switch (instance)
screamer 0:e4d670b91a9a 1436 {
screamer 0:e4d670b91a9a 1437 case 1:
screamer 0:e4d670b91a9a 1438 switch (channel)
screamer 0:e4d670b91a9a 1439 {
screamer 0:e4d670b91a9a 1440 case 0:
screamer 0:e4d670b91a9a 1441 retValue = (sim_tpm_ch_src_t)BR_SIM_SOPT4_TPM1CH0SRC(baseAddr);
screamer 0:e4d670b91a9a 1442 break;
screamer 0:e4d670b91a9a 1443 default:
screamer 0:e4d670b91a9a 1444 break;
screamer 0:e4d670b91a9a 1445 }
screamer 0:e4d670b91a9a 1446 break;
screamer 0:e4d670b91a9a 1447 case 2:
screamer 0:e4d670b91a9a 1448 switch (channel)
screamer 0:e4d670b91a9a 1449 {
screamer 0:e4d670b91a9a 1450 case 0:
screamer 0:e4d670b91a9a 1451 retValue = (sim_tpm_ch_src_t)BR_SIM_SOPT4_TPM2CH0SRC(baseAddr);
screamer 0:e4d670b91a9a 1452 break;
screamer 0:e4d670b91a9a 1453 default:
screamer 0:e4d670b91a9a 1454 break;
screamer 0:e4d670b91a9a 1455 }
screamer 0:e4d670b91a9a 1456 break;
screamer 0:e4d670b91a9a 1457 default:
screamer 0:e4d670b91a9a 1458 break;
screamer 0:e4d670b91a9a 1459 }
screamer 0:e4d670b91a9a 1460
screamer 0:e4d670b91a9a 1461 return retValue;
screamer 0:e4d670b91a9a 1462 }
screamer 0:e4d670b91a9a 1463 #endif
screamer 0:e4d670b91a9a 1464
screamer 0:e4d670b91a9a 1465 /*******************************************************************************
screamer 0:e4d670b91a9a 1466 * EOF
screamer 0:e4d670b91a9a 1467 ******************************************************************************/
screamer 0:e4d670b91a9a 1468