Alessandro Angelino / target-freescale-ksdk

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TARGET_KPSDK_CODE/hal/sim/fsl_sim_hal.h@1:d01108809007, 2016-04-04 (annotated)

Committer:
Alessandro Angelino
Date:
Mon Apr 04 14:18:16 2016 +0100
Revision:
1:d01108809007
Parent:
0:e4d670b91a9a 
Replace NVIC APIs with vIRQ ones

Who changed what in which revision?

UserRevisionLine numberNew contents of line
screamer 0:e4d670b91a9a 1 /*
screamer 0:e4d670b91a9a 2 * Copyright (c) 2013 - 2014, Freescale Semiconductor, Inc.
screamer 0:e4d670b91a9a 3 * All rights reserved.
screamer 0:e4d670b91a9a 4 *
screamer 0:e4d670b91a9a 5 * Redistribution and use in source and binary forms, with or without modification,
screamer 0:e4d670b91a9a 6 * are permitted provided that the following conditions are met:
screamer 0:e4d670b91a9a 7 *
screamer 0:e4d670b91a9a 8 * o Redistributions of source code must retain the above copyright notice, this list
screamer 0:e4d670b91a9a 9 * of conditions and the following disclaimer.
screamer 0:e4d670b91a9a 10 *
screamer 0:e4d670b91a9a 11 * o Redistributions in binary form must reproduce the above copyright notice, this
screamer 0:e4d670b91a9a 12 * list of conditions and the following disclaimer in the documentation and/or
screamer 0:e4d670b91a9a 13 * other materials provided with the distribution.
screamer 0:e4d670b91a9a 14 *
screamer 0:e4d670b91a9a 15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
screamer 0:e4d670b91a9a 16 * contributors may be used to endorse or promote products derived from this
screamer 0:e4d670b91a9a 17 * software without specific prior written permission.
screamer 0:e4d670b91a9a 18 *
screamer 0:e4d670b91a9a 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
screamer 0:e4d670b91a9a 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
screamer 0:e4d670b91a9a 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
screamer 0:e4d670b91a9a 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
screamer 0:e4d670b91a9a 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
screamer 0:e4d670b91a9a 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
screamer 0:e4d670b91a9a 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
screamer 0:e4d670b91a9a 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
screamer 0:e4d670b91a9a 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
screamer 0:e4d670b91a9a 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
screamer 0:e4d670b91a9a 29 */
screamer 0:e4d670b91a9a 30
screamer 0:e4d670b91a9a 31 #if !defined(__FSL_SIM_HAL_H__)
screamer 0:e4d670b91a9a 32 #define __FSL_SIM_HAL_H__
screamer 0:e4d670b91a9a 33
screamer 0:e4d670b91a9a 34 #include <stdint.h>
screamer 0:e4d670b91a9a 35 #include <stdbool.h>
screamer 0:e4d670b91a9a 36 #include <assert.h>
screamer 0:e4d670b91a9a 37 #include "fsl_device_registers.h"
screamer 0:e4d670b91a9a 38 #include "fsl_sim_features.h"
screamer 0:e4d670b91a9a 39
screamer 0:e4d670b91a9a 40 /*! @addtogroup sim_hal*/
screamer 0:e4d670b91a9a 41 /*! @{*/
screamer 0:e4d670b91a9a 42
screamer 0:e4d670b91a9a 43 /*! @file*/
screamer 0:e4d670b91a9a 44
screamer 0:e4d670b91a9a 45 /*******************************************************************************
screamer 0:e4d670b91a9a 46 * Definitions
screamer 0:e4d670b91a9a 47 ******************************************************************************/
screamer 0:e4d670b91a9a 48 typedef enum _clock_names {
screamer 0:e4d670b91a9a 49
screamer 0:e4d670b91a9a 50 /* default clocks*/
screamer 0:e4d670b91a9a 51 kCoreClock, /**/
screamer 0:e4d670b91a9a 52 kSystemClock, /**/
screamer 0:e4d670b91a9a 53 kPlatformClock, /**/
screamer 0:e4d670b91a9a 54 kBusClock, /**/
screamer 0:e4d670b91a9a 55 kFlexBusClock, /**/
screamer 0:e4d670b91a9a 56 kFlashClock, /**/
screamer 0:e4d670b91a9a 57
screamer 0:e4d670b91a9a 58 /* other internal clocks used by peripherals*/
screamer 0:e4d670b91a9a 59 /* osc clock*/
screamer 0:e4d670b91a9a 60 kOsc32kClock,
screamer 0:e4d670b91a9a 61 kOsc0ErClock,
screamer 0:e4d670b91a9a 62 kOsc1ErClock,
screamer 0:e4d670b91a9a 63
screamer 0:e4d670b91a9a 64 /* irc 48Mhz clock */
screamer 0:e4d670b91a9a 65 kIrc48mClock,
screamer 0:e4d670b91a9a 66
screamer 0:e4d670b91a9a 67 /* rtc clock*/
screamer 0:e4d670b91a9a 68 kRtc32kClock,
screamer 0:e4d670b91a9a 69 kRtc1hzClock,
screamer 0:e4d670b91a9a 70
screamer 0:e4d670b91a9a 71 /* lpo clcok*/
screamer 0:e4d670b91a9a 72 kLpoClock,
screamer 0:e4d670b91a9a 73
screamer 0:e4d670b91a9a 74 /* mcg clocks*/
screamer 0:e4d670b91a9a 75 kMcgFfClock,
screamer 0:e4d670b91a9a 76 kMcgFllClock,
screamer 0:e4d670b91a9a 77 kMcgPll0Clock,
screamer 0:e4d670b91a9a 78 kMcgPll1Clock,
screamer 0:e4d670b91a9a 79 kMcgOutClock,
screamer 0:e4d670b91a9a 80 kMcgIrClock,
screamer 0:e4d670b91a9a 81
screamer 0:e4d670b91a9a 82 /* constant clocks (provided in other header files?)*/
screamer 0:e4d670b91a9a 83 kSDHC0_CLKIN,
screamer 0:e4d670b91a9a 84 kENET_1588_CLKIN,
screamer 0:e4d670b91a9a 85 kEXTAL_Clock,
screamer 0:e4d670b91a9a 86 kEXTAL1_Clock,
screamer 0:e4d670b91a9a 87 kUSB_CLKIN,
screamer 0:e4d670b91a9a 88
screamer 0:e4d670b91a9a 89 /* reserved value*/
screamer 0:e4d670b91a9a 90 kReserved,
screamer 0:e4d670b91a9a 91
screamer 0:e4d670b91a9a 92 kClockNameCount
screamer 0:e4d670b91a9a 93 } clock_names_t;
screamer 0:e4d670b91a9a 94
screamer 0:e4d670b91a9a 95 /*! @brief Clock source and sel names */
screamer 0:e4d670b91a9a 96 typedef enum _clock_source_names {
screamer 0:e4d670b91a9a 97 kClockNfcSrc, /* NFCSRC*/
screamer 0:e4d670b91a9a 98 kClockEsdhcSrc, /* ESDHCSRC K70*/
screamer 0:e4d670b91a9a 99 kClockSdhcSrc, /* SDHCSRC K64*/
screamer 0:e4d670b91a9a 100 kClockLcdcSrc, /* LCDCSRC*/
screamer 0:e4d670b91a9a 101 kClockTimeSrc, /* TIMESRC*/
screamer 0:e4d670b91a9a 102 kClockRmiiSrc, /* RMIISRC*/
screamer 0:e4d670b91a9a 103 kClockUsbfSrc, /* USBFSRC K70*/
screamer 0:e4d670b91a9a 104 kClockUsbSrc, /* USBSRC K64, KL25, KV31, and K22*/
screamer 0:e4d670b91a9a 105 kClockUsbhSrc, /* USBHSRC*/
screamer 0:e4d670b91a9a 106 kClockUart0Src, /* UART0SRC*/
screamer 0:e4d670b91a9a 107 kClockLpuartSrc, /* LPUARTSRC K22, KV31 */
screamer 0:e4d670b91a9a 108 kClockTpmSrc, /* TPMSRC*/
screamer 0:e4d670b91a9a 109 kClockOsc32kSel, /* OSC32KSEL*/
screamer 0:e4d670b91a9a 110 kClockUsbfSel, /* USBF_CLKSEL*/
screamer 0:e4d670b91a9a 111 kClockPllfllSel, /* PLLFLLSEL*/
screamer 0:e4d670b91a9a 112 kClockNfcSel, /* NFC_CLKSEL*/
screamer 0:e4d670b91a9a 113 kClockLcdcSel, /* LCDC_CLKSEL*/
screamer 0:e4d670b91a9a 114 kClockTraceSel, /* TRACE_CLKSEL*/
screamer 0:e4d670b91a9a 115 kClockClkoutSel, /* CLKOUTSEL*/
screamer 0:e4d670b91a9a 116 kClockRtcClkoutSel, /* RTCCLKOUTSEL */
screamer 0:e4d670b91a9a 117 kClockSourceMax
screamer 0:e4d670b91a9a 118 } clock_source_names_t;
screamer 0:e4d670b91a9a 119
screamer 0:e4d670b91a9a 120 /*! @brief Clock Divider names*/
screamer 0:e4d670b91a9a 121 typedef enum _clock_divider_names {
screamer 0:e4d670b91a9a 122 kClockDividerOutdiv1, /* OUTDIV1*/
screamer 0:e4d670b91a9a 123 kClockDividerOutdiv2, /* OUTDIV2*/
screamer 0:e4d670b91a9a 124 kClockDividerOutdiv3, /* OUTDIV3*/
screamer 0:e4d670b91a9a 125 kClockDividerOutdiv4, /* OUTDIV4*/
screamer 0:e4d670b91a9a 126 kClockDividerUsbFrac, /* (USBFRAC + 1) / (USBDIV + 1)*/
screamer 0:e4d670b91a9a 127 kClockDividerUsbDiv,
screamer 0:e4d670b91a9a 128 kClockDividerUsbfsFrac, /* (USBFSFRAC + 1) / (USBFSDIV) + 1)*/
screamer 0:e4d670b91a9a 129 kClockDividerUsbfsDiv,
screamer 0:e4d670b91a9a 130 kClockDividerUsbhsFrac, /* (USBHSFRAC + 1) / (USBHSDIV + 1)*/
screamer 0:e4d670b91a9a 131 kClockDividerUsbhsDiv,
screamer 0:e4d670b91a9a 132 kClockDividerLcdcFrac, /* (LCDCFRAC + 1) / (LCDCDIV + 1)*/
screamer 0:e4d670b91a9a 133 kClockDividerLcdcDiv,
screamer 0:e4d670b91a9a 134 kClockDividerNfcFrac, /* (NFCFRAC + 1) / (NFCDIV + 1)*/
screamer 0:e4d670b91a9a 135 kClockDividerNfcDiv,
screamer 0:e4d670b91a9a 136 kClockDividerSpecial1, /* special divider 1*/
screamer 0:e4d670b91a9a 137 kClockDividerMax
screamer 0:e4d670b91a9a 138 } clock_divider_names_t;
screamer 0:e4d670b91a9a 139
screamer 0:e4d670b91a9a 140 /*! @brief SIM USB voltage regulator in standby mode setting during stop modes */
screamer 0:e4d670b91a9a 141 typedef enum _sim_usbsstby_stop
screamer 0:e4d670b91a9a 142 {
screamer 0:e4d670b91a9a 143 kSimUsbsstbyNoRegulator, /* regulator not in standby during Stop modes */
screamer 0:e4d670b91a9a 144 kSimUsbsstbyWithRegulator /* regulator in standby during Stop modes */
screamer 0:e4d670b91a9a 145 } sim_usbsstby_stop_t;
screamer 0:e4d670b91a9a 146
screamer 0:e4d670b91a9a 147 /*! @brief SIM USB voltage regulator in standby mode setting during VLPR and VLPW modes */
screamer 0:e4d670b91a9a 148 typedef enum _sim_usbvstby_stop
screamer 0:e4d670b91a9a 149 {
screamer 0:e4d670b91a9a 150 kSimUsbvstbyNoRegulator, /* regulator not in standby during VLPR and VLPW modes */
screamer 0:e4d670b91a9a 151 kSimUsbvstbyWithRegulator /* regulator in standby during VLPR and VLPW modes */
screamer 0:e4d670b91a9a 152 } sim_usbvstby_stop_t;
screamer 0:e4d670b91a9a 153
screamer 0:e4d670b91a9a 154 /*! @brief SIM CMT/UART pad drive strength */
screamer 0:e4d670b91a9a 155 typedef enum _sim_cmtuartpad_strengh
screamer 0:e4d670b91a9a 156 {
screamer 0:e4d670b91a9a 157 kSimCmtuartSinglePad, /* Single-pad drive strength for CMT IRO or UART0_TXD */
screamer 0:e4d670b91a9a 158 kSimCmtuartDualPad /* Dual-pad drive strength for CMT IRO or UART0_TXD */
screamer 0:e4d670b91a9a 159 } sim_cmtuartpad_strengh_t;
screamer 0:e4d670b91a9a 160
screamer 0:e4d670b91a9a 161 /*! @brief SIM PTD7 pad drive strength */
screamer 0:e4d670b91a9a 162 typedef enum _sim_ptd7pad_strengh
screamer 0:e4d670b91a9a 163 {
screamer 0:e4d670b91a9a 164 kSimPtd7padSinglePad, /* Single-pad drive strength for PTD7 */
screamer 0:e4d670b91a9a 165 kSimPtd7padDualPad /* Dual-pad drive strength for PTD7 */
screamer 0:e4d670b91a9a 166 } sim_ptd7pad_strengh_t;
screamer 0:e4d670b91a9a 167
screamer 0:e4d670b91a9a 168 /*! @brief SIM FlexBus security level */
screamer 0:e4d670b91a9a 169 typedef enum _sim_flexbus_security_level
screamer 0:e4d670b91a9a 170 {
screamer 0:e4d670b91a9a 171 kSimFbslLevel0, /* All off-chip accesses (op code and data) via the FlexBus */
screamer 0:e4d670b91a9a 172 /* and DDR controller are disallowed */
screamer 0:e4d670b91a9a 173 kSimFbslLevel1, /* Undefined */
screamer 0:e4d670b91a9a 174 kSimFbslLevel2, /* Off-chip op code accesses are disallowed. Data accesses */
screamer 0:e4d670b91a9a 175 /* are allowed */
screamer 0:e4d670b91a9a 176 kSimFbslLevel3 /* Off-chip op code accesses and data accesses are allowed */
screamer 0:e4d670b91a9a 177 } sim_flexbus_security_level_t;
screamer 0:e4d670b91a9a 178
screamer 0:e4d670b91a9a 179 /*! @brief SIM ADCx pre-trigger select */
screamer 0:e4d670b91a9a 180 typedef enum _sim_pretrgsel
screamer 0:e4d670b91a9a 181 {
screamer 0:e4d670b91a9a 182 kSimAdcPretrgselA, /* Pre-trigger A selected for ADCx */
screamer 0:e4d670b91a9a 183 kSimAdcPretrgselB /* Pre-trigger B selected for ADCx */
screamer 0:e4d670b91a9a 184 } sim_pretrgsel_t;
screamer 0:e4d670b91a9a 185
screamer 0:e4d670b91a9a 186 /*! @brief SIM ADCx trigger select */
screamer 0:e4d670b91a9a 187 typedef enum _sim_trgsel
screamer 0:e4d670b91a9a 188 {
screamer 0:e4d670b91a9a 189 kSimAdcTrgselExt, /* External trigger */
screamer 0:e4d670b91a9a 190 kSimAdcTrgSelHighSpeedComp0, /* High speed comparator 0 asynchronous interrupt */
screamer 0:e4d670b91a9a 191 kSimAdcTrgSelHighSpeedComp1, /* High speed comparator 1 asynchronous interrupt */
screamer 0:e4d670b91a9a 192 kSimAdcTrgSelHighSpeedComp2, /* High speed comparator 2 asynchronous interrupt */
screamer 0:e4d670b91a9a 193 kSimAdcTrgSelPit0, /* PIT trigger 0 */
screamer 0:e4d670b91a9a 194 kSimAdcTrgSelPit1, /* PIT trigger 1 */
screamer 0:e4d670b91a9a 195 kSimAdcTrgSelPit2, /* PIT trigger 2 */
screamer 0:e4d670b91a9a 196 kSimAdcTrgSelPit3, /* PIT trigger 3 */
screamer 0:e4d670b91a9a 197 kSimAdcTrgSelFtm0, /* FTM0 trigger */
screamer 0:e4d670b91a9a 198 kSimAdcTrgSelFtm1, /* FTM1 trigger */
screamer 0:e4d670b91a9a 199 kSimAdcTrgSelFtm2, /* FTM2 trigger */
screamer 0:e4d670b91a9a 200 kSimAdcTrgSelFtm3, /* FTM3 trigger */
screamer 0:e4d670b91a9a 201 kSimAdcTrgSelRtcAlarm, /* RTC alarm */
screamer 0:e4d670b91a9a 202 kSimAdcTrgSelRtcSec, /* RTC seconds */
screamer 0:e4d670b91a9a 203 kSimAdcTrgSelLptimer, /* Low-power timer trigger */
screamer 0:e4d670b91a9a 204 kSimAdcTrgSelHigSpeedComp3 /* High speed comparator 3 asynchronous interrupt */
screamer 0:e4d670b91a9a 205 } sim_trgsel_t;
screamer 0:e4d670b91a9a 206
screamer 0:e4d670b91a9a 207 /*! @brief SIM receive data source select */
screamer 0:e4d670b91a9a 208 typedef enum _sim_uart_rxsrc
screamer 0:e4d670b91a9a 209 {
screamer 0:e4d670b91a9a 210 kSimUartRxsrcPin, /* UARTx_RX Pin */
screamer 0:e4d670b91a9a 211 kSimUartRxsrcCmp0, /* CMP0 */
screamer 0:e4d670b91a9a 212 kSimUartRxsrcCmp1, /* CMP1 */
screamer 0:e4d670b91a9a 213 kSimUartRxsrcReserved /* Reserved */
screamer 0:e4d670b91a9a 214 } sim_uart_rxsrc_t;
screamer 0:e4d670b91a9a 215
screamer 0:e4d670b91a9a 216 /*! @brief SIM transmit data source select */
screamer 0:e4d670b91a9a 217 typedef enum _sim_uart_txsrc
screamer 0:e4d670b91a9a 218 {
screamer 0:e4d670b91a9a 219 kSimUartTxsrcPin, /* UARTx_TX Pin */
screamer 0:e4d670b91a9a 220 kSimUartTxsrcCmp0, /* UARTx_TX pin modulated with FTM1 channel 0 output */
screamer 0:e4d670b91a9a 221 kSimUartTxsrcCmp1, /* UARTx_TX pin modulated with FTM2 channel 0 output */
screamer 0:e4d670b91a9a 222 kSimUartTxsrcReserved /* Reserved */
screamer 0:e4d670b91a9a 223 } sim_uart_txsrc_t;
screamer 0:e4d670b91a9a 224
screamer 0:e4d670b91a9a 225 /*! @brief SIM FlexTimer x trigger y select */
screamer 0:e4d670b91a9a 226 typedef enum _sim_ftm_trg_src
screamer 0:e4d670b91a9a 227 {
screamer 0:e4d670b91a9a 228 kSimFtmTrgSrc0, /* FlexTimer x trigger y select 0 */
screamer 0:e4d670b91a9a 229 kSimFtmTrgSrc1 /* FlexTimer x trigger y select 1 */
screamer 0:e4d670b91a9a 230 } sim_ftm_trg_src_t;
screamer 0:e4d670b91a9a 231
screamer 0:e4d670b91a9a 232 /*! @brief SIM FlexTimer external clock select */
screamer 0:e4d670b91a9a 233 typedef enum _sim_ftm_clk_sel
screamer 0:e4d670b91a9a 234 {
screamer 0:e4d670b91a9a 235 kSimFtmClkSel0, /* FTM CLKIN0 pin. */
screamer 0:e4d670b91a9a 236 kSimFtmClkSel1 /* FTM CLKIN1 pin. */
screamer 0:e4d670b91a9a 237 } sim_ftm_clk_sel_t;
screamer 0:e4d670b91a9a 238
screamer 0:e4d670b91a9a 239 /*! @brief SIM FlexTimer x channel y input capture source select */
screamer 0:e4d670b91a9a 240 typedef enum _sim_ftm_ch_src
screamer 0:e4d670b91a9a 241 {
screamer 0:e4d670b91a9a 242 kSimFtmChSrc0, /* See RM for details of each selection for each channel */
screamer 0:e4d670b91a9a 243 kSimFtmChSrc1, /* See RM for details of each selection for each channel */
screamer 0:e4d670b91a9a 244 kSimFtmChSrc2, /* See RM for details of each selection for each channel */
screamer 0:e4d670b91a9a 245 kSimFtmChSrc3 /* See RM for details of each selection for each channel */
screamer 0:e4d670b91a9a 246 } sim_ftm_ch_src_t;
screamer 0:e4d670b91a9a 247
screamer 0:e4d670b91a9a 248 /*! @brief SIM FlexTimer x Fault y select */
screamer 0:e4d670b91a9a 249 typedef enum _sim_ftm_flt_sel
screamer 0:e4d670b91a9a 250 {
screamer 0:e4d670b91a9a 251 kSimFtmFltSel0, /* FlexTimer x fault y select 0 */
screamer 0:e4d670b91a9a 252 kSimFtmFltSel1 /* FlexTimer x fault y select 1 */
screamer 0:e4d670b91a9a 253 } sim_ftm_flt_sel_t;
screamer 0:e4d670b91a9a 254
screamer 0:e4d670b91a9a 255 /*! @brief SIM Timer/PWM external clock select */
screamer 0:e4d670b91a9a 256 typedef enum _sim_tpm_clk_sel
screamer 0:e4d670b91a9a 257 {
screamer 0:e4d670b91a9a 258 kSimTpmClkSel0, /* Timer/PWM TPM_CLKIN0 pin. */
screamer 0:e4d670b91a9a 259 kSimTpmClkSel1 /* Timer/PWM TPM_CLKIN1 pin. */
screamer 0:e4d670b91a9a 260 } sim_tpm_clk_sel_t;
screamer 0:e4d670b91a9a 261
screamer 0:e4d670b91a9a 262 /*! @brief SIM Timer/PWM x channel y input capture source select */
screamer 0:e4d670b91a9a 263 typedef enum _sim_tpm_ch_src
screamer 0:e4d670b91a9a 264 {
screamer 0:e4d670b91a9a 265 kSimTpmChSrc0, /* TPMx_CH0 signal */
screamer 0:e4d670b91a9a 266 kSimTpmChSrc1 /* CMP0 output */
screamer 0:e4d670b91a9a 267 } sim_tpm_ch_src_t;
screamer 0:e4d670b91a9a 268
screamer 0:e4d670b91a9a 269 /*! @brief SIM HAL API return status*/
screamer 0:e4d670b91a9a 270 typedef enum _sim_hal_status {
screamer 0:e4d670b91a9a 271 kSimHalSuccess,
screamer 0:e4d670b91a9a 272 kSimHalFail,
screamer 0:e4d670b91a9a 273 kSimHalNoSuchModule,
screamer 0:e4d670b91a9a 274 kSimHalNoSuchClockSrc,
screamer 0:e4d670b91a9a 275 kSimHalNoSuchDivider
screamer 0:e4d670b91a9a 276 } sim_hal_status_t;
screamer 0:e4d670b91a9a 277
screamer 0:e4d670b91a9a 278 /*! @brief Clock name configuration table structure*/
screamer 0:e4d670b91a9a 279 typedef struct ClockNameConfig {
screamer 0:e4d670b91a9a 280 bool useOtherRefClock; /*!< if it uses the other ref clock*/
screamer 0:e4d670b91a9a 281 clock_names_t otherRefClockName; /*!< other ref clock name*/
screamer 0:e4d670b91a9a 282 clock_divider_names_t dividerName; /*!< clock divider name*/
screamer 0:e4d670b91a9a 283 } clock_name_config_t;
screamer 0:e4d670b91a9a 284
screamer 0:e4d670b91a9a 285 /*! @brief clock name configuration table for specified CPU defined in fsl_clock_module_names_Kxxx.h*/
screamer 0:e4d670b91a9a 286 extern const clock_name_config_t kClockNameConfigTable[];
screamer 0:e4d670b91a9a 287
screamer 0:e4d670b91a9a 288
screamer 0:e4d670b91a9a 289 /*******************************************************************************
screamer 0:e4d670b91a9a 290 * API
screamer 0:e4d670b91a9a 291 ******************************************************************************/
screamer 0:e4d670b91a9a 292
screamer 0:e4d670b91a9a 293 #if defined(__cplusplus)
screamer 0:e4d670b91a9a 294 extern "C" {
screamer 0:e4d670b91a9a 295 #endif /* __cplusplus*/
screamer 0:e4d670b91a9a 296
screamer 0:e4d670b91a9a 297 /*! @name clock-related feature APIs*/
screamer 0:e4d670b91a9a 298 /*@{*/
screamer 0:e4d670b91a9a 299
screamer 0:e4d670b91a9a 300 /*!
screamer 0:e4d670b91a9a 301 * @brief Sets the clock source setting.
screamer 0:e4d670b91a9a 302 *
screamer 0:e4d670b91a9a 303 * This function sets the settings for a specified clock source. Each clock
screamer 0:e4d670b91a9a 304 * source has its own clock selection settings. See the chip reference manual for
screamer 0:e4d670b91a9a 305 * clock source detailed settings and the clock_source_names_t
screamer 0:e4d670b91a9a 306 * for clock sources.
screamer 0:e4d670b91a9a 307 *
screamer 0:e4d670b91a9a 308 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 309 * @param clockSource Clock source name defined in sim_clock_source_names_t
screamer 0:e4d670b91a9a 310 * @param setting Setting value
screamer 0:e4d670b91a9a 311 * @return status If the clock source doesn't exist, it returns an error.
screamer 0:e4d670b91a9a 312 */
screamer 0:e4d670b91a9a 313 sim_hal_status_t CLOCK_HAL_SetSource(uint32_t baseAddr, clock_source_names_t clockSource, uint8_t setting);
screamer 0:e4d670b91a9a 314
screamer 0:e4d670b91a9a 315 /*!
screamer 0:e4d670b91a9a 316 * @brief Gets the clock source setting.
screamer 0:e4d670b91a9a 317 *
screamer 0:e4d670b91a9a 318 * This function gets the settings for a specified clock source. Each clock
screamer 0:e4d670b91a9a 319 * source has its own clock selection settings. See the reference manual for
screamer 0:e4d670b91a9a 320 * clock source detailed settings and the clock_source_names_t
screamer 0:e4d670b91a9a 321 * for clock sources.
screamer 0:e4d670b91a9a 322 *
screamer 0:e4d670b91a9a 323 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 324 * @param clockSource Clock source name
screamer 0:e4d670b91a9a 325 * @param setting Current setting pointer for the clock source
screamer 0:e4d670b91a9a 326 * @return status If the clock source doesn't exist, it returns an error.
screamer 0:e4d670b91a9a 327 */
screamer 0:e4d670b91a9a 328 sim_hal_status_t CLOCK_HAL_GetSource(uint32_t baseAddr, clock_source_names_t clockSource,
screamer 0:e4d670b91a9a 329 uint8_t *setting);
screamer 0:e4d670b91a9a 330
screamer 0:e4d670b91a9a 331 /*!
screamer 0:e4d670b91a9a 332 * @brief Sets the clock divider setting.
screamer 0:e4d670b91a9a 333 *
screamer 0:e4d670b91a9a 334 * This function sets the setting for a specified clock divider. See the
screamer 0:e4d670b91a9a 335 * reference manual for a supported clock divider and value range and the
screamer 0:e4d670b91a9a 336 * clock_divider_names_t for dividers.
screamer 0:e4d670b91a9a 337 *
screamer 0:e4d670b91a9a 338 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 339 * @param clockDivider Clock divider name
screamer 0:e4d670b91a9a 340 * @param setting Divider setting
screamer 0:e4d670b91a9a 341 * @return status If the clock divider doesn't exist, it returns an error.
screamer 0:e4d670b91a9a 342 */
screamer 0:e4d670b91a9a 343 sim_hal_status_t CLOCK_HAL_SetDivider(uint32_t baseAddr, clock_divider_names_t clockDivider,
screamer 0:e4d670b91a9a 344 uint32_t setting);
screamer 0:e4d670b91a9a 345
screamer 0:e4d670b91a9a 346 /*!
screamer 0:e4d670b91a9a 347 * @brief Sets the clock out dividers setting.
screamer 0:e4d670b91a9a 348 *
screamer 0:e4d670b91a9a 349 * This function sets the setting for all clock out dividers at the same time.
screamer 0:e4d670b91a9a 350 * See the reference manual for a supported clock divider and value range and the
screamer 0:e4d670b91a9a 351 * clock_divider_names_t for clock out dividers.
screamer 0:e4d670b91a9a 352 *
screamer 0:e4d670b91a9a 353 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 354 * @param outdiv1 Outdivider1 setting
screamer 0:e4d670b91a9a 355 * @param outdiv2 Outdivider2 setting
screamer 0:e4d670b91a9a 356 * @param outdiv3 Outdivider3 setting
screamer 0:e4d670b91a9a 357 * @param outdiv4 Outdivider4 setting
screamer 0:e4d670b91a9a 358 */
screamer 0:e4d670b91a9a 359 void CLOCK_HAL_SetOutDividers(uint32_t baseAddr, uint32_t outdiv1, uint32_t outdiv2,
screamer 0:e4d670b91a9a 360 uint32_t outdiv3, uint32_t outdiv4);
screamer 0:e4d670b91a9a 361
screamer 0:e4d670b91a9a 362 /*!
screamer 0:e4d670b91a9a 363 * @brief Gets the clock divider setting.
screamer 0:e4d670b91a9a 364 *
screamer 0:e4d670b91a9a 365 * This function gets the setting for a specified clock divider. See the
screamer 0:e4d670b91a9a 366 * reference manual for a supported clock divider and value range and the
screamer 0:e4d670b91a9a 367 * clock_divider_names_t for dividers.
screamer 0:e4d670b91a9a 368 *
screamer 0:e4d670b91a9a 369 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 370 * @param clockDivider Clock divider name
screamer 0:e4d670b91a9a 371 * @param setting Divider value pointer
screamer 0:e4d670b91a9a 372 * @return status If the clock divider doesn't exist, it returns an error.
screamer 0:e4d670b91a9a 373 */
screamer 0:e4d670b91a9a 374 sim_hal_status_t CLOCK_HAL_GetDivider(uint32_t baseAddr, clock_divider_names_t clockDivider,
screamer 0:e4d670b91a9a 375 uint32_t *setting);
screamer 0:e4d670b91a9a 376
screamer 0:e4d670b91a9a 377 /*@}*/
screamer 0:e4d670b91a9a 378
screamer 0:e4d670b91a9a 379 /*! @name individual field access APIs*/
screamer 0:e4d670b91a9a 380 /*@{*/
screamer 0:e4d670b91a9a 381
screamer 0:e4d670b91a9a 382 #if FSL_FEATURE_SIM_OPT_HAS_RAMSIZE
screamer 0:e4d670b91a9a 383 /*!
screamer 0:e4d670b91a9a 384 * @brief Gets RAM size.
screamer 0:e4d670b91a9a 385 *
screamer 0:e4d670b91a9a 386 * This function gets the RAM size. The field specifies the amount of system RAM
screamer 0:e4d670b91a9a 387 * available on the device.
screamer 0:e4d670b91a9a 388 *
screamer 0:e4d670b91a9a 389 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 390 * @return size RAM size on the device
screamer 0:e4d670b91a9a 391 */
screamer 0:e4d670b91a9a 392 static inline uint32_t SIM_HAL_GetRamSize(uint32_t baseAddr)
screamer 0:e4d670b91a9a 393 {
screamer 0:e4d670b91a9a 394 return BR_SIM_SOPT1_RAMSIZE(baseAddr);
screamer 0:e4d670b91a9a 395 }
screamer 0:e4d670b91a9a 396 #endif /* FSL_FEATURE_SIM_OPT_HAS_RAMSIZE */
screamer 0:e4d670b91a9a 397
screamer 0:e4d670b91a9a 398 #if FSL_FEATURE_SIM_OPT_HAS_USB_VOLTAGE_REGULATOR
screamer 0:e4d670b91a9a 399 /*!
screamer 0:e4d670b91a9a 400 * @brief Sets the USB voltage regulator enabled setting.
screamer 0:e4d670b91a9a 401 *
screamer 0:e4d670b91a9a 402 * This function controls whether the USB voltage regulator is enabled. This bit
screamer 0:e4d670b91a9a 403 * can only be written when the SOPT1CFG[URWE] bit is set.
screamer 0:e4d670b91a9a 404 *
screamer 0:e4d670b91a9a 405 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 406 * @param enable USB voltage regulator enable setting
screamer 0:e4d670b91a9a 407 * - true: USB voltage regulator is enabled.
screamer 0:e4d670b91a9a 408 * - false: USB voltage regulator is disabled.
screamer 0:e4d670b91a9a 409 */
screamer 0:e4d670b91a9a 410 static inline void SIM_HAL_SetUsbVoltRegulatorCmd(uint32_t baseAddr, bool enable)
screamer 0:e4d670b91a9a 411 {
screamer 0:e4d670b91a9a 412 BW_SIM_SOPT1_USBREGEN(baseAddr, enable ? 1 : 0);
screamer 0:e4d670b91a9a 413 }
screamer 0:e4d670b91a9a 414
screamer 0:e4d670b91a9a 415 /*!
screamer 0:e4d670b91a9a 416 * @brief Gets the USB voltage regulator enabled setting.
screamer 0:e4d670b91a9a 417 *
screamer 0:e4d670b91a9a 418 * This function gets the USB voltage regulator enabled setting.
screamer 0:e4d670b91a9a 419 *
screamer 0:e4d670b91a9a 420 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 421 * @return enabled True if the USB voltage regulator is enabled.
screamer 0:e4d670b91a9a 422 */
screamer 0:e4d670b91a9a 423 static inline bool SIM_HAL_GetUsbVoltRegulatorCmd(uint32_t baseAddr)
screamer 0:e4d670b91a9a 424 {
screamer 0:e4d670b91a9a 425 return BR_SIM_SOPT1_USBREGEN(baseAddr);
screamer 0:e4d670b91a9a 426 }
screamer 0:e4d670b91a9a 427
screamer 0:e4d670b91a9a 428 /*!
screamer 0:e4d670b91a9a 429 * @brief Sets the USB voltage regulator in a standby mode setting during Stop, VLPS, LLS, and VLLS.
screamer 0:e4d670b91a9a 430 *
screamer 0:e4d670b91a9a 431 * This function controls whether the USB voltage regulator is placed in a standby
screamer 0:e4d670b91a9a 432 * mode during Stop, VLPS, LLS, and VLLS modes. This bit can only be written when the
screamer 0:e4d670b91a9a 433 * SOPT1CFG[USSWE] bit is set.
screamer 0:e4d670b91a9a 434 *
screamer 0:e4d670b91a9a 435 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 436 * @param setting USB voltage regulator in standby mode setting
screamer 0:e4d670b91a9a 437 * - 0: USB voltage regulator not in standby during Stop, VLPS, LLS and
screamer 0:e4d670b91a9a 438 * VLLS modes.
screamer 0:e4d670b91a9a 439 * - 1: USB voltage regulator in standby during Stop, VLPS, LLS and VLLS
screamer 0:e4d670b91a9a 440 * modes.
screamer 0:e4d670b91a9a 441 */
screamer 0:e4d670b91a9a 442 static inline void SIM_HAL_SetUsbVoltRegulatorInStdbyDuringStopMode(uint32_t baseAddr,
screamer 0:e4d670b91a9a 443 sim_usbsstby_stop_t setting)
screamer 0:e4d670b91a9a 444 {
screamer 0:e4d670b91a9a 445 BW_SIM_SOPT1_USBSSTBY(baseAddr, setting);
screamer 0:e4d670b91a9a 446 }
screamer 0:e4d670b91a9a 447
screamer 0:e4d670b91a9a 448 /*!
screamer 0:e4d670b91a9a 449 * @brief Gets the USB voltage regulator in a standby mode setting.
screamer 0:e4d670b91a9a 450 *
screamer 0:e4d670b91a9a 451 * This function gets the USB voltage regulator in a standby mode setting.
screamer 0:e4d670b91a9a 452 *
screamer 0:e4d670b91a9a 453 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 454 * @return setting USB voltage regulator in a standby mode setting
screamer 0:e4d670b91a9a 455 */
screamer 0:e4d670b91a9a 456 static inline sim_usbsstby_stop_t SIM_HAL_GetUsbVoltRegulatorInStdbyDuringStopMode(uint32_t baseAddr)
screamer 0:e4d670b91a9a 457 {
screamer 0:e4d670b91a9a 458 return (sim_usbsstby_stop_t)BR_SIM_SOPT1_USBSSTBY(baseAddr);
screamer 0:e4d670b91a9a 459 }
screamer 0:e4d670b91a9a 460
screamer 0:e4d670b91a9a 461 /*!
screamer 0:e4d670b91a9a 462 * @brief Sets the USB voltage regulator in a standby mode during the VLPR or the VLPW.
screamer 0:e4d670b91a9a 463 *
screamer 0:e4d670b91a9a 464 * This function controls whether the USB voltage regulator is placed in a standby
screamer 0:e4d670b91a9a 465 * mode during the VLPR and the VLPW modes. This bit can only be written when the
screamer 0:e4d670b91a9a 466 * SOPT1CFG[UVSWE] bit is set.
screamer 0:e4d670b91a9a 467 *
screamer 0:e4d670b91a9a 468 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 469 * @param setting USB voltage regulator in standby mode setting
screamer 0:e4d670b91a9a 470 * - 0: USB voltage regulator not in standby during VLPR and VLPW modes.
screamer 0:e4d670b91a9a 471 * - 1: USB voltage regulator in standby during VLPR and VLPW modes.
screamer 0:e4d670b91a9a 472 */
screamer 0:e4d670b91a9a 473 static inline void SIM_HAL_SetUsbVoltRegulatorInStdbyDuringVlprwMode(uint32_t baseAddr,
screamer 0:e4d670b91a9a 474 sim_usbvstby_stop_t setting)
screamer 0:e4d670b91a9a 475 {
screamer 0:e4d670b91a9a 476 BW_SIM_SOPT1_USBVSTBY(baseAddr, setting);
screamer 0:e4d670b91a9a 477 }
screamer 0:e4d670b91a9a 478
screamer 0:e4d670b91a9a 479 /*!
screamer 0:e4d670b91a9a 480 * @brief Gets the USB voltage regulator in a standby mode during the VLPR or the VLPW.
screamer 0:e4d670b91a9a 481 *
screamer 0:e4d670b91a9a 482 * This function gets the USB voltage regulator in a standby mode during the VLPR or the VLPW.
screamer 0:e4d670b91a9a 483 *
screamer 0:e4d670b91a9a 484 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 485 * @return setting USB voltage regulator in a standby mode during the VLPR or the VLPW
screamer 0:e4d670b91a9a 486 */
screamer 0:e4d670b91a9a 487 static inline sim_usbvstby_stop_t SIM_HAL_GetUsbVoltRegulatorInStdbyDuringVlprwMode(uint32_t baseAddr)
screamer 0:e4d670b91a9a 488 {
screamer 0:e4d670b91a9a 489 return (sim_usbvstby_stop_t)BR_SIM_SOPT1_USBVSTBY(baseAddr);
screamer 0:e4d670b91a9a 490 }
screamer 0:e4d670b91a9a 491
screamer 0:e4d670b91a9a 492 /*!
screamer 0:e4d670b91a9a 493 * @brief Sets the USB voltage regulator stop standby write enable setting.
screamer 0:e4d670b91a9a 494 *
screamer 0:e4d670b91a9a 495 * This function controls whether the USB voltage regulator stop standby write
screamer 0:e4d670b91a9a 496 * feature is enabled. Writing one to this bit allows the SOPT1[USBSSTBY] bit to be written. This
screamer 0:e4d670b91a9a 497 * register bit clears after a write to SOPT1[USBSSTBY].
screamer 0:e4d670b91a9a 498 *
screamer 0:e4d670b91a9a 499 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 500 * @param enable USB voltage regulator stop standby write enable setting
screamer 0:e4d670b91a9a 501 * - true: SOPT1[USBSSTBY] can be written.
screamer 0:e4d670b91a9a 502 * - false: SOPT1[USBSSTBY] cannot be written.
screamer 0:e4d670b91a9a 503 */
screamer 0:e4d670b91a9a 504 static inline void SIM_HAL_SetUsbVoltRegulatorInStdbyDuringStopCmd(uint32_t baseAddr, bool enable)
screamer 0:e4d670b91a9a 505 {
screamer 0:e4d670b91a9a 506 BW_SIM_SOPT1CFG_USSWE(baseAddr, enable ? 1 : 0);
screamer 0:e4d670b91a9a 507 }
screamer 0:e4d670b91a9a 508
screamer 0:e4d670b91a9a 509 /*!
screamer 0:e4d670b91a9a 510 * @brief Gets the USB voltage regulator stop standby write enable setting.
screamer 0:e4d670b91a9a 511 *
screamer 0:e4d670b91a9a 512 * This function gets the USB voltage regulator stop standby write enable setting.
screamer 0:e4d670b91a9a 513 *
screamer 0:e4d670b91a9a 514 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 515 * @return enabled True if the USB voltage regulator stop standby write is enabled.
screamer 0:e4d670b91a9a 516 */
screamer 0:e4d670b91a9a 517 static inline bool SIM_HAL_GetUsbVoltRegulatorInStdbyDuringStopCmd(uint32_t baseAddr)
screamer 0:e4d670b91a9a 518 {
screamer 0:e4d670b91a9a 519 return BR_SIM_SOPT1CFG_USSWE(baseAddr);
screamer 0:e4d670b91a9a 520 }
screamer 0:e4d670b91a9a 521
screamer 0:e4d670b91a9a 522 /*!
screamer 0:e4d670b91a9a 523 * @brief Sets the USB voltage regulator VLP standby write enable setting.
screamer 0:e4d670b91a9a 524 *
screamer 0:e4d670b91a9a 525 * This function controls whether USB voltage regulator VLP standby write
screamer 0:e4d670b91a9a 526 * feature is enabled. Writing one to this bit allows the SOPT1[USBVSTBY] bit to be written. This
screamer 0:e4d670b91a9a 527 * register bit clears after a write to SOPT1[USBVSTBY].
screamer 0:e4d670b91a9a 528 *
screamer 0:e4d670b91a9a 529 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 530 * @param enable USB voltage regulator VLP standby write enable setting
screamer 0:e4d670b91a9a 531 * - true: SOPT1[USBSSTBY] can be written.
screamer 0:e4d670b91a9a 532 * - false: SOPT1[USBSSTBY] cannot be written.
screamer 0:e4d670b91a9a 533 */
screamer 0:e4d670b91a9a 534 static inline void SIM_HAL_SetUsbVoltRegulatorInStdbyDuringVlprwCmd(uint32_t baseAddr, bool enable)
screamer 0:e4d670b91a9a 535 {
screamer 0:e4d670b91a9a 536 BW_SIM_SOPT1CFG_UVSWE(baseAddr, enable ? 1 : 0);
screamer 0:e4d670b91a9a 537 }
screamer 0:e4d670b91a9a 538
screamer 0:e4d670b91a9a 539 /*!
screamer 0:e4d670b91a9a 540 * @brief Gets the USB voltage regulator VLP standby write enable setting.
screamer 0:e4d670b91a9a 541 *
screamer 0:e4d670b91a9a 542 * This function gets the USB voltage regulator VLP standby write enable setting.
screamer 0:e4d670b91a9a 543 *
screamer 0:e4d670b91a9a 544 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 545 * @return enabled True if the USB voltage regulator VLP standby write is enabled.
screamer 0:e4d670b91a9a 546 */
screamer 0:e4d670b91a9a 547 static inline bool SIM_HAL_GetUsbVoltRegulatorInStdbyDuringVlprwCmd(uint32_t baseAddr)
screamer 0:e4d670b91a9a 548 {
screamer 0:e4d670b91a9a 549 return BR_SIM_SOPT1CFG_UVSWE(baseAddr);
screamer 0:e4d670b91a9a 550 }
screamer 0:e4d670b91a9a 551
screamer 0:e4d670b91a9a 552 /*!
screamer 0:e4d670b91a9a 553 * @brief Sets the USB voltage regulator enable write enable setting.
screamer 0:e4d670b91a9a 554 *
screamer 0:e4d670b91a9a 555 * This function controls whether the USB voltage regulator write enable
screamer 0:e4d670b91a9a 556 * feature is enabled. Writing one to this bit allows the SOPT1[USBREGEN] bit to be written.
screamer 0:e4d670b91a9a 557 * This register bit clears after a write to SOPT1[USBREGEN].
screamer 0:e4d670b91a9a 558 *
screamer 0:e4d670b91a9a 559 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 560 * @param enable USB voltage regulator enable write enable setting
screamer 0:e4d670b91a9a 561 * - true: SOPT1[USBSSTBY] can be written.
screamer 0:e4d670b91a9a 562 * - false: SOPT1[USBSSTBY] cannot be written.
screamer 0:e4d670b91a9a 563 */
screamer 0:e4d670b91a9a 564 static inline void SIM_HAL_SetUsbVoltRegulatorWriteCmd(uint32_t baseAddr, bool enable)
screamer 0:e4d670b91a9a 565 {
screamer 0:e4d670b91a9a 566 BW_SIM_SOPT1CFG_URWE(baseAddr, enable ? 1 : 0);
screamer 0:e4d670b91a9a 567 }
screamer 0:e4d670b91a9a 568
screamer 0:e4d670b91a9a 569 /*!
screamer 0:e4d670b91a9a 570 * @brief Gets the USB voltage regulator enable write enable setting.
screamer 0:e4d670b91a9a 571 *
screamer 0:e4d670b91a9a 572 * This function gets the USB voltage regulator enable write enable setting.
screamer 0:e4d670b91a9a 573 *
screamer 0:e4d670b91a9a 574 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 575 * @return enabled True if USB voltage regulator enable write is enabled.
screamer 0:e4d670b91a9a 576 */
screamer 0:e4d670b91a9a 577 static inline bool SIM_HAL_GetUsbVoltRegulatorWriteCmd(uint32_t baseAddr)
screamer 0:e4d670b91a9a 578 {
screamer 0:e4d670b91a9a 579 return BR_SIM_SOPT1CFG_URWE(baseAddr);
screamer 0:e4d670b91a9a 580 }
screamer 0:e4d670b91a9a 581 #endif
screamer 0:e4d670b91a9a 582
screamer 0:e4d670b91a9a 583 #if FSL_FEATURE_SIM_OPT_HAS_CMTUARTPAD
screamer 0:e4d670b91a9a 584 /*!
screamer 0:e4d670b91a9a 585 * @brief Sets the CMT/UART pad drive strength setting.
screamer 0:e4d670b91a9a 586 *
screamer 0:e4d670b91a9a 587 * This function controls the output drive strength of the CMT IRO signal or
screamer 0:e4d670b91a9a 588 * UART0_TXD signal on PTD7 pin by selecting either one or two pads to drive it.
screamer 0:e4d670b91a9a 589 *
screamer 0:e4d670b91a9a 590 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 591 * @param setting CMT/UART pad drive strength setting
screamer 0:e4d670b91a9a 592 * - 0: Single-pad drive strength for CMT IRO or UART0_TXD.
screamer 0:e4d670b91a9a 593 * - 1: Dual-pad drive strength for CMT IRO or UART0_TXD.
screamer 0:e4d670b91a9a 594 */
screamer 0:e4d670b91a9a 595 static inline void SIM_HAL_SetCmtUartPadDriveStrengthMode(uint32_t baseAddr,
screamer 0:e4d670b91a9a 596 sim_cmtuartpad_strengh_t setting)
screamer 0:e4d670b91a9a 597 {
screamer 0:e4d670b91a9a 598 BW_SIM_SOPT2_CMTUARTPAD(baseAddr, setting);
screamer 0:e4d670b91a9a 599 }
screamer 0:e4d670b91a9a 600
screamer 0:e4d670b91a9a 601 /*!
screamer 0:e4d670b91a9a 602 * @brief Gets the CMT/UART pad drive strength setting.
screamer 0:e4d670b91a9a 603 *
screamer 0:e4d670b91a9a 604 * This function gets the CMT/UART pad drive strength setting.
screamer 0:e4d670b91a9a 605 *
screamer 0:e4d670b91a9a 606 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 607 * @return setting CMT/UART pad drive strength setting
screamer 0:e4d670b91a9a 608 */
screamer 0:e4d670b91a9a 609 static inline sim_cmtuartpad_strengh_t SIM_HAL_GetCmtUartPadDriveStrengthMode(uint32_t baseAddr)
screamer 0:e4d670b91a9a 610 {
screamer 0:e4d670b91a9a 611 return (sim_cmtuartpad_strengh_t)BR_SIM_SOPT2_CMTUARTPAD(baseAddr);
screamer 0:e4d670b91a9a 612 }
screamer 0:e4d670b91a9a 613 #endif /* FSL_FEATURE_SIM_OPT_HAS_CMTUARTPAD */
screamer 0:e4d670b91a9a 614
screamer 0:e4d670b91a9a 615 #if FSL_FEATURE_SIM_OPT_HAS_PTD7PAD
screamer 0:e4d670b91a9a 616 /*!
screamer 0:e4d670b91a9a 617 * @brief Sets the PTD7 pad drive strength setting.
screamer 0:e4d670b91a9a 618 *
screamer 0:e4d670b91a9a 619 * This function controls the output drive strength of the PTD7 pin by selecting
screamer 0:e4d670b91a9a 620 * either one or two pads to drive it.
screamer 0:e4d670b91a9a 621 *
screamer 0:e4d670b91a9a 622 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 623 * @param setting PTD7 pad drive strength setting
screamer 0:e4d670b91a9a 624 * - 0: Single-pad drive strength for PTD7.
screamer 0:e4d670b91a9a 625 * - 1: Double pad drive strength for PTD7.
screamer 0:e4d670b91a9a 626 */
screamer 0:e4d670b91a9a 627 static inline void SIM_HAL_SetPtd7PadDriveStrengthMode(uint32_t baseAddr,
screamer 0:e4d670b91a9a 628 sim_ptd7pad_strengh_t setting)
screamer 0:e4d670b91a9a 629 {
screamer 0:e4d670b91a9a 630 BW_SIM_SOPT2_PTD7PAD(baseAddr, setting);
screamer 0:e4d670b91a9a 631 }
screamer 0:e4d670b91a9a 632
screamer 0:e4d670b91a9a 633 /*!
screamer 0:e4d670b91a9a 634 * @brief Gets the PTD7 pad drive strength setting.
screamer 0:e4d670b91a9a 635 *
screamer 0:e4d670b91a9a 636 * This function gets the PTD7 pad drive strength setting.
screamer 0:e4d670b91a9a 637 *
screamer 0:e4d670b91a9a 638 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 639 * @return setting PTD7 pad drive strength setting
screamer 0:e4d670b91a9a 640 */
screamer 0:e4d670b91a9a 641 static inline sim_ptd7pad_strengh_t SIM_HAL_GetPtd7PadDriveStrengthMode(uint32_t baseAddr)
screamer 0:e4d670b91a9a 642 {
screamer 0:e4d670b91a9a 643 return (sim_ptd7pad_strengh_t)BR_SIM_SOPT2_PTD7PAD(baseAddr);
screamer 0:e4d670b91a9a 644 }
screamer 0:e4d670b91a9a 645 #endif /* FSL_FEATURE_SIM_OPT_HAS_PTD7PAD */
screamer 0:e4d670b91a9a 646
screamer 0:e4d670b91a9a 647 #if FSL_FEATURE_SIM_OPT_HAS_FBSL
screamer 0:e4d670b91a9a 648 /*!
screamer 0:e4d670b91a9a 649 * @brief Sets the FlexBus security level setting.
screamer 0:e4d670b91a9a 650 *
screamer 0:e4d670b91a9a 651 * This function sets the FlexBus security level setting. If the security is enabled,
screamer 0:e4d670b91a9a 652 * this field affects which CPU operations can access the off-chip via the FlexBus
screamer 0:e4d670b91a9a 653 * and DDR controller interfaces. This field has no effect if the security is not enabled.
screamer 0:e4d670b91a9a 654 *
screamer 0:e4d670b91a9a 655 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 656 * @param setting FlexBus security level setting
screamer 0:e4d670b91a9a 657 * - 00: All off-chip accesses (op code and data) via the FlexBus and
screamer 0:e4d670b91a9a 658 * DDR controller are disallowed.
screamer 0:e4d670b91a9a 659 * - 10: Off-chip op code accesses are disallowed. Data accesses are
screamer 0:e4d670b91a9a 660 * allowed.
screamer 0:e4d670b91a9a 661 * - 11: Off-chip op code accesses and data accesses are allowed.
screamer 0:e4d670b91a9a 662 */
screamer 0:e4d670b91a9a 663 static inline void SIM_HAL_SetFlexbusSecurityLevelMode(uint32_t baseAddr,
screamer 0:e4d670b91a9a 664 sim_flexbus_security_level_t setting)
screamer 0:e4d670b91a9a 665 {
screamer 0:e4d670b91a9a 666 BW_SIM_SOPT2_FBSL(baseAddr, setting);
screamer 0:e4d670b91a9a 667 }
screamer 0:e4d670b91a9a 668
screamer 0:e4d670b91a9a 669 /*!
screamer 0:e4d670b91a9a 670 * @brief Gets the FlexBus security level setting.
screamer 0:e4d670b91a9a 671 *
screamer 0:e4d670b91a9a 672 * This function gets the FlexBus security level setting.
screamer 0:e4d670b91a9a 673 *
screamer 0:e4d670b91a9a 674 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 675 * @return setting FlexBus security level setting
screamer 0:e4d670b91a9a 676 */
screamer 0:e4d670b91a9a 677 static inline sim_flexbus_security_level_t SIM_HAL_GetFlexbusSecurityLevelMode(uint32_t baseAddr)
screamer 0:e4d670b91a9a 678 {
screamer 0:e4d670b91a9a 679 return (sim_flexbus_security_level_t)BR_SIM_SOPT2_FBSL(baseAddr);
screamer 0:e4d670b91a9a 680 }
screamer 0:e4d670b91a9a 681 #endif /* FSL_FEATURE_SIM_OPT_HAS_FBSL */
screamer 0:e4d670b91a9a 682
screamer 0:e4d670b91a9a 683 #if FSL_FEATURE_SIM_OPT_HAS_PCR
screamer 0:e4d670b91a9a 684 /*!
screamer 0:e4d670b91a9a 685 * @brief Sets the PCR setting.
screamer 0:e4d670b91a9a 686 *
screamer 0:e4d670b91a9a 687 * This function sets the PCR setting. This is the FlexBus hold cycles before
screamer 0:e4d670b91a9a 688 * FlexBus can release bus to NFC or to IDLE.
screamer 0:e4d670b91a9a 689 *
screamer 0:e4d670b91a9a 690 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 691 * @param setting PCR setting
screamer 0:e4d670b91a9a 692 */
screamer 0:e4d670b91a9a 693 static inline void SIM_HAL_SetFlexbusHoldCycles(uint32_t baseAddr, uint32_t setting)
screamer 0:e4d670b91a9a 694 {
screamer 0:e4d670b91a9a 695 BW_SIM_SOPT6_PCR(baseAddr, setting);
screamer 0:e4d670b91a9a 696 }
screamer 0:e4d670b91a9a 697
screamer 0:e4d670b91a9a 698 /*!
screamer 0:e4d670b91a9a 699 * @brief Gets the PCR setting.
screamer 0:e4d670b91a9a 700 *
screamer 0:e4d670b91a9a 701 * This function gets the PCR setting.
screamer 0:e4d670b91a9a 702 *
screamer 0:e4d670b91a9a 703 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 704 * @return setting PCR setting
screamer 0:e4d670b91a9a 705 */
screamer 0:e4d670b91a9a 706 static inline uint32_t SIM_HAL_GetFlexbusHoldCycles(uint32_t baseAddr)
screamer 0:e4d670b91a9a 707 {
screamer 0:e4d670b91a9a 708 return BR_SIM_SOPT6_PCR(baseAddr);
screamer 0:e4d670b91a9a 709 }
screamer 0:e4d670b91a9a 710 #endif /* FSL_FEATURE_SIM_OPT_HAS_PCR */
screamer 0:e4d670b91a9a 711
screamer 0:e4d670b91a9a 712 #if FSL_FEATURE_SIM_OPT_HAS_MCC
screamer 0:e4d670b91a9a 713 /*!
screamer 0:e4d670b91a9a 714 * @brief Sets the MCC setting.
screamer 0:e4d670b91a9a 715 *
screamer 0:e4d670b91a9a 716 * This function sets the MCC setting. This is the NFC hold cycle in case the
screamer 0:e4d670b91a9a 717 * FlexBus request during NFC is granted.
screamer 0:e4d670b91a9a 718 *
screamer 0:e4d670b91a9a 719 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 720 * @param setting MCC setting
screamer 0:e4d670b91a9a 721 */
screamer 0:e4d670b91a9a 722 static inline void SIM_HAL_SetNandFlashControllerHoldCycles(uint32_t baseAddr, uint32_t setting)
screamer 0:e4d670b91a9a 723 {
screamer 0:e4d670b91a9a 724 BW_SIM_SOPT6_MCC(baseAddr, setting);
screamer 0:e4d670b91a9a 725 }
screamer 0:e4d670b91a9a 726
screamer 0:e4d670b91a9a 727 /*!
screamer 0:e4d670b91a9a 728 * @brief Gets the MCC setting.
screamer 0:e4d670b91a9a 729 *
screamer 0:e4d670b91a9a 730 * This function gets the MCC setting.
screamer 0:e4d670b91a9a 731 *
screamer 0:e4d670b91a9a 732 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 733 * @return setting MCC setting
screamer 0:e4d670b91a9a 734 */
screamer 0:e4d670b91a9a 735 static inline uint32_t SIM_HAL_GetNandFlashControllerHoldCycles(uint32_t baseAddr)
screamer 0:e4d670b91a9a 736 {
screamer 0:e4d670b91a9a 737 return BR_SIM_SOPT6_MCC(baseAddr);
screamer 0:e4d670b91a9a 738 }
screamer 0:e4d670b91a9a 739 #endif /* FSL_FEATURE_SIM_OPT_HAS_MCC */
screamer 0:e4d670b91a9a 740
screamer 0:e4d670b91a9a 741 /*!
screamer 0:e4d670b91a9a 742 * @brief Sets the ADCx alternate trigger enable setting.
screamer 0:e4d670b91a9a 743 *
screamer 0:e4d670b91a9a 744 * This function enables/disables the alternative conversion triggers for ADCx.
screamer 0:e4d670b91a9a 745 *
screamer 0:e4d670b91a9a 746 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 747 * @param instance device instance.
screamer 0:e4d670b91a9a 748 * @param enable Enable alternative conversion triggers for ADCx
screamer 0:e4d670b91a9a 749 * - true: Select alternative conversion trigger.
screamer 0:e4d670b91a9a 750 * - false: Select PDB trigger.
screamer 0:e4d670b91a9a 751 */
screamer 0:e4d670b91a9a 752 void SIM_HAL_SetAdcAlternativeTriggerCmd(uint32_t baseAddr, uint8_t instance, bool enable);
screamer 0:e4d670b91a9a 753
screamer 0:e4d670b91a9a 754 /*!
screamer 0:e4d670b91a9a 755 * @brief Gets the ADCx alternate trigger enable setting.
screamer 0:e4d670b91a9a 756 *
screamer 0:e4d670b91a9a 757 * This function gets the ADCx alternate trigger enable setting.
screamer 0:e4d670b91a9a 758 *
screamer 0:e4d670b91a9a 759 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 760 * @param instance device instance.
screamer 0:e4d670b91a9a 761 * @return enabled True if ADCx alternate trigger is enabled
screamer 0:e4d670b91a9a 762 */
screamer 0:e4d670b91a9a 763 bool SIM_HAL_GetAdcAlternativeTriggerCmd(uint32_t baseAddr, uint8_t instance);
screamer 0:e4d670b91a9a 764
screamer 0:e4d670b91a9a 765 /*!
screamer 0:e4d670b91a9a 766 * @brief Sets the ADCx pre-trigger select setting.
screamer 0:e4d670b91a9a 767 *
screamer 0:e4d670b91a9a 768 * This function selects the ADCx pre-trigger source when the alternative triggers
screamer 0:e4d670b91a9a 769 * are enabled through ADCxALTTRGEN.
screamer 0:e4d670b91a9a 770 *
screamer 0:e4d670b91a9a 771 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 772 * @param instance device instance.
screamer 0:e4d670b91a9a 773 * @param select pre-trigger select setting for ADCx
screamer 0:e4d670b91a9a 774 * - 0: Pre-trigger A selected for ADCx.
screamer 0:e4d670b91a9a 775 * - 1: Pre-trigger B selected for ADCx.
screamer 0:e4d670b91a9a 776 */
screamer 0:e4d670b91a9a 777 void SIM_HAL_SetAdcPreTriggerMode(uint32_t baseAddr, uint8_t instance, sim_pretrgsel_t select);
screamer 0:e4d670b91a9a 778
screamer 0:e4d670b91a9a 779 /*!
screamer 0:e4d670b91a9a 780 * @brief Gets the ADCx pre-trigger select setting.
screamer 0:e4d670b91a9a 781 *
screamer 0:e4d670b91a9a 782 * This function gets the ADCx pre-trigger select setting.
screamer 0:e4d670b91a9a 783 *
screamer 0:e4d670b91a9a 784 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 785 * @param instance device instance.
screamer 0:e4d670b91a9a 786 * @return select ADCx pre-trigger select setting
screamer 0:e4d670b91a9a 787 */
screamer 0:e4d670b91a9a 788 sim_pretrgsel_t SIM_HAL_GetAdcPreTriggerMode(uint32_t baseAddr, uint8_t instance);
screamer 0:e4d670b91a9a 789
screamer 0:e4d670b91a9a 790 /*!
screamer 0:e4d670b91a9a 791 * @brief Sets the ADCx trigger select setting.
screamer 0:e4d670b91a9a 792 *
screamer 0:e4d670b91a9a 793 * This function selects the ADCx trigger source when alternative triggers
screamer 0:e4d670b91a9a 794 * are enabled through ADCxALTTRGEN.
screamer 0:e4d670b91a9a 795 *
screamer 0:e4d670b91a9a 796 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 797 * @param instance device instance.
screamer 0:e4d670b91a9a 798 * @param select trigger select setting for ADCx
screamer 0:e4d670b91a9a 799 * - 0000: External trigger
screamer 0:e4d670b91a9a 800 * - 0001: High speed comparator 0 asynchronous interrupt
screamer 0:e4d670b91a9a 801 * - 0010: High speed comparator 1 asynchronous interrupt
screamer 0:e4d670b91a9a 802 * - 0011: High speed comparator 2 asynchronous interrupt
screamer 0:e4d670b91a9a 803 * - 0100: PIT trigger 0
screamer 0:e4d670b91a9a 804 * - 0101: PIT trigger 1
screamer 0:e4d670b91a9a 805 * - 0110: PIT trigger 2
screamer 0:e4d670b91a9a 806 * - 0111: PIT trigger 3
screamer 0:e4d670b91a9a 807 * - 1000: FTM0 trigger
screamer 0:e4d670b91a9a 808 * - 1001: FTM1 trigger
screamer 0:e4d670b91a9a 809 * - 1010: FTM2 trigger
screamer 0:e4d670b91a9a 810 * - 1011: FTM3 trigger
screamer 0:e4d670b91a9a 811 * - 1100: RTC alarm
screamer 0:e4d670b91a9a 812 * - 1101: RTC seconds
screamer 0:e4d670b91a9a 813 * - 1110: Low-power timer trigger
screamer 0:e4d670b91a9a 814 * - 1111: High speed comparator 3 asynchronous interrupt
screamer 0:e4d670b91a9a 815 */
screamer 0:e4d670b91a9a 816 void SIM_HAL_SetAdcTriggerMode(uint32_t baseAddr, uint8_t instance, sim_trgsel_t select);
screamer 0:e4d670b91a9a 817
screamer 0:e4d670b91a9a 818 /*!
screamer 0:e4d670b91a9a 819 * @brief Gets the ADCx trigger select setting.
screamer 0:e4d670b91a9a 820 *
screamer 0:e4d670b91a9a 821 * This function gets the ADCx trigger select setting.
screamer 0:e4d670b91a9a 822 *
screamer 0:e4d670b91a9a 823 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 824 * @param instance device instance.
screamer 0:e4d670b91a9a 825 * @return select ADCx trigger select setting
screamer 0:e4d670b91a9a 826 */
screamer 0:e4d670b91a9a 827 sim_pretrgsel_t SIM_HAL_GetAdcTriggerMode(uint32_t baseAddr, uint8_t instance);
screamer 0:e4d670b91a9a 828
screamer 0:e4d670b91a9a 829 /*!
screamer 0:e4d670b91a9a 830 * @brief Sets the UARTx receive data source select setting.
screamer 0:e4d670b91a9a 831 *
screamer 0:e4d670b91a9a 832 * This function selects the source for the UARTx receive data.
screamer 0:e4d670b91a9a 833 *
screamer 0:e4d670b91a9a 834 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 835 * @param instance device instance.
screamer 0:e4d670b91a9a 836 * @param select the source for the UARTx receive data
screamer 0:e4d670b91a9a 837 * - 00: UARTx_RX pin.
screamer 0:e4d670b91a9a 838 * - 01: CMP0.
screamer 0:e4d670b91a9a 839 * - 10: CMP1.
screamer 0:e4d670b91a9a 840 * - 11: Reserved.
screamer 0:e4d670b91a9a 841 */
screamer 0:e4d670b91a9a 842 void SIM_HAL_SetUartRxSrcMode(uint32_t baseAddr, uint8_t instance, sim_uart_rxsrc_t select);
screamer 0:e4d670b91a9a 843
screamer 0:e4d670b91a9a 844 /*!
screamer 0:e4d670b91a9a 845 * @brief Gets the UARTx receive data source select setting.
screamer 0:e4d670b91a9a 846 *
screamer 0:e4d670b91a9a 847 * This function gets the UARTx receive data source select setting.
screamer 0:e4d670b91a9a 848 *
screamer 0:e4d670b91a9a 849 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 850 * @param instance device instance.
screamer 0:e4d670b91a9a 851 * @return select UARTx receive data source select setting
screamer 0:e4d670b91a9a 852 */
screamer 0:e4d670b91a9a 853 sim_uart_rxsrc_t SIM_HAL_GetUartRxSrcMode(uint32_t baseAddr, uint8_t instance);
screamer 0:e4d670b91a9a 854
screamer 0:e4d670b91a9a 855 /*!
screamer 0:e4d670b91a9a 856 * @brief Sets the UARTx transmit data source select setting.
screamer 0:e4d670b91a9a 857 *
screamer 0:e4d670b91a9a 858 * This function selects the source for the UARTx transmit data.
screamer 0:e4d670b91a9a 859 *
screamer 0:e4d670b91a9a 860 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 861 * @param instance device instance.
screamer 0:e4d670b91a9a 862 * @param select the source for the UARTx transmit data
screamer 0:e4d670b91a9a 863 * - 00: UARTx_TX pin.
screamer 0:e4d670b91a9a 864 * - 01: UARTx_TX pin modulated with FTM1 channel 0 output.
screamer 0:e4d670b91a9a 865 * - 10: UARTx_TX pin modulated with FTM2 channel 0 output.
screamer 0:e4d670b91a9a 866 * - 11: Reserved.
screamer 0:e4d670b91a9a 867 */
screamer 0:e4d670b91a9a 868 void SIM_HAL_SetUartTxSrcMode(uint32_t baseAddr, uint8_t instance, sim_uart_txsrc_t select);
screamer 0:e4d670b91a9a 869
screamer 0:e4d670b91a9a 870 /*!
screamer 0:e4d670b91a9a 871 * @brief Gets the UARTx transmit data source select setting.
screamer 0:e4d670b91a9a 872 *
screamer 0:e4d670b91a9a 873 * This function gets the UARTx transmit data source select setting.
screamer 0:e4d670b91a9a 874 *
screamer 0:e4d670b91a9a 875 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 876 * @param instance device instance.
screamer 0:e4d670b91a9a 877 * @return select UARTx transmit data source select setting
screamer 0:e4d670b91a9a 878 */
screamer 0:e4d670b91a9a 879 sim_uart_txsrc_t SIM_HAL_GetUartTxSrcMode(uint32_t baseAddr, uint8_t instance);
screamer 0:e4d670b91a9a 880
screamer 0:e4d670b91a9a 881 #if FSL_FEATURE_SIM_OPT_HAS_ODE
screamer 0:e4d670b91a9a 882 /*!
screamer 0:e4d670b91a9a 883 * @brief Sets the UARTx Open Drain Enable setting.
screamer 0:e4d670b91a9a 884 *
screamer 0:e4d670b91a9a 885 * This function enables/disables the UARTx Open Drain.
screamer 0:e4d670b91a9a 886 *
screamer 0:e4d670b91a9a 887 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 888 * @param instance device instance.
screamer 0:e4d670b91a9a 889 * @param enable Enable/disable UARTx Open Drain
screamer 0:e4d670b91a9a 890 * - True: Enable UARTx Open Drain
screamer 0:e4d670b91a9a 891 * - False: Disable UARTx Open Drain
screamer 0:e4d670b91a9a 892 */
screamer 0:e4d670b91a9a 893 void SIM_HAL_SetUartOpenDrainCmd(uint32_t baseAddr, uint8_t instance, bool enable);
screamer 0:e4d670b91a9a 894
screamer 0:e4d670b91a9a 895 /*!
screamer 0:e4d670b91a9a 896 * @brief Gets the UARTx Open Drain Enable setting.
screamer 0:e4d670b91a9a 897 *
screamer 0:e4d670b91a9a 898 * This function gets the UARTx Open Drain Enable setting.
screamer 0:e4d670b91a9a 899 *
screamer 0:e4d670b91a9a 900 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 901 * @param instance device instance.
screamer 0:e4d670b91a9a 902 * @return enabled True if UARTx Open Drain is enabled.
screamer 0:e4d670b91a9a 903 */
screamer 0:e4d670b91a9a 904 bool SIM_HAL_GetUartOpenDrainCmd(uint32_t baseAddr, uint8_t instance);
screamer 0:e4d670b91a9a 905 #endif
screamer 0:e4d670b91a9a 906
screamer 0:e4d670b91a9a 907 #if FSL_FEATURE_SIM_OPT_HAS_FTM
screamer 0:e4d670b91a9a 908 /*!
screamer 0:e4d670b91a9a 909 * @brief Sets the FlexTimer x hardware trigger y source select setting.
screamer 0:e4d670b91a9a 910 *
screamer 0:e4d670b91a9a 911 * This function selects the source of FTMx hardware trigger y.
screamer 0:e4d670b91a9a 912 *
screamer 0:e4d670b91a9a 913 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 914 * @param instance device instance.
screamer 0:e4d670b91a9a 915 * @param trigger hardware trigger y
screamer 0:e4d670b91a9a 916 * @param select FlexTimer x hardware trigger y
screamer 0:e4d670b91a9a 917 * - 0: Pre-trigger A selected for ADCx.
screamer 0:e4d670b91a9a 918 * - 1: Pre-trigger B selected for ADCx.
screamer 0:e4d670b91a9a 919 */
screamer 0:e4d670b91a9a 920 void SIM_HAL_SetFtmTriggerSrcMode(uint32_t baseAddr,
screamer 0:e4d670b91a9a 921 uint8_t instance,
screamer 0:e4d670b91a9a 922 uint8_t trigger,
screamer 0:e4d670b91a9a 923 sim_ftm_trg_src_t select);
screamer 0:e4d670b91a9a 924
screamer 0:e4d670b91a9a 925 /*!
screamer 0:e4d670b91a9a 926 * @brief Gets the FlexTimer x hardware trigger y source select setting.
screamer 0:e4d670b91a9a 927 *
screamer 0:e4d670b91a9a 928 * This function gets the FlexTimer x hardware trigger y source select setting.
screamer 0:e4d670b91a9a 929 *
screamer 0:e4d670b91a9a 930 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 931 * @param instance device instance.
screamer 0:e4d670b91a9a 932 * @param trigger hardware trigger y
screamer 0:e4d670b91a9a 933 * @return select FlexTimer x hardware trigger y source select setting
screamer 0:e4d670b91a9a 934 */
screamer 0:e4d670b91a9a 935 sim_ftm_trg_src_t SIM_HAL_GetFtmTriggerSrcMode(uint32_t baseAddr, uint8_t instance, uint8_t trigger);
screamer 0:e4d670b91a9a 936
screamer 0:e4d670b91a9a 937 /*!
screamer 0:e4d670b91a9a 938 * @brief Sets the FlexTimer x external clock pin select setting.
screamer 0:e4d670b91a9a 939 *
screamer 0:e4d670b91a9a 940 * This function selects the source of FTMx external clock pin select.
screamer 0:e4d670b91a9a 941 *
screamer 0:e4d670b91a9a 942 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 943 * @param instance device instance.
screamer 0:e4d670b91a9a 944 * @param select FTMx external clock pin select
screamer 0:e4d670b91a9a 945 * - 0: FTMx external clock driven by FTM CLKIN0 pin.
screamer 0:e4d670b91a9a 946 * - 1: FTMx external clock driven by FTM CLKIN1 pin.
screamer 0:e4d670b91a9a 947 */
screamer 0:e4d670b91a9a 948 void SIM_HAL_SetFtmExternalClkPinMode(uint32_t baseAddr, uint8_t instance, sim_ftm_clk_sel_t select);
screamer 0:e4d670b91a9a 949
screamer 0:e4d670b91a9a 950 /*!
screamer 0:e4d670b91a9a 951 * @brief Gets the FlexTimer x external clock pin select setting.
screamer 0:e4d670b91a9a 952 *
screamer 0:e4d670b91a9a 953 * This function gets the FlexTimer x external clock pin select setting.
screamer 0:e4d670b91a9a 954 *
screamer 0:e4d670b91a9a 955 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 956 * @param instance device instance.
screamer 0:e4d670b91a9a 957 * @return select FlexTimer x external clock pin select setting
screamer 0:e4d670b91a9a 958 */
screamer 0:e4d670b91a9a 959 sim_ftm_clk_sel_t SIM_HAL_GetFtmExternalClkPinMode(uint32_t baseAddr, uint8_t instance);
screamer 0:e4d670b91a9a 960
screamer 0:e4d670b91a9a 961 /*!
screamer 0:e4d670b91a9a 962 * @brief Sets the FlexTimer x channel y input capture source select setting.
screamer 0:e4d670b91a9a 963 *
screamer 0:e4d670b91a9a 964 * This function selects the FlexTimer x channel y input capture source.
screamer 0:e4d670b91a9a 965 *
screamer 0:e4d670b91a9a 966 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 967 * @param instance device instance.
screamer 0:e4d670b91a9a 968 * @param channel FlexTimer channel y
screamer 0:e4d670b91a9a 969 * @param select FlexTimer x channel y input capture source
screamer 0:e4d670b91a9a 970 * See the reference manual for detailed definition for each channel and selection.
screamer 0:e4d670b91a9a 971 */
screamer 0:e4d670b91a9a 972 void SIM_HAL_SetFtmChSrcMode(uint32_t baseAddr, uint8_t instance, uint8_t channel, sim_ftm_ch_src_t select);
screamer 0:e4d670b91a9a 973
screamer 0:e4d670b91a9a 974 /*!
screamer 0:e4d670b91a9a 975 * @brief Gets the FlexTimer x channel y input capture source select setting.
screamer 0:e4d670b91a9a 976 *
screamer 0:e4d670b91a9a 977 * This function gets the FlexTimer x channel y input capture source select setting.
screamer 0:e4d670b91a9a 978 *
screamer 0:e4d670b91a9a 979 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 980 * @param instance device instance.
screamer 0:e4d670b91a9a 981 * @param channel FlexTimer channel y
screamer 0:e4d670b91a9a 982 * @return select FlexTimer x channel y input capture source select setting
screamer 0:e4d670b91a9a 983 */
screamer 0:e4d670b91a9a 984 sim_ftm_ch_src_t SIM_HAL_GetFtmChSrcMode(uint32_t baseAddr, uint8_t instance, uint8_t channel);
screamer 0:e4d670b91a9a 985
screamer 0:e4d670b91a9a 986 /*!
screamer 0:e4d670b91a9a 987 * @brief Sets the FlexTimer x fault y select setting.
screamer 0:e4d670b91a9a 988 *
screamer 0:e4d670b91a9a 989 * This function sets the FlexTimer x fault y select setting.
screamer 0:e4d670b91a9a 990 *
screamer 0:e4d670b91a9a 991 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 992 * @param instance device instance.
screamer 0:e4d670b91a9a 993 * @param fault fault y
screamer 0:e4d670b91a9a 994 * @param select FlexTimer x fault y select setting
screamer 0:e4d670b91a9a 995 * - 0: FlexTimer x fault y select 0.
screamer 0:e4d670b91a9a 996 * - 1: FlexTimer x fault y select 1.
screamer 0:e4d670b91a9a 997 */
screamer 0:e4d670b91a9a 998 void SIM_HAL_SetFtmFaultSelMode(uint32_t baseAddr, uint8_t instance, uint8_t fault, sim_ftm_flt_sel_t select);
screamer 0:e4d670b91a9a 999
screamer 0:e4d670b91a9a 1000 /*!
screamer 0:e4d670b91a9a 1001 * @brief Gets the FlexTimer x fault y select setting.
screamer 0:e4d670b91a9a 1002 *
screamer 0:e4d670b91a9a 1003 * This function gets the FlexTimer x fault y select setting.
screamer 0:e4d670b91a9a 1004 *
screamer 0:e4d670b91a9a 1005 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 1006 * @param instance device instance.
screamer 0:e4d670b91a9a 1007 * @param fault fault y
screamer 0:e4d670b91a9a 1008 * @return select FlexTimer x fault y select setting
screamer 0:e4d670b91a9a 1009 */
screamer 0:e4d670b91a9a 1010 sim_ftm_flt_sel_t SIM_HAL_GetFtmFaultSelMode(uint32_t baseAddr, uint8_t instance, uint8_t fault);
screamer 0:e4d670b91a9a 1011 #endif
screamer 0:e4d670b91a9a 1012
screamer 0:e4d670b91a9a 1013 #if FSL_FEATURE_SIM_OPT_HAS_TPM
screamer 0:e4d670b91a9a 1014 /*!
screamer 0:e4d670b91a9a 1015 * @brief Sets the Timer/PWM x external clock pin select setting.
screamer 0:e4d670b91a9a 1016 *
screamer 0:e4d670b91a9a 1017 * This function selects the source of the Timer/PWM x external clock pin select.
screamer 0:e4d670b91a9a 1018 *
screamer 0:e4d670b91a9a 1019 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 1020 * @param instance device instance.
screamer 0:e4d670b91a9a 1021 * @param select Timer/PWM x external clock pin select
screamer 0:e4d670b91a9a 1022 * - 0: Timer/PWM x external clock driven by the TPM_CLKIN0 pin.
screamer 0:e4d670b91a9a 1023 * - 1: Timer/PWM x external clock driven by the TPM_CLKIN1 pin.
screamer 0:e4d670b91a9a 1024 */
screamer 0:e4d670b91a9a 1025 void SIM_HAL_SetTpmExternalClkPinSelMode(uint32_t baseAddr, uint8_t instance, sim_tpm_clk_sel_t select);
screamer 0:e4d670b91a9a 1026
screamer 0:e4d670b91a9a 1027 /*!
screamer 0:e4d670b91a9a 1028 * @brief Gets the Timer/PWM x external clock pin select setting.
screamer 0:e4d670b91a9a 1029 *
screamer 0:e4d670b91a9a 1030 * This function gets the Timer/PWM x external clock pin select setting.
screamer 0:e4d670b91a9a 1031 *
screamer 0:e4d670b91a9a 1032 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 1033 * @param instance device instance.
screamer 0:e4d670b91a9a 1034 * @return select Timer/PWM x external clock pin select setting
screamer 0:e4d670b91a9a 1035 */
screamer 0:e4d670b91a9a 1036 sim_tpm_clk_sel_t SIM_HAL_GetTpmExternalClkPinSelMode(uint32_t baseAddr, uint8_t instance);
screamer 0:e4d670b91a9a 1037
screamer 0:e4d670b91a9a 1038 /*!
screamer 0:e4d670b91a9a 1039 * @brief Sets the Timer/PWM x channel y input capture source select setting.
screamer 0:e4d670b91a9a 1040 *
screamer 0:e4d670b91a9a 1041 * This function selects the Timer/PWM x channel y input capture source.
screamer 0:e4d670b91a9a 1042 *
screamer 0:e4d670b91a9a 1043 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 1044 * @param instance device instance.
screamer 0:e4d670b91a9a 1045 * @param channel TPM channel y
screamer 0:e4d670b91a9a 1046 * @param select Timer/PWM x channel y input capture source
screamer 0:e4d670b91a9a 1047 * - 0: TPMx_CH0 signal
screamer 0:e4d670b91a9a 1048 * - 1: CMP0 output
screamer 0:e4d670b91a9a 1049 */
screamer 0:e4d670b91a9a 1050 void SIM_HAL_SetTpmChSrcMode(uint32_t baseAddr, uint8_t instance, uint8_t channel, sim_tpm_ch_src_t select);
screamer 0:e4d670b91a9a 1051
screamer 0:e4d670b91a9a 1052 /*!
screamer 0:e4d670b91a9a 1053 * @brief Gets the Timer/PWM x channel y input capture source select setting.
screamer 0:e4d670b91a9a 1054 *
screamer 0:e4d670b91a9a 1055 * This function gets the Timer/PWM x channel y input capture source select setting.
screamer 0:e4d670b91a9a 1056 *
screamer 0:e4d670b91a9a 1057 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 1058 * @param instance device instance.
screamer 0:e4d670b91a9a 1059 * @param channel Tpm channel y
screamer 0:e4d670b91a9a 1060 * @return select Timer/PWM x channel y input capture source select setting
screamer 0:e4d670b91a9a 1061 */
screamer 0:e4d670b91a9a 1062 sim_tpm_ch_src_t SIM_HAL_GetTpmChSrcMode(uint32_t baseAddr, uint8_t instance, uint8_t channel);
screamer 0:e4d670b91a9a 1063 #endif
screamer 0:e4d670b91a9a 1064
screamer 0:e4d670b91a9a 1065 #if FSL_FEATURE_SIM_SDID_HAS_FAMILYID
screamer 0:e4d670b91a9a 1066 /*!
screamer 0:e4d670b91a9a 1067 * @brief Gets the Kinetis Family ID in the System Device ID register (SIM_SDID).
screamer 0:e4d670b91a9a 1068 *
screamer 0:e4d670b91a9a 1069 * This function gets the Kinetis Family ID in the System Device ID register.
screamer 0:e4d670b91a9a 1070 *
screamer 0:e4d670b91a9a 1071 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 1072 * @return id Kinetis Family ID
screamer 0:e4d670b91a9a 1073 */
screamer 0:e4d670b91a9a 1074 static inline uint32_t SIM_HAL_GetFamilyId(uint32_t baseAddr)
screamer 0:e4d670b91a9a 1075 {
screamer 0:e4d670b91a9a 1076 return BR_SIM_SDID_FAMILYID(baseAddr);
screamer 0:e4d670b91a9a 1077 }
screamer 0:e4d670b91a9a 1078 #endif
screamer 0:e4d670b91a9a 1079
screamer 0:e4d670b91a9a 1080 #if FSL_FEATURE_SIM_SDID_HAS_SUBFAMID
screamer 0:e4d670b91a9a 1081 /*!
screamer 0:e4d670b91a9a 1082 * @brief Gets the Kinetis Sub-Family ID in the System Device ID register (SIM_SDID).
screamer 0:e4d670b91a9a 1083 *
screamer 0:e4d670b91a9a 1084 * This function gets the Kinetis Sub-Family ID in System Device ID register.
screamer 0:e4d670b91a9a 1085 *
screamer 0:e4d670b91a9a 1086 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 1087 * @return id Kinetis Sub-Family ID
screamer 0:e4d670b91a9a 1088 */
screamer 0:e4d670b91a9a 1089 static inline uint32_t SIM_HAL_GetSubFamilyId(uint32_t baseAddr)
screamer 0:e4d670b91a9a 1090 {
screamer 0:e4d670b91a9a 1091 return BR_SIM_SDID_SUBFAMID(baseAddr);
screamer 0:e4d670b91a9a 1092 }
screamer 0:e4d670b91a9a 1093 #endif
screamer 0:e4d670b91a9a 1094
screamer 0:e4d670b91a9a 1095 #if FSL_FEATURE_SIM_SDID_HAS_SERIESID
screamer 0:e4d670b91a9a 1096 /*!
screamer 0:e4d670b91a9a 1097 * @brief Gets the Kinetis SeriesID in the System Device ID register (SIM_SDID).
screamer 0:e4d670b91a9a 1098 *
screamer 0:e4d670b91a9a 1099 * This function gets the Kinetis Series ID in System Device ID register.
screamer 0:e4d670b91a9a 1100 *
screamer 0:e4d670b91a9a 1101 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 1102 * @return id Kinetis Series ID
screamer 0:e4d670b91a9a 1103 */
screamer 0:e4d670b91a9a 1104 static inline uint32_t SIM_HAL_GetSeriesId(uint32_t baseAddr)
screamer 0:e4d670b91a9a 1105 {
screamer 0:e4d670b91a9a 1106 return BR_SIM_SDID_SERIESID(baseAddr);
screamer 0:e4d670b91a9a 1107 }
screamer 0:e4d670b91a9a 1108 #endif
screamer 0:e4d670b91a9a 1109
screamer 0:e4d670b91a9a 1110 #if FSL_FEATURE_SIM_SDID_HAS_FAMID
screamer 0:e4d670b91a9a 1111 /*!
screamer 0:e4d670b91a9a 1112 * @brief Gets the Kinetis Fam ID in System Device ID register (SIM_SDID).
screamer 0:e4d670b91a9a 1113 *
screamer 0:e4d670b91a9a 1114 * This function gets the Kinetis Fam ID in System Device ID register.
screamer 0:e4d670b91a9a 1115 *
screamer 0:e4d670b91a9a 1116 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 1117 * @return id Kinetis Fam ID
screamer 0:e4d670b91a9a 1118 */
screamer 0:e4d670b91a9a 1119 static inline uint32_t SIM_HAL_GetFamId(uint32_t baseAddr)
screamer 0:e4d670b91a9a 1120 {
screamer 0:e4d670b91a9a 1121 return BR_SIM_SDID_FAMID(baseAddr);
screamer 0:e4d670b91a9a 1122 }
screamer 0:e4d670b91a9a 1123 #endif
screamer 0:e4d670b91a9a 1124
screamer 0:e4d670b91a9a 1125 /*!
screamer 0:e4d670b91a9a 1126 * @brief Gets the Kinetis Pincount ID in System Device ID register (SIM_SDID).
screamer 0:e4d670b91a9a 1127 *
screamer 0:e4d670b91a9a 1128 * This function gets the Kinetis Pincount ID in System Device ID register.
screamer 0:e4d670b91a9a 1129 *
screamer 0:e4d670b91a9a 1130 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 1131 * @return id Kinetis Pincount ID
screamer 0:e4d670b91a9a 1132 */
screamer 0:e4d670b91a9a 1133 static inline uint32_t SIM_HAL_GetPinCntId(uint32_t baseAddr)
screamer 0:e4d670b91a9a 1134 {
screamer 0:e4d670b91a9a 1135 return BR_SIM_SDID_PINID(baseAddr);
screamer 0:e4d670b91a9a 1136 }
screamer 0:e4d670b91a9a 1137
screamer 0:e4d670b91a9a 1138 /*!
screamer 0:e4d670b91a9a 1139 * @brief Gets the Kinetis Revision ID in the System Device ID register (SIM_SDID).
screamer 0:e4d670b91a9a 1140 *
screamer 0:e4d670b91a9a 1141 * This function gets the Kinetis Revision ID in System Device ID register.
screamer 0:e4d670b91a9a 1142 *
screamer 0:e4d670b91a9a 1143 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 1144 * @return id Kinetis Revision ID
screamer 0:e4d670b91a9a 1145 */
screamer 0:e4d670b91a9a 1146 static inline uint32_t SIM_HAL_GetRevId(uint32_t baseAddr)
screamer 0:e4d670b91a9a 1147 {
screamer 0:e4d670b91a9a 1148 return BR_SIM_SDID_REVID(baseAddr);
screamer 0:e4d670b91a9a 1149 }
screamer 0:e4d670b91a9a 1150
screamer 0:e4d670b91a9a 1151 #if FSL_FEATURE_SIM_SDID_HAS_DIEID
screamer 0:e4d670b91a9a 1152 /*!
screamer 0:e4d670b91a9a 1153 * @brief Gets the Kinetis Die ID in the System Device ID register (SIM_SDID).
screamer 0:e4d670b91a9a 1154 *
screamer 0:e4d670b91a9a 1155 * This function gets the Kinetis Die ID in System Device ID register.
screamer 0:e4d670b91a9a 1156 *
screamer 0:e4d670b91a9a 1157 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 1158 * @return id Kinetis Die ID
screamer 0:e4d670b91a9a 1159 */
screamer 0:e4d670b91a9a 1160 static inline uint32_t SIM_HAL_GetDieId(uint32_t baseAddr)
screamer 0:e4d670b91a9a 1161 {
screamer 0:e4d670b91a9a 1162 return BR_SIM_SDID_DIEID(baseAddr);
screamer 0:e4d670b91a9a 1163 }
screamer 0:e4d670b91a9a 1164 #endif
screamer 0:e4d670b91a9a 1165
screamer 0:e4d670b91a9a 1166 #if FSL_FEATURE_SIM_SDID_HAS_SRAMSIZE
screamer 0:e4d670b91a9a 1167 /*!
screamer 0:e4d670b91a9a 1168 * @brief Gets the Kinetis SRAM size in the System Device ID register (SIM_SDID).
screamer 0:e4d670b91a9a 1169 *
screamer 0:e4d670b91a9a 1170 * This function gets the Kinetis SRAM Size in System Device ID register.
screamer 0:e4d670b91a9a 1171 *
screamer 0:e4d670b91a9a 1172 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 1173 * @return id Kinetis SRAM Size
screamer 0:e4d670b91a9a 1174 */
screamer 0:e4d670b91a9a 1175 static inline uint32_t SIM_HAL_GetSramSize(uint32_t baseAddr)
screamer 0:e4d670b91a9a 1176 {
screamer 0:e4d670b91a9a 1177 return BR_SIM_SDID_SRAMSIZE(baseAddr);
screamer 0:e4d670b91a9a 1178 }
screamer 0:e4d670b91a9a 1179 #endif
screamer 0:e4d670b91a9a 1180
screamer 0:e4d670b91a9a 1181 #if FSL_FEATURE_SIM_FCFG_HAS_NVMSIZE
screamer 0:e4d670b91a9a 1182 /*!
screamer 0:e4d670b91a9a 1183 * @brief Gets the FlexNVM size in the Flash Configuration Register 1 (SIM_FCFG).
screamer 0:e4d670b91a9a 1184 *
screamer 0:e4d670b91a9a 1185 * This function gets the FlexNVM size in the Flash Configuration Register 1.
screamer 0:e4d670b91a9a 1186 *
screamer 0:e4d670b91a9a 1187 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 1188 * @return size FlexNVM Size
screamer 0:e4d670b91a9a 1189 */
screamer 0:e4d670b91a9a 1190 static inline uint32_t SIM_HAL_GetFlexnvmSize(uint32_t baseAddr)
screamer 0:e4d670b91a9a 1191 {
screamer 0:e4d670b91a9a 1192 return BR_SIM_FCFG1_NVMSIZE(baseAddr);
screamer 0:e4d670b91a9a 1193 }
screamer 0:e4d670b91a9a 1194 #endif
screamer 0:e4d670b91a9a 1195
screamer 0:e4d670b91a9a 1196 /*!
screamer 0:e4d670b91a9a 1197 * @brief Gets the program flash size in the Flash Configuration Register 1 (SIM_FCFG).
screamer 0:e4d670b91a9a 1198 *
screamer 0:e4d670b91a9a 1199 * This function gets the program flash size in the Flash Configuration Register 1.
screamer 0:e4d670b91a9a 1200 *
screamer 0:e4d670b91a9a 1201 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 1202 * @return size Program flash Size
screamer 0:e4d670b91a9a 1203 */
screamer 0:e4d670b91a9a 1204 static inline uint32_t SIM_HAL_GetProgramFlashSize(uint32_t baseAddr)
screamer 0:e4d670b91a9a 1205 {
screamer 0:e4d670b91a9a 1206 return BR_SIM_FCFG1_PFSIZE(baseAddr);
screamer 0:e4d670b91a9a 1207 }
screamer 0:e4d670b91a9a 1208
screamer 0:e4d670b91a9a 1209 #if FSL_FEATURE_SIM_FCFG_HAS_EESIZE
screamer 0:e4d670b91a9a 1210 /*!
screamer 0:e4d670b91a9a 1211 * @brief Gets the EEProm size in the Flash Configuration Register 1 (SIM_FCFG).
screamer 0:e4d670b91a9a 1212 *
screamer 0:e4d670b91a9a 1213 * This function gets the EEProm size in the Flash Configuration Register 1.
screamer 0:e4d670b91a9a 1214 *
screamer 0:e4d670b91a9a 1215 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 1216 * @return size EEProm Size
screamer 0:e4d670b91a9a 1217 */
screamer 0:e4d670b91a9a 1218 static inline uint32_t SIM_HAL_GetEepromSize(uint32_t baseAddr)
screamer 0:e4d670b91a9a 1219 {
screamer 0:e4d670b91a9a 1220 return BR_SIM_FCFG1_EESIZE(baseAddr);
screamer 0:e4d670b91a9a 1221 }
screamer 0:e4d670b91a9a 1222 #endif
screamer 0:e4d670b91a9a 1223
screamer 0:e4d670b91a9a 1224 #if FSL_FEATURE_SIM_FCFG_HAS_DEPART
screamer 0:e4d670b91a9a 1225 /*!
screamer 0:e4d670b91a9a 1226 * @brief Gets the FlexNVM partition in the Flash Configuration Register 1 (SIM_FCFG).
screamer 0:e4d670b91a9a 1227 *
screamer 0:e4d670b91a9a 1228 * This function gets the FlexNVM partition in the Flash Configuration Register 1
screamer 0:e4d670b91a9a 1229 *
screamer 0:e4d670b91a9a 1230 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 1231 * @return setting FlexNVM partition setting
screamer 0:e4d670b91a9a 1232 */
screamer 0:e4d670b91a9a 1233 static inline uint32_t SIM_HAL_GetFlexnvmPartition(uint32_t baseAddr)
screamer 0:e4d670b91a9a 1234 {
screamer 0:e4d670b91a9a 1235 return BR_SIM_FCFG1_DEPART(baseAddr);
screamer 0:e4d670b91a9a 1236 }
screamer 0:e4d670b91a9a 1237 #endif
screamer 0:e4d670b91a9a 1238
screamer 0:e4d670b91a9a 1239 #if FSL_FEATURE_SIM_FCFG_HAS_FLASHDOZE
screamer 0:e4d670b91a9a 1240 /*!
screamer 0:e4d670b91a9a 1241 * @brief Sets the Flash Doze in the Flash Configuration Register 1 (SIM_FCFG).
screamer 0:e4d670b91a9a 1242 *
screamer 0:e4d670b91a9a 1243 * This function sets the Flash Doze in the Flash Configuration Register 1.
screamer 0:e4d670b91a9a 1244 *
screamer 0:e4d670b91a9a 1245 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 1246 * @param setting Flash Doze setting
screamer 0:e4d670b91a9a 1247 */
screamer 0:e4d670b91a9a 1248 static inline void SIM_HAL_SetFlashDoze(uint32_t baseAddr, uint32_t setting)
screamer 0:e4d670b91a9a 1249 {
screamer 0:e4d670b91a9a 1250 BW_SIM_FCFG1_FLASHDOZE(baseAddr, setting);
screamer 0:e4d670b91a9a 1251 }
screamer 0:e4d670b91a9a 1252
screamer 0:e4d670b91a9a 1253 /*!
screamer 0:e4d670b91a9a 1254 * @brief Gets the Flash Doze in the Flash Configuration Register 1 (SIM_FCFG).
screamer 0:e4d670b91a9a 1255 *
screamer 0:e4d670b91a9a 1256 * This function gets the Flash Doze in the Flash Configuration Register 1.
screamer 0:e4d670b91a9a 1257 *
screamer 0:e4d670b91a9a 1258 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 1259 * @return setting Flash Doze setting
screamer 0:e4d670b91a9a 1260 */
screamer 0:e4d670b91a9a 1261 static inline uint32_t SIM_HAL_GetFlashDoze(uint32_t baseAddr)
screamer 0:e4d670b91a9a 1262 {
screamer 0:e4d670b91a9a 1263 return BR_SIM_FCFG1_FLASHDOZE(baseAddr);
screamer 0:e4d670b91a9a 1264 }
screamer 0:e4d670b91a9a 1265 #endif
screamer 0:e4d670b91a9a 1266
screamer 0:e4d670b91a9a 1267 #if FSL_FEATURE_SIM_FCFG_HAS_FLASHDIS
screamer 0:e4d670b91a9a 1268 /*!
screamer 0:e4d670b91a9a 1269 * @brief Sets the Flash disable setting in the Flash Configuration Register 1 (SIM_FCFG).
screamer 0:e4d670b91a9a 1270 *
screamer 0:e4d670b91a9a 1271 * This function sets the Flash disable setting in the Flash Configuration Register 1.
screamer 0:e4d670b91a9a 1272 *
screamer 0:e4d670b91a9a 1273 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 1274 * @param disable Flash disable setting
screamer 0:e4d670b91a9a 1275 */
screamer 0:e4d670b91a9a 1276 static inline void SIM_HAL_SetFlashDisableCmd(uint32_t baseAddr, bool disable)
screamer 0:e4d670b91a9a 1277 {
screamer 0:e4d670b91a9a 1278 BW_SIM_FCFG1_FLASHDIS(baseAddr, disable);
screamer 0:e4d670b91a9a 1279 }
screamer 0:e4d670b91a9a 1280
screamer 0:e4d670b91a9a 1281 /*!
screamer 0:e4d670b91a9a 1282 * @brief Gets the Flash disable setting in the Flash Configuration Register 1 (SIM_FCFG).
screamer 0:e4d670b91a9a 1283 *
screamer 0:e4d670b91a9a 1284 * This function gets the Flash disable setting in the Flash Configuration Register 1.
screamer 0:e4d670b91a9a 1285 *
screamer 0:e4d670b91a9a 1286 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 1287 * @return setting Flash disable setting
screamer 0:e4d670b91a9a 1288 */
screamer 0:e4d670b91a9a 1289 static inline bool SIM_HAL_GetFlashDisableCmd(uint32_t baseAddr)
screamer 0:e4d670b91a9a 1290 {
screamer 0:e4d670b91a9a 1291 return (bool)BR_SIM_FCFG1_FLASHDIS(baseAddr);
screamer 0:e4d670b91a9a 1292 }
screamer 0:e4d670b91a9a 1293 #endif
screamer 0:e4d670b91a9a 1294
screamer 0:e4d670b91a9a 1295 #if FSL_FEATURE_SIM_FCFG_HAS_MAXADDR0
screamer 0:e4d670b91a9a 1296 /*!
screamer 0:e4d670b91a9a 1297 * @brief Gets the Flash maximum address block 0 in the Flash Configuration Register 1 (SIM_FCFG).
screamer 0:e4d670b91a9a 1298 *
screamer 0:e4d670b91a9a 1299 * This function gets the Flash maximum block 0 in Flash Configuration Register 2.
screamer 0:e4d670b91a9a 1300 *
screamer 0:e4d670b91a9a 1301 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 1302 * @return address Flash maximum block 0 address
screamer 0:e4d670b91a9a 1303 */
screamer 0:e4d670b91a9a 1304 static inline uint32_t SIM_HAL_GetFlashMaxAddrBlock0(uint32_t baseAddr)
screamer 0:e4d670b91a9a 1305 {
screamer 0:e4d670b91a9a 1306 return BR_SIM_FCFG2_MAXADDR0(baseAddr);
screamer 0:e4d670b91a9a 1307 }
screamer 0:e4d670b91a9a 1308 #endif
screamer 0:e4d670b91a9a 1309
screamer 0:e4d670b91a9a 1310 #if FSL_FEATURE_SIM_FCFG_HAS_MAXADDR1
screamer 0:e4d670b91a9a 1311 /*!
screamer 0:e4d670b91a9a 1312 * @brief Gets the Flash maximum address block 1 in Flash Configuration Register 2.
screamer 0:e4d670b91a9a 1313 *
screamer 0:e4d670b91a9a 1314 * This function gets the Flash maximum block 1 in Flash Configuration Register 1.
screamer 0:e4d670b91a9a 1315 *
screamer 0:e4d670b91a9a 1316 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 1317 * @return address Flash maximum block 0 address
screamer 0:e4d670b91a9a 1318 */
screamer 0:e4d670b91a9a 1319 static inline uint32_t SIM_HAL_GetFlashMaxAddrBlock1(uint32_t baseAddr)
screamer 0:e4d670b91a9a 1320 {
screamer 0:e4d670b91a9a 1321 return BR_SIM_FCFG2_MAXADDR1(baseAddr);
screamer 0:e4d670b91a9a 1322 }
screamer 0:e4d670b91a9a 1323 #endif
screamer 0:e4d670b91a9a 1324
screamer 0:e4d670b91a9a 1325 #if FSL_FEATURE_SIM_FCFG_HAS_MAXADDR01
screamer 0:e4d670b91a9a 1326 /*!
screamer 0:e4d670b91a9a 1327 * @brief Gets the Flash maximum address block 0 in the Flash Configuration Register 1 (SIM_FCFG).
screamer 0:e4d670b91a9a 1328 *
screamer 0:e4d670b91a9a 1329 * This function gets the Flash maximum block 0 in Flash Configuration Register 2.
screamer 0:e4d670b91a9a 1330 *
screamer 0:e4d670b91a9a 1331 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 1332 * @return address Flash maximum block 0 address
screamer 0:e4d670b91a9a 1333 */
screamer 0:e4d670b91a9a 1334 static inline uint32_t SIM_HAL_GetFlashMaxAddrBlock01(uint32_t baseAddr)
screamer 0:e4d670b91a9a 1335 {
screamer 0:e4d670b91a9a 1336 return BR_SIM_FCFG2_MAXADDR01(baseAddr);
screamer 0:e4d670b91a9a 1337 }
screamer 0:e4d670b91a9a 1338 #endif
screamer 0:e4d670b91a9a 1339
screamer 0:e4d670b91a9a 1340 #if FSL_FEATURE_SIM_FCFG_HAS_MAXADDR23
screamer 0:e4d670b91a9a 1341 /*!
screamer 0:e4d670b91a9a 1342 * @brief Gets the Flash maximum address block 1 in the Flash Configuration Register 2.
screamer 0:e4d670b91a9a 1343 *
screamer 0:e4d670b91a9a 1344 * This function gets the Flash maximum block 1 in Flash Configuration Register 1.
screamer 0:e4d670b91a9a 1345 *
screamer 0:e4d670b91a9a 1346 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 1347 * @return address Flash maximum block 0 address
screamer 0:e4d670b91a9a 1348 */
screamer 0:e4d670b91a9a 1349 static inline uint32_t SIM_HAL_GetFlashMaxAddrBlock23(uint32_t baseAddr)
screamer 0:e4d670b91a9a 1350 {
screamer 0:e4d670b91a9a 1351 return BR_SIM_FCFG2_MAXADDR23(baseAddr);
screamer 0:e4d670b91a9a 1352 }
screamer 0:e4d670b91a9a 1353 #endif
screamer 0:e4d670b91a9a 1354
screamer 0:e4d670b91a9a 1355 #if FSL_FEATURE_SIM_FCFG_HAS_PFLSH
screamer 0:e4d670b91a9a 1356 /*!
screamer 0:e4d670b91a9a 1357 * @brief Gets the program flash in the Flash Configuration Register 2.
screamer 0:e4d670b91a9a 1358 *
screamer 0:e4d670b91a9a 1359 * This function gets the program flash maximum block 0 in Flash Configuration Register 1.
screamer 0:e4d670b91a9a 1360 *
screamer 0:e4d670b91a9a 1361 * @param baseAddr Base address for current SIM instance.
screamer 0:e4d670b91a9a 1362 * @return status program flash status
screamer 0:e4d670b91a9a 1363 */
screamer 0:e4d670b91a9a 1364 static inline uint32_t SIM_HAL_GetProgramFlashCmd(uint32_t baseAddr)
screamer 0:e4d670b91a9a 1365 {
screamer 0:e4d670b91a9a 1366 return BR_SIM_FCFG2_PFLSH(baseAddr);
screamer 0:e4d670b91a9a 1367 }
screamer 0:e4d670b91a9a 1368 #endif
screamer 0:e4d670b91a9a 1369
screamer 0:e4d670b91a9a 1370 /*@}*/
screamer 0:e4d670b91a9a 1371
screamer 0:e4d670b91a9a 1372 #if defined(__cplusplus)
screamer 0:e4d670b91a9a 1373 }
screamer 0:e4d670b91a9a 1374 #endif /* __cplusplus*/
screamer 0:e4d670b91a9a 1375
screamer 0:e4d670b91a9a 1376 /*! @}*/
screamer 0:e4d670b91a9a 1377
screamer 0:e4d670b91a9a 1378
screamer 0:e4d670b91a9a 1379 /*
screamer 0:e4d670b91a9a 1380 * Include the CPU-specific clock API header files.
screamer 0:e4d670b91a9a 1381 */
screamer 0:e4d670b91a9a 1382 #if (defined(CPU_MK02FN128VFM10) || defined(CPU_MK02FN64VFM10) || defined(CPU_MK02FN128VLF10) || \
screamer 0:e4d670b91a9a 1383 defined(CPU_MK02FN64VLF10) || defined(CPU_MK02FN128VLH10) || defined(CPU_MK02FN64VLH10))
screamer 0:e4d670b91a9a 1384
screamer 0:e4d670b91a9a 1385 #define K02F12810_SERIES
screamer 0:e4d670b91a9a 1386
screamer 0:e4d670b91a9a 1387 #elif (defined(CPU_MK20DX128VMP5) || defined(CPU_MK20DN128VMP5) || defined(CPU_MK20DX64VMP5) || \
screamer 0:e4d670b91a9a 1388 defined(CPU_MK20DN64VMP5) || defined(CPU_MK20DX32VMP5) || defined(CPU_MK20DN32VMP5) || \
screamer 0:e4d670b91a9a 1389 defined(CPU_MK20DX128VLH5) || defined(CPU_MK20DN128VLH5) || defined(CPU_MK20DX64VLH5) || \
screamer 0:e4d670b91a9a 1390 defined(CPU_MK20DN64VLH5) || defined(CPU_MK20DX32VLH5) || defined(CPU_MK20DN32VLH5) || \
screamer 0:e4d670b91a9a 1391 defined(CPU_MK20DX128VFM5) || defined(CPU_MK20DN128VFM5) || defined(CPU_MK20DX64VFM5) || \
screamer 0:e4d670b91a9a 1392 defined(CPU_MK20DN64VFM5) || defined(CPU_MK20DX32VFM5) || defined(CPU_MK20DN32VFM5) || \
screamer 0:e4d670b91a9a 1393 defined(CPU_MK20DX128VFT5) || defined(CPU_MK20DN128VFT5) || defined(CPU_MK20DX64VFT5) || \
screamer 0:e4d670b91a9a 1394 defined(CPU_MK20DN64VFT5) || defined(CPU_MK20DX32VFT5) || defined(CPU_MK20DN32VFT5) || \
screamer 0:e4d670b91a9a 1395 defined(CPU_MK20DX128VLF5) || defined(CPU_MK20DN128VLF5) || defined(CPU_MK20DX64VLF5) || \
screamer 0:e4d670b91a9a 1396 defined(CPU_MK20DN64VLF5) || defined(CPU_MK20DX32VLF5) || defined(CPU_MK20DN32VLF5))
screamer 0:e4d670b91a9a 1397
screamer 0:e4d670b91a9a 1398 #define K20D5_SERIES
screamer 0:e4d670b91a9a 1399
screamer 0:e4d670b91a9a 1400
screamer 0:e4d670b91a9a 1401 #elif (defined(CPU_MK22FN128VDC10) || defined(CPU_MK22FN128VLH10) || defined(CPU_MK22FN128VLL10) || \
screamer 0:e4d670b91a9a 1402 defined(CPU_MK22FN128VMP10))
screamer 0:e4d670b91a9a 1403
screamer 0:e4d670b91a9a 1404 #define K22F12810_SERIES
screamer 0:e4d670b91a9a 1405
screamer 0:e4d670b91a9a 1406 /* Clock System Level API header file */
screamer 0:e4d670b91a9a 1407 #include "MK22F12810/fsl_sim_hal_K22F12810.h"
screamer 0:e4d670b91a9a 1408
screamer 0:e4d670b91a9a 1409 #elif (defined(CPU_MK22FN256VDC12) || defined(CPU_MK22FN256VLH12) || defined(CPU_MK22FN256VLL12) || \
screamer 0:e4d670b91a9a 1410 defined(CPU_MK22FN256VMP12))
screamer 0:e4d670b91a9a 1411
screamer 0:e4d670b91a9a 1412 #define K22F25612_SERIES
screamer 0:e4d670b91a9a 1413
screamer 0:e4d670b91a9a 1414 /* Clock System Level API header file */
screamer 0:e4d670b91a9a 1415 #include "MK22F25612/fsl_sim_hal_K22F25612.h"
screamer 0:e4d670b91a9a 1416
screamer 0:e4d670b91a9a 1417
screamer 0:e4d670b91a9a 1418
screamer 0:e4d670b91a9a 1419 #elif (defined(CPU_MK22FN512VDC12) || defined(CPU_MK22FN512VLH12) || defined(CPU_MK22FN512VLL12))
screamer 0:e4d670b91a9a 1420
screamer 0:e4d670b91a9a 1421 #define K22F51212_SERIES
screamer 0:e4d670b91a9a 1422
screamer 0:e4d670b91a9a 1423 /* Clock System Level API header file */
screamer 0:e4d670b91a9a 1424 #include "MK22F51212/fsl_sim_hal_K22F51212.h"
screamer 0:e4d670b91a9a 1425
screamer 0:e4d670b91a9a 1426
screamer 0:e4d670b91a9a 1427 #elif (defined(CPU_MK24FN1M0VDC12) || defined(CPU_MK24FN1M0VLQ12))
screamer 0:e4d670b91a9a 1428
screamer 0:e4d670b91a9a 1429 #define K24F12_SERIES
screamer 0:e4d670b91a9a 1430
screamer 0:e4d670b91a9a 1431 /* Clock System Level API header file */
screamer 0:e4d670b91a9a 1432 #include "MK24F12/fsl_sim_hal_K24F12.h"
screamer 0:e4d670b91a9a 1433
screamer 0:e4d670b91a9a 1434 #elif (defined(CPU_MK24FN256VDC12))
screamer 0:e4d670b91a9a 1435
screamer 0:e4d670b91a9a 1436 #define K24F25612_SERIES
screamer 0:e4d670b91a9a 1437
screamer 0:e4d670b91a9a 1438
screamer 0:e4d670b91a9a 1439 #elif (defined(CPU_MK63FN1M0VLQ12) || defined(CPU_MK63FN1M0VMD12))
screamer 0:e4d670b91a9a 1440
screamer 0:e4d670b91a9a 1441 #define K63F12_SERIES
screamer 0:e4d670b91a9a 1442
screamer 0:e4d670b91a9a 1443 /* Clock System Level API header file */
screamer 0:e4d670b91a9a 1444 #include "MK63F12/fsl_sim_hal_K63F12.h"
screamer 0:e4d670b91a9a 1445
screamer 0:e4d670b91a9a 1446 #elif (defined(CPU_MK64FX512VDC12) || defined(CPU_MK64FN1M0VDC12) || defined(CPU_MK64FX512VLL12) || \
screamer 0:e4d670b91a9a 1447 defined(CPU_MK64FN1M0VLL12) || defined(CPU_MK64FX512VLQ12) || defined(CPU_MK64FN1M0VLQ12) || \
screamer 0:e4d670b91a9a 1448 defined(CPU_MK64FX512VMD12) || defined(CPU_MK64FN1M0VMD12))
screamer 0:e4d670b91a9a 1449
screamer 0:e4d670b91a9a 1450 #define K64F12_SERIES
screamer 0:e4d670b91a9a 1451
screamer 0:e4d670b91a9a 1452 /* Clock System Level API header file */
screamer 0:e4d670b91a9a 1453 #include "MK64F12/fsl_sim_hal_K64F12.h"
screamer 0:e4d670b91a9a 1454
screamer 0:e4d670b91a9a 1455 #elif (defined(CPU_MK65FN2M0CAC18) || defined(CPU_MK65FX1M0CAC18) || defined(CPU_MK65FN2M0VMI18) || \
screamer 0:e4d670b91a9a 1456 defined(CPU_MK65FX1M0VMI18))
screamer 0:e4d670b91a9a 1457
screamer 0:e4d670b91a9a 1458 #define K65F18_SERIES
screamer 0:e4d670b91a9a 1459
screamer 0:e4d670b91a9a 1460
screamer 0:e4d670b91a9a 1461 #elif (defined(CPU_MK66FN2M0VLQ18) || defined(CPU_MK66FX1M0VLQ18) || defined(CPU_MK66FN2M0VMD18) || \
screamer 0:e4d670b91a9a 1462 defined(CPU_MK66FX1M0VMD18))
screamer 0:e4d670b91a9a 1463
screamer 0:e4d670b91a9a 1464 #define K66F18_SERIES
screamer 0:e4d670b91a9a 1465
screamer 0:e4d670b91a9a 1466
screamer 0:e4d670b91a9a 1467 #elif (defined(CPU_MK70FN1M0VMF12) || defined(CPU_MK70FX512VMF12) || defined(CPU_MK70FN1M0VMF15) || \
screamer 0:e4d670b91a9a 1468 defined(CPU_MK70FX512VMF15) || defined(CPU_MK70FN1M0VMJ12) || defined(CPU_MK70FX512VMJ12) || \
screamer 0:e4d670b91a9a 1469 defined(CPU_MK70FN1M0VMJ15) || defined(CPU_MK70FX512VMJ15))
screamer 0:e4d670b91a9a 1470
screamer 0:e4d670b91a9a 1471 #define K70F12_SERIES
screamer 0:e4d670b91a9a 1472
screamer 0:e4d670b91a9a 1473
screamer 0:e4d670b91a9a 1474 #elif (defined(CPU_MK70FN1M0VMF12) || defined(CPU_MK70FX512VMF12) || defined(CPU_MK70FN1M0VMF15) || \
screamer 0:e4d670b91a9a 1475 defined(CPU_MK70FX512VMF15) || defined(CPU_MK70FN1M0VMJ12) || defined(CPU_MK70FX512VMJ12) || \
screamer 0:e4d670b91a9a 1476 defined(CPU_MK70FN1M0VMJ15) || defined(CPU_MK70FX512VMJ15))
screamer 0:e4d670b91a9a 1477
screamer 0:e4d670b91a9a 1478 #define K70F15_SERIES
screamer 0:e4d670b91a9a 1479
screamer 0:e4d670b91a9a 1480
screamer 0:e4d670b91a9a 1481 #elif (defined(CPU_MKL02Z32CAF4) || defined(CPU_MKL02Z8VFG4) || defined(CPU_MKL02Z16VFG4) || \
screamer 0:e4d670b91a9a 1482 defined(CPU_MKL02Z32VFG4) || defined(CPU_MKL02Z16VFK4) || defined(CPU_MKL02Z32VFK4) || \
screamer 0:e4d670b91a9a 1483 defined(CPU_MKL02Z16VFM4) || defined(CPU_MKL02Z32VFM4))
screamer 0:e4d670b91a9a 1484
screamer 0:e4d670b91a9a 1485 #define KL02Z4_SERIES
screamer 0:e4d670b91a9a 1486
screamer 0:e4d670b91a9a 1487
screamer 0:e4d670b91a9a 1488 #elif (defined(CPU_MKL03Z32CAF4) || defined(CPU_MKL03Z8VFG4) || defined(CPU_MKL03Z16VFG4) || \
screamer 0:e4d670b91a9a 1489 defined(CPU_MKL03Z32VFG4) || defined(CPU_MKL03Z8VFK4) || defined(CPU_MKL03Z16VFK4) || \
screamer 0:e4d670b91a9a 1490 defined(CPU_MKL03Z32VFK4))
screamer 0:e4d670b91a9a 1491
screamer 0:e4d670b91a9a 1492 #define KL03Z4_SERIES
screamer 0:e4d670b91a9a 1493
screamer 0:e4d670b91a9a 1494
screamer 0:e4d670b91a9a 1495 #elif (defined(CPU_MKL05Z8VFK4) || defined(CPU_MKL05Z16VFK4) || defined(CPU_MKL05Z32VFK4) || \
screamer 0:e4d670b91a9a 1496 defined(CPU_MKL05Z8VLC4) || defined(CPU_MKL05Z16VLC4) || defined(CPU_MKL05Z32VLC4) || \
screamer 0:e4d670b91a9a 1497 defined(CPU_MKL05Z8VFM4) || defined(CPU_MKL05Z16VFM4) || defined(CPU_MKL05Z32VFM4) || \
screamer 0:e4d670b91a9a 1498 defined(CPU_MKL05Z16VLF4) || defined(CPU_MKL05Z32VLF4))
screamer 0:e4d670b91a9a 1499
screamer 0:e4d670b91a9a 1500 #define KL05Z4_SERIES
screamer 0:e4d670b91a9a 1501
screamer 0:e4d670b91a9a 1502
screamer 0:e4d670b91a9a 1503 #elif (defined(CPU_MKL13Z64VFM4) || defined(CPU_MKL13Z128VFM4) || defined(CPU_MKL13Z256VFM4) || \
screamer 0:e4d670b91a9a 1504 defined(CPU_MKL13Z64VFT4) || defined(CPU_MKL13Z128VFT4) || defined(CPU_MKL13Z256VFT4) || \
screamer 0:e4d670b91a9a 1505 defined(CPU_MKL13Z64VLH4) || defined(CPU_MKL13Z128VLH4) || defined(CPU_MKL13Z256VLH4) || \
screamer 0:e4d670b91a9a 1506 defined(CPU_MKL13Z64VMP4) || defined(CPU_MKL13Z128VMP4) || defined(CPU_MKL13Z256VMP4))
screamer 0:e4d670b91a9a 1507
screamer 0:e4d670b91a9a 1508 #define KL13Z4_SERIES
screamer 0:e4d670b91a9a 1509
screamer 0:e4d670b91a9a 1510
screamer 0:e4d670b91a9a 1511 #elif (defined(CPU_MKL23Z64VFM4) || defined(CPU_MKL23Z128VFM4) || defined(CPU_MKL23Z256VFM4) || \
screamer 0:e4d670b91a9a 1512 defined(CPU_MKL23Z64VFT4) || defined(CPU_MKL23Z128VFT4) || defined(CPU_MKL23Z256VFT4) || \
screamer 0:e4d670b91a9a 1513 defined(CPU_MKL23Z64VLH4) || defined(CPU_MKL23Z128VLH4) || defined(CPU_MKL23Z256VLH4) || \
screamer 0:e4d670b91a9a 1514 defined(CPU_MKL23Z64VMP4) || defined(CPU_MKL23Z128VMP4) || defined(CPU_MKL23Z256VMP4))
screamer 0:e4d670b91a9a 1515
screamer 0:e4d670b91a9a 1516 #define KL23Z4_SERIES
screamer 0:e4d670b91a9a 1517
screamer 0:e4d670b91a9a 1518
screamer 0:e4d670b91a9a 1519 #elif (defined(CPU_MKL25Z32VFM4) || defined(CPU_MKL25Z64VFM4) || defined(CPU_MKL25Z128VFM4) || \
screamer 0:e4d670b91a9a 1520 defined(CPU_MKL25Z32VFT4) || defined(CPU_MKL25Z64VFT4) || defined(CPU_MKL25Z128VFT4) || \
screamer 0:e4d670b91a9a 1521 defined(CPU_MKL25Z32VLH4) || defined(CPU_MKL25Z64VLH4) || defined(CPU_MKL25Z128VLH4) || \
screamer 0:e4d670b91a9a 1522 defined(CPU_MKL25Z32VLK4) || defined(CPU_MKL25Z64VLK4) || defined(CPU_MKL25Z128VLK4))
screamer 0:e4d670b91a9a 1523
screamer 0:e4d670b91a9a 1524 #define KL25Z4_SERIES
screamer 0:e4d670b91a9a 1525
screamer 0:e4d670b91a9a 1526 /* Clock System Level API header file */
screamer 0:e4d670b91a9a 1527 #include "MKL25Z4/fsl_sim_hal_KL25Z4.h"
screamer 0:e4d670b91a9a 1528
screamer 0:e4d670b91a9a 1529 #elif (defined(CPU_MKL26Z32VFM4) || defined(CPU_MKL26Z64VFM4) || defined(CPU_MKL26Z128VFM4) || \
screamer 0:e4d670b91a9a 1530 defined(CPU_MKL26Z32VFT4) || defined(CPU_MKL26Z64VFT4) || defined(CPU_MKL26Z128VFT4) || \
screamer 0:e4d670b91a9a 1531 defined(CPU_MKL26Z32VLH4) || defined(CPU_MKL26Z64VLH4) || defined(CPU_MKL26Z128VLH4) || \
screamer 0:e4d670b91a9a 1532 defined(CPU_MKL26Z256VLH4) || defined(CPU_MKL26Z256VLK4) || defined(CPU_MKL26Z128VLL4) || \
screamer 0:e4d670b91a9a 1533 defined(CPU_MKL26Z256VLL4) || defined(CPU_MKL26Z128VMC4) || defined(CPU_MKL26Z256VMC4))
screamer 0:e4d670b91a9a 1534
screamer 0:e4d670b91a9a 1535 #define KL26Z4_SERIES
screamer 0:e4d670b91a9a 1536
screamer 0:e4d670b91a9a 1537
screamer 0:e4d670b91a9a 1538 #elif (defined(CPU_MKL33Z128VLH4) || defined(CPU_MKL33Z256VLH4) || defined(CPU_MKL33Z128VMP4) || \
screamer 0:e4d670b91a9a 1539 defined(CPU_MKL33Z256VMP4))
screamer 0:e4d670b91a9a 1540
screamer 0:e4d670b91a9a 1541 #define KL33Z4_SERIES
screamer 0:e4d670b91a9a 1542
screamer 0:e4d670b91a9a 1543
screamer 0:e4d670b91a9a 1544 #elif (defined(CPU_MKL43Z64VLH4) || defined(CPU_MKL43Z128VLH4) || defined(CPU_MKL43Z256VLH4) || \
screamer 0:e4d670b91a9a 1545 defined(CPU_MKL43Z64VMP4) || defined(CPU_MKL43Z128VMP4) || defined(CPU_MKL43Z256VMP4))
screamer 0:e4d670b91a9a 1546
screamer 0:e4d670b91a9a 1547 #define KL43Z4_SERIES
screamer 0:e4d670b91a9a 1548
screamer 0:e4d670b91a9a 1549
screamer 0:e4d670b91a9a 1550 #elif (defined(CPU_MKL46Z128VLH4) || defined(CPU_MKL46Z256VLH4) || defined(CPU_MKL46Z128VLL4) || \
screamer 0:e4d670b91a9a 1551 defined(CPU_MKL46Z256VLL4) || defined(CPU_MKL46Z128VMC4) || defined(CPU_MKL46Z256VMC4))
screamer 0:e4d670b91a9a 1552
screamer 0:e4d670b91a9a 1553 #define KL46Z4_SERIES
screamer 0:e4d670b91a9a 1554
screamer 0:e4d670b91a9a 1555
screamer 0:e4d670b91a9a 1556 #elif (defined(CPU_MKV30F128VFM10) || defined(CPU_MKV30F64VFM10) || defined(CPU_MKV30F128VLF10) || \
screamer 0:e4d670b91a9a 1557 defined(CPU_MKV30F64VLF10) || defined(CPU_MKV30F128VLH10) || defined(CPU_MKV30F64VLH10))
screamer 0:e4d670b91a9a 1558
screamer 0:e4d670b91a9a 1559 #define KV30F12810_SERIES
screamer 0:e4d670b91a9a 1560
screamer 0:e4d670b91a9a 1561
screamer 0:e4d670b91a9a 1562 #elif (defined(CPU_MKV31F128VLH10) || defined(CPU_MKV31F128VLL10))
screamer 0:e4d670b91a9a 1563
screamer 0:e4d670b91a9a 1564 #define KV31F12810_SERIES
screamer 0:e4d670b91a9a 1565
screamer 0:e4d670b91a9a 1566 /* Clock System Level API header file */
screamer 0:e4d670b91a9a 1567 #include "MKV31F12810/fsl_sim_hal_KV31F12810.h"
screamer 0:e4d670b91a9a 1568
screamer 0:e4d670b91a9a 1569 #elif (defined(CPU_MKV31F256VLH12) || defined(CPU_MKV31F256VLL12))
screamer 0:e4d670b91a9a 1570
screamer 0:e4d670b91a9a 1571 #define KV31F25612_SERIES
screamer 0:e4d670b91a9a 1572
screamer 0:e4d670b91a9a 1573 /* Clock System Level API header file */
screamer 0:e4d670b91a9a 1574 #include "MKV31F25612/fsl_sim_hal_KV31F25612.h"
screamer 0:e4d670b91a9a 1575
screamer 0:e4d670b91a9a 1576
screamer 0:e4d670b91a9a 1577 #elif (defined(CPU_MKV31F512VLH12) || defined(CPU_MKV31F512VLL12))
screamer 0:e4d670b91a9a 1578
screamer 0:e4d670b91a9a 1579 #define KV31F51212_SERIES
screamer 0:e4d670b91a9a 1580
screamer 0:e4d670b91a9a 1581 /* Clock System Level API header file */
screamer 0:e4d670b91a9a 1582 #include "MKV31F51212/fsl_sim_hal_KV31F51212.h"
screamer 0:e4d670b91a9a 1583
screamer 0:e4d670b91a9a 1584 #elif (defined(CPU_MKV40F128VLH15) || defined(CPU_MKV40F128VLL15) || defined(CPU_MKV40F256VLH15) || \
screamer 0:e4d670b91a9a 1585 defined(CPU_MKV40F256VLL15) || defined(CPU_MKV40F64VLH15))
screamer 0:e4d670b91a9a 1586
screamer 0:e4d670b91a9a 1587 #define KV40F15_SERIES
screamer 0:e4d670b91a9a 1588
screamer 0:e4d670b91a9a 1589
screamer 0:e4d670b91a9a 1590 #elif (defined(CPU_MKV43F128VLH15) || defined(CPU_MKV43F128VLL15) || defined(CPU_MKV43F64VLH15))
screamer 0:e4d670b91a9a 1591
screamer 0:e4d670b91a9a 1592 #define KV43F15_SERIES
screamer 0:e4d670b91a9a 1593
screamer 0:e4d670b91a9a 1594
screamer 0:e4d670b91a9a 1595 #elif (defined(CPU_MKV44F128VLH15) || defined(CPU_MKV44F128VLL15) || defined(CPU_MKV44F64VLH15))
screamer 0:e4d670b91a9a 1596
screamer 0:e4d670b91a9a 1597 #define KV44F15_SERIES
screamer 0:e4d670b91a9a 1598
screamer 0:e4d670b91a9a 1599
screamer 0:e4d670b91a9a 1600 #elif (defined(CPU_MKV45F128VLH15) || defined(CPU_MKV45F128VLL15) || defined(CPU_MKV45F256VLH15) || \
screamer 0:e4d670b91a9a 1601 defined(CPU_MKV45F256VLL15))
screamer 0:e4d670b91a9a 1602
screamer 0:e4d670b91a9a 1603 #define KV45F15_SERIES
screamer 0:e4d670b91a9a 1604
screamer 0:e4d670b91a9a 1605
screamer 0:e4d670b91a9a 1606 #elif (defined(CPU_MKV46F128VLH15) || defined(CPU_MKV46F128VLL15) || defined(CPU_MKV46F256VLH15) || \
screamer 0:e4d670b91a9a 1607 defined(CPU_MKV46F256VLL15))
screamer 0:e4d670b91a9a 1608
screamer 0:e4d670b91a9a 1609 #define KV46F15_SERIES
screamer 0:e4d670b91a9a 1610
screamer 0:e4d670b91a9a 1611
screamer 0:e4d670b91a9a 1612 #else
screamer 0:e4d670b91a9a 1613 #error "No valid CPU defined!"
screamer 0:e4d670b91a9a 1614 #endif
screamer 0:e4d670b91a9a 1615
screamer 0:e4d670b91a9a 1616 #endif /* __FSL_SIM_HAL_H__*/
screamer 0:e4d670b91a9a 1617 /*******************************************************************************
screamer 0:e4d670b91a9a 1618 * EOF
screamer 0:e4d670b91a9a 1619 ******************************************************************************/
screamer 0:e4d670b91a9a 1620