Alexandre Proulx / PololuLedStrip

PololuLedStrip from mickaeljkoster with support for K64F

Fork of PololuLedStrip by Michael Koster

led_strip_write_color_K64F.s@24:b88e97eb2e09, 2014-11-25 (annotated)

Committer:
Alegrowin
Date:
Tue Nov 25 20:31:11 2014 +0000
Revision:
24:b88e97eb2e09
Parent:
23:9d1b45daf607 
Activate the K64F support

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Alegrowin 23:9d1b45daf607 1 AREA asm_func, CODE, READONLY
Alegrowin 23:9d1b45daf607 2 EXPORT led_strip_write_color_K64F
Alegrowin 23:9d1b45daf607 3 IMPORT led_strip_write_delays
Alegrowin 23:9d1b45daf607 4
Alegrowin 23:9d1b45daf607 5 MACRO
Alegrowin 23:9d1b45daf607 6 delay $id
Alegrowin 23:9d1b45daf607 7 ldr r5, =led_strip_write_delays
Alegrowin 23:9d1b45daf607 8 ldrb r5, [r5, $id]
Alegrowin 23:9d1b45daf607 9 ldr r4, =delay_region_end
Alegrowin 23:9d1b45daf607 10 subs r4, r4, r5
Alegrowin 23:9d1b45daf607 11 blx r4
Alegrowin 23:9d1b45daf607 12 MEND
Alegrowin 23:9d1b45daf607 13
Alegrowin 23:9d1b45daf607 14 led_strip_write_color_K64F
Alegrowin 23:9d1b45daf607 15 ; Register usage:
Alegrowin 23:9d1b45daf607 16 ; These are the first 4 arguments to the method:
Alegrowin 23:9d1b45daf607 17 ; R0: pointer to the color to send
Alegrowin 23:9d1b45daf607 18 ; R1: pointer to the register for setting the pin
Alegrowin 23:9d1b45daf607 19 ; R2: pointer to the register for clearing the pin
Alegrowin 23:9d1b45daf607 20 ; R3: pin mask
Alegrowin 23:9d1b45daf607 21 ; Additionally, we use these registers:
Alegrowin 23:9d1b45daf607 22 ; R4: temporary register
Alegrowin 23:9d1b45daf607 23 ; R5: temporary register
Alegrowin 23:9d1b45daf607 24 ; R6: shift register that holds the 24-bit color
Alegrowin 23:9d1b45daf607 25 ; R7: the number of bits we still need to send
Alegrowin 23:9d1b45daf607 26 ; R13: Link Register, holds return addresses.
Alegrowin 23:9d1b45daf607 27
Alegrowin 23:9d1b45daf607 28 ; Push those registers so we can restore them later.
Alegrowin 23:9d1b45daf607 29 push {r4, r5, r6, r7, lr}
Alegrowin 23:9d1b45daf607 30
Alegrowin 23:9d1b45daf607 31 ldrb r6, [r0, #1] ; Load green.
Alegrowin 23:9d1b45daf607 32 lsls r6, r6, #24 ; Put green in MSB of r6.
Alegrowin 23:9d1b45daf607 33 ldrb r4, [r0, #0] ; Load red.
Alegrowin 23:9d1b45daf607 34 lsls r4, r4, #16
Alegrowin 23:9d1b45daf607 35 orrs r6, r6, r4 ; Put red in r6.
Alegrowin 23:9d1b45daf607 36 ldrb r4, [r0, #2] ; Load blue.
Alegrowin 23:9d1b45daf607 37 lsls r4, r4, #8
Alegrowin 23:9d1b45daf607 38 orrs r6, r6, r4 ; Put blue in r6.
Alegrowin 23:9d1b45daf607 39
Alegrowin 23:9d1b45daf607 40 ; On the Cortex-M3 we simply did:
Alegrowin 23:9d1b45daf607 41 ; ldr r6, [r0] ; Read the color. Now we have: xxBbGgRr
Alegrowin 23:9d1b45daf607 42 ; rbit r6, r6 ; Reverse the order of the bits: rRgGbBxx
Alegrowin 23:9d1b45daf607 43 ; rev r6, r6 ; Reverse the order of the bytes: xxbBgGrR
Alegrowin 23:9d1b45daf607 44 ; and then we used rrxs for shifting to the right through carry.
Alegrowin 23:9d1b45daf607 45
Alegrowin 23:9d1b45daf607 46 ldr r7, =24 ; Initialize the loop counter register.
Alegrowin 23:9d1b45daf607 47
Alegrowin 23:9d1b45daf607 48 send_led_strip_bit
Alegrowin 23:9d1b45daf607 49 str r3, [r1] ; Drive the line high.
Alegrowin 23:9d1b45daf607 50
Alegrowin 23:9d1b45daf607 51 ; It doesn't really matter exactly how long we delay here as long as it is
Alegrowin 23:9d1b45daf607 52 ; less than 540 microseconds.
Alegrowin 23:9d1b45daf607 53 nop
Alegrowin 23:9d1b45daf607 54 nop
Alegrowin 23:9d1b45daf607 55 nop
Alegrowin 23:9d1b45daf607 56 nop
Alegrowin 23:9d1b45daf607 57 nop
Alegrowin 23:9d1b45daf607 58 nop
Alegrowin 23:9d1b45daf607 59 nop
Alegrowin 23:9d1b45daf607 60 nop
Alegrowin 23:9d1b45daf607 61 nop
Alegrowin 23:9d1b45daf607 62
Alegrowin 23:9d1b45daf607 63 ldr r4, =0x80000000
Alegrowin 23:9d1b45daf607 64 tst r6, r4
Alegrowin 23:9d1b45daf607 65 bne delay0
Alegrowin 23:9d1b45daf607 66 str r3, [r2] ; If the bit to send it 0, drive the line low.
Alegrowin 23:9d1b45daf607 67 delay0
Alegrowin 23:9d1b45daf607 68
Alegrowin 23:9d1b45daf607 69 delay #0
Alegrowin 23:9d1b45daf607 70
Alegrowin 23:9d1b45daf607 71 ;tst r6, r8
Alegrowin 23:9d1b45daf607 72 ldr r4, =0x80000000
Alegrowin 23:9d1b45daf607 73 tst r6, r4
Alegrowin 23:9d1b45daf607 74 beq delay1
Alegrowin 23:9d1b45daf607 75 str r3, [r2] ; If the bit to send is 1, drive the line low.
Alegrowin 23:9d1b45daf607 76 delay1
Alegrowin 23:9d1b45daf607 77
Alegrowin 23:9d1b45daf607 78 delay #1
Alegrowin 23:9d1b45daf607 79
Alegrowin 23:9d1b45daf607 80 lsls r6, r6, #1 ; Shift color bits.
Alegrowin 23:9d1b45daf607 81 subs r7, r7, #1 ; Decrement the loop counter.
Alegrowin 23:9d1b45daf607 82 bne send_led_strip_bit ; Send another bit if we have not reached zero.
Alegrowin 23:9d1b45daf607 83 pop {r4, r5, r6, r7, pc} ; Otherwise, restore the registers and return.
Alegrowin 23:9d1b45daf607 84 bx lr;
Alegrowin 23:9d1b45daf607 85
Alegrowin 23:9d1b45daf607 86 delay_region
Alegrowin 23:9d1b45daf607 87 ; The following is 128 nops.
Alegrowin 23:9d1b45daf607 88 nop
Alegrowin 23:9d1b45daf607 89 nop
Alegrowin 23:9d1b45daf607 90 nop
Alegrowin 23:9d1b45daf607 91 nop
Alegrowin 23:9d1b45daf607 92 nop
Alegrowin 23:9d1b45daf607 93 nop
Alegrowin 23:9d1b45daf607 94 nop
Alegrowin 23:9d1b45daf607 95 nop
Alegrowin 23:9d1b45daf607 96 nop
Alegrowin 23:9d1b45daf607 97 nop
Alegrowin 23:9d1b45daf607 98 nop
Alegrowin 23:9d1b45daf607 99 nop
Alegrowin 23:9d1b45daf607 100 nop
Alegrowin 23:9d1b45daf607 101 nop
Alegrowin 23:9d1b45daf607 102 nop
Alegrowin 23:9d1b45daf607 103 nop
Alegrowin 23:9d1b45daf607 104
Alegrowin 23:9d1b45daf607 105 nop
Alegrowin 23:9d1b45daf607 106 nop
Alegrowin 23:9d1b45daf607 107 nop
Alegrowin 23:9d1b45daf607 108 nop
Alegrowin 23:9d1b45daf607 109 nop
Alegrowin 23:9d1b45daf607 110 nop
Alegrowin 23:9d1b45daf607 111 nop
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Alegrowin 23:9d1b45daf607 115 nop
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Alegrowin 23:9d1b45daf607 117 nop
Alegrowin 23:9d1b45daf607 118 nop
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Alegrowin 23:9d1b45daf607 120 nop
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Alegrowin 23:9d1b45daf607 392 nop
Alegrowin 23:9d1b45daf607 393
Alegrowin 23:9d1b45daf607 394 nop
Alegrowin 23:9d1b45daf607 395 nop
Alegrowin 23:9d1b45daf607 396 nop
Alegrowin 23:9d1b45daf607 397 nop
Alegrowin 23:9d1b45daf607 398 nop
Alegrowin 23:9d1b45daf607 399 nop
Alegrowin 23:9d1b45daf607 400 nop
Alegrowin 23:9d1b45daf607 401 nop
Alegrowin 23:9d1b45daf607 402 nop
Alegrowin 23:9d1b45daf607 403 nop
Alegrowin 23:9d1b45daf607 404 nop
Alegrowin 23:9d1b45daf607 405 nop
Alegrowin 23:9d1b45daf607 406 nop
Alegrowin 23:9d1b45daf607 407 nop
Alegrowin 23:9d1b45daf607 408 nop
Alegrowin 23:9d1b45daf607 409 nop
Alegrowin 23:9d1b45daf607 410
Alegrowin 23:9d1b45daf607 411 nop
Alegrowin 23:9d1b45daf607 412 nop
Alegrowin 23:9d1b45daf607 413 nop
Alegrowin 23:9d1b45daf607 414 nop
Alegrowin 23:9d1b45daf607 415 nop
Alegrowin 23:9d1b45daf607 416 nop
Alegrowin 23:9d1b45daf607 417 nop
Alegrowin 23:9d1b45daf607 418 nop
Alegrowin 23:9d1b45daf607 419 nop
Alegrowin 23:9d1b45daf607 420 nop
Alegrowin 23:9d1b45daf607 421 nop
Alegrowin 23:9d1b45daf607 422 nop
Alegrowin 23:9d1b45daf607 423 nop
Alegrowin 23:9d1b45daf607 424 nop
Alegrowin 23:9d1b45daf607 425 nop
Alegrowin 23:9d1b45daf607 426 nop
Alegrowin 23:9d1b45daf607 427
Alegrowin 23:9d1b45daf607 428 delay_region_end
Alegrowin 23:9d1b45daf607 429 bx lr ; return
Alegrowin 23:9d1b45daf607 430
Alegrowin 23:9d1b45daf607 431 END