Mikis Wöhrmann / Mbed OS Nucleo_PWM_TEST

Just a test...

stm32f4xx_hal_msp.c@0:6b1a8c783fef, 2018-07-23 (annotated)

Committer:
Airdevelopments
Date:
Mon Jul 23 23:09:43 2018 +0000
Revision:
0:6b1a8c783fef
Just a test, no real use...

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Airdevelopments 0:6b1a8c783fef 1 /**
Airdevelopments 0:6b1a8c783fef 2 ******************************************************************************
Airdevelopments 0:6b1a8c783fef 3 * File Name : stm32f4xx_hal_msp.c
Airdevelopments 0:6b1a8c783fef 4 * Description : This file provides code for the MSP Initialization
Airdevelopments 0:6b1a8c783fef 5 * and de-Initialization codes.
Airdevelopments 0:6b1a8c783fef 6 ******************************************************************************
Airdevelopments 0:6b1a8c783fef 7 ** This notice applies to any and all portions of this file
Airdevelopments 0:6b1a8c783fef 8 * that are not between comment pairs USER CODE BEGIN and
Airdevelopments 0:6b1a8c783fef 9 * USER CODE END. Other portions of this file, whether
Airdevelopments 0:6b1a8c783fef 10 * inserted by the user or by software development tools
Airdevelopments 0:6b1a8c783fef 11 * are owned by their respective copyright owners.
Airdevelopments 0:6b1a8c783fef 12 *
Airdevelopments 0:6b1a8c783fef 13 * COPYRIGHT(c) 2018 STMicroelectronics
Airdevelopments 0:6b1a8c783fef 14 *
Airdevelopments 0:6b1a8c783fef 15 * Redistribution and use in source and binary forms, with or without modification,
Airdevelopments 0:6b1a8c783fef 16 * are permitted provided that the following conditions are met:
Airdevelopments 0:6b1a8c783fef 17 * 1. Redistributions of source code must retain the above copyright notice,
Airdevelopments 0:6b1a8c783fef 18 * this list of conditions and the following disclaimer.
Airdevelopments 0:6b1a8c783fef 19 * 2. Redistributions in binary form must reproduce the above copyright notice,
Airdevelopments 0:6b1a8c783fef 20 * this list of conditions and the following disclaimer in the documentation
Airdevelopments 0:6b1a8c783fef 21 * and/or other materials provided with the distribution.
Airdevelopments 0:6b1a8c783fef 22 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Airdevelopments 0:6b1a8c783fef 23 * may be used to endorse or promote products derived from this software
Airdevelopments 0:6b1a8c783fef 24 * without specific prior written permission.
Airdevelopments 0:6b1a8c783fef 25 *
Airdevelopments 0:6b1a8c783fef 26 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Airdevelopments 0:6b1a8c783fef 27 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Airdevelopments 0:6b1a8c783fef 28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Airdevelopments 0:6b1a8c783fef 29 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Airdevelopments 0:6b1a8c783fef 30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Airdevelopments 0:6b1a8c783fef 31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Airdevelopments 0:6b1a8c783fef 32 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Airdevelopments 0:6b1a8c783fef 33 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Airdevelopments 0:6b1a8c783fef 34 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Airdevelopments 0:6b1a8c783fef 35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Airdevelopments 0:6b1a8c783fef 36 *
Airdevelopments 0:6b1a8c783fef 37 ******************************************************************************
Airdevelopments 0:6b1a8c783fef 38 */
Airdevelopments 0:6b1a8c783fef 39 /* Includes ------------------------------------------------------------------*/
Airdevelopments 0:6b1a8c783fef 40 #include "stm32f4xx_hal.h"
Airdevelopments 0:6b1a8c783fef 41
Airdevelopments 0:6b1a8c783fef 42 extern void _Error_Handler(char *, int);
Airdevelopments 0:6b1a8c783fef 43 /* USER CODE BEGIN 0 */
Airdevelopments 0:6b1a8c783fef 44
Airdevelopments 0:6b1a8c783fef 45 /* USER CODE END 0 */
Airdevelopments 0:6b1a8c783fef 46 /**
Airdevelopments 0:6b1a8c783fef 47 * Initializes the Global MSP.
Airdevelopments 0:6b1a8c783fef 48 */
Airdevelopments 0:6b1a8c783fef 49 void HAL_MspInit(void)
Airdevelopments 0:6b1a8c783fef 50 {
Airdevelopments 0:6b1a8c783fef 51 /* USER CODE BEGIN MspInit 0 */
Airdevelopments 0:6b1a8c783fef 52
Airdevelopments 0:6b1a8c783fef 53 /* USER CODE END MspInit 0 */
Airdevelopments 0:6b1a8c783fef 54
Airdevelopments 0:6b1a8c783fef 55 __HAL_RCC_SYSCFG_CLK_ENABLE();
Airdevelopments 0:6b1a8c783fef 56 __HAL_RCC_PWR_CLK_ENABLE();
Airdevelopments 0:6b1a8c783fef 57
Airdevelopments 0:6b1a8c783fef 58 HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_0);
Airdevelopments 0:6b1a8c783fef 59
Airdevelopments 0:6b1a8c783fef 60 /* System interrupt init*/
Airdevelopments 0:6b1a8c783fef 61 /* MemoryManagement_IRQn interrupt configuration */
Airdevelopments 0:6b1a8c783fef 62 HAL_NVIC_SetPriority(MemoryManagement_IRQn, 0, 0);
Airdevelopments 0:6b1a8c783fef 63 /* BusFault_IRQn interrupt configuration */
Airdevelopments 0:6b1a8c783fef 64 HAL_NVIC_SetPriority(BusFault_IRQn, 0, 0);
Airdevelopments 0:6b1a8c783fef 65 /* UsageFault_IRQn interrupt configuration */
Airdevelopments 0:6b1a8c783fef 66 HAL_NVIC_SetPriority(UsageFault_IRQn, 0, 0);
Airdevelopments 0:6b1a8c783fef 67 /* SVCall_IRQn interrupt configuration */
Airdevelopments 0:6b1a8c783fef 68 HAL_NVIC_SetPriority(SVCall_IRQn, 0, 0);
Airdevelopments 0:6b1a8c783fef 69 /* DebugMonitor_IRQn interrupt configuration */
Airdevelopments 0:6b1a8c783fef 70 HAL_NVIC_SetPriority(DebugMonitor_IRQn, 0, 0);
Airdevelopments 0:6b1a8c783fef 71 /* PendSV_IRQn interrupt configuration */
Airdevelopments 0:6b1a8c783fef 72 HAL_NVIC_SetPriority(PendSV_IRQn, 0, 0);
Airdevelopments 0:6b1a8c783fef 73 /* SysTick_IRQn interrupt configuration */
Airdevelopments 0:6b1a8c783fef 74 HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0);
Airdevelopments 0:6b1a8c783fef 75
Airdevelopments 0:6b1a8c783fef 76 /* USER CODE BEGIN MspInit 1 */
Airdevelopments 0:6b1a8c783fef 77
Airdevelopments 0:6b1a8c783fef 78 /* USER CODE END MspInit 1 */
Airdevelopments 0:6b1a8c783fef 79 }
Airdevelopments 0:6b1a8c783fef 80
Airdevelopments 0:6b1a8c783fef 81 void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
Airdevelopments 0:6b1a8c783fef 82 {
Airdevelopments 0:6b1a8c783fef 83
Airdevelopments 0:6b1a8c783fef 84 if(htim_base->Instance==TIM3)
Airdevelopments 0:6b1a8c783fef 85 {
Airdevelopments 0:6b1a8c783fef 86 /* USER CODE BEGIN TIM3_MspInit 0 */
Airdevelopments 0:6b1a8c783fef 87
Airdevelopments 0:6b1a8c783fef 88 /* USER CODE END TIM3_MspInit 0 */
Airdevelopments 0:6b1a8c783fef 89 /* Peripheral clock enable */
Airdevelopments 0:6b1a8c783fef 90 __HAL_RCC_TIM3_CLK_ENABLE();
Airdevelopments 0:6b1a8c783fef 91 /* USER CODE BEGIN TIM3_MspInit 1 */
Airdevelopments 0:6b1a8c783fef 92
Airdevelopments 0:6b1a8c783fef 93 /* USER CODE END TIM3_MspInit 1 */
Airdevelopments 0:6b1a8c783fef 94 }
Airdevelopments 0:6b1a8c783fef 95
Airdevelopments 0:6b1a8c783fef 96 }
Airdevelopments 0:6b1a8c783fef 97
Airdevelopments 0:6b1a8c783fef 98 void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
Airdevelopments 0:6b1a8c783fef 99 {
Airdevelopments 0:6b1a8c783fef 100
Airdevelopments 0:6b1a8c783fef 101 GPIO_InitTypeDef GPIO_InitStruct;
Airdevelopments 0:6b1a8c783fef 102 if(htim->Instance==TIM3)
Airdevelopments 0:6b1a8c783fef 103 {
Airdevelopments 0:6b1a8c783fef 104 /* USER CODE BEGIN TIM3_MspPostInit 0 */
Airdevelopments 0:6b1a8c783fef 105
Airdevelopments 0:6b1a8c783fef 106 /* USER CODE END TIM3_MspPostInit 0 */
Airdevelopments 0:6b1a8c783fef 107
Airdevelopments 0:6b1a8c783fef 108 /**TIM3 GPIO Configuration
Airdevelopments 0:6b1a8c783fef 109 PB1 ------> TIM3_CH4
Airdevelopments 0:6b1a8c783fef 110 */
Airdevelopments 0:6b1a8c783fef 111 GPIO_InitStruct.Pin = GPIO_PIN_1;
Airdevelopments 0:6b1a8c783fef 112 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
Airdevelopments 0:6b1a8c783fef 113 GPIO_InitStruct.Pull = GPIO_NOPULL;
Airdevelopments 0:6b1a8c783fef 114 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
Airdevelopments 0:6b1a8c783fef 115 GPIO_InitStruct.Alternate = GPIO_AF2_TIM3;
Airdevelopments 0:6b1a8c783fef 116 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
Airdevelopments 0:6b1a8c783fef 117
Airdevelopments 0:6b1a8c783fef 118 /* USER CODE BEGIN TIM3_MspPostInit 1 */
Airdevelopments 0:6b1a8c783fef 119
Airdevelopments 0:6b1a8c783fef 120 /* USER CODE END TIM3_MspPostInit 1 */
Airdevelopments 0:6b1a8c783fef 121 }
Airdevelopments 0:6b1a8c783fef 122
Airdevelopments 0:6b1a8c783fef 123 }
Airdevelopments 0:6b1a8c783fef 124
Airdevelopments 0:6b1a8c783fef 125 void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
Airdevelopments 0:6b1a8c783fef 126 {
Airdevelopments 0:6b1a8c783fef 127
Airdevelopments 0:6b1a8c783fef 128 if(htim_base->Instance==TIM3)
Airdevelopments 0:6b1a8c783fef 129 {
Airdevelopments 0:6b1a8c783fef 130 /* USER CODE BEGIN TIM3_MspDeInit 0 */
Airdevelopments 0:6b1a8c783fef 131
Airdevelopments 0:6b1a8c783fef 132 /* USER CODE END TIM3_MspDeInit 0 */
Airdevelopments 0:6b1a8c783fef 133 /* Peripheral clock disable */
Airdevelopments 0:6b1a8c783fef 134 __HAL_RCC_TIM3_CLK_DISABLE();
Airdevelopments 0:6b1a8c783fef 135 /* USER CODE BEGIN TIM3_MspDeInit 1 */
Airdevelopments 0:6b1a8c783fef 136
Airdevelopments 0:6b1a8c783fef 137 /* USER CODE END TIM3_MspDeInit 1 */
Airdevelopments 0:6b1a8c783fef 138 }
Airdevelopments 0:6b1a8c783fef 139
Airdevelopments 0:6b1a8c783fef 140 }
Airdevelopments 0:6b1a8c783fef 141
Airdevelopments 0:6b1a8c783fef 142 void HAL_UART_MspInit(UART_HandleTypeDef* huart)
Airdevelopments 0:6b1a8c783fef 143 {
Airdevelopments 0:6b1a8c783fef 144
Airdevelopments 0:6b1a8c783fef 145 GPIO_InitTypeDef GPIO_InitStruct;
Airdevelopments 0:6b1a8c783fef 146 if(huart->Instance==USART2)
Airdevelopments 0:6b1a8c783fef 147 {
Airdevelopments 0:6b1a8c783fef 148 /* USER CODE BEGIN USART2_MspInit 0 */
Airdevelopments 0:6b1a8c783fef 149
Airdevelopments 0:6b1a8c783fef 150 /* USER CODE END USART2_MspInit 0 */
Airdevelopments 0:6b1a8c783fef 151 /* Peripheral clock enable */
Airdevelopments 0:6b1a8c783fef 152 __HAL_RCC_USART2_CLK_ENABLE();
Airdevelopments 0:6b1a8c783fef 153
Airdevelopments 0:6b1a8c783fef 154 /**USART2 GPIO Configuration
Airdevelopments 0:6b1a8c783fef 155 PA2 ------> USART2_TX
Airdevelopments 0:6b1a8c783fef 156 PA3 ------> USART2_RX
Airdevelopments 0:6b1a8c783fef 157 */
Airdevelopments 0:6b1a8c783fef 158 GPIO_InitStruct.Pin = USART_TX_Pin|USART_RX_Pin;
Airdevelopments 0:6b1a8c783fef 159 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
Airdevelopments 0:6b1a8c783fef 160 GPIO_InitStruct.Pull = GPIO_NOPULL;
Airdevelopments 0:6b1a8c783fef 161 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
Airdevelopments 0:6b1a8c783fef 162 GPIO_InitStruct.Alternate = GPIO_AF7_USART2;
Airdevelopments 0:6b1a8c783fef 163 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
Airdevelopments 0:6b1a8c783fef 164
Airdevelopments 0:6b1a8c783fef 165 /* USER CODE BEGIN USART2_MspInit 1 */
Airdevelopments 0:6b1a8c783fef 166
Airdevelopments 0:6b1a8c783fef 167 /* USER CODE END USART2_MspInit 1 */
Airdevelopments 0:6b1a8c783fef 168 }
Airdevelopments 0:6b1a8c783fef 169
Airdevelopments 0:6b1a8c783fef 170 }
Airdevelopments 0:6b1a8c783fef 171
Airdevelopments 0:6b1a8c783fef 172 void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
Airdevelopments 0:6b1a8c783fef 173 {
Airdevelopments 0:6b1a8c783fef 174
Airdevelopments 0:6b1a8c783fef 175 if(huart->Instance==USART2)
Airdevelopments 0:6b1a8c783fef 176 {
Airdevelopments 0:6b1a8c783fef 177 /* USER CODE BEGIN USART2_MspDeInit 0 */
Airdevelopments 0:6b1a8c783fef 178
Airdevelopments 0:6b1a8c783fef 179 /* USER CODE END USART2_MspDeInit 0 */
Airdevelopments 0:6b1a8c783fef 180 /* Peripheral clock disable */
Airdevelopments 0:6b1a8c783fef 181 __HAL_RCC_USART2_CLK_DISABLE();
Airdevelopments 0:6b1a8c783fef 182
Airdevelopments 0:6b1a8c783fef 183 /**USART2 GPIO Configuration
Airdevelopments 0:6b1a8c783fef 184 PA2 ------> USART2_TX
Airdevelopments 0:6b1a8c783fef 185 PA3 ------> USART2_RX
Airdevelopments 0:6b1a8c783fef 186 */
Airdevelopments 0:6b1a8c783fef 187 HAL_GPIO_DeInit(GPIOA, USART_TX_Pin|USART_RX_Pin);
Airdevelopments 0:6b1a8c783fef 188
Airdevelopments 0:6b1a8c783fef 189 /* USER CODE BEGIN USART2_MspDeInit 1 */
Airdevelopments 0:6b1a8c783fef 190
Airdevelopments 0:6b1a8c783fef 191 /* USER CODE END USART2_MspDeInit 1 */
Airdevelopments 0:6b1a8c783fef 192 }
Airdevelopments 0:6b1a8c783fef 193
Airdevelopments 0:6b1a8c783fef 194 }
Airdevelopments 0:6b1a8c783fef 195
Airdevelopments 0:6b1a8c783fef 196 /* USER CODE BEGIN 1 */
Airdevelopments 0:6b1a8c783fef 197
Airdevelopments 0:6b1a8c783fef 198 /* USER CODE END 1 */
Airdevelopments 0:6b1a8c783fef 199
Airdevelopments 0:6b1a8c783fef 200 /**
Airdevelopments 0:6b1a8c783fef 201 * @}
Airdevelopments 0:6b1a8c783fef 202 */
Airdevelopments 0:6b1a8c783fef 203
Airdevelopments 0:6b1a8c783fef 204 /**
Airdevelopments 0:6b1a8c783fef 205 * @}
Airdevelopments 0:6b1a8c783fef 206 */
Airdevelopments 0:6b1a8c783fef 207
Airdevelopments 0:6b1a8c783fef 208 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
Airdevelopments 0:6b1a8c783fef 209